diff options
Diffstat (limited to 'src/arch/amd64/shim.c')
| -rw-r--r-- | src/arch/amd64/shim.c | 85 |
1 files changed, 55 insertions, 30 deletions
diff --git a/src/arch/amd64/shim.c b/src/arch/amd64/shim.c index e28291b..3e9cfd7 100644 --- a/src/arch/amd64/shim.c +++ b/src/arch/amd64/shim.c @@ -1,13 +1,27 @@ #include <stdint.h> +#include <cpuid.h> + +#define PG_PRESENT 0x0000'0000'0000'0001 +#define PG_READ_WRITE 0x0000'0000'0000'0002 +#define PG_USER_SUPERVISE 0x0000'0000'0000'0004 +#define PG_WRITE_THROUGH 0x0000'0000'0000'0008 +#define PG_CACHE_DISABLE 0x0000'0000'0000'0010 +#define PG_ACCESSED 0x0000'0000'0000'0020 +#define PG_EXECUTE_DISABLE 0x8000'0000'0000'0000 + +#define F_PRESENT 0b1 +#define F_WRITEABLE 0b10 +#define F_UNPRIVILEGED 0b100 +#define F_WRITETHROUGH 0b1000 +#define F_CACHEDISABLE 0b10000 +#define F_ACCESSED 0b100000 +#define F_DIRTY 0b1000000 +#define F_MEGABYTE 0b10000000 +#define F_GLOBAL 0b100000000 // PAGE MAP LEVEL 4 ENTRY -struct pml4 { - uint64_t present : 1; - uint64_t rw : 1; - uint64_t user_supervisor : 1; - uint64_t write_through : 1; - uint64_t cache_disable : 1; - uint64_t accessed : 1; +struct pml4e { + uint64_t flags : 6; uint64_t _reserved : 6; uint64_t address : 40; uint64_t _reserved_2 : 11; @@ -16,12 +30,7 @@ struct pml4 { // PAGE DIRECTORY POINTER TABLE ENTRY struct pdpte { - uint64_t present : 1; - uint64_t rw : 1; - uint64_t user_supervisor : 1; - uint64_t write_through : 1; - uint64_t cache_disable : 1; - uint64_t accessed : 1; + uint64_t flags : 6; uint64_t _reserved : 1; uint64_t page_size : 1; uint64_t _reserved_2 : 2; @@ -32,12 +41,7 @@ struct pdpte { // PAGE DIRECTORY ENTRY struct pde { - uint64_t present : 1; - uint64_t rw : 1; - uint64_t user_supervisor : 1; - uint64_t write_through : 1; - uint64_t cache_disable : 1; - uint64_t accessed : 1; + uint64_t flags : 6; uint64_t _reserved : 1; uint64_t page_size : 1; uint64_t _reserved_2 : 2; @@ -48,15 +52,7 @@ struct pde { // PAGE TABLE ENTRY struct pte { - uint64_t present : 1; - uint64_t rw : 1; - uint64_t user_supervisor : 1; - uint64_t write_through : 1; - uint64_t cache_disable : 1; - uint64_t accessed : 1; - uint64_t dirty : 1; - uint64_t mem_type : 1; - uint64_t global : 1; + uint64_t flags : 9; uint64_t _reserved : 3; uint64_t address : 40; uint64_t _reserved_2 : 7; @@ -64,7 +60,36 @@ struct pte { uint64_t execute_disable : 1; }; +struct pml4e pml4[512]; +struct pdpte pdpt[512]; +struct pde pd[512]; +struct pte pt[512]; + +static int get_maxphysaddr() { + uint32_t eax, ebx, ecx, edx; + __cpuid(0x80000008, eax, ebx, ecx, edx); + return eax & 0xFF; +} + // entry point for amd64 -void amd64_shim(void *boot_info) { - +void* amd64_shim(void *boot_info) { + for (int i = 0; i < 512; i++) { + pml4[i].flags = 0; + } + for (int i = 0; i < 512; i++) { + pdpt[i].flags = 0; + } + for (int i = 0; i < 512; i++) { + pd[i].flags = 0; + } + pml4[0].flags = F_PRESENT | F_WRITEABLE; + pml4[0].address = (uint64_t)&pdpt; + pdpt[0].flags = F_PRESENT | F_WRITEABLE; + pdpt[0].address = (uint64_t)&pd; + pd[0].flags = F_PRESENT | F_WRITEABLE; + pd[0].address = (uint64_t)&pt; + for (int i = 0; i < 512; i++) { + pt[i].flags = F_PRESENT | F_WRITEABLE; + pt[i].address = i * 4096; + } } |