diff options
Diffstat (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/trimesh.ptx')
| -rw-r--r-- | VRCSDK3Worlds/Assets/Editor/x64/Bakery/trimesh.ptx | 459 |
1 files changed, 459 insertions, 0 deletions
diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/trimesh.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/trimesh.ptx new file mode 100644 index 00000000..bdda083c --- /dev/null +++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/trimesh.ptx @@ -0,0 +1,459 @@ +// +// Generated by NVIDIA NVVM Compiler +// +// Compiler Build ID: CL-23083092 +// Cuda compilation tools, release 9.1, V9.1.85 +// Based on LLVM 3.4svn +// + +.version 6.1 +.target sm_30 +.address_size 64 + + // .globl _Z9intersecti +.global .align 8 .b8 pixelID[8]; +.global .align 8 .b8 resolution[8]; +.global .align 4 .b8 normal[12]; +.global .align 4 .b8 camPos[12]; +.global .align 4 .b8 root[4]; +.global .align 4 .u32 imageEnabled; +.global .texref lightmap; +.global .align 16 .b8 tileInfo[16]; +.global .align 4 .u32 additive; +.global .align 1 .b8 vertex_buffer[1]; +.global .align 1 .b8 index_buffer[1]; +.global .align 4 .u32 firstAlphaTriangle; +.global .align 1 .b8 vertex_buffer_uv[1]; +.global .align 1 .b8 triangleAlphaIDs[1]; +.global .align 1 .b8 alphaTextures[1]; +.global .align 4 .b8 ray[36]; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo18firstAlphaTriangleE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo3rayE[8] = {82, 97, 121, 0, 36, 0, 0, 0}; +.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; +.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename18firstAlphaTriangleE[4] = {105, 110, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename3rayE[4] = {82, 97, 121, 0}; +.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum18firstAlphaTriangleE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum3rayE = 4919; +.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; +.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic18firstAlphaTriangleE[1]; +.global .align 16 .b8 _ZN21rti_internal_semantic3rayE[13] = {114, 116, 67, 117, 114, 114, 101, 110, 116, 82, 97, 121, 0}; +.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation18firstAlphaTriangleE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation3rayE[1]; + +.visible .entry _Z9intersecti( + .param .u32 _Z9intersecti_param_0 +) +{ + .reg .pred %p<13>; + .reg .f32 %f<123>; + .reg .b32 %r<45>; + .reg .b64 %rd<98>; + + + ld.param.u32 %r2, [_Z9intersecti_param_0]; + cvt.s64.s32 %rd6, %r2; + mov.u64 %rd28, index_buffer; + cvta.global.u64 %rd5, %rd28; + mov.u32 %r9, 1; + mov.u32 %r4, 12; + mov.u64 %rd27, 0; + // inline asm + call (%rd4), _rt_buffer_get_64, (%rd5, %r9, %r4, %rd6, %rd27, %rd27, %rd27); + // inline asm + ld.s32 %rd12, [%rd4]; + mov.u64 %rd29, vertex_buffer; + cvta.global.u64 %rd11, %rd29; + ld.s32 %rd18, [%rd4+4]; + ld.s32 %rd24, [%rd4+8]; + mov.u32 %r10, 24; + // inline asm + call (%rd10), _rt_buffer_get_64, (%rd11, %r9, %r10, %rd12, %rd27, %rd27, %rd27); + // inline asm + ld.f32 %f4, [%rd10+8]; + ld.f32 %f5, [%rd10+4]; + ld.f32 %f6, [%rd10]; + // inline asm + call (%rd16), _rt_buffer_get_64, (%rd11, %r9, %r10, %rd18, %rd27, %rd27, %rd27); + // inline asm + ld.f32 %f7, [%rd16+8]; + ld.f32 %f8, [%rd16+4]; + ld.f32 %f9, [%rd16]; + // inline asm + call (%rd22), _rt_buffer_get_64, (%rd11, %r9, %r10, %rd24, %rd27, %rd27, %rd27); + // inline asm + sub.f32 %f10, %f9, %f6; + sub.f32 %f11, %f8, %f5; + sub.f32 %f12, %f7, %f4; + ld.f32 %f13, [%rd22+8]; + ld.f32 %f14, [%rd22+4]; + ld.f32 %f15, [%rd22]; + sub.f32 %f16, %f6, %f15; + sub.f32 %f17, %f5, %f14; + sub.f32 %f18, %f4, %f13; + mul.f32 %f19, %f12, %f17; + mul.f32 %f20, %f11, %f18; + sub.f32 %f21, %f19, %f20; + mul.f32 %f22, %f10, %f18; + mul.f32 %f23, %f12, %f16; + sub.f32 %f24, %f22, %f23; + mul.f32 %f25, %f11, %f16; + mul.f32 %f26, %f10, %f17; + sub.f32 %f27, %f25, %f26; + ld.global.f32 %f28, [ray+12]; + ld.global.f32 %f29, [ray+16]; + mul.f32 %f30, %f29, %f24; + fma.rn.f32 %f31, %f28, %f21, %f30; + ld.global.f32 %f32, [ray+20]; + fma.rn.f32 %f33, %f32, %f27, %f31; + rcp.rn.f32 %f34, %f33; + ld.global.f32 %f35, [ray]; + sub.f32 %f36, %f6, %f35; + ld.global.f32 %f37, [ray+4]; + sub.f32 %f38, %f5, %f37; + ld.global.f32 %f39, [ray+8]; + sub.f32 %f40, %f4, %f39; + mul.f32 %f41, %f34, %f36; + mul.f32 %f42, %f34, %f38; + mul.f32 %f43, %f34, %f40; + mul.f32 %f44, %f29, %f43; + mul.f32 %f45, %f42, %f32; + sub.f32 %f46, %f44, %f45; + mul.f32 %f47, %f41, %f32; + mul.f32 %f48, %f43, %f28; + sub.f32 %f49, %f47, %f48; + mul.f32 %f50, %f42, %f28; + mul.f32 %f51, %f41, %f29; + sub.f32 %f52, %f50, %f51; + mul.f32 %f53, %f17, %f49; + fma.rn.f32 %f54, %f16, %f46, %f53; + fma.rn.f32 %f1, %f18, %f52, %f54; + mul.f32 %f55, %f11, %f49; + fma.rn.f32 %f56, %f10, %f46, %f55; + fma.rn.f32 %f2, %f12, %f52, %f56; + mul.f32 %f57, %f24, %f42; + fma.rn.f32 %f58, %f21, %f41, %f57; + fma.rn.f32 %f3, %f27, %f43, %f58; + ld.global.f32 %f59, [ray+32]; + setp.lt.f32 %p1, %f3, %f59; + ld.global.f32 %f60, [ray+28]; + setp.gt.f32 %p2, %f3, %f60; + and.pred %p3, %p1, %p2; + setp.ge.f32 %p4, %f1, 0f00000000; + and.pred %p5, %p3, %p4; + setp.ge.f32 %p6, %f2, 0f00000000; + and.pred %p7, %p5, %p6; + add.f32 %f61, %f1, %f2; + setp.le.f32 %p8, %f61, 0f3F800000; + and.pred %p9, %p7, %p8; + @!%p9 bra BB0_5; + bra.uni BB0_1; + +BB0_1: + ld.global.u32 %r1, [firstAlphaTriangle]; + setp.gt.s32 %p10, %r1, %r2; + @%p10 bra BB0_3; + + sub.s32 %r29, %r2, %r1; + cvt.s64.s32 %rd32, %r29; + mov.u64 %rd75, triangleAlphaIDs; + cvta.global.u64 %rd31, %rd75; + mov.u32 %r25, 4; + // inline asm + call (%rd30), _rt_buffer_get_64, (%rd31, %r9, %r25, %rd32, %rd27, %rd27, %rd27); + // inline asm + ld.u32 %rd76, [%rd30]; + cvt.u32.u64 %r30, %rd76; + shr.u32 %r31, %r30, 16; + mov.u64 %rd77, vertex_buffer_uv; + cvta.global.u64 %rd37, %rd77; + mov.u32 %r18, 8; + // inline asm + call (%rd36), _rt_buffer_get_64, (%rd37, %r9, %r18, %rd12, %rd27, %rd27, %rd27); + // inline asm + ld.v2.f32 {%f62, %f63}, [%rd36]; + // inline asm + call (%rd42), _rt_buffer_get_64, (%rd37, %r9, %r18, %rd18, %rd27, %rd27, %rd27); + // inline asm + ld.v2.f32 {%f66, %f67}, [%rd42]; + // inline asm + call (%rd48), _rt_buffer_get_64, (%rd37, %r9, %r18, %rd24, %rd27, %rd27, %rd27); + // inline asm + mov.f32 %f70, 0f3F800000; + sub.f32 %f71, %f70, %f1; + sub.f32 %f72, %f71, %f2; + mul.f32 %f73, %f1, %f66; + mul.f32 %f74, %f1, %f67; + fma.rn.f32 %f75, %f72, %f62, %f73; + fma.rn.f32 %f76, %f72, %f63, %f74; + ld.v2.f32 {%f77, %f78}, [%rd48]; + fma.rn.f32 %f81, %f2, %f77, %f75; + fma.rn.f32 %f82, %f2, %f78, %f76; + abs.f32 %f83, %f81; + cvt.rmi.f32.f32 %f84, %f83; + sub.f32 %f85, %f83, %f84; + abs.f32 %f86, %f82; + cvt.rmi.f32.f32 %f87, %f86; + sub.f32 %f88, %f86, %f87; + and.b64 %rd56, %rd76, 65535; + mov.u64 %rd78, alphaTextures; + cvta.global.u64 %rd55, %rd78; + // inline asm + call (%rd54), _rt_buffer_get_64, (%rd55, %r9, %r25, %rd56, %rd27, %rd27, %rd27); + // inline asm + ld.u32 %r21, [%rd54]; + mov.u32 %r27, 2; + // inline asm + call (%rd60, %rd61, %rd62, %rd63), _rt_buffer_get_id_size_64, (%r21, %r27, %r9); + // inline asm + cvt.rn.f32.u64 %f89, %rd60; + mul.f32 %f90, %f85, %f89; + cvt.rzi.u32.f32 %r32, %f90; + cvt.rn.f32.u64 %f91, %rd61; + mul.f32 %f92, %f88, %f91; + cvt.rzi.u32.f32 %r33, %f92; + // inline asm + call (%rd64), _rt_buffer_get_64, (%rd55, %r9, %r25, %rd56, %rd27, %rd27, %rd27); + // inline asm + ld.u32 %r26, [%rd64]; + cvt.u64.u32 %rd71, %r32; + cvt.u64.u32 %rd72, %r33; + // inline asm + call (%rd70), _rt_buffer_get_id_64, (%r26, %r27, %r9, %rd71, %rd72, %rd27, %rd27); + // inline asm + ld.u8 %r34, [%rd70]; + and.b32 %r35, %r34, %r31; + setp.eq.s32 %p11, %r35, 0; + @%p11 bra BB0_5; + +BB0_3: + // inline asm + call (%r36), _rt_potential_intersection, (%f3); + // inline asm + setp.eq.s32 %p12, %r36, 0; + @%p12 bra BB0_5; + + // inline asm + call (%rd79), _rt_buffer_get_64, (%rd11, %r9, %r10, %rd12, %rd27, %rd27, %rd27); + // inline asm + ld.f32 %f94, [%rd79+20]; + ld.f32 %f95, [%rd79+16]; + ld.f32 %f96, [%rd79+12]; + // inline asm + call (%rd85), _rt_buffer_get_64, (%rd11, %r9, %r10, %rd18, %rd27, %rd27, %rd27); + // inline asm + ld.f32 %f97, [%rd85+20]; + ld.f32 %f98, [%rd85+16]; + ld.f32 %f99, [%rd85+12]; + // inline asm + call (%rd91), _rt_buffer_get_64, (%rd11, %r9, %r10, %rd24, %rd27, %rd27, %rd27); + // inline asm + mov.f32 %f100, 0f3F800000; + sub.f32 %f101, %f100, %f1; + sub.f32 %f102, %f101, %f2; + mul.f32 %f103, %f1, %f99; + mul.f32 %f104, %f1, %f98; + mul.f32 %f105, %f1, %f97; + fma.rn.f32 %f106, %f102, %f96, %f103; + fma.rn.f32 %f107, %f102, %f95, %f104; + fma.rn.f32 %f108, %f102, %f94, %f105; + ld.f32 %f109, [%rd91+20]; + ld.f32 %f110, [%rd91+16]; + ld.f32 %f111, [%rd91+12]; + fma.rn.f32 %f112, %f2, %f111, %f106; + fma.rn.f32 %f113, %f2, %f110, %f107; + fma.rn.f32 %f114, %f2, %f109, %f108; + mul.f32 %f115, %f113, %f113; + fma.rn.f32 %f116, %f112, %f112, %f115; + fma.rn.f32 %f117, %f114, %f114, %f116; + sqrt.rn.f32 %f118, %f117; + rcp.rn.f32 %f119, %f118; + mul.f32 %f120, %f119, %f112; + mul.f32 %f121, %f119, %f113; + mul.f32 %f122, %f119, %f114; + st.global.f32 [normal], %f120; + st.global.f32 [normal+4], %f121; + st.global.f32 [normal+8], %f122; + mov.u32 %r44, 0; + // inline asm + call (%r43), _rt_report_intersection, (%r44); + // inline asm + +BB0_5: + ret; +} + + // .globl _Z4bboxiPN5optix4AabbE +.visible .entry _Z4bboxiPN5optix4AabbE( + .param .u32 _Z4bboxiPN5optix4AabbE_param_0, + .param .u64 _Z4bboxiPN5optix4AabbE_param_1 +) +{ + .reg .pred %p<6>; + .reg .f32 %f<42>; + .reg .b32 %r<11>; + .reg .b64 %rd<29>; + + + ld.param.u64 %rd2, [_Z4bboxiPN5optix4AabbE_param_1]; + ld.param.s32 %rd5, [_Z4bboxiPN5optix4AabbE_param_0]; + mov.u64 %rd27, index_buffer; + cvta.global.u64 %rd4, %rd27; + mov.u32 %r7, 1; + mov.u32 %r2, 12; + mov.u64 %rd26, 0; + // inline asm + call (%rd3), _rt_buffer_get_64, (%rd4, %r7, %r2, %rd5, %rd26, %rd26, %rd26); + // inline asm + ld.s32 %rd11, [%rd3]; + mov.u64 %rd28, vertex_buffer; + cvta.global.u64 %rd10, %rd28; + ld.s32 %rd17, [%rd3+4]; + ld.s32 %rd23, [%rd3+8]; + mov.u32 %r8, 24; + // inline asm + call (%rd9), _rt_buffer_get_64, (%rd10, %r7, %r8, %rd11, %rd26, %rd26, %rd26); + // inline asm + ld.f32 %f3, [%rd9+8]; + ld.f32 %f2, [%rd9+4]; + ld.f32 %f1, [%rd9]; + // inline asm + call (%rd15), _rt_buffer_get_64, (%rd10, %r7, %r8, %rd17, %rd26, %rd26, %rd26); + // inline asm + ld.f32 %f6, [%rd15+8]; + ld.f32 %f5, [%rd15+4]; + ld.f32 %f4, [%rd15]; + // inline asm + call (%rd21), _rt_buffer_get_64, (%rd10, %r7, %r8, %rd23, %rd26, %rd26, %rd26); + // inline asm + sub.f32 %f11, %f4, %f1; + sub.f32 %f12, %f5, %f2; + sub.f32 %f13, %f6, %f3; + ld.f32 %f9, [%rd21+8]; + ld.f32 %f8, [%rd21+4]; + ld.f32 %f7, [%rd21]; + sub.f32 %f14, %f7, %f1; + sub.f32 %f15, %f8, %f2; + sub.f32 %f16, %f9, %f3; + mul.f32 %f17, %f12, %f16; + mul.f32 %f18, %f13, %f15; + sub.f32 %f19, %f17, %f18; + mul.f32 %f20, %f13, %f14; + mul.f32 %f21, %f11, %f16; + sub.f32 %f22, %f20, %f21; + mul.f32 %f23, %f11, %f15; + mul.f32 %f24, %f12, %f14; + sub.f32 %f25, %f23, %f24; + mul.f32 %f26, %f22, %f22; + fma.rn.f32 %f27, %f19, %f19, %f26; + fma.rn.f32 %f28, %f25, %f25, %f27; + sqrt.rn.f32 %f10, %f28; + mov.pred %p5, 0; + setp.leu.f32 %p4, %f10, 0f00000000; + @%p4 bra BB1_2; + + abs.f32 %f29, %f10; + setp.neu.f32 %p5, %f29, 0f7F800000; + +BB1_2: + cvta.to.global.u64 %rd1, %rd2; + @%p5 bra BB1_4; + bra.uni BB1_3; + +BB1_4: + min.f32 %f30, %f1, %f4; + min.f32 %f31, %f30, %f7; + min.f32 %f32, %f2, %f5; + min.f32 %f33, %f32, %f8; + min.f32 %f34, %f3, %f6; + min.f32 %f35, %f34, %f9; + st.global.f32 [%rd1], %f31; + st.global.f32 [%rd1+4], %f33; + st.global.f32 [%rd1+8], %f35; + max.f32 %f36, %f1, %f4; + max.f32 %f37, %f36, %f7; + max.f32 %f38, %f2, %f5; + max.f32 %f39, %f38, %f8; + max.f32 %f40, %f3, %f6; + max.f32 %f41, %f40, %f9; + st.global.f32 [%rd1+12], %f37; + st.global.f32 [%rd1+16], %f39; + st.global.f32 [%rd1+20], %f41; + bra.uni BB1_5; + +BB1_3: + mov.u32 %r9, 2096152002; + st.global.u32 [%rd1], %r9; + st.global.u32 [%rd1+8], %r9; + st.global.u32 [%rd1+4], %r9; + mov.u32 %r10, -51331646; + st.global.u32 [%rd1+12], %r10; + st.global.u32 [%rd1+16], %r10; + st.global.u32 [%rd1+20], %r10; + +BB1_5: + ret; +} + + |