diff options
Diffstat (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightRNM.ptx')
| -rw-r--r-- | VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightRNM.ptx | 2587 |
1 files changed, 2587 insertions, 0 deletions
diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightRNM.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightRNM.ptx new file mode 100644 index 00000000..8889a81c --- /dev/null +++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightRNM.ptx @@ -0,0 +1,2587 @@ +// +// Generated by NVIDIA NVVM Compiler +// +// Compiler Build ID: CL-23083092 +// Cuda compilation tools, release 9.1, V9.1.85 +// Based on LLVM 3.4svn +// + +.version 6.1 +.target sm_30 +.address_size 64 + + // .globl _Z6oxMainv +.global .align 8 .b8 pixelID[8]; +.global .align 8 .b8 resolution[8]; +.global .align 4 .b8 normal[12]; +.global .align 4 .b8 camPos[12]; +.global .align 4 .b8 root[4]; +.global .align 4 .u32 imageEnabled; +.global .texref lightmap; +.global .align 16 .b8 tileInfo[16]; +.global .align 4 .u32 additive; +.global .align 1 .b8 image[1]; +.global .align 1 .b8 image_HDR[1]; +.global .align 1 .b8 image_HDR2[1]; +.global .align 1 .b8 image_Mask[1]; +.global .align 1 .b8 image_RNM0[1]; +.global .align 1 .b8 image_RNM1[1]; +.global .align 1 .b8 image_RNM2[1]; +.global .align 1 .b8 uvtangent[1]; +.global .align 1 .b8 uvpos[1]; +.global .align 1 .b8 uvnormal[1]; +.global .align 1 .b8 lightMeshBuffer[1]; +.global .align 4 .u32 lightMeshBufferSize; +.global .align 4 .f32 lightInvCutoff; +.global .align 4 .f32 lightPointSize; +.global .align 4 .b8 lightColor[12]; +.global .align 1 .b8 rnd_seeds[1]; +.global .align 4 .u32 samples; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; +.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; +.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; +.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; +.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; +.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; + +.visible .entry _Z6oxMainv( + +) +{ + .local .align 4 .b8 __local_depot0[44]; + .reg .b64 %SP; + .reg .b64 %SPL; + .reg .pred %p<157>; + .reg .b16 %rs<157>; + .reg .f32 %f<1384>; + .reg .b32 %r<439>; + .reg .b64 %rd<301>; + + + mov.u64 %rd300, __local_depot0; + cvta.local.u64 %SP, %rd300; + ld.global.u32 %r1, [samples]; + ld.global.v2.u32 {%r109, %r110}, [pixelID]; + cvt.u64.u32 %rd26, %r109; + cvt.u64.u32 %rd27, %r110; + mov.u64 %rd30, uvnormal; + cvta.global.u64 %rd25, %rd30; + mov.u32 %r107, 2; + mov.u32 %r108, 4; + mov.u64 %rd29, 0; + // inline asm + call (%rd24), _rt_buffer_get_64, (%rd25, %r107, %r108, %rd26, %rd27, %rd29, %rd29); + // inline asm + ld.u32 %r2, [%rd24]; + shr.u32 %r113, %r2, 16; + cvt.u16.u32 %rs1, %r113; + and.b16 %rs6, %rs1, 255; + cvt.u16.u32 %rs7, %r2; + or.b16 %rs8, %rs7, %rs6; + setp.eq.s16 %p7, %rs8, 0; + mov.f32 %f1244, 0f00000000; + mov.f32 %f1245, %f1244; + mov.f32 %f1246, %f1244; + @%p7 bra BB0_2; + + ld.u8 %rs9, [%rd24+1]; + and.b16 %rs11, %rs7, 255; + cvt.rn.f32.u16 %f340, %rs11; + div.rn.f32 %f341, %f340, 0f437F0000; + fma.rn.f32 %f342, %f341, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f343, %rs9; + div.rn.f32 %f344, %f343, 0f437F0000; + fma.rn.f32 %f345, %f344, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f346, %rs6; + div.rn.f32 %f347, %f346, 0f437F0000; + fma.rn.f32 %f348, %f347, 0f40000000, 0fBF800000; + mul.f32 %f349, %f345, %f345; + fma.rn.f32 %f350, %f342, %f342, %f349; + fma.rn.f32 %f351, %f348, %f348, %f350; + sqrt.rn.f32 %f352, %f351; + rcp.rn.f32 %f353, %f352; + mul.f32 %f1244, %f342, %f353; + mul.f32 %f1245, %f345, %f353; + mul.f32 %f1246, %f348, %f353; + +BB0_2: + ld.global.v2.u32 {%r114, %r115}, [pixelID]; + ld.global.v2.u32 {%r117, %r118}, [tileInfo]; + add.s32 %r3, %r114, %r117; + add.s32 %r4, %r115, %r118; + setp.eq.f32 %p8, %f1245, 0f00000000; + setp.eq.f32 %p9, %f1244, 0f00000000; + and.pred %p10, %p9, %p8; + setp.eq.f32 %p11, %f1246, 0f00000000; + and.pred %p12, %p10, %p11; + @%p12 bra BB0_144; + bra.uni BB0_3; + +BB0_144: + ld.global.u32 %r438, [imageEnabled]; + and.b32 %r356, %r438, 1; + setp.eq.b32 %p149, %r356, 1; + @!%p149 bra BB0_146; + bra.uni BB0_145; + +BB0_145: + cvt.u64.u32 %rd200, %r3; + cvt.u64.u32 %rd201, %r4; + mov.u64 %rd204, image; + cvta.global.u64 %rd199, %rd204; + mov.u64 %rd203, 0; + // inline asm + call (%rd198), _rt_buffer_get_64, (%rd199, %r107, %r108, %rd200, %rd201, %rd203, %rd203); + // inline asm + mov.u16 %rs102, 0; + st.v4.u8 [%rd198], {%rs102, %rs102, %rs102, %rs102}; + ld.global.u32 %r438, [imageEnabled]; + +BB0_146: + and.b32 %r359, %r438, 8; + setp.eq.s32 %p150, %r359, 0; + @%p150 bra BB0_148; + + cvt.u64.u32 %rd208, %r4; + cvt.u64.u32 %rd207, %r3; + mov.u64 %rd211, image_Mask; + cvta.global.u64 %rd206, %rd211; + mov.u64 %rd210, 0; + // inline asm + call (%rd205), _rt_buffer_get_64, (%rd206, %r107, %r107, %rd207, %rd208, %rd210, %rd210); + // inline asm + mov.f32 %f1206, 0f00000000; + cvt.rzi.u32.f32 %r362, %f1206; + cvt.u16.u32 %rs103, %r362; + mov.u16 %rs104, 0; + st.v2.u8 [%rd205], {%rs103, %rs104}; + ld.global.u32 %r438, [imageEnabled]; + +BB0_148: + cvt.u64.u32 %rd22, %r3; + cvt.u64.u32 %rd23, %r4; + and.b32 %r363, %r438, 4; + setp.eq.s32 %p151, %r363, 0; + @%p151 bra BB0_152; + + ld.global.u32 %r364, [additive]; + setp.eq.s32 %p152, %r364, 0; + @%p152 bra BB0_151; + + mov.u64 %rd224, image_HDR; + cvta.global.u64 %rd213, %rd224; + mov.u32 %r368, 8; + mov.u64 %rd223, 0; + // inline asm + call (%rd212), _rt_buffer_get_64, (%rd213, %r107, %r368, %rd22, %rd23, %rd223, %rd223); + // inline asm + ld.v4.u16 {%rs111, %rs112, %rs113, %rs114}, [%rd212]; + // inline asm + { cvt.f32.f16 %f1207, %rs111;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1208, %rs112;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1209, %rs113;} + + // inline asm + // inline asm + call (%rd218), _rt_buffer_get_64, (%rd213, %r107, %r368, %rd22, %rd23, %rd223, %rd223); + // inline asm + add.f32 %f1210, %f1207, 0f00000000; + add.f32 %f1211, %f1208, 0f00000000; + add.f32 %f1212, %f1209, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs110, %f1212;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs109, %f1211;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs108, %f1210;} + + // inline asm + mov.u16 %rs115, 0; + st.v4.u16 [%rd218], {%rs108, %rs109, %rs110, %rs115}; + bra.uni BB0_152; + +BB0_3: + ld.global.v2.u32 {%r126, %r127}, [pixelID]; + cvt.u64.u32 %rd33, %r126; + cvt.u64.u32 %rd34, %r127; + mov.u64 %rd43, uvpos; + cvta.global.u64 %rd32, %rd43; + mov.u32 %r123, 12; + // inline asm + call (%rd31), _rt_buffer_get_64, (%rd32, %r107, %r123, %rd33, %rd34, %rd29, %rd29); + // inline asm + ld.f32 %f9, [%rd31+8]; + ld.f32 %f8, [%rd31+4]; + ld.f32 %f7, [%rd31]; + mul.f32 %f357, %f7, 0f3456BF95; + mul.f32 %f358, %f8, 0f3456BF95; + mul.f32 %f359, %f9, 0f3456BF95; + abs.f32 %f10, %f1244; + div.rn.f32 %f360, %f357, %f10; + abs.f32 %f361, %f1245; + div.rn.f32 %f362, %f358, %f361; + abs.f32 %f11, %f1246; + div.rn.f32 %f363, %f359, %f11; + abs.f32 %f364, %f360; + abs.f32 %f365, %f362; + abs.f32 %f366, %f363; + mov.f32 %f367, 0f38D1B717; + max.f32 %f368, %f364, %f367; + max.f32 %f369, %f365, %f367; + max.f32 %f370, %f366, %f367; + fma.rn.f32 %f12, %f1244, %f368, %f7; + fma.rn.f32 %f13, %f1245, %f369, %f8; + fma.rn.f32 %f14, %f1246, %f370, %f9; + ld.global.v2.u32 {%r130, %r131}, [pixelID]; + cvt.u64.u32 %rd39, %r130; + cvt.u64.u32 %rd40, %r131; + mov.u64 %rd44, uvtangent; + cvta.global.u64 %rd38, %rd44; + // inline asm + call (%rd37), _rt_buffer_get_64, (%rd38, %r107, %r108, %rd39, %rd40, %rd29, %rd29); + // inline asm + ld.u32 %r5, [%rd37]; + shr.u32 %r6, %r5, 16; + cvt.u16.u32 %rs13, %r6; + and.b16 %rs14, %rs13, 255; + cvt.u16.u32 %rs15, %r5; + or.b16 %rs16, %rs15, %rs14; + setp.eq.s16 %p13, %rs16, 0; + mov.f32 %f50, 0f00000000; + mov.f32 %f1247, %f50; + mov.f32 %f1248, %f50; + mov.f32 %f1249, %f50; + @%p13 bra BB0_5; + + ld.u8 %rs17, [%rd37+1]; + and.b16 %rs19, %rs15, 255; + cvt.rn.f32.u16 %f371, %rs19; + div.rn.f32 %f372, %f371, 0f437F0000; + fma.rn.f32 %f373, %f372, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f374, %rs17; + div.rn.f32 %f375, %f374, 0f437F0000; + fma.rn.f32 %f376, %f375, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f377, %rs14; + div.rn.f32 %f378, %f377, 0f437F0000; + fma.rn.f32 %f379, %f378, 0f40000000, 0fBF800000; + mul.f32 %f380, %f376, %f376; + fma.rn.f32 %f381, %f373, %f373, %f380; + fma.rn.f32 %f382, %f379, %f379, %f381; + sqrt.rn.f32 %f383, %f382; + rcp.rn.f32 %f384, %f383; + mul.f32 %f1247, %f373, %f384; + mul.f32 %f1248, %f376, %f384; + mul.f32 %f1249, %f379, %f384; + +BB0_5: + mul.f32 %f388, %f1246, %f1248; + mul.f32 %f389, %f1245, %f1249; + sub.f32 %f390, %f389, %f388; + mul.f32 %f391, %f1244, %f1249; + mul.f32 %f392, %f1246, %f1247; + sub.f32 %f393, %f392, %f391; + mul.f32 %f394, %f1245, %f1247; + mul.f32 %f395, %f1244, %f1248; + sub.f32 %f396, %f395, %f394; + setp.lt.u32 %p14, %r5, 16777216; + selp.f32 %f397, 0fBF800000, 0f3F800000, %p14; + mul.f32 %f398, %f390, %f397; + mul.f32 %f399, %f393, %f397; + mul.f32 %f400, %f396, %f397; + mul.f32 %f401, %f398, 0f00000000; + mul.f32 %f402, %f399, 0f00000000; + mul.f32 %f403, %f400, 0f00000000; + fma.rn.f32 %f404, %f1247, 0f3F5105EC, %f401; + fma.rn.f32 %f405, %f1248, 0f3F5105EC, %f402; + fma.rn.f32 %f406, %f1249, 0f3F5105EC, %f403; + mul.f32 %f21, %f1244, 0f3F13CD3A; + add.f32 %f22, %f21, %f404; + mul.f32 %f23, %f1245, 0f3F13CD3A; + add.f32 %f24, %f23, %f405; + mul.f32 %f25, %f1246, 0f3F13CD3A; + add.f32 %f26, %f25, %f406; + ld.global.v2.u32 {%r136, %r137}, [pixelID]; + cvt.u64.u32 %rd47, %r136; + cvt.u64.u32 %rd48, %r137; + // inline asm + call (%rd45), _rt_buffer_get_64, (%rd38, %r107, %r108, %rd47, %rd48, %rd29, %rd29); + // inline asm + ld.u32 %r7, [%rd45]; + shr.u32 %r8, %r7, 16; + cvt.u16.u32 %rs22, %r8; + and.b16 %rs23, %rs22, 255; + cvt.u16.u32 %rs24, %r7; + or.b16 %rs25, %rs24, %rs23; + setp.eq.s16 %p15, %rs25, 0; + mov.f32 %f1250, %f50; + mov.f32 %f1251, %f50; + mov.f32 %f1252, %f50; + @%p15 bra BB0_7; + + ld.u8 %rs26, [%rd45+1]; + and.b16 %rs28, %rs24, 255; + cvt.rn.f32.u16 %f407, %rs28; + div.rn.f32 %f408, %f407, 0f437F0000; + fma.rn.f32 %f409, %f408, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f410, %rs26; + div.rn.f32 %f411, %f410, 0f437F0000; + fma.rn.f32 %f412, %f411, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f413, %rs23; + div.rn.f32 %f414, %f413, 0f437F0000; + fma.rn.f32 %f415, %f414, 0f40000000, 0fBF800000; + mul.f32 %f416, %f412, %f412; + fma.rn.f32 %f417, %f409, %f409, %f416; + fma.rn.f32 %f418, %f415, %f415, %f417; + sqrt.rn.f32 %f419, %f418; + rcp.rn.f32 %f420, %f419; + mul.f32 %f1250, %f409, %f420; + mul.f32 %f1251, %f412, %f420; + mul.f32 %f1252, %f415, %f420; + +BB0_7: + mul.f32 %f424, %f1246, %f1251; + mul.f32 %f425, %f1245, %f1252; + sub.f32 %f426, %f425, %f424; + mul.f32 %f427, %f1244, %f1252; + mul.f32 %f428, %f1246, %f1250; + sub.f32 %f429, %f428, %f427; + mul.f32 %f430, %f1245, %f1250; + mul.f32 %f431, %f1244, %f1251; + sub.f32 %f432, %f431, %f430; + setp.lt.u32 %p16, %r7, 16777216; + selp.f32 %f433, 0fBF800000, 0f3F800000, %p16; + mul.f32 %f434, %f426, %f433; + mul.f32 %f435, %f429, %f433; + mul.f32 %f436, %f432, %f433; + mul.f32 %f437, %f434, 0f3F3504F3; + mul.f32 %f438, %f435, 0f3F3504F3; + mul.f32 %f439, %f436, 0f3F3504F3; + fma.rn.f32 %f440, %f1250, 0fBED105EC, %f437; + fma.rn.f32 %f441, %f1251, 0fBED105EC, %f438; + fma.rn.f32 %f442, %f1252, 0fBED105EC, %f439; + add.f32 %f33, %f21, %f440; + add.f32 %f34, %f23, %f441; + add.f32 %f35, %f25, %f442; + ld.global.v2.u32 {%r142, %r143}, [pixelID]; + cvt.u64.u32 %rd54, %r142; + cvt.u64.u32 %rd55, %r143; + // inline asm + call (%rd52), _rt_buffer_get_64, (%rd38, %r107, %r108, %rd54, %rd55, %rd29, %rd29); + // inline asm + ld.u32 %r9, [%rd52]; + shr.u32 %r10, %r9, 16; + cvt.u16.u32 %rs31, %r10; + and.b16 %rs32, %rs31, 255; + cvt.u16.u32 %rs33, %r9; + or.b16 %rs34, %rs33, %rs32; + setp.eq.s16 %p17, %rs34, 0; + mov.f32 %f1253, %f50; + mov.f32 %f1254, %f50; + mov.f32 %f1255, %f50; + @%p17 bra BB0_9; + + ld.u8 %rs35, [%rd52+1]; + and.b16 %rs37, %rs33, 255; + cvt.rn.f32.u16 %f443, %rs37; + div.rn.f32 %f444, %f443, 0f437F0000; + fma.rn.f32 %f445, %f444, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f446, %rs35; + div.rn.f32 %f447, %f446, 0f437F0000; + fma.rn.f32 %f448, %f447, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f449, %rs32; + div.rn.f32 %f450, %f449, 0f437F0000; + fma.rn.f32 %f451, %f450, 0f40000000, 0fBF800000; + mul.f32 %f452, %f448, %f448; + fma.rn.f32 %f453, %f445, %f445, %f452; + fma.rn.f32 %f454, %f451, %f451, %f453; + sqrt.rn.f32 %f455, %f454; + rcp.rn.f32 %f456, %f455; + mul.f32 %f1253, %f445, %f456; + mul.f32 %f1254, %f448, %f456; + mul.f32 %f1255, %f451, %f456; + +BB0_9: + mul.f32 %f470, %f1246, %f1254; + mul.f32 %f471, %f1245, %f1255; + sub.f32 %f472, %f471, %f470; + mul.f32 %f473, %f1244, %f1255; + mul.f32 %f474, %f1246, %f1253; + sub.f32 %f475, %f474, %f473; + mul.f32 %f476, %f1245, %f1253; + mul.f32 %f477, %f1244, %f1254; + sub.f32 %f478, %f477, %f476; + setp.lt.u32 %p19, %r9, 16777216; + selp.f32 %f479, 0fBF800000, 0f3F800000, %p19; + mul.f32 %f480, %f472, %f479; + mul.f32 %f481, %f475, %f479; + mul.f32 %f482, %f478, %f479; + mul.f32 %f483, %f480, 0fBF3504F3; + mul.f32 %f484, %f481, 0fBF3504F3; + mul.f32 %f485, %f482, 0fBF3504F3; + fma.rn.f32 %f486, %f1253, 0fBED105EC, %f483; + fma.rn.f32 %f487, %f1254, 0fBED105EC, %f484; + fma.rn.f32 %f488, %f1255, 0fBED105EC, %f485; + add.f32 %f42, %f21, %f486; + add.f32 %f43, %f23, %f487; + add.f32 %f44, %f25, %f488; + ld.global.v2.u32 {%r149, %r150}, [pixelID]; + cvt.u64.u32 %rd61, %r149; + cvt.u64.u32 %rd62, %r150; + mov.u64 %rd65, rnd_seeds; + cvta.global.u64 %rd60, %rd65; + // inline asm + call (%rd59), _rt_buffer_get_64, (%rd60, %r107, %r108, %rd61, %rd62, %rd29, %rd29); + // inline asm + ld.u32 %r153, [%rd59]; + mad.lo.s32 %r11, %r153, 1664525, 1013904223; + ld.global.u32 %r154, [lightMeshBufferSize]; + setp.eq.s32 %p20, %r154, 0; + mov.pred %p18, 0; + mov.u32 %r13, 0; + @%p20 bra BB0_10; + + ld.global.f32 %f45, [lightPointSize]; + mul.f32 %f46, %f12, 0f3456BF95; + mul.f32 %f47, %f13, 0f3456BF95; + mul.f32 %f48, %f14, 0f3456BF95; + and.b32 %r157, %r11, 16777215; + cvt.rn.f32.u32 %f502, %r157; + mul.f32 %f503, %f502, 0fB3800000; + fma.rn.f32 %f49, %f503, 0f3F333333, 0f3F800000; + mov.f32 %f50, 0f00000000; + mov.u32 %r407, 0; + abs.f32 %f626, %f47; + abs.f32 %f627, %f46; + max.f32 %f628, %f627, %f626; + abs.f32 %f629, %f48; + max.f32 %f630, %f628, %f629; + mov.u32 %r13, %r407; + mov.f32 %f51, %f50; + mov.f32 %f52, %f50; + mov.f32 %f53, %f50; + mov.f32 %f54, %f50; + mov.f32 %f55, %f50; + mov.f32 %f56, %f50; + mov.f32 %f57, %f50; + mov.f32 %f58, %f50; + mov.f32 %f59, %f50; + mov.f32 %f60, %f50; + mov.f32 %f61, %f50; + mov.f32 %f62, %f50; + +BB0_12: + mul.lo.s32 %r14, %r407, 3; + cvt.s64.s32 %rd68, %r14; + mov.u64 %rd72, lightMeshBuffer; + cvta.global.u64 %rd67, %rd72; + mov.u32 %r158, 1; + // inline asm + call (%rd66), _rt_buffer_get_64, (%rd67, %r158, %r123, %rd68, %rd29, %rd29, %rd29); + // inline asm + ld.f32 %f504, [%rd66]; + sub.f32 %f505, %f504, %f7; + ld.f32 %f506, [%rd66+4]; + sub.f32 %f507, %f506, %f8; + ld.f32 %f508, [%rd66+8]; + sub.f32 %f509, %f508, %f9; + mul.f32 %f510, %f507, %f507; + fma.rn.f32 %f511, %f505, %f505, %f510; + fma.rn.f32 %f512, %f509, %f509, %f511; + sqrt.rn.f32 %f63, %f512; + rcp.rn.f32 %f513, %f63; + mul.f32 %f64, %f505, %f513; + mul.f32 %f65, %f507, %f513; + mul.f32 %f66, %f509, %f513; + mul.f32 %f514, %f1245, %f65; + fma.rn.f32 %f515, %f1244, %f64, %f514; + fma.rn.f32 %f67, %f1246, %f66, %f515; + setp.leu.f32 %p21, %f67, 0f00000000; + @%p21 bra BB0_28; + + setp.ne.s32 %p23, %r1, 0; + mul.f32 %f516, %f63, %f63; + mul.f32 %f517, %f516, 0f40C90FDB; + div.rn.f32 %f518, %f45, %f517; + add.f32 %f68, %f518, %f518; + setp.gt.f32 %p24, %f68, %f49; + and.pred %p25, %p23, %p24; + mov.pred %p156, -1; + @%p25 bra BB0_30; + + ld.global.f32 %f521, [lightInvCutoff]; + mul.f32 %f69, %f63, %f521; + mov.f32 %f525, 0f40800000; + abs.f32 %f71, %f69; + setp.lt.f32 %p26, %f71, 0f00800000; + mul.f32 %f527, %f71, 0f4B800000; + selp.f32 %f528, 0fC3170000, 0fC2FE0000, %p26; + selp.f32 %f529, %f527, %f71, %p26; + mov.b32 %r160, %f529; + and.b32 %r161, %r160, 8388607; + or.b32 %r162, %r161, 1065353216; + mov.b32 %f530, %r162; + shr.u32 %r163, %r160, 23; + cvt.rn.f32.u32 %f531, %r163; + add.f32 %f532, %f528, %f531; + setp.gt.f32 %p27, %f530, 0f3FB504F3; + mul.f32 %f533, %f530, 0f3F000000; + add.f32 %f534, %f532, 0f3F800000; + selp.f32 %f535, %f533, %f530, %p27; + selp.f32 %f536, %f534, %f532, %p27; + add.f32 %f537, %f535, 0fBF800000; + add.f32 %f520, %f535, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f519,%f520; + // inline asm + add.f32 %f538, %f537, %f537; + mul.f32 %f539, %f519, %f538; + mul.f32 %f540, %f539, %f539; + mov.f32 %f541, 0f3C4CAF63; + mov.f32 %f542, 0f3B18F0FE; + fma.rn.f32 %f543, %f542, %f540, %f541; + mov.f32 %f544, 0f3DAAAABD; + fma.rn.f32 %f545, %f543, %f540, %f544; + mul.rn.f32 %f546, %f545, %f540; + mul.rn.f32 %f547, %f546, %f539; + sub.f32 %f548, %f537, %f539; + neg.f32 %f549, %f539; + add.f32 %f550, %f548, %f548; + fma.rn.f32 %f551, %f549, %f537, %f550; + mul.rn.f32 %f552, %f519, %f551; + add.f32 %f553, %f547, %f539; + sub.f32 %f554, %f539, %f553; + add.f32 %f555, %f547, %f554; + add.f32 %f556, %f552, %f555; + add.f32 %f557, %f553, %f556; + sub.f32 %f558, %f553, %f557; + add.f32 %f559, %f556, %f558; + mov.f32 %f560, 0f3F317200; + mul.rn.f32 %f561, %f536, %f560; + mov.f32 %f562, 0f35BFBE8E; + mul.rn.f32 %f563, %f536, %f562; + add.f32 %f564, %f561, %f557; + sub.f32 %f565, %f561, %f564; + add.f32 %f566, %f557, %f565; + add.f32 %f567, %f559, %f566; + add.f32 %f568, %f563, %f567; + add.f32 %f569, %f564, %f568; + sub.f32 %f570, %f564, %f569; + add.f32 %f571, %f568, %f570; + mul.rn.f32 %f572, %f525, %f569; + neg.f32 %f573, %f572; + fma.rn.f32 %f574, %f525, %f569, %f573; + fma.rn.f32 %f575, %f525, %f571, %f574; + mov.f32 %f576, 0f00000000; + fma.rn.f32 %f577, %f576, %f569, %f575; + add.rn.f32 %f578, %f572, %f577; + neg.f32 %f579, %f578; + add.rn.f32 %f580, %f572, %f579; + add.rn.f32 %f581, %f580, %f577; + mov.b32 %r164, %f578; + setp.eq.s32 %p28, %r164, 1118925336; + add.s32 %r165, %r164, -1; + mov.b32 %f582, %r165; + add.f32 %f583, %f581, 0f37000000; + selp.f32 %f584, %f582, %f578, %p28; + selp.f32 %f72, %f583, %f581, %p28; + mul.f32 %f585, %f584, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f586, %f585; + mov.f32 %f587, 0fBF317200; + fma.rn.f32 %f588, %f586, %f587, %f584; + mov.f32 %f589, 0fB5BFBE8E; + fma.rn.f32 %f590, %f586, %f589, %f588; + mul.f32 %f591, %f590, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f592, %f591; + add.f32 %f593, %f586, 0f00000000; + ex2.approx.f32 %f594, %f593; + mul.f32 %f595, %f592, %f594; + setp.lt.f32 %p29, %f584, 0fC2D20000; + selp.f32 %f596, 0f00000000, %f595, %p29; + setp.gt.f32 %p30, %f584, 0f42D20000; + selp.f32 %f1269, 0f7F800000, %f596, %p30; + setp.eq.f32 %p31, %f1269, 0f7F800000; + @%p31 bra BB0_16; + + fma.rn.f32 %f1269, %f1269, %f72, %f1269; + +BB0_16: + mov.f32 %f1240, 0f40000000; + cvt.rzi.f32.f32 %f1239, %f1240; + add.f32 %f1238, %f1239, %f1239; + mov.f32 %f1237, 0f40800000; + sub.f32 %f1236, %f1237, %f1238; + abs.f32 %f1235, %f1236; + setp.lt.f32 %p32, %f69, 0f00000000; + setp.eq.f32 %p33, %f1235, 0f3F800000; + and.pred %p1, %p32, %p33; + mov.b32 %r166, %f1269; + xor.b32 %r167, %r166, -2147483648; + mov.b32 %f597, %r167; + selp.f32 %f1271, %f597, %f1269, %p1; + setp.eq.f32 %p34, %f69, 0f00000000; + @%p34 bra BB0_19; + bra.uni BB0_17; + +BB0_19: + add.f32 %f600, %f69, %f69; + selp.f32 %f1271, %f600, 0f00000000, %p33; + bra.uni BB0_20; + +BB0_17: + setp.geu.f32 %p35, %f69, 0f00000000; + @%p35 bra BB0_20; + + mov.f32 %f1243, 0f40800000; + cvt.rzi.f32.f32 %f599, %f1243; + setp.neu.f32 %p36, %f599, 0f40800000; + selp.f32 %f1271, 0f7FFFFFFF, %f1271, %p36; + +BB0_20: + add.f32 %f601, %f71, 0f40800000; + mov.b32 %r168, %f601; + setp.lt.s32 %p38, %r168, 2139095040; + @%p38 bra BB0_25; + + setp.gtu.f32 %p39, %f71, 0f7F800000; + @%p39 bra BB0_24; + bra.uni BB0_22; + +BB0_24: + add.f32 %f1271, %f69, 0f40800000; + bra.uni BB0_25; + +BB0_22: + setp.neu.f32 %p40, %f71, 0f7F800000; + @%p40 bra BB0_25; + + selp.f32 %f1271, 0fFF800000, 0f7F800000, %p1; + +BB0_25: + mov.u32 %r393, 1; + mov.u64 %rd293, lightMeshBuffer; + cvta.global.u64 %rd292, %rd293; + mul.lo.s32 %r392, %r407, 3; + mov.f32 %f602, 0f3F800000; + sub.f32 %f603, %f602, %f1271; + setp.eq.f32 %p41, %f69, 0f3F800000; + selp.f32 %f604, 0f00000000, %f603, %p41; + cvt.sat.f32.f32 %f605, %f604; + mul.f32 %f606, %f68, %f605; + add.s32 %r171, %r392, 1; + cvt.s64.s32 %rd75, %r171; + // inline asm + call (%rd73), _rt_buffer_get_64, (%rd292, %r393, %r123, %rd75, %rd29, %rd29, %rd29); + // inline asm + ld.f32 %f607, [%rd73]; + mul.f32 %f608, %f64, %f607; + ld.f32 %f609, [%rd73+4]; + mul.f32 %f610, %f65, %f609; + neg.f32 %f611, %f610; + sub.f32 %f612, %f611, %f608; + ld.f32 %f613, [%rd73+8]; + mul.f32 %f614, %f66, %f613; + sub.f32 %f615, %f612, %f614; + cvt.sat.f32.f32 %f616, %f615; + mul.f32 %f83, %f606, %f616; + setp.leu.f32 %p42, %f83, 0f3727C5AC; + @%p42 bra BB0_27; + + mov.u32 %r406, 1; + mov.u64 %rd295, lightMeshBuffer; + cvta.global.u64 %rd294, %rd295; + mul.lo.s32 %r405, %r407, 3; + cvt.sat.f32.f32 %f625, %f67; + add.u64 %rd80, %SP, 12; + cvta.to.local.u64 %rd87, %rd80; + max.f32 %f623, %f630, %f367; + sub.f32 %f624, %f63, %f623; + mov.u32 %r177, 1065353216; + st.local.u32 [%rd87], %r177; + ld.global.u32 %r172, [root]; + // inline asm + call _rt_trace_64, (%r172, %f12, %f13, %f14, %f64, %f65, %f66, %r406, %f623, %f624, %rd80, %r108); + // inline asm + add.s32 %r178, %r405, 2; + cvt.s64.s32 %rd83, %r178; + // inline asm + call (%rd81), _rt_buffer_get_64, (%rd294, %r406, %r123, %rd83, %rd29, %rd29, %rd29); + // inline asm + ld.f32 %f632, [%rd81]; + ld.local.f32 %f633, [%rd87]; + mul.f32 %f634, %f633, %f632; + ld.f32 %f635, [%rd81+4]; + mul.f32 %f636, %f633, %f635; + ld.f32 %f637, [%rd81+8]; + mul.f32 %f638, %f633, %f637; + mul.f32 %f639, %f83, %f634; + mul.f32 %f640, %f83, %f636; + mul.f32 %f641, %f83, %f638; + fma.rn.f32 %f53, %f625, %f639, %f53; + fma.rn.f32 %f52, %f625, %f640, %f52; + fma.rn.f32 %f51, %f625, %f641, %f51; + mul.f32 %f642, %f24, %f65; + fma.rn.f32 %f643, %f22, %f64, %f642; + fma.rn.f32 %f644, %f26, %f66, %f643; + cvt.sat.f32.f32 %f645, %f644; + fma.rn.f32 %f56, %f639, %f645, %f56; + fma.rn.f32 %f55, %f640, %f645, %f55; + fma.rn.f32 %f54, %f645, %f641, %f54; + mul.f32 %f646, %f34, %f65; + fma.rn.f32 %f647, %f33, %f64, %f646; + fma.rn.f32 %f648, %f35, %f66, %f647; + cvt.sat.f32.f32 %f649, %f648; + fma.rn.f32 %f59, %f639, %f649, %f59; + fma.rn.f32 %f58, %f640, %f649, %f58; + fma.rn.f32 %f57, %f641, %f649, %f57; + mul.f32 %f650, %f43, %f65; + fma.rn.f32 %f651, %f42, %f64, %f650; + fma.rn.f32 %f652, %f44, %f66, %f651; + cvt.sat.f32.f32 %f653, %f652; + fma.rn.f32 %f62, %f639, %f653, %f62; + fma.rn.f32 %f61, %f640, %f653, %f61; + fma.rn.f32 %f60, %f641, %f653, %f60; + add.f32 %f50, %f50, %f633; + +BB0_27: + add.s32 %r13, %r13, 1; + +BB0_28: + ld.global.u32 %r179, [lightMeshBufferSize]; + add.s32 %r407, %r407, 1; + setp.lt.u32 %p44, %r407, %r179; + @%p44 bra BB0_12; + bra.uni BB0_29; + +BB0_10: + mov.f32 %f51, %f50; + mov.f32 %f52, %f50; + mov.f32 %f53, %f50; + mov.f32 %f54, %f50; + mov.f32 %f55, %f50; + mov.f32 %f56, %f50; + mov.f32 %f57, %f50; + mov.f32 %f58, %f50; + mov.f32 %f59, %f50; + mov.f32 %f60, %f50; + mov.f32 %f61, %f50; + mov.f32 %f62, %f50; + +BB0_29: + mov.pred %p156, %p18; + +BB0_30: + cvt.rn.f32.s32 %f654, %r13; + mov.f32 %f655, 0f3F800000; + max.f32 %f656, %f654, %f655; + rcp.rn.f32 %f657, %f656; + mul.f32 %f1368, %f53, %f657; + mul.f32 %f1369, %f52, %f657; + mul.f32 %f1370, %f51, %f657; + div.rn.f32 %f1371, %f50, %f656; + mul.f32 %f1365, %f56, %f657; + mul.f32 %f1366, %f55, %f657; + mul.f32 %f1367, %f54, %f657; + mul.f32 %f1362, %f59, %f657; + mul.f32 %f1363, %f58, %f657; + mul.f32 %f1364, %f57, %f657; + mul.f32 %f1359, %f62, %f657; + mul.f32 %f1360, %f61, %f657; + mul.f32 %f1361, %f60, %f657; + @!%p156 bra BB0_83; + bra.uni BB0_31; + +BB0_31: + abs.f32 %f1242, %f1246; + abs.f32 %f1241, %f1244; + setp.gt.f32 %p45, %f1241, %f1242; + neg.f32 %f670, %f1245; + selp.f32 %f671, %f670, 0f00000000, %p45; + neg.f32 %f672, %f1246; + selp.f32 %f673, %f1244, %f672, %p45; + selp.f32 %f674, 0f00000000, %f1245, %p45; + mul.f32 %f675, %f673, %f673; + fma.rn.f32 %f676, %f671, %f671, %f675; + fma.rn.f32 %f677, %f674, %f674, %f676; + sqrt.rn.f32 %f678, %f677; + rcp.rn.f32 %f679, %f678; + mul.f32 %f149, %f671, %f679; + mul.f32 %f150, %f673, %f679; + mul.f32 %f151, %f674, %f679; + mov.f32 %f669, 0f00000000; + setp.lt.s32 %p46, %r1, 1; + mov.f32 %f1323, %f669; + mov.f32 %f1324, %f669; + mov.f32 %f1325, %f669; + mov.f32 %f1326, %f669; + mov.f32 %f1327, %f669; + mov.f32 %f1328, %f669; + mov.f32 %f1329, %f669; + mov.f32 %f1330, %f669; + mov.f32 %f1331, %f669; + mov.f32 %f1332, %f669; + mov.f32 %f1333, %f669; + mov.f32 %f1334, %f669; + @%p46 bra BB0_82; + + mad.lo.s32 %r414, %r153, 1664525, 1013904223; + cvt.rn.f32.s32 %f692, %r1; + rcp.rn.f32 %f152, %f692; + add.u64 %rd89, %SP, 16; + cvta.to.local.u64 %rd5, %rd89; + mul.f32 %f153, %f12, 0f3456BF95; + mul.f32 %f154, %f13, 0f3456BF95; + mul.f32 %f155, %f14, 0f3456BF95; + add.u64 %rd90, %SP, 0; + cvta.to.local.u64 %rd6, %rd90; + mul.f32 %f693, %f1244, %f150; + mul.f32 %f694, %f1245, %f149; + sub.f32 %f156, %f694, %f693; + mul.f32 %f695, %f1246, %f149; + mul.f32 %f696, %f1244, %f151; + sub.f32 %f157, %f696, %f695; + mul.f32 %f697, %f1245, %f151; + mul.f32 %f698, %f1246, %f150; + sub.f32 %f158, %f698, %f697; + mov.f32 %f1323, 0f00000000; + mov.u32 %r180, 0; + abs.f32 %f699, %f154; + abs.f32 %f700, %f153; + max.f32 %f701, %f700, %f699; + abs.f32 %f702, %f155; + max.f32 %f703, %f701, %f702; + mov.u32 %r411, %r180; + mov.f32 %f1324, %f1323; + mov.f32 %f1325, %f1323; + mov.f32 %f1326, %f1323; + mov.f32 %f1327, %f1323; + mov.f32 %f1328, %f1323; + mov.f32 %f1329, %f1323; + mov.f32 %f1330, %f1323; + mov.f32 %f1331, %f1323; + mov.f32 %f1332, %f1323; + mov.f32 %f1333, %f1323; + mov.f32 %f1334, %f1323; + +BB0_33: + cvt.rn.f32.s32 %f171, %r411; + max.f32 %f172, %f703, %f367; + mov.u32 %r413, %r180; + +BB0_34: + mad.lo.s32 %r182, %r414, 1664525, 1013904223; + and.b32 %r183, %r182, 16777215; + cvt.rn.f32.u32 %f705, %r183; + fma.rn.f32 %f706, %f705, 0f33800000, %f171; + mul.f32 %f185, %f152, %f706; + mad.lo.s32 %r414, %r182, 1664525, 1013904223; + and.b32 %r184, %r414, 16777215; + cvt.rn.f32.u32 %f707, %r184; + cvt.rn.f32.s32 %f708, %r413; + fma.rn.f32 %f709, %f707, 0f33800000, %f708; + mul.f32 %f710, %f152, %f709; + mul.f32 %f711, %f185, %f185; + sub.f32 %f713, %f655, %f711; + mov.f32 %f714, 0f00000000; + max.f32 %f715, %f714, %f713; + sqrt.rn.f32 %f186, %f715; + mul.f32 %f1341, %f710, 0f40C90FDB; + abs.f32 %f188, %f1341; + setp.neu.f32 %p47, %f188, 0f7F800000; + mov.f32 %f1335, %f1341; + @%p47 bra BB0_36; + + mul.rn.f32 %f1335, %f1341, %f714; + +BB0_36: + mul.f32 %f717, %f1335, 0f3F22F983; + cvt.rni.s32.f32 %r424, %f717; + cvt.rn.f32.s32 %f718, %r424; + neg.f32 %f719, %f718; + mov.f32 %f720, 0f3FC90FDA; + fma.rn.f32 %f721, %f719, %f720, %f1335; + mov.f32 %f722, 0f33A22168; + fma.rn.f32 %f723, %f719, %f722, %f721; + mov.f32 %f724, 0f27C234C5; + fma.rn.f32 %f1336, %f719, %f724, %f723; + abs.f32 %f725, %f1335; + setp.leu.f32 %p48, %f725, 0f47CE4780; + @%p48 bra BB0_47; + + mov.b32 %r25, %f1335; + shr.u32 %r26, %r25, 23; + shl.b32 %r187, %r25, 8; + or.b32 %r27, %r187, -2147483648; + mov.u32 %r415, 0; + mov.u64 %rd297, 0; + mov.u64 %rd296, %rd5; + mov.u32 %r416, %r415; + +BB0_38: + .pragma "nounroll"; + shl.b64 %rd92, %rd297, 2; + mov.u64 %rd93, __cudart_i2opi_f; + add.s64 %rd94, %rd93, %rd92; + ld.const.u32 %r190, [%rd94]; + // inline asm + { + mad.lo.cc.u32 %r188, %r190, %r27, %r416; + madc.hi.u32 %r416, %r190, %r27, 0; + } + // inline asm + st.local.u32 [%rd296], %r188; + add.s32 %r415, %r415, 1; + cvt.s64.s32 %rd297, %r415; + mul.wide.s32 %rd95, %r415, 4; + add.s64 %rd296, %rd5, %rd95; + setp.ne.s32 %p49, %r415, 6; + @%p49 bra BB0_38; + + and.b32 %r193, %r26, 255; + add.s32 %r194, %r193, -128; + shr.u32 %r195, %r194, 5; + and.b32 %r32, %r25, -2147483648; + st.local.u32 [%rd5+24], %r416; + mov.u32 %r196, 6; + sub.s32 %r197, %r196, %r195; + mul.wide.s32 %rd96, %r197, 4; + add.s64 %rd12, %rd5, %rd96; + ld.local.u32 %r417, [%rd12]; + ld.local.u32 %r418, [%rd12+-4]; + and.b32 %r35, %r26, 31; + setp.eq.s32 %p50, %r35, 0; + @%p50 bra BB0_41; + + mov.u32 %r198, 32; + sub.s32 %r199, %r198, %r35; + shr.u32 %r200, %r418, %r199; + shl.b32 %r201, %r417, %r35; + add.s32 %r417, %r200, %r201; + ld.local.u32 %r202, [%rd12+-8]; + shr.u32 %r203, %r202, %r199; + shl.b32 %r204, %r418, %r35; + add.s32 %r418, %r203, %r204; + +BB0_41: + shr.u32 %r205, %r418, 30; + shl.b32 %r206, %r417, 2; + add.s32 %r419, %r205, %r206; + shl.b32 %r41, %r418, 2; + shr.u32 %r207, %r419, 31; + shr.u32 %r208, %r417, 30; + add.s32 %r42, %r207, %r208; + setp.eq.s32 %p51, %r207, 0; + @%p51 bra BB0_42; + bra.uni BB0_43; + +BB0_42: + mov.u32 %r420, %r32; + mov.u32 %r421, %r41; + bra.uni BB0_44; + +BB0_43: + not.b32 %r209, %r419; + neg.s32 %r421, %r41; + setp.eq.s32 %p52, %r41, 0; + selp.u32 %r210, 1, 0, %p52; + add.s32 %r419, %r210, %r209; + xor.b32 %r420, %r32, -2147483648; + +BB0_44: + clz.b32 %r423, %r419; + setp.eq.s32 %p53, %r423, 0; + shl.b32 %r211, %r419, %r423; + mov.u32 %r212, 32; + sub.s32 %r213, %r212, %r423; + shr.u32 %r214, %r421, %r213; + add.s32 %r215, %r214, %r211; + selp.b32 %r50, %r419, %r215, %p53; + mov.u32 %r216, -921707870; + mul.hi.u32 %r422, %r50, %r216; + setp.eq.s32 %p54, %r32, 0; + neg.s32 %r217, %r42; + selp.b32 %r424, %r42, %r217, %p54; + setp.lt.s32 %p55, %r422, 1; + @%p55 bra BB0_46; + + mul.lo.s32 %r218, %r50, -921707870; + shr.u32 %r219, %r218, 31; + shl.b32 %r220, %r422, 1; + add.s32 %r422, %r219, %r220; + add.s32 %r423, %r423, 1; + +BB0_46: + mov.u32 %r221, 126; + sub.s32 %r222, %r221, %r423; + shl.b32 %r223, %r222, 23; + add.s32 %r224, %r422, 1; + shr.u32 %r225, %r224, 7; + add.s32 %r226, %r225, 1; + shr.u32 %r227, %r226, 1; + add.s32 %r228, %r227, %r223; + or.b32 %r229, %r228, %r420; + mov.b32 %f1336, %r229; + +BB0_47: + mul.rn.f32 %f194, %f1336, %f1336; + add.s32 %r58, %r424, 1; + and.b32 %r59, %r58, 1; + setp.eq.s32 %p56, %r59, 0; + @%p56 bra BB0_49; + bra.uni BB0_48; + +BB0_49: + mov.f32 %f728, 0f3C08839E; + mov.f32 %f729, 0fB94CA1F9; + fma.rn.f32 %f1337, %f729, %f194, %f728; + bra.uni BB0_50; + +BB0_48: + mov.f32 %f726, 0fBAB6061A; + mov.f32 %f727, 0f37CCF5CE; + fma.rn.f32 %f1337, %f727, %f194, %f726; + +BB0_50: + @%p56 bra BB0_52; + bra.uni BB0_51; + +BB0_52: + mov.f32 %f733, 0fBE2AAAA3; + fma.rn.f32 %f734, %f1337, %f194, %f733; + fma.rn.f32 %f1338, %f734, %f194, %f714; + bra.uni BB0_53; + +BB0_51: + mov.f32 %f730, 0f3D2AAAA5; + fma.rn.f32 %f731, %f1337, %f194, %f730; + mov.f32 %f732, 0fBF000000; + fma.rn.f32 %f1338, %f731, %f194, %f732; + +BB0_53: + fma.rn.f32 %f1339, %f1338, %f1336, %f1336; + @%p56 bra BB0_55; + + fma.rn.f32 %f1339, %f1338, %f194, %f655; + +BB0_55: + and.b32 %r230, %r58, 2; + setp.eq.s32 %p59, %r230, 0; + @%p59 bra BB0_57; + + mov.f32 %f738, 0fBF800000; + fma.rn.f32 %f1339, %f1339, %f738, %f714; + +BB0_57: + @%p47 bra BB0_59; + + mul.rn.f32 %f1341, %f1341, %f714; + +BB0_59: + mul.f32 %f740, %f1341, 0f3F22F983; + cvt.rni.s32.f32 %r434, %f740; + cvt.rn.f32.s32 %f741, %r434; + neg.f32 %f742, %f741; + fma.rn.f32 %f744, %f742, %f720, %f1341; + fma.rn.f32 %f746, %f742, %f722, %f744; + fma.rn.f32 %f1342, %f742, %f724, %f746; + abs.f32 %f748, %f1341; + setp.leu.f32 %p61, %f748, 0f47CE4780; + @%p61 bra BB0_70; + + mov.b32 %r61, %f1341; + shr.u32 %r62, %r61, 23; + shl.b32 %r233, %r61, 8; + or.b32 %r63, %r233, -2147483648; + mov.u32 %r425, 0; + mov.u64 %rd298, %rd5; + mov.u64 %rd299, %rd29; + mov.u32 %r426, %r425; + +BB0_61: + .pragma "nounroll"; + shl.b64 %rd98, %rd299, 2; + mov.u64 %rd99, __cudart_i2opi_f; + add.s64 %rd100, %rd99, %rd98; + ld.const.u32 %r236, [%rd100]; + // inline asm + { + mad.lo.cc.u32 %r234, %r236, %r63, %r426; + madc.hi.u32 %r426, %r236, %r63, 0; + } + // inline asm + st.local.u32 [%rd298], %r234; + add.s32 %r425, %r425, 1; + cvt.s64.s32 %rd299, %r425; + mul.wide.s32 %rd101, %r425, 4; + add.s64 %rd298, %rd5, %rd101; + setp.ne.s32 %p62, %r425, 6; + @%p62 bra BB0_61; + + and.b32 %r239, %r62, 255; + add.s32 %r240, %r239, -128; + shr.u32 %r241, %r240, 5; + and.b32 %r68, %r61, -2147483648; + st.local.u32 [%rd5+24], %r426; + mov.u32 %r242, 6; + sub.s32 %r243, %r242, %r241; + mul.wide.s32 %rd102, %r243, 4; + add.s64 %rd18, %rd5, %rd102; + ld.local.u32 %r427, [%rd18]; + ld.local.u32 %r428, [%rd18+-4]; + and.b32 %r71, %r62, 31; + setp.eq.s32 %p63, %r71, 0; + @%p63 bra BB0_64; + + mov.u32 %r244, 32; + sub.s32 %r245, %r244, %r71; + shr.u32 %r246, %r428, %r245; + shl.b32 %r247, %r427, %r71; + add.s32 %r427, %r246, %r247; + ld.local.u32 %r248, [%rd18+-8]; + shr.u32 %r249, %r248, %r245; + shl.b32 %r250, %r428, %r71; + add.s32 %r428, %r249, %r250; + +BB0_64: + shr.u32 %r251, %r428, 30; + shl.b32 %r252, %r427, 2; + add.s32 %r429, %r251, %r252; + shl.b32 %r77, %r428, 2; + shr.u32 %r253, %r429, 31; + shr.u32 %r254, %r427, 30; + add.s32 %r78, %r253, %r254; + setp.eq.s32 %p64, %r253, 0; + @%p64 bra BB0_65; + bra.uni BB0_66; + +BB0_65: + mov.u32 %r430, %r68; + mov.u32 %r431, %r77; + bra.uni BB0_67; + +BB0_66: + not.b32 %r255, %r429; + neg.s32 %r431, %r77; + setp.eq.s32 %p65, %r77, 0; + selp.u32 %r256, 1, 0, %p65; + add.s32 %r429, %r256, %r255; + xor.b32 %r430, %r68, -2147483648; + +BB0_67: + clz.b32 %r433, %r429; + setp.eq.s32 %p66, %r433, 0; + shl.b32 %r257, %r429, %r433; + mov.u32 %r258, 32; + sub.s32 %r259, %r258, %r433; + shr.u32 %r260, %r431, %r259; + add.s32 %r261, %r260, %r257; + selp.b32 %r86, %r429, %r261, %p66; + mov.u32 %r262, -921707870; + mul.hi.u32 %r432, %r86, %r262; + setp.eq.s32 %p67, %r68, 0; + neg.s32 %r263, %r78; + selp.b32 %r434, %r78, %r263, %p67; + setp.lt.s32 %p68, %r432, 1; + @%p68 bra BB0_69; + + mul.lo.s32 %r264, %r86, -921707870; + shr.u32 %r265, %r264, 31; + shl.b32 %r266, %r432, 1; + add.s32 %r432, %r265, %r266; + add.s32 %r433, %r433, 1; + +BB0_69: + mov.u32 %r267, 126; + sub.s32 %r268, %r267, %r433; + shl.b32 %r269, %r268, 23; + add.s32 %r270, %r432, 1; + shr.u32 %r271, %r270, 7; + add.s32 %r272, %r271, 1; + shr.u32 %r273, %r272, 1; + add.s32 %r274, %r273, %r269; + or.b32 %r275, %r274, %r430; + mov.b32 %f1342, %r275; + +BB0_70: + mul.rn.f32 %f211, %f1342, %f1342; + and.b32 %r94, %r434, 1; + setp.eq.s32 %p69, %r94, 0; + @%p69 bra BB0_72; + bra.uni BB0_71; + +BB0_72: + mov.f32 %f751, 0f3C08839E; + mov.f32 %f752, 0fB94CA1F9; + fma.rn.f32 %f1343, %f752, %f211, %f751; + bra.uni BB0_73; + +BB0_71: + mov.f32 %f749, 0fBAB6061A; + mov.f32 %f750, 0f37CCF5CE; + fma.rn.f32 %f1343, %f750, %f211, %f749; + +BB0_73: + @%p69 bra BB0_75; + bra.uni BB0_74; + +BB0_75: + mov.f32 %f756, 0fBE2AAAA3; + fma.rn.f32 %f757, %f1343, %f211, %f756; + fma.rn.f32 %f1344, %f757, %f211, %f714; + bra.uni BB0_76; + +BB0_74: + mov.f32 %f753, 0f3D2AAAA5; + fma.rn.f32 %f754, %f1343, %f211, %f753; + mov.f32 %f755, 0fBF000000; + fma.rn.f32 %f1344, %f754, %f211, %f755; + +BB0_76: + fma.rn.f32 %f1345, %f1344, %f1342, %f1342; + @%p69 bra BB0_78; + + fma.rn.f32 %f1345, %f1344, %f211, %f655; + +BB0_78: + and.b32 %r276, %r434, 2; + setp.eq.s32 %p72, %r276, 0; + @%p72 bra BB0_80; + + mov.f32 %f761, 0fBF800000; + fma.rn.f32 %f1345, %f1345, %f761, %f714; + +BB0_80: + mul.f32 %f770, %f186, %f1339; + mul.f32 %f771, %f186, %f1345; + mul.f32 %f772, %f149, %f771; + mul.f32 %f773, %f150, %f771; + mul.f32 %f774, %f151, %f771; + fma.rn.f32 %f775, %f158, %f770, %f772; + fma.rn.f32 %f776, %f157, %f770, %f773; + fma.rn.f32 %f777, %f156, %f770, %f774; + fma.rn.f32 %f765, %f1244, %f185, %f775; + fma.rn.f32 %f766, %f1245, %f185, %f776; + fma.rn.f32 %f767, %f1246, %f185, %f777; + mov.u32 %r278, 0; + st.local.u32 [%rd6+8], %r278; + st.local.u32 [%rd6+4], %r278; + st.local.u32 [%rd6], %r278; + ld.global.u32 %r277, [root]; + mov.f32 %f769, 0f6C4ECB8F; + // inline asm + call _rt_trace_64, (%r277, %f12, %f13, %f14, %f765, %f766, %f767, %r278, %f172, %f769, %rd90, %r123); + // inline asm + ld.local.f32 %f778, [%rd6]; + max.f32 %f780, %f778, %f714; + ld.local.f32 %f781, [%rd6+4]; + max.f32 %f782, %f781, %f714; + ld.local.f32 %f783, [%rd6+8]; + max.f32 %f784, %f783, %f714; + mul.f32 %f785, %f24, %f766; + fma.rn.f32 %f786, %f22, %f765, %f785; + fma.rn.f32 %f787, %f26, %f767, %f786; + cvt.sat.f32.f32 %f788, %f787; + fma.rn.f32 %f1328, %f780, %f788, %f1328; + fma.rn.f32 %f1327, %f782, %f788, %f1327; + fma.rn.f32 %f1326, %f784, %f788, %f1326; + mul.f32 %f789, %f34, %f766; + fma.rn.f32 %f790, %f33, %f765, %f789; + fma.rn.f32 %f791, %f35, %f767, %f790; + cvt.sat.f32.f32 %f792, %f791; + fma.rn.f32 %f1331, %f780, %f792, %f1331; + fma.rn.f32 %f1330, %f782, %f792, %f1330; + fma.rn.f32 %f1329, %f784, %f792, %f1329; + mul.f32 %f793, %f43, %f766; + fma.rn.f32 %f794, %f42, %f765, %f793; + fma.rn.f32 %f795, %f44, %f767, %f794; + cvt.sat.f32.f32 %f796, %f795; + fma.rn.f32 %f1334, %f780, %f796, %f1334; + fma.rn.f32 %f1333, %f782, %f796, %f1333; + fma.rn.f32 %f1332, %f784, %f796, %f1332; + mul.f32 %f797, %f1245, %f766; + fma.rn.f32 %f798, %f1244, %f765, %f797; + fma.rn.f32 %f799, %f1246, %f767, %f798; + cvt.sat.f32.f32 %f800, %f799; + fma.rn.f32 %f1325, %f780, %f800, %f1325; + fma.rn.f32 %f1324, %f782, %f800, %f1324; + fma.rn.f32 %f1323, %f784, %f800, %f1323; + add.s32 %r413, %r413, 1; + setp.lt.s32 %p73, %r413, %r1; + @%p73 bra BB0_34; + + add.s32 %r411, %r411, 1; + setp.lt.s32 %p74, %r411, %r1; + @%p74 bra BB0_33; + +BB0_82: + mul.lo.s32 %r280, %r1, %r1; + cvt.rn.f32.s32 %f801, %r280; + rcp.rn.f32 %f802, %f801; + mul.f32 %f803, %f1325, %f802; + mul.f32 %f804, %f1324, %f802; + mul.f32 %f805, %f1323, %f802; + div.rn.f32 %f1371, %f669, %f801; + mul.f32 %f1365, %f1328, %f802; + mul.f32 %f1366, %f1327, %f802; + mul.f32 %f1367, %f1326, %f802; + mul.f32 %f1362, %f1331, %f802; + mul.f32 %f1363, %f1330, %f802; + mul.f32 %f1364, %f1329, %f802; + mul.f32 %f1359, %f1334, %f802; + mul.f32 %f1360, %f1333, %f802; + mul.f32 %f1361, %f1332, %f802; + fma.rn.f32 %f1368, %f1325, %f802, %f803; + fma.rn.f32 %f1369, %f1324, %f802, %f804; + fma.rn.f32 %f1370, %f1323, %f802, %f805; + +BB0_83: + ld.global.u32 %r436, [imageEnabled]; + and.b32 %r281, %r436, 8; + setp.eq.s32 %p75, %r281, 0; + @%p75 bra BB0_96; + + mov.u32 %r394, 2; + cvt.u64.u32 %rd106, %r3; + cvt.u64.u32 %rd107, %r4; + mov.u64 %rd110, image_Mask; + cvta.global.u64 %rd105, %rd110; + // inline asm + call (%rd104), _rt_buffer_get_64, (%rd105, %r394, %r394, %rd106, %rd107, %rd29, %rd29); + // inline asm + mov.f32 %f809, 0f3E68BA2E; + cvt.rzi.f32.f32 %f810, %f809; + fma.rn.f32 %f811, %f810, 0fC0000000, 0f3EE8BA2E; + abs.f32 %f273, %f811; + abs.f32 %f274, %f1371; + setp.lt.f32 %p76, %f274, 0f00800000; + mul.f32 %f812, %f274, 0f4B800000; + selp.f32 %f813, 0fC3170000, 0fC2FE0000, %p76; + selp.f32 %f814, %f812, %f274, %p76; + mov.b32 %r284, %f814; + and.b32 %r285, %r284, 8388607; + or.b32 %r286, %r285, 1065353216; + mov.b32 %f815, %r286; + shr.u32 %r287, %r284, 23; + cvt.rn.f32.u32 %f816, %r287; + add.f32 %f817, %f813, %f816; + setp.gt.f32 %p77, %f815, 0f3FB504F3; + mul.f32 %f818, %f815, 0f3F000000; + add.f32 %f819, %f817, 0f3F800000; + selp.f32 %f820, %f818, %f815, %p77; + selp.f32 %f821, %f819, %f817, %p77; + add.f32 %f822, %f820, 0fBF800000; + add.f32 %f808, %f820, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f807,%f808; + // inline asm + add.f32 %f823, %f822, %f822; + mul.f32 %f824, %f807, %f823; + mul.f32 %f825, %f824, %f824; + mov.f32 %f826, 0f3C4CAF63; + mov.f32 %f827, 0f3B18F0FE; + fma.rn.f32 %f828, %f827, %f825, %f826; + mov.f32 %f829, 0f3DAAAABD; + fma.rn.f32 %f830, %f828, %f825, %f829; + mul.rn.f32 %f831, %f830, %f825; + mul.rn.f32 %f832, %f831, %f824; + sub.f32 %f833, %f822, %f824; + neg.f32 %f834, %f824; + add.f32 %f835, %f833, %f833; + fma.rn.f32 %f836, %f834, %f822, %f835; + mul.rn.f32 %f837, %f807, %f836; + add.f32 %f838, %f832, %f824; + sub.f32 %f839, %f824, %f838; + add.f32 %f840, %f832, %f839; + add.f32 %f841, %f837, %f840; + add.f32 %f842, %f838, %f841; + sub.f32 %f843, %f838, %f842; + add.f32 %f844, %f841, %f843; + mov.f32 %f845, 0f3F317200; + mul.rn.f32 %f846, %f821, %f845; + mov.f32 %f847, 0f35BFBE8E; + mul.rn.f32 %f848, %f821, %f847; + add.f32 %f849, %f846, %f842; + sub.f32 %f850, %f846, %f849; + add.f32 %f851, %f842, %f850; + add.f32 %f852, %f844, %f851; + add.f32 %f853, %f848, %f852; + add.f32 %f854, %f849, %f853; + sub.f32 %f855, %f849, %f854; + add.f32 %f856, %f853, %f855; + mov.f32 %f857, 0f3EE8BA2E; + mul.rn.f32 %f858, %f857, %f854; + neg.f32 %f859, %f858; + fma.rn.f32 %f860, %f857, %f854, %f859; + fma.rn.f32 %f861, %f857, %f856, %f860; + mov.f32 %f862, 0f00000000; + fma.rn.f32 %f863, %f862, %f854, %f861; + add.rn.f32 %f864, %f858, %f863; + neg.f32 %f865, %f864; + add.rn.f32 %f866, %f858, %f865; + add.rn.f32 %f867, %f866, %f863; + mov.b32 %r288, %f864; + setp.eq.s32 %p78, %r288, 1118925336; + add.s32 %r289, %r288, -1; + mov.b32 %f868, %r289; + add.f32 %f869, %f867, 0f37000000; + selp.f32 %f870, %f868, %f864, %p78; + selp.f32 %f275, %f869, %f867, %p78; + mul.f32 %f871, %f870, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f872, %f871; + mov.f32 %f873, 0fBF317200; + fma.rn.f32 %f874, %f872, %f873, %f870; + mov.f32 %f875, 0fB5BFBE8E; + fma.rn.f32 %f876, %f872, %f875, %f874; + mul.f32 %f877, %f876, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f878, %f877; + add.f32 %f879, %f872, 0f00000000; + ex2.approx.f32 %f880, %f879; + mul.f32 %f881, %f878, %f880; + setp.lt.f32 %p79, %f870, 0fC2D20000; + selp.f32 %f882, 0f00000000, %f881, %p79; + setp.gt.f32 %p80, %f870, 0f42D20000; + selp.f32 %f1372, 0f7F800000, %f882, %p80; + setp.eq.f32 %p81, %f1372, 0f7F800000; + @%p81 bra BB0_86; + + fma.rn.f32 %f1372, %f1372, %f275, %f1372; + +BB0_86: + setp.lt.f32 %p82, %f1371, 0f00000000; + setp.eq.f32 %p83, %f273, 0f3F800000; + and.pred %p3, %p82, %p83; + mov.b32 %r290, %f1372; + xor.b32 %r291, %r290, -2147483648; + mov.b32 %f883, %r291; + selp.f32 %f1374, %f883, %f1372, %p3; + setp.eq.f32 %p84, %f1371, 0f00000000; + @%p84 bra BB0_89; + bra.uni BB0_87; + +BB0_89: + add.f32 %f886, %f1371, %f1371; + selp.f32 %f1374, %f886, 0f00000000, %p83; + bra.uni BB0_90; + +BB0_151: + mov.u64 %rd231, image_HDR; + cvta.global.u64 %rd226, %rd231; + mov.u32 %r370, 8; + mov.u64 %rd230, 0; + // inline asm + call (%rd225), _rt_buffer_get_64, (%rd226, %r107, %r370, %rd22, %rd23, %rd230, %rd230); + // inline asm + mov.f32 %f1213, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs116, %f1213;} + + // inline asm + mov.u16 %rs117, 0; + st.v4.u16 [%rd225], {%rs116, %rs116, %rs116, %rs117}; + +BB0_152: + ld.global.u32 %r371, [additive]; + setp.eq.s32 %p153, %r371, 0; + @%p153 bra BB0_154; + + mov.u64 %rd244, image_RNM0; + cvta.global.u64 %rd233, %rd244; + mov.u32 %r375, 8; + mov.u64 %rd243, 0; + // inline asm + call (%rd232), _rt_buffer_get_64, (%rd233, %r107, %r375, %rd22, %rd23, %rd243, %rd243); + // inline asm + ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd232]; + // inline asm + { cvt.f32.f16 %f1214, %rs124;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1215, %rs125;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1216, %rs126;} + + // inline asm + // inline asm + call (%rd238), _rt_buffer_get_64, (%rd233, %r107, %r375, %rd22, %rd23, %rd243, %rd243); + // inline asm + add.f32 %f1217, %f1214, 0f00000000; + add.f32 %f1218, %f1215, 0f00000000; + add.f32 %f1219, %f1216, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs123, %f1219;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs122, %f1218;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs121, %f1217;} + + // inline asm + mov.u16 %rs128, 0; + st.v4.u16 [%rd238], {%rs121, %rs122, %rs123, %rs128}; + bra.uni BB0_155; + +BB0_154: + mov.u64 %rd251, image_RNM0; + cvta.global.u64 %rd246, %rd251; + mov.u32 %r377, 8; + mov.u64 %rd250, 0; + // inline asm + call (%rd245), _rt_buffer_get_64, (%rd246, %r107, %r377, %rd22, %rd23, %rd250, %rd250); + // inline asm + mov.f32 %f1220, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs129, %f1220;} + + // inline asm + mov.u16 %rs130, 0; + st.v4.u16 [%rd245], {%rs129, %rs129, %rs129, %rs130}; + +BB0_155: + ld.global.u32 %r378, [additive]; + setp.eq.s32 %p154, %r378, 0; + @%p154 bra BB0_157; + + mov.u64 %rd264, image_RNM1; + cvta.global.u64 %rd253, %rd264; + mov.u32 %r382, 8; + mov.u64 %rd263, 0; + // inline asm + call (%rd252), _rt_buffer_get_64, (%rd253, %r107, %r382, %rd22, %rd23, %rd263, %rd263); + // inline asm + ld.v4.u16 {%rs137, %rs138, %rs139, %rs140}, [%rd252]; + // inline asm + { cvt.f32.f16 %f1221, %rs137;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1222, %rs138;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1223, %rs139;} + + // inline asm + // inline asm + call (%rd258), _rt_buffer_get_64, (%rd253, %r107, %r382, %rd22, %rd23, %rd263, %rd263); + // inline asm + add.f32 %f1224, %f1221, 0f00000000; + add.f32 %f1225, %f1222, 0f00000000; + add.f32 %f1226, %f1223, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs136, %f1226;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs135, %f1225;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs134, %f1224;} + + // inline asm + mov.u16 %rs141, 0; + st.v4.u16 [%rd258], {%rs134, %rs135, %rs136, %rs141}; + bra.uni BB0_158; + +BB0_157: + mov.u64 %rd271, image_RNM1; + cvta.global.u64 %rd266, %rd271; + mov.u32 %r384, 8; + mov.u64 %rd270, 0; + // inline asm + call (%rd265), _rt_buffer_get_64, (%rd266, %r107, %r384, %rd22, %rd23, %rd270, %rd270); + // inline asm + mov.f32 %f1227, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs142, %f1227;} + + // inline asm + mov.u16 %rs143, 0; + st.v4.u16 [%rd265], {%rs142, %rs142, %rs142, %rs143}; + +BB0_158: + ld.global.u32 %r385, [additive]; + setp.eq.s32 %p155, %r385, 0; + @%p155 bra BB0_160; + + mov.u64 %rd284, image_RNM2; + cvta.global.u64 %rd273, %rd284; + mov.u32 %r389, 8; + mov.u64 %rd283, 0; + // inline asm + call (%rd272), _rt_buffer_get_64, (%rd273, %r107, %r389, %rd22, %rd23, %rd283, %rd283); + // inline asm + ld.v4.u16 {%rs150, %rs151, %rs152, %rs153}, [%rd272]; + // inline asm + { cvt.f32.f16 %f1228, %rs150;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1229, %rs151;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1230, %rs152;} + + // inline asm + // inline asm + call (%rd278), _rt_buffer_get_64, (%rd273, %r107, %r389, %rd22, %rd23, %rd283, %rd283); + // inline asm + add.f32 %f1231, %f1228, 0f00000000; + add.f32 %f1232, %f1229, 0f00000000; + add.f32 %f1233, %f1230, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs149, %f1233;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs148, %f1232;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs147, %f1231;} + + // inline asm + mov.u16 %rs154, 0; + st.v4.u16 [%rd278], {%rs147, %rs148, %rs149, %rs154}; + bra.uni BB0_161; + +BB0_160: + mov.u64 %rd291, image_RNM2; + cvta.global.u64 %rd286, %rd291; + mov.u32 %r391, 8; + mov.u64 %rd290, 0; + // inline asm + call (%rd285), _rt_buffer_get_64, (%rd286, %r107, %r391, %rd22, %rd23, %rd290, %rd290); + // inline asm + mov.f32 %f1234, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs155, %f1234;} + + // inline asm + mov.u16 %rs156, 0; + st.v4.u16 [%rd285], {%rs155, %rs155, %rs155, %rs156}; + bra.uni BB0_161; + +BB0_87: + setp.geu.f32 %p85, %f1371, 0f00000000; + @%p85 bra BB0_90; + + cvt.rzi.f32.f32 %f885, %f857; + setp.neu.f32 %p86, %f885, 0f3EE8BA2E; + selp.f32 %f1374, 0f7FFFFFFF, %f1374, %p86; + +BB0_90: + add.f32 %f887, %f274, 0f3EE8BA2E; + mov.b32 %r292, %f887; + setp.lt.s32 %p88, %r292, 2139095040; + @%p88 bra BB0_95; + + setp.gtu.f32 %p89, %f274, 0f7F800000; + @%p89 bra BB0_94; + bra.uni BB0_92; + +BB0_94: + add.f32 %f1374, %f1371, 0f3EE8BA2E; + bra.uni BB0_95; + +BB0_92: + setp.neu.f32 %p90, %f274, 0f7F800000; + @%p90 bra BB0_95; + + selp.f32 %f1374, 0fFF800000, 0f7F800000, %p3; + +BB0_95: + mul.f32 %f888, %f1374, 0f437F0000; + setp.eq.f32 %p91, %f1371, 0f3F800000; + selp.f32 %f889, 0f437F0000, %f888, %p91; + cvt.rzi.u32.f32 %r293, %f889; + cvt.u16.u32 %rs40, %r293; + mov.u16 %rs41, 255; + st.v2.u8 [%rd104], {%rs40, %rs41}; + ld.global.u32 %r436, [imageEnabled]; + +BB0_96: + ld.global.f32 %f890, [lightColor]; + mul.f32 %f286, %f1368, %f890; + ld.global.f32 %f891, [lightColor+4]; + mul.f32 %f287, %f1369, %f891; + ld.global.f32 %f892, [lightColor+8]; + mul.f32 %f288, %f1370, %f892; + and.b32 %r294, %r436, 1; + setp.eq.b32 %p92, %r294, 1; + @!%p92 bra BB0_131; + bra.uni BB0_97; + +BB0_97: + mov.f32 %f895, 0f3E666666; + cvt.rzi.f32.f32 %f896, %f895; + fma.rn.f32 %f897, %f896, 0fC0000000, 0f3EE66666; + abs.f32 %f289, %f897; + abs.f32 %f290, %f286; + setp.lt.f32 %p93, %f290, 0f00800000; + mul.f32 %f898, %f290, 0f4B800000; + selp.f32 %f899, 0fC3170000, 0fC2FE0000, %p93; + selp.f32 %f900, %f898, %f290, %p93; + mov.b32 %r295, %f900; + and.b32 %r296, %r295, 8388607; + or.b32 %r297, %r296, 1065353216; + mov.b32 %f901, %r297; + shr.u32 %r298, %r295, 23; + cvt.rn.f32.u32 %f902, %r298; + add.f32 %f903, %f899, %f902; + setp.gt.f32 %p94, %f901, 0f3FB504F3; + mul.f32 %f904, %f901, 0f3F000000; + add.f32 %f905, %f903, 0f3F800000; + selp.f32 %f906, %f904, %f901, %p94; + selp.f32 %f907, %f905, %f903, %p94; + add.f32 %f908, %f906, 0fBF800000; + add.f32 %f894, %f906, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f893,%f894; + // inline asm + add.f32 %f909, %f908, %f908; + mul.f32 %f910, %f893, %f909; + mul.f32 %f911, %f910, %f910; + mov.f32 %f912, 0f3C4CAF63; + mov.f32 %f913, 0f3B18F0FE; + fma.rn.f32 %f914, %f913, %f911, %f912; + mov.f32 %f915, 0f3DAAAABD; + fma.rn.f32 %f916, %f914, %f911, %f915; + mul.rn.f32 %f917, %f916, %f911; + mul.rn.f32 %f918, %f917, %f910; + sub.f32 %f919, %f908, %f910; + neg.f32 %f920, %f910; + add.f32 %f921, %f919, %f919; + fma.rn.f32 %f922, %f920, %f908, %f921; + mul.rn.f32 %f923, %f893, %f922; + add.f32 %f924, %f918, %f910; + sub.f32 %f925, %f910, %f924; + add.f32 %f926, %f918, %f925; + add.f32 %f927, %f923, %f926; + add.f32 %f928, %f924, %f927; + sub.f32 %f929, %f924, %f928; + add.f32 %f930, %f927, %f929; + mov.f32 %f931, 0f3F317200; + mul.rn.f32 %f932, %f907, %f931; + mov.f32 %f933, 0f35BFBE8E; + mul.rn.f32 %f934, %f907, %f933; + add.f32 %f935, %f932, %f928; + sub.f32 %f936, %f932, %f935; + add.f32 %f937, %f928, %f936; + add.f32 %f938, %f930, %f937; + add.f32 %f939, %f934, %f938; + add.f32 %f940, %f935, %f939; + sub.f32 %f941, %f935, %f940; + add.f32 %f942, %f939, %f941; + mov.f32 %f943, 0f3EE66666; + mul.rn.f32 %f944, %f943, %f940; + neg.f32 %f945, %f944; + fma.rn.f32 %f946, %f943, %f940, %f945; + fma.rn.f32 %f947, %f943, %f942, %f946; + mov.f32 %f948, 0f00000000; + fma.rn.f32 %f949, %f948, %f940, %f947; + add.rn.f32 %f950, %f944, %f949; + neg.f32 %f951, %f950; + add.rn.f32 %f952, %f944, %f951; + add.rn.f32 %f953, %f952, %f949; + mov.b32 %r299, %f950; + setp.eq.s32 %p95, %r299, 1118925336; + add.s32 %r300, %r299, -1; + mov.b32 %f954, %r300; + add.f32 %f955, %f953, 0f37000000; + selp.f32 %f956, %f954, %f950, %p95; + selp.f32 %f291, %f955, %f953, %p95; + mul.f32 %f957, %f956, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f958, %f957; + mov.f32 %f959, 0fBF317200; + fma.rn.f32 %f960, %f958, %f959, %f956; + mov.f32 %f961, 0fB5BFBE8E; + fma.rn.f32 %f962, %f958, %f961, %f960; + mul.f32 %f963, %f962, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f964, %f963; + add.f32 %f965, %f958, 0f00000000; + ex2.approx.f32 %f966, %f965; + mul.f32 %f967, %f964, %f966; + setp.lt.f32 %p96, %f956, 0fC2D20000; + selp.f32 %f968, 0f00000000, %f967, %p96; + setp.gt.f32 %p97, %f956, 0f42D20000; + selp.f32 %f1375, 0f7F800000, %f968, %p97; + setp.eq.f32 %p98, %f1375, 0f7F800000; + @%p98 bra BB0_99; + + fma.rn.f32 %f1375, %f1375, %f291, %f1375; + +BB0_99: + setp.lt.f32 %p99, %f286, 0f00000000; + setp.eq.f32 %p100, %f289, 0f3F800000; + and.pred %p4, %p99, %p100; + mov.b32 %r301, %f1375; + xor.b32 %r302, %r301, -2147483648; + mov.b32 %f969, %r302; + selp.f32 %f1377, %f969, %f1375, %p4; + setp.eq.f32 %p101, %f286, 0f00000000; + @%p101 bra BB0_102; + bra.uni BB0_100; + +BB0_102: + add.f32 %f972, %f286, %f286; + selp.f32 %f1377, %f972, 0f00000000, %p100; + bra.uni BB0_103; + +BB0_100: + setp.geu.f32 %p102, %f286, 0f00000000; + @%p102 bra BB0_103; + + cvt.rzi.f32.f32 %f971, %f943; + setp.neu.f32 %p103, %f971, 0f3EE66666; + selp.f32 %f1377, 0f7FFFFFFF, %f1377, %p103; + +BB0_103: + add.f32 %f973, %f290, 0f3EE66666; + mov.b32 %r303, %f973; + setp.lt.s32 %p105, %r303, 2139095040; + @%p105 bra BB0_108; + + setp.gtu.f32 %p106, %f290, 0f7F800000; + @%p106 bra BB0_107; + bra.uni BB0_105; + +BB0_107: + add.f32 %f1377, %f286, 0f3EE66666; + bra.uni BB0_108; + +BB0_105: + setp.neu.f32 %p107, %f290, 0f7F800000; + @%p107 bra BB0_108; + + selp.f32 %f1377, 0fFF800000, 0f7F800000, %p4; + +BB0_108: + setp.eq.f32 %p108, %f286, 0f3F800000; + selp.f32 %f302, 0f3F800000, %f1377, %p108; + abs.f32 %f303, %f287; + setp.lt.f32 %p109, %f303, 0f00800000; + mul.f32 %f976, %f303, 0f4B800000; + selp.f32 %f977, 0fC3170000, 0fC2FE0000, %p109; + selp.f32 %f978, %f976, %f303, %p109; + mov.b32 %r304, %f978; + and.b32 %r305, %r304, 8388607; + or.b32 %r306, %r305, 1065353216; + mov.b32 %f979, %r306; + shr.u32 %r307, %r304, 23; + cvt.rn.f32.u32 %f980, %r307; + add.f32 %f981, %f977, %f980; + setp.gt.f32 %p110, %f979, 0f3FB504F3; + mul.f32 %f982, %f979, 0f3F000000; + add.f32 %f983, %f981, 0f3F800000; + selp.f32 %f984, %f982, %f979, %p110; + selp.f32 %f985, %f983, %f981, %p110; + add.f32 %f986, %f984, 0fBF800000; + add.f32 %f975, %f984, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f974,%f975; + // inline asm + add.f32 %f987, %f986, %f986; + mul.f32 %f988, %f974, %f987; + mul.f32 %f989, %f988, %f988; + fma.rn.f32 %f992, %f913, %f989, %f912; + fma.rn.f32 %f994, %f992, %f989, %f915; + mul.rn.f32 %f995, %f994, %f989; + mul.rn.f32 %f996, %f995, %f988; + sub.f32 %f997, %f986, %f988; + neg.f32 %f998, %f988; + add.f32 %f999, %f997, %f997; + fma.rn.f32 %f1000, %f998, %f986, %f999; + mul.rn.f32 %f1001, %f974, %f1000; + add.f32 %f1002, %f996, %f988; + sub.f32 %f1003, %f988, %f1002; + add.f32 %f1004, %f996, %f1003; + add.f32 %f1005, %f1001, %f1004; + add.f32 %f1006, %f1002, %f1005; + sub.f32 %f1007, %f1002, %f1006; + add.f32 %f1008, %f1005, %f1007; + mul.rn.f32 %f1010, %f985, %f931; + mul.rn.f32 %f1012, %f985, %f933; + add.f32 %f1013, %f1010, %f1006; + sub.f32 %f1014, %f1010, %f1013; + add.f32 %f1015, %f1006, %f1014; + add.f32 %f1016, %f1008, %f1015; + add.f32 %f1017, %f1012, %f1016; + add.f32 %f1018, %f1013, %f1017; + sub.f32 %f1019, %f1013, %f1018; + add.f32 %f1020, %f1017, %f1019; + mul.rn.f32 %f1022, %f943, %f1018; + neg.f32 %f1023, %f1022; + fma.rn.f32 %f1024, %f943, %f1018, %f1023; + fma.rn.f32 %f1025, %f943, %f1020, %f1024; + fma.rn.f32 %f1027, %f948, %f1018, %f1025; + add.rn.f32 %f1028, %f1022, %f1027; + neg.f32 %f1029, %f1028; + add.rn.f32 %f1030, %f1022, %f1029; + add.rn.f32 %f1031, %f1030, %f1027; + mov.b32 %r308, %f1028; + setp.eq.s32 %p111, %r308, 1118925336; + add.s32 %r309, %r308, -1; + mov.b32 %f1032, %r309; + add.f32 %f1033, %f1031, 0f37000000; + selp.f32 %f1034, %f1032, %f1028, %p111; + selp.f32 %f304, %f1033, %f1031, %p111; + mul.f32 %f1035, %f1034, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f1036, %f1035; + fma.rn.f32 %f1038, %f1036, %f959, %f1034; + fma.rn.f32 %f1040, %f1036, %f961, %f1038; + mul.f32 %f1041, %f1040, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f1042, %f1041; + add.f32 %f1043, %f1036, 0f00000000; + ex2.approx.f32 %f1044, %f1043; + mul.f32 %f1045, %f1042, %f1044; + setp.lt.f32 %p112, %f1034, 0fC2D20000; + selp.f32 %f1046, 0f00000000, %f1045, %p112; + setp.gt.f32 %p113, %f1034, 0f42D20000; + selp.f32 %f1378, 0f7F800000, %f1046, %p113; + setp.eq.f32 %p114, %f1378, 0f7F800000; + @%p114 bra BB0_110; + + fma.rn.f32 %f1378, %f1378, %f304, %f1378; + +BB0_110: + setp.lt.f32 %p115, %f287, 0f00000000; + and.pred %p5, %p115, %p100; + mov.b32 %r310, %f1378; + xor.b32 %r311, %r310, -2147483648; + mov.b32 %f1047, %r311; + selp.f32 %f1380, %f1047, %f1378, %p5; + setp.eq.f32 %p117, %f287, 0f00000000; + @%p117 bra BB0_113; + bra.uni BB0_111; + +BB0_113: + add.f32 %f1050, %f287, %f287; + selp.f32 %f1380, %f1050, 0f00000000, %p100; + bra.uni BB0_114; + +BB0_111: + setp.geu.f32 %p118, %f287, 0f00000000; + @%p118 bra BB0_114; + + cvt.rzi.f32.f32 %f1049, %f943; + setp.neu.f32 %p119, %f1049, 0f3EE66666; + selp.f32 %f1380, 0f7FFFFFFF, %f1380, %p119; + +BB0_114: + add.f32 %f1051, %f303, 0f3EE66666; + mov.b32 %r312, %f1051; + setp.lt.s32 %p121, %r312, 2139095040; + @%p121 bra BB0_119; + + setp.gtu.f32 %p122, %f303, 0f7F800000; + @%p122 bra BB0_118; + bra.uni BB0_116; + +BB0_118: + add.f32 %f1380, %f287, 0f3EE66666; + bra.uni BB0_119; + +BB0_116: + setp.neu.f32 %p123, %f303, 0f7F800000; + @%p123 bra BB0_119; + + selp.f32 %f1380, 0fFF800000, 0f7F800000, %p5; + +BB0_119: + setp.eq.f32 %p124, %f287, 0f3F800000; + selp.f32 %f315, 0f3F800000, %f1380, %p124; + abs.f32 %f316, %f288; + setp.lt.f32 %p125, %f316, 0f00800000; + mul.f32 %f1054, %f316, 0f4B800000; + selp.f32 %f1055, 0fC3170000, 0fC2FE0000, %p125; + selp.f32 %f1056, %f1054, %f316, %p125; + mov.b32 %r313, %f1056; + and.b32 %r314, %r313, 8388607; + or.b32 %r315, %r314, 1065353216; + mov.b32 %f1057, %r315; + shr.u32 %r316, %r313, 23; + cvt.rn.f32.u32 %f1058, %r316; + add.f32 %f1059, %f1055, %f1058; + setp.gt.f32 %p126, %f1057, 0f3FB504F3; + mul.f32 %f1060, %f1057, 0f3F000000; + add.f32 %f1061, %f1059, 0f3F800000; + selp.f32 %f1062, %f1060, %f1057, %p126; + selp.f32 %f1063, %f1061, %f1059, %p126; + add.f32 %f1064, %f1062, 0fBF800000; + add.f32 %f1053, %f1062, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f1052,%f1053; + // inline asm + add.f32 %f1065, %f1064, %f1064; + mul.f32 %f1066, %f1052, %f1065; + mul.f32 %f1067, %f1066, %f1066; + fma.rn.f32 %f1070, %f913, %f1067, %f912; + fma.rn.f32 %f1072, %f1070, %f1067, %f915; + mul.rn.f32 %f1073, %f1072, %f1067; + mul.rn.f32 %f1074, %f1073, %f1066; + sub.f32 %f1075, %f1064, %f1066; + neg.f32 %f1076, %f1066; + add.f32 %f1077, %f1075, %f1075; + fma.rn.f32 %f1078, %f1076, %f1064, %f1077; + mul.rn.f32 %f1079, %f1052, %f1078; + add.f32 %f1080, %f1074, %f1066; + sub.f32 %f1081, %f1066, %f1080; + add.f32 %f1082, %f1074, %f1081; + add.f32 %f1083, %f1079, %f1082; + add.f32 %f1084, %f1080, %f1083; + sub.f32 %f1085, %f1080, %f1084; + add.f32 %f1086, %f1083, %f1085; + mul.rn.f32 %f1088, %f1063, %f931; + mul.rn.f32 %f1090, %f1063, %f933; + add.f32 %f1091, %f1088, %f1084; + sub.f32 %f1092, %f1088, %f1091; + add.f32 %f1093, %f1084, %f1092; + add.f32 %f1094, %f1086, %f1093; + add.f32 %f1095, %f1090, %f1094; + add.f32 %f1096, %f1091, %f1095; + sub.f32 %f1097, %f1091, %f1096; + add.f32 %f1098, %f1095, %f1097; + mul.rn.f32 %f1100, %f943, %f1096; + neg.f32 %f1101, %f1100; + fma.rn.f32 %f1102, %f943, %f1096, %f1101; + fma.rn.f32 %f1103, %f943, %f1098, %f1102; + fma.rn.f32 %f1105, %f948, %f1096, %f1103; + add.rn.f32 %f1106, %f1100, %f1105; + neg.f32 %f1107, %f1106; + add.rn.f32 %f1108, %f1100, %f1107; + add.rn.f32 %f1109, %f1108, %f1105; + mov.b32 %r317, %f1106; + setp.eq.s32 %p127, %r317, 1118925336; + add.s32 %r318, %r317, -1; + mov.b32 %f1110, %r318; + add.f32 %f1111, %f1109, 0f37000000; + selp.f32 %f1112, %f1110, %f1106, %p127; + selp.f32 %f317, %f1111, %f1109, %p127; + mul.f32 %f1113, %f1112, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f1114, %f1113; + fma.rn.f32 %f1116, %f1114, %f959, %f1112; + fma.rn.f32 %f1118, %f1114, %f961, %f1116; + mul.f32 %f1119, %f1118, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f1120, %f1119; + add.f32 %f1121, %f1114, 0f00000000; + ex2.approx.f32 %f1122, %f1121; + mul.f32 %f1123, %f1120, %f1122; + setp.lt.f32 %p128, %f1112, 0fC2D20000; + selp.f32 %f1124, 0f00000000, %f1123, %p128; + setp.gt.f32 %p129, %f1112, 0f42D20000; + selp.f32 %f1381, 0f7F800000, %f1124, %p129; + setp.eq.f32 %p130, %f1381, 0f7F800000; + @%p130 bra BB0_121; + + fma.rn.f32 %f1381, %f1381, %f317, %f1381; + +BB0_121: + setp.lt.f32 %p131, %f288, 0f00000000; + and.pred %p6, %p131, %p100; + mov.b32 %r319, %f1381; + xor.b32 %r320, %r319, -2147483648; + mov.b32 %f1125, %r320; + selp.f32 %f1383, %f1125, %f1381, %p6; + setp.eq.f32 %p133, %f288, 0f00000000; + @%p133 bra BB0_124; + bra.uni BB0_122; + +BB0_124: + add.f32 %f1128, %f288, %f288; + selp.f32 %f1383, %f1128, 0f00000000, %p100; + bra.uni BB0_125; + +BB0_122: + setp.geu.f32 %p134, %f288, 0f00000000; + @%p134 bra BB0_125; + + cvt.rzi.f32.f32 %f1127, %f943; + setp.neu.f32 %p135, %f1127, 0f3EE66666; + selp.f32 %f1383, 0f7FFFFFFF, %f1383, %p135; + +BB0_125: + add.f32 %f1129, %f316, 0f3EE66666; + mov.b32 %r321, %f1129; + setp.lt.s32 %p137, %r321, 2139095040; + @%p137 bra BB0_130; + + setp.gtu.f32 %p138, %f316, 0f7F800000; + @%p138 bra BB0_129; + bra.uni BB0_127; + +BB0_129: + add.f32 %f1383, %f288, 0f3EE66666; + bra.uni BB0_130; + +BB0_127: + setp.neu.f32 %p139, %f316, 0f7F800000; + @%p139 bra BB0_130; + + selp.f32 %f1383, 0fFF800000, 0f7F800000, %p6; + +BB0_130: + mov.u32 %r395, 2; + setp.eq.f32 %p140, %f288, 0f3F800000; + selp.f32 %f1130, 0f3F800000, %f1383, %p140; + cvt.u64.u32 %rd114, %r4; + cvt.u64.u32 %rd113, %r3; + mov.u64 %rd117, image; + cvta.global.u64 %rd112, %rd117; + // inline asm + call (%rd111), _rt_buffer_get_64, (%rd112, %r395, %r108, %rd113, %rd114, %rd29, %rd29); + // inline asm + cvt.sat.f32.f32 %f1131, %f1130; + mul.f32 %f1132, %f1131, 0f437FFD71; + cvt.rzi.u32.f32 %r324, %f1132; + cvt.sat.f32.f32 %f1133, %f315; + mul.f32 %f1134, %f1133, 0f437FFD71; + cvt.rzi.u32.f32 %r325, %f1134; + cvt.sat.f32.f32 %f1135, %f302; + mul.f32 %f1136, %f1135, 0f437FFD71; + cvt.rzi.u32.f32 %r326, %f1136; + cvt.u16.u32 %rs42, %r324; + cvt.u16.u32 %rs43, %r326; + cvt.u16.u32 %rs44, %r325; + mov.u16 %rs45, 255; + st.v4.u8 [%rd111], {%rs42, %rs44, %rs43, %rs45}; + ld.global.u32 %r436, [imageEnabled]; + +BB0_131: + cvt.u64.u32 %rd20, %r3; + cvt.u64.u32 %rd21, %r4; + and.b32 %r327, %r436, 4; + setp.eq.s32 %p141, %r327, 0; + @%p141 bra BB0_135; + + ld.global.u32 %r328, [additive]; + setp.eq.s32 %p142, %r328, 0; + // inline asm + { cvt.rn.f16.f32 %rs46, %f655;} + + // inline asm + @%p142 bra BB0_134; + + mov.u32 %r396, 2; + mov.u64 %rd130, image_HDR; + cvta.global.u64 %rd119, %rd130; + mov.u32 %r332, 8; + // inline asm + call (%rd118), _rt_buffer_get_64, (%rd119, %r396, %r332, %rd20, %rd21, %rd29, %rd29); + // inline asm + ld.v4.u16 {%rs53, %rs54, %rs55, %rs56}, [%rd118]; + // inline asm + { cvt.f32.f16 %f1138, %rs53;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1139, %rs54;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1140, %rs55;} + + // inline asm + // inline asm + call (%rd124), _rt_buffer_get_64, (%rd119, %r396, %r332, %rd20, %rd21, %rd29, %rd29); + // inline asm + add.f32 %f1141, %f286, %f1138; + add.f32 %f1142, %f287, %f1139; + add.f32 %f1143, %f288, %f1140; + // inline asm + { cvt.rn.f16.f32 %rs52, %f1143;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs51, %f1142;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs50, %f1141;} + + // inline asm + st.v4.u16 [%rd124], {%rs50, %rs51, %rs52, %rs46}; + bra.uni BB0_135; + +BB0_134: + mov.u32 %r397, 2; + mov.u64 %rd137, image_HDR; + cvta.global.u64 %rd132, %rd137; + mov.u32 %r334, 8; + // inline asm + call (%rd131), _rt_buffer_get_64, (%rd132, %r397, %r334, %rd20, %rd21, %rd29, %rd29); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs59, %f288;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs58, %f287;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs57, %f286;} + + // inline asm + st.v4.u16 [%rd131], {%rs57, %rs58, %rs59, %rs46}; + +BB0_135: + ld.global.f32 %f1148, [lightColor]; + mul.f32 %f1149, %f1365, %f1148; + ld.global.f32 %f1150, [lightColor+4]; + mul.f32 %f1151, %f1366, %f1150; + ld.global.f32 %f1152, [lightColor+8]; + mul.f32 %f1153, %f1367, %f1152; + mul.f32 %f1154, %f1362, %f1148; + mul.f32 %f1155, %f1363, %f1150; + mul.f32 %f1156, %f1364, %f1152; + mul.f32 %f1157, %f1359, %f1148; + mul.f32 %f1158, %f1360, %f1150; + mul.f32 %f1159, %f1361, %f1152; + add.f32 %f1160, %f1149, %f1154; + add.f32 %f1161, %f1151, %f1155; + add.f32 %f1162, %f1153, %f1156; + add.f32 %f1163, %f1160, %f1157; + add.f32 %f1164, %f1161, %f1158; + add.f32 %f1165, %f1162, %f1159; + mul.f32 %f1166, %f1163, 0f3F13CD3A; + mul.f32 %f1167, %f1164, 0f3F13CD3A; + mul.f32 %f1168, %f1165, 0f3F13CD3A; + div.rn.f32 %f1169, %f286, %f1166; + div.rn.f32 %f1170, %f287, %f1167; + div.rn.f32 %f1171, %f288, %f1168; + setp.eq.f32 %p143, %f286, 0f00000000; + selp.f32 %f1172, 0f00000000, %f1169, %p143; + setp.eq.f32 %p144, %f287, 0f00000000; + selp.f32 %f1173, 0f00000000, %f1170, %p144; + setp.eq.f32 %p145, %f288, 0f00000000; + selp.f32 %f1174, 0f00000000, %f1171, %p145; + mul.f32 %f328, %f1149, %f1172; + mul.f32 %f329, %f1151, %f1173; + mul.f32 %f330, %f1153, %f1174; + mul.f32 %f331, %f1154, %f1172; + mul.f32 %f332, %f1155, %f1173; + mul.f32 %f333, %f1156, %f1174; + mul.f32 %f334, %f1157, %f1172; + mul.f32 %f335, %f1158, %f1173; + mul.f32 %f336, %f1159, %f1174; + ld.global.u32 %r335, [additive]; + setp.eq.s32 %p146, %r335, 0; + // inline asm + { cvt.rn.f16.f32 %rs60, %f655;} + + // inline asm + @%p146 bra BB0_137; + + mov.u32 %r398, 2; + mov.u64 %rd150, image_RNM0; + cvta.global.u64 %rd139, %rd150; + mov.u32 %r339, 8; + // inline asm + call (%rd138), _rt_buffer_get_64, (%rd139, %r398, %r339, %rd20, %rd21, %rd29, %rd29); + // inline asm + ld.v4.u16 {%rs67, %rs68, %rs69, %rs70}, [%rd138]; + // inline asm + { cvt.f32.f16 %f1175, %rs67;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1176, %rs68;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1177, %rs69;} + + // inline asm + // inline asm + call (%rd144), _rt_buffer_get_64, (%rd139, %r398, %r339, %rd20, %rd21, %rd29, %rd29); + // inline asm + add.f32 %f1178, %f328, %f1175; + add.f32 %f1179, %f329, %f1176; + add.f32 %f1180, %f330, %f1177; + // inline asm + { cvt.rn.f16.f32 %rs66, %f1180;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs65, %f1179;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs64, %f1178;} + + // inline asm + st.v4.u16 [%rd144], {%rs64, %rs65, %rs66, %rs60}; + bra.uni BB0_138; + +BB0_137: + mov.u32 %r403, 2; + mov.u64 %rd157, image_RNM0; + cvta.global.u64 %rd152, %rd157; + mov.u32 %r341, 8; + // inline asm + call (%rd151), _rt_buffer_get_64, (%rd152, %r403, %r341, %rd20, %rd21, %rd29, %rd29); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs73, %f330;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs72, %f329;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs71, %f328;} + + // inline asm + st.v4.u16 [%rd151], {%rs71, %rs72, %rs73, %rs60}; + +BB0_138: + ld.global.u32 %r342, [additive]; + setp.eq.s32 %p147, %r342, 0; + // inline asm + { cvt.rn.f16.f32 %rs74, %f655;} + + // inline asm + @%p147 bra BB0_140; + + mov.u32 %r399, 2; + mov.u64 %rd170, image_RNM1; + cvta.global.u64 %rd159, %rd170; + mov.u32 %r346, 8; + // inline asm + call (%rd158), _rt_buffer_get_64, (%rd159, %r399, %r346, %rd20, %rd21, %rd29, %rd29); + // inline asm + ld.v4.u16 {%rs81, %rs82, %rs83, %rs84}, [%rd158]; + // inline asm + { cvt.f32.f16 %f1185, %rs81;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1186, %rs82;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1187, %rs83;} + + // inline asm + // inline asm + call (%rd164), _rt_buffer_get_64, (%rd159, %r399, %r346, %rd20, %rd21, %rd29, %rd29); + // inline asm + add.f32 %f1188, %f331, %f1185; + add.f32 %f1189, %f332, %f1186; + add.f32 %f1190, %f333, %f1187; + // inline asm + { cvt.rn.f16.f32 %rs80, %f1190;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs79, %f1189;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs78, %f1188;} + + // inline asm + st.v4.u16 [%rd164], {%rs78, %rs79, %rs80, %rs74}; + bra.uni BB0_141; + +BB0_140: + mov.u32 %r402, 2; + mov.u64 %rd177, image_RNM1; + cvta.global.u64 %rd172, %rd177; + mov.u32 %r348, 8; + // inline asm + call (%rd171), _rt_buffer_get_64, (%rd172, %r402, %r348, %rd20, %rd21, %rd29, %rd29); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs87, %f333;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs86, %f332;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs85, %f331;} + + // inline asm + st.v4.u16 [%rd171], {%rs85, %rs86, %rs87, %rs74}; + +BB0_141: + ld.global.u32 %r349, [additive]; + setp.eq.s32 %p148, %r349, 0; + // inline asm + { cvt.rn.f16.f32 %rs88, %f655;} + + // inline asm + @%p148 bra BB0_143; + + mov.u32 %r400, 2; + mov.u64 %rd190, image_RNM2; + cvta.global.u64 %rd179, %rd190; + mov.u32 %r353, 8; + // inline asm + call (%rd178), _rt_buffer_get_64, (%rd179, %r400, %r353, %rd20, %rd21, %rd29, %rd29); + // inline asm + ld.v4.u16 {%rs95, %rs96, %rs97, %rs98}, [%rd178]; + // inline asm + { cvt.f32.f16 %f1195, %rs95;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1196, %rs96;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1197, %rs97;} + + // inline asm + // inline asm + call (%rd184), _rt_buffer_get_64, (%rd179, %r400, %r353, %rd20, %rd21, %rd29, %rd29); + // inline asm + add.f32 %f1198, %f334, %f1195; + add.f32 %f1199, %f335, %f1196; + add.f32 %f1200, %f336, %f1197; + // inline asm + { cvt.rn.f16.f32 %rs94, %f1200;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs93, %f1199;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs92, %f1198;} + + // inline asm + st.v4.u16 [%rd184], {%rs92, %rs93, %rs94, %rs88}; + bra.uni BB0_161; + +BB0_143: + mov.u32 %r401, 2; + mov.u64 %rd197, image_RNM2; + cvta.global.u64 %rd192, %rd197; + mov.u32 %r355, 8; + // inline asm + call (%rd191), _rt_buffer_get_64, (%rd192, %r401, %r355, %rd20, %rd21, %rd29, %rd29); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs101, %f336;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs100, %f335;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs99, %f334;} + + // inline asm + st.v4.u16 [%rd191], {%rs99, %rs100, %rs101, %rs88}; + +BB0_161: + ret; +} + + |