diff options
Diffstat (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLight.ptx')
| -rw-r--r-- | VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLight.ptx | 1843 |
1 files changed, 1843 insertions, 0 deletions
diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLight.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLight.ptx new file mode 100644 index 00000000..bb6f45f9 --- /dev/null +++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLight.ptx @@ -0,0 +1,1843 @@ +// +// Generated by NVIDIA NVVM Compiler +// +// Compiler Build ID: CL-23083092 +// Cuda compilation tools, release 9.1, V9.1.85 +// Based on LLVM 3.4svn +// + +.version 6.1 +.target sm_30 +.address_size 64 + + // .globl _Z6oxMainv +.global .align 8 .b8 pixelID[8]; +.global .align 8 .b8 resolution[8]; +.global .align 4 .b8 normal[12]; +.global .align 4 .b8 camPos[12]; +.global .align 4 .b8 root[4]; +.global .align 4 .u32 imageEnabled; +.global .texref lightmap; +.global .align 16 .b8 tileInfo[16]; +.global .align 4 .u32 additive; +.global .align 1 .b8 image[1]; +.global .align 1 .b8 image_HDR[1]; +.global .align 1 .b8 image_HDR2[1]; +.global .align 1 .b8 image_Mask[1]; +.global .align 1 .b8 uvpos[1]; +.global .align 1 .b8 uvnormal[1]; +.global .align 1 .b8 lightMeshBuffer[1]; +.global .align 4 .u32 lightMeshBufferSize; +.global .align 4 .f32 lightInvCutoff; +.global .align 4 .f32 lightPointSize; +.global .align 4 .b8 lightColor[12]; +.global .align 1 .b8 rnd_seeds[1]; +.global .align 4 .u32 samples; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; +.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; +.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; +.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; +.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; +.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; + +.visible .entry _Z6oxMainv( + +) +{ + .local .align 4 .b8 __local_depot0[44]; + .reg .b64 %SP; + .reg .b64 %SPL; + .reg .pred %p<142>; + .reg .b16 %rs<46>; + .reg .f32 %f<906>; + .reg .b32 %r<367>; + .reg .b64 %rd<147>; + + + mov.u64 %rd146, __local_depot0; + cvta.local.u64 %SP, %rd146; + ld.global.u32 %r1, [samples]; + ld.global.v2.u32 {%r103, %r104}, [pixelID]; + cvt.u64.u32 %rd21, %r103; + cvt.u64.u32 %rd22, %r104; + mov.u64 %rd25, uvnormal; + cvta.global.u64 %rd20, %rd25; + mov.u32 %r101, 2; + mov.u32 %r102, 4; + mov.u64 %rd24, 0; + // inline asm + call (%rd19), _rt_buffer_get_64, (%rd20, %r101, %r102, %rd21, %rd22, %rd24, %rd24); + // inline asm + ld.u32 %r2, [%rd19]; + shr.u32 %r107, %r2, 16; + cvt.u16.u32 %rs1, %r107; + and.b16 %rs3, %rs1, 255; + cvt.u16.u32 %rs4, %r2; + or.b16 %rs5, %rs4, %rs3; + setp.eq.s16 %p7, %rs5, 0; + mov.f32 %f847, 0f00000000; + mov.f32 %f848, %f847; + mov.f32 %f849, %f847; + @%p7 bra BB0_2; + + ld.u8 %rs6, [%rd19+1]; + and.b16 %rs8, %rs4, 255; + cvt.rn.f32.u16 %f193, %rs8; + div.rn.f32 %f194, %f193, 0f437F0000; + fma.rn.f32 %f195, %f194, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f196, %rs6; + div.rn.f32 %f197, %f196, 0f437F0000; + fma.rn.f32 %f198, %f197, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f199, %rs3; + div.rn.f32 %f200, %f199, 0f437F0000; + fma.rn.f32 %f201, %f200, 0f40000000, 0fBF800000; + mul.f32 %f202, %f198, %f198; + fma.rn.f32 %f203, %f195, %f195, %f202; + fma.rn.f32 %f204, %f201, %f201, %f203; + sqrt.rn.f32 %f205, %f204; + rcp.rn.f32 %f206, %f205; + mul.f32 %f847, %f195, %f206; + mul.f32 %f848, %f198, %f206; + mul.f32 %f849, %f201, %f206; + +BB0_2: + ld.global.v2.u32 {%r108, %r109}, [pixelID]; + ld.global.v2.u32 {%r111, %r112}, [tileInfo]; + add.s32 %r3, %r108, %r111; + add.s32 %r4, %r109, %r112; + setp.eq.f32 %p8, %f848, 0f00000000; + setp.eq.f32 %p9, %f847, 0f00000000; + and.pred %p10, %p9, %p8; + setp.eq.f32 %p11, %f849, 0f00000000; + and.pred %p12, %p10, %p11; + @%p12 bra BB0_129; + bra.uni BB0_3; + +BB0_129: + ld.global.u32 %r366, [imageEnabled]; + and.b32 %r311, %r366, 1; + setp.eq.b32 %p137, %r311, 1; + @!%p137 bra BB0_131; + bra.uni BB0_130; + +BB0_130: + cvt.u64.u32 %rd106, %r3; + cvt.u64.u32 %rd107, %r4; + mov.u64 %rd110, image; + cvta.global.u64 %rd105, %rd110; + // inline asm + call (%rd104), _rt_buffer_get_64, (%rd105, %r101, %r102, %rd106, %rd107, %rd24, %rd24); + // inline asm + mov.u16 %rs30, 0; + st.v4.u8 [%rd104], {%rs30, %rs30, %rs30, %rs30}; + ld.global.u32 %r366, [imageEnabled]; + +BB0_131: + and.b32 %r314, %r366, 8; + setp.eq.s32 %p138, %r314, 0; + @%p138 bra BB0_133; + + cvt.u64.u32 %rd113, %r3; + cvt.u64.u32 %rd114, %r4; + mov.u64 %rd117, image_Mask; + cvta.global.u64 %rd112, %rd117; + // inline asm + call (%rd111), _rt_buffer_get_64, (%rd112, %r101, %r101, %rd113, %rd114, %rd24, %rd24); + // inline asm + mov.f32 %f830, 0f00000000; + cvt.rzi.u32.f32 %r317, %f830; + cvt.u16.u32 %rs31, %r317; + mov.u16 %rs32, 0; + st.v2.u8 [%rd111], {%rs31, %rs32}; + ld.global.u32 %r366, [imageEnabled]; + +BB0_133: + and.b32 %r318, %r366, 4; + setp.eq.s32 %p139, %r318, 0; + @%p139 bra BB0_137; + + ld.global.u32 %r319, [additive]; + setp.eq.s32 %p140, %r319, 0; + cvt.u64.u32 %rd17, %r3; + cvt.u64.u32 %rd18, %r4; + @%p140 bra BB0_136; + + mov.u64 %rd130, image_HDR; + cvta.global.u64 %rd119, %rd130; + mov.u32 %r323, 8; + // inline asm + call (%rd118), _rt_buffer_get_64, (%rd119, %r101, %r323, %rd17, %rd18, %rd24, %rd24); + // inline asm + ld.v4.u16 {%rs39, %rs40, %rs41, %rs42}, [%rd118]; + // inline asm + { cvt.f32.f16 %f831, %rs39;} + + // inline asm + // inline asm + { cvt.f32.f16 %f832, %rs40;} + + // inline asm + // inline asm + { cvt.f32.f16 %f833, %rs41;} + + // inline asm + // inline asm + call (%rd124), _rt_buffer_get_64, (%rd119, %r101, %r323, %rd17, %rd18, %rd24, %rd24); + // inline asm + add.f32 %f834, %f831, 0f00000000; + add.f32 %f835, %f832, 0f00000000; + add.f32 %f836, %f833, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs38, %f836;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs37, %f835;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs36, %f834;} + + // inline asm + mov.u16 %rs43, 0; + st.v4.u16 [%rd124], {%rs36, %rs37, %rs38, %rs43}; + bra.uni BB0_137; + +BB0_3: + ld.global.v2.u32 {%r121, %r122}, [pixelID]; + cvt.u64.u32 %rd28, %r121; + cvt.u64.u32 %rd29, %r122; + mov.u64 %rd38, uvpos; + cvta.global.u64 %rd27, %rd38; + mov.u32 %r117, 12; + // inline asm + call (%rd26), _rt_buffer_get_64, (%rd27, %r101, %r117, %rd28, %rd29, %rd24, %rd24); + // inline asm + ld.f32 %f9, [%rd26+8]; + ld.f32 %f8, [%rd26+4]; + ld.f32 %f7, [%rd26]; + mul.f32 %f211, %f7, 0f3456BF95; + mul.f32 %f212, %f8, 0f3456BF95; + mul.f32 %f213, %f9, 0f3456BF95; + abs.f32 %f10, %f847; + div.rn.f32 %f214, %f211, %f10; + abs.f32 %f215, %f848; + div.rn.f32 %f216, %f212, %f215; + abs.f32 %f11, %f849; + div.rn.f32 %f217, %f213, %f11; + abs.f32 %f218, %f214; + abs.f32 %f219, %f216; + abs.f32 %f220, %f217; + mov.f32 %f221, 0f38D1B717; + max.f32 %f222, %f218, %f221; + max.f32 %f223, %f219, %f221; + max.f32 %f224, %f220, %f221; + fma.rn.f32 %f12, %f847, %f222, %f7; + fma.rn.f32 %f13, %f848, %f223, %f8; + fma.rn.f32 %f14, %f849, %f224, %f9; + ld.global.v2.u32 {%r125, %r126}, [pixelID]; + cvt.u64.u32 %rd34, %r125; + cvt.u64.u32 %rd35, %r126; + mov.u64 %rd39, rnd_seeds; + cvta.global.u64 %rd33, %rd39; + // inline asm + call (%rd32), _rt_buffer_get_64, (%rd33, %r101, %r102, %rd34, %rd35, %rd24, %rd24); + // inline asm + ld.u32 %r129, [%rd32]; + mad.lo.s32 %r5, %r129, 1664525, 1013904223; + ld.global.u32 %r130, [lightMeshBufferSize]; + setp.eq.s32 %p14, %r130, 0; + mov.pred %p13, 0; + mov.f32 %f20, 0f00000000; + mov.u32 %r7, 0; + @%p14 bra BB0_4; + + ld.global.f32 %f15, [lightPointSize]; + mul.f32 %f16, %f12, 0f3456BF95; + mul.f32 %f17, %f13, 0f3456BF95; + mul.f32 %f18, %f14, 0f3456BF95; + and.b32 %r133, %r5, 16777215; + cvt.rn.f32.u32 %f229, %r133; + mul.f32 %f230, %f229, 0fB3800000; + fma.rn.f32 %f19, %f230, 0f3F333333, 0f3F800000; + mov.f32 %f20, 0f00000000; + mov.u32 %r335, 0; + abs.f32 %f353, %f17; + abs.f32 %f354, %f16; + max.f32 %f355, %f354, %f353; + abs.f32 %f356, %f18; + max.f32 %f357, %f355, %f356; + mov.u32 %r7, %r335; + mov.f32 %f21, %f20; + mov.f32 %f22, %f20; + mov.f32 %f23, %f20; + +BB0_6: + mul.lo.s32 %r8, %r335, 3; + cvt.s64.s32 %rd42, %r8; + mov.u64 %rd46, lightMeshBuffer; + cvta.global.u64 %rd41, %rd46; + mov.u32 %r134, 1; + // inline asm + call (%rd40), _rt_buffer_get_64, (%rd41, %r134, %r117, %rd42, %rd24, %rd24, %rd24); + // inline asm + ld.f32 %f231, [%rd40]; + sub.f32 %f232, %f231, %f7; + ld.f32 %f233, [%rd40+4]; + sub.f32 %f234, %f233, %f8; + ld.f32 %f235, [%rd40+8]; + sub.f32 %f236, %f235, %f9; + mul.f32 %f237, %f234, %f234; + fma.rn.f32 %f238, %f232, %f232, %f237; + fma.rn.f32 %f239, %f236, %f236, %f238; + sqrt.rn.f32 %f24, %f239; + rcp.rn.f32 %f240, %f24; + mul.f32 %f25, %f232, %f240; + mul.f32 %f26, %f234, %f240; + mul.f32 %f27, %f236, %f240; + mul.f32 %f241, %f848, %f26; + fma.rn.f32 %f242, %f847, %f25, %f241; + fma.rn.f32 %f28, %f849, %f27, %f242; + setp.leu.f32 %p15, %f28, 0f00000000; + @%p15 bra BB0_22; + + setp.ne.s32 %p17, %r1, 0; + mul.f32 %f243, %f24, %f24; + mul.f32 %f244, %f243, 0f40C90FDB; + div.rn.f32 %f245, %f15, %f244; + add.f32 %f29, %f245, %f245; + setp.gt.f32 %p18, %f29, %f19; + and.pred %p19, %p17, %p18; + mov.pred %p141, -1; + @%p19 bra BB0_24; + + ld.global.f32 %f248, [lightInvCutoff]; + mul.f32 %f30, %f24, %f248; + mov.f32 %f252, 0f40800000; + abs.f32 %f32, %f30; + setp.lt.f32 %p20, %f32, 0f00800000; + mul.f32 %f254, %f32, 0f4B800000; + selp.f32 %f255, 0fC3170000, 0fC2FE0000, %p20; + selp.f32 %f256, %f254, %f32, %p20; + mov.b32 %r136, %f256; + and.b32 %r137, %r136, 8388607; + or.b32 %r138, %r137, 1065353216; + mov.b32 %f257, %r138; + shr.u32 %r139, %r136, 23; + cvt.rn.f32.u32 %f258, %r139; + add.f32 %f259, %f255, %f258; + setp.gt.f32 %p21, %f257, 0f3FB504F3; + mul.f32 %f260, %f257, 0f3F000000; + add.f32 %f261, %f259, 0f3F800000; + selp.f32 %f262, %f260, %f257, %p21; + selp.f32 %f263, %f261, %f259, %p21; + add.f32 %f264, %f262, 0fBF800000; + add.f32 %f247, %f262, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f246,%f247; + // inline asm + add.f32 %f265, %f264, %f264; + mul.f32 %f266, %f246, %f265; + mul.f32 %f267, %f266, %f266; + mov.f32 %f268, 0f3C4CAF63; + mov.f32 %f269, 0f3B18F0FE; + fma.rn.f32 %f270, %f269, %f267, %f268; + mov.f32 %f271, 0f3DAAAABD; + fma.rn.f32 %f272, %f270, %f267, %f271; + mul.rn.f32 %f273, %f272, %f267; + mul.rn.f32 %f274, %f273, %f266; + sub.f32 %f275, %f264, %f266; + neg.f32 %f276, %f266; + add.f32 %f277, %f275, %f275; + fma.rn.f32 %f278, %f276, %f264, %f277; + mul.rn.f32 %f279, %f246, %f278; + add.f32 %f280, %f274, %f266; + sub.f32 %f281, %f266, %f280; + add.f32 %f282, %f274, %f281; + add.f32 %f283, %f279, %f282; + add.f32 %f284, %f280, %f283; + sub.f32 %f285, %f280, %f284; + add.f32 %f286, %f283, %f285; + mov.f32 %f287, 0f3F317200; + mul.rn.f32 %f288, %f263, %f287; + mov.f32 %f289, 0f35BFBE8E; + mul.rn.f32 %f290, %f263, %f289; + add.f32 %f291, %f288, %f284; + sub.f32 %f292, %f288, %f291; + add.f32 %f293, %f284, %f292; + add.f32 %f294, %f286, %f293; + add.f32 %f295, %f290, %f294; + add.f32 %f296, %f291, %f295; + sub.f32 %f297, %f291, %f296; + add.f32 %f298, %f295, %f297; + mul.rn.f32 %f299, %f252, %f296; + neg.f32 %f300, %f299; + fma.rn.f32 %f301, %f252, %f296, %f300; + fma.rn.f32 %f302, %f252, %f298, %f301; + mov.f32 %f303, 0f00000000; + fma.rn.f32 %f304, %f303, %f296, %f302; + add.rn.f32 %f305, %f299, %f304; + neg.f32 %f306, %f305; + add.rn.f32 %f307, %f299, %f306; + add.rn.f32 %f308, %f307, %f304; + mov.b32 %r140, %f305; + setp.eq.s32 %p22, %r140, 1118925336; + add.s32 %r141, %r140, -1; + mov.b32 %f309, %r141; + add.f32 %f310, %f308, 0f37000000; + selp.f32 %f311, %f309, %f305, %p22; + selp.f32 %f33, %f310, %f308, %p22; + mul.f32 %f312, %f311, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f313, %f312; + mov.f32 %f314, 0fBF317200; + fma.rn.f32 %f315, %f313, %f314, %f311; + mov.f32 %f316, 0fB5BFBE8E; + fma.rn.f32 %f317, %f313, %f316, %f315; + mul.f32 %f318, %f317, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f319, %f318; + add.f32 %f320, %f313, 0f00000000; + ex2.approx.f32 %f321, %f320; + mul.f32 %f322, %f319, %f321; + setp.lt.f32 %p23, %f311, 0fC2D20000; + selp.f32 %f323, 0f00000000, %f322, %p23; + setp.gt.f32 %p24, %f311, 0f42D20000; + selp.f32 %f854, 0f7F800000, %f323, %p24; + setp.eq.f32 %p25, %f854, 0f7F800000; + @%p25 bra BB0_10; + + fma.rn.f32 %f854, %f854, %f33, %f854; + +BB0_10: + mov.f32 %f843, 0f40000000; + cvt.rzi.f32.f32 %f842, %f843; + add.f32 %f841, %f842, %f842; + mov.f32 %f840, 0f40800000; + sub.f32 %f839, %f840, %f841; + abs.f32 %f838, %f839; + setp.lt.f32 %p26, %f30, 0f00000000; + setp.eq.f32 %p27, %f838, 0f3F800000; + and.pred %p1, %p26, %p27; + mov.b32 %r142, %f854; + xor.b32 %r143, %r142, -2147483648; + mov.b32 %f324, %r143; + selp.f32 %f856, %f324, %f854, %p1; + setp.eq.f32 %p28, %f30, 0f00000000; + @%p28 bra BB0_13; + bra.uni BB0_11; + +BB0_13: + add.f32 %f327, %f30, %f30; + selp.f32 %f856, %f327, 0f00000000, %p27; + bra.uni BB0_14; + +BB0_11: + setp.geu.f32 %p29, %f30, 0f00000000; + @%p29 bra BB0_14; + + mov.f32 %f846, 0f40800000; + cvt.rzi.f32.f32 %f326, %f846; + setp.neu.f32 %p30, %f326, 0f40800000; + selp.f32 %f856, 0f7FFFFFFF, %f856, %p30; + +BB0_14: + add.f32 %f328, %f32, 0f40800000; + mov.b32 %r144, %f328; + setp.lt.s32 %p32, %r144, 2139095040; + @%p32 bra BB0_19; + + setp.gtu.f32 %p33, %f32, 0f7F800000; + @%p33 bra BB0_18; + bra.uni BB0_16; + +BB0_18: + add.f32 %f856, %f30, 0f40800000; + bra.uni BB0_19; + +BB0_16: + setp.neu.f32 %p34, %f32, 0f7F800000; + @%p34 bra BB0_19; + + selp.f32 %f856, 0fFF800000, 0f7F800000, %p1; + +BB0_19: + mov.u32 %r327, 1; + mov.u64 %rd139, lightMeshBuffer; + cvta.global.u64 %rd138, %rd139; + mul.lo.s32 %r326, %r335, 3; + mov.f32 %f329, 0f3F800000; + sub.f32 %f330, %f329, %f856; + setp.eq.f32 %p35, %f30, 0f3F800000; + selp.f32 %f331, 0f00000000, %f330, %p35; + cvt.sat.f32.f32 %f332, %f331; + mul.f32 %f333, %f29, %f332; + add.s32 %r147, %r326, 1; + cvt.s64.s32 %rd49, %r147; + // inline asm + call (%rd47), _rt_buffer_get_64, (%rd138, %r327, %r117, %rd49, %rd24, %rd24, %rd24); + // inline asm + ld.f32 %f334, [%rd47]; + mul.f32 %f335, %f25, %f334; + ld.f32 %f336, [%rd47+4]; + mul.f32 %f337, %f26, %f336; + neg.f32 %f338, %f337; + sub.f32 %f339, %f338, %f335; + ld.f32 %f340, [%rd47+8]; + mul.f32 %f341, %f27, %f340; + sub.f32 %f342, %f339, %f341; + cvt.sat.f32.f32 %f343, %f342; + mul.f32 %f44, %f333, %f343; + cvt.sat.f32.f32 %f45, %f28; + mul.f32 %f344, %f44, %f45; + setp.leu.f32 %p36, %f344, 0f3727C5AC; + @%p36 bra BB0_21; + + mov.u32 %r334, 1; + mov.u64 %rd141, lightMeshBuffer; + cvta.global.u64 %rd140, %rd141; + mul.lo.s32 %r333, %r335, 3; + add.u64 %rd54, %SP, 28; + cvta.to.local.u64 %rd61, %rd54; + max.f32 %f351, %f357, %f221; + sub.f32 %f352, %f24, %f351; + mov.u32 %r153, 1065353216; + st.local.u32 [%rd61], %r153; + ld.global.u32 %r148, [root]; + // inline asm + call _rt_trace_64, (%r148, %f12, %f13, %f14, %f25, %f26, %f27, %r334, %f351, %f352, %rd54, %r102); + // inline asm + add.s32 %r154, %r333, 2; + cvt.s64.s32 %rd57, %r154; + // inline asm + call (%rd55), _rt_buffer_get_64, (%rd140, %r334, %r117, %rd57, %rd24, %rd24, %rd24); + // inline asm + ld.f32 %f359, [%rd55]; + ld.local.f32 %f360, [%rd61]; + mul.f32 %f361, %f360, %f359; + ld.f32 %f362, [%rd55+4]; + mul.f32 %f363, %f360, %f362; + ld.f32 %f364, [%rd55+8]; + mul.f32 %f365, %f360, %f364; + mul.f32 %f366, %f44, %f361; + mul.f32 %f367, %f44, %f363; + mul.f32 %f368, %f44, %f365; + fma.rn.f32 %f23, %f45, %f366, %f23; + fma.rn.f32 %f22, %f45, %f367, %f22; + fma.rn.f32 %f21, %f45, %f368, %f21; + add.f32 %f20, %f20, %f360; + +BB0_21: + add.s32 %r7, %r7, 1; + +BB0_22: + ld.global.u32 %r155, [lightMeshBufferSize]; + add.s32 %r335, %r335, 1; + setp.lt.u32 %p38, %r335, %r155; + @%p38 bra BB0_6; + bra.uni BB0_23; + +BB0_4: + mov.f32 %f21, %f20; + mov.f32 %f22, %f20; + mov.f32 %f23, %f20; + +BB0_23: + mov.pred %p141, %p13; + +BB0_24: + cvt.rn.f32.s32 %f369, %r7; + mov.f32 %f370, 0f3F800000; + max.f32 %f371, %f369, %f370; + rcp.rn.f32 %f372, %f371; + mul.f32 %f890, %f23, %f372; + mul.f32 %f891, %f22, %f372; + mul.f32 %f892, %f21, %f372; + div.rn.f32 %f893, %f20, %f371; + @!%p141 bra BB0_77; + bra.uni BB0_25; + +BB0_25: + abs.f32 %f845, %f849; + abs.f32 %f844, %f847; + setp.gt.f32 %p39, %f844, %f845; + neg.f32 %f376, %f848; + selp.f32 %f377, %f376, 0f00000000, %p39; + neg.f32 %f378, %f849; + selp.f32 %f379, %f847, %f378, %p39; + selp.f32 %f380, 0f00000000, %f848, %p39; + mul.f32 %f381, %f379, %f379; + fma.rn.f32 %f382, %f377, %f377, %f381; + fma.rn.f32 %f383, %f380, %f380, %f382; + sqrt.rn.f32 %f384, %f383; + rcp.rn.f32 %f385, %f384; + mul.f32 %f66, %f377, %f385; + mul.f32 %f67, %f379, %f385; + mul.f32 %f68, %f380, %f385; + mov.f32 %f375, 0f00000000; + setp.lt.s32 %p40, %r1, 1; + mov.f32 %f872, %f375; + mov.f32 %f873, %f375; + mov.f32 %f874, %f375; + @%p40 bra BB0_76; + + mad.lo.s32 %r342, %r129, 1664525, 1013904223; + cvt.rn.f32.s32 %f389, %r1; + rcp.rn.f32 %f69, %f389; + add.u64 %rd63, %SP, 0; + cvta.to.local.u64 %rd2, %rd63; + mul.f32 %f70, %f12, 0f3456BF95; + mul.f32 %f71, %f13, 0f3456BF95; + mul.f32 %f72, %f14, 0f3456BF95; + add.u64 %rd64, %SP, 32; + cvta.to.local.u64 %rd3, %rd64; + mul.f32 %f390, %f847, %f67; + mul.f32 %f391, %f848, %f66; + sub.f32 %f73, %f391, %f390; + mul.f32 %f392, %f849, %f66; + mul.f32 %f393, %f847, %f68; + sub.f32 %f74, %f393, %f392; + mul.f32 %f394, %f848, %f68; + mul.f32 %f395, %f849, %f67; + sub.f32 %f75, %f395, %f394; + mov.f32 %f872, 0f00000000; + mov.u32 %r156, 0; + abs.f32 %f396, %f71; + abs.f32 %f397, %f70; + max.f32 %f398, %f397, %f396; + abs.f32 %f399, %f72; + max.f32 %f400, %f398, %f399; + mov.u32 %r339, %r156; + mov.f32 %f873, %f872; + mov.f32 %f874, %f872; + +BB0_27: + cvt.rn.f32.s32 %f79, %r339; + max.f32 %f80, %f400, %f221; + mov.u32 %r341, %r156; + +BB0_28: + mad.lo.s32 %r158, %r342, 1664525, 1013904223; + and.b32 %r159, %r158, 16777215; + cvt.rn.f32.u32 %f402, %r159; + fma.rn.f32 %f403, %f402, 0f33800000, %f79; + mul.f32 %f404, %f69, %f403; + mad.lo.s32 %r342, %r158, 1664525, 1013904223; + and.b32 %r160, %r342, 16777215; + cvt.rn.f32.u32 %f405, %r160; + cvt.rn.f32.s32 %f406, %r341; + fma.rn.f32 %f407, %f405, 0f33800000, %f406; + mul.f32 %f408, %f69, %f407; + sqrt.rn.f32 %f84, %f404; + mul.f32 %f881, %f408, 0f40C90FDB; + abs.f32 %f86, %f881; + setp.neu.f32 %p41, %f86, 0f7F800000; + mov.f32 %f875, %f881; + @%p41 bra BB0_30; + + mov.f32 %f409, 0f00000000; + mul.rn.f32 %f875, %f881, %f409; + +BB0_30: + mul.f32 %f410, %f875, 0f3F22F983; + cvt.rni.s32.f32 %r352, %f410; + cvt.rn.f32.s32 %f411, %r352; + neg.f32 %f412, %f411; + mov.f32 %f413, 0f3FC90FDA; + fma.rn.f32 %f414, %f412, %f413, %f875; + mov.f32 %f415, 0f33A22168; + fma.rn.f32 %f416, %f412, %f415, %f414; + mov.f32 %f417, 0f27C234C5; + fma.rn.f32 %f876, %f412, %f417, %f416; + abs.f32 %f418, %f875; + setp.leu.f32 %p42, %f418, 0f47CE4780; + @%p42 bra BB0_41; + + mov.b32 %r19, %f875; + shr.u32 %r20, %r19, 23; + shl.b32 %r163, %r19, 8; + or.b32 %r21, %r163, -2147483648; + mov.u32 %r344, 0; + mov.u64 %rd142, __cudart_i2opi_f; + mov.u32 %r343, -6; + mov.u64 %rd143, %rd2; + +BB0_32: + .pragma "nounroll"; + ld.const.u32 %r166, [%rd142]; + // inline asm + { + mad.lo.cc.u32 %r164, %r166, %r21, %r344; + madc.hi.u32 %r344, %r166, %r21, 0; + } + // inline asm + st.local.u32 [%rd143], %r164; + add.s64 %rd143, %rd143, 4; + add.s64 %rd142, %rd142, 4; + add.s32 %r343, %r343, 1; + setp.ne.s32 %p43, %r343, 0; + @%p43 bra BB0_32; + + and.b32 %r169, %r20, 255; + add.s32 %r170, %r169, -128; + shr.u32 %r171, %r170, 5; + and.b32 %r26, %r19, -2147483648; + st.local.u32 [%rd2+24], %r344; + mov.u32 %r172, 6; + sub.s32 %r173, %r172, %r171; + mul.wide.s32 %rd66, %r173, 4; + add.s64 %rd8, %rd2, %rd66; + ld.local.u32 %r345, [%rd8]; + ld.local.u32 %r346, [%rd8+-4]; + and.b32 %r29, %r20, 31; + setp.eq.s32 %p44, %r29, 0; + @%p44 bra BB0_35; + + mov.u32 %r174, 32; + sub.s32 %r175, %r174, %r29; + shr.u32 %r176, %r346, %r175; + shl.b32 %r177, %r345, %r29; + add.s32 %r345, %r176, %r177; + ld.local.u32 %r178, [%rd8+-8]; + shr.u32 %r179, %r178, %r175; + shl.b32 %r180, %r346, %r29; + add.s32 %r346, %r179, %r180; + +BB0_35: + shr.u32 %r181, %r346, 30; + shl.b32 %r182, %r345, 2; + add.s32 %r347, %r181, %r182; + shl.b32 %r35, %r346, 2; + shr.u32 %r183, %r347, 31; + shr.u32 %r184, %r345, 30; + add.s32 %r36, %r183, %r184; + setp.eq.s32 %p45, %r183, 0; + @%p45 bra BB0_36; + bra.uni BB0_37; + +BB0_36: + mov.u32 %r348, %r26; + mov.u32 %r349, %r35; + bra.uni BB0_38; + +BB0_37: + not.b32 %r185, %r347; + neg.s32 %r349, %r35; + setp.eq.s32 %p46, %r35, 0; + selp.u32 %r186, 1, 0, %p46; + add.s32 %r347, %r186, %r185; + xor.b32 %r348, %r26, -2147483648; + +BB0_38: + clz.b32 %r351, %r347; + setp.eq.s32 %p47, %r351, 0; + shl.b32 %r187, %r347, %r351; + mov.u32 %r188, 32; + sub.s32 %r189, %r188, %r351; + shr.u32 %r190, %r349, %r189; + add.s32 %r191, %r190, %r187; + selp.b32 %r44, %r347, %r191, %p47; + mov.u32 %r192, -921707870; + mul.hi.u32 %r350, %r44, %r192; + setp.eq.s32 %p48, %r26, 0; + neg.s32 %r193, %r36; + selp.b32 %r352, %r36, %r193, %p48; + setp.lt.s32 %p49, %r350, 1; + @%p49 bra BB0_40; + + mul.lo.s32 %r194, %r44, -921707870; + shr.u32 %r195, %r194, 31; + shl.b32 %r196, %r350, 1; + add.s32 %r350, %r195, %r196; + add.s32 %r351, %r351, 1; + +BB0_40: + mov.u32 %r197, 126; + sub.s32 %r198, %r197, %r351; + shl.b32 %r199, %r198, 23; + add.s32 %r200, %r350, 1; + shr.u32 %r201, %r200, 7; + add.s32 %r202, %r201, 1; + shr.u32 %r203, %r202, 1; + add.s32 %r204, %r203, %r199; + or.b32 %r205, %r204, %r348; + mov.b32 %f876, %r205; + +BB0_41: + mul.rn.f32 %f92, %f876, %f876; + add.s32 %r52, %r352, 1; + and.b32 %r53, %r52, 1; + setp.eq.s32 %p50, %r53, 0; + @%p50 bra BB0_43; + bra.uni BB0_42; + +BB0_43: + mov.f32 %f421, 0f3C08839E; + mov.f32 %f422, 0fB94CA1F9; + fma.rn.f32 %f877, %f422, %f92, %f421; + bra.uni BB0_44; + +BB0_42: + mov.f32 %f419, 0fBAB6061A; + mov.f32 %f420, 0f37CCF5CE; + fma.rn.f32 %f877, %f420, %f92, %f419; + +BB0_44: + @%p50 bra BB0_46; + bra.uni BB0_45; + +BB0_46: + mov.f32 %f426, 0fBE2AAAA3; + fma.rn.f32 %f427, %f877, %f92, %f426; + mov.f32 %f428, 0f00000000; + fma.rn.f32 %f878, %f427, %f92, %f428; + bra.uni BB0_47; + +BB0_45: + mov.f32 %f423, 0f3D2AAAA5; + fma.rn.f32 %f424, %f877, %f92, %f423; + mov.f32 %f425, 0fBF000000; + fma.rn.f32 %f878, %f424, %f92, %f425; + +BB0_47: + fma.rn.f32 %f879, %f878, %f876, %f876; + @%p50 bra BB0_49; + + fma.rn.f32 %f879, %f878, %f92, %f370; + +BB0_49: + and.b32 %r206, %r52, 2; + setp.eq.s32 %p53, %r206, 0; + @%p53 bra BB0_51; + + mov.f32 %f430, 0f00000000; + mov.f32 %f431, 0fBF800000; + fma.rn.f32 %f879, %f879, %f431, %f430; + +BB0_51: + @%p41 bra BB0_53; + + mov.f32 %f432, 0f00000000; + mul.rn.f32 %f881, %f881, %f432; + +BB0_53: + mul.f32 %f433, %f881, 0f3F22F983; + cvt.rni.s32.f32 %r362, %f433; + cvt.rn.f32.s32 %f434, %r362; + neg.f32 %f435, %f434; + fma.rn.f32 %f437, %f435, %f413, %f881; + fma.rn.f32 %f439, %f435, %f415, %f437; + fma.rn.f32 %f882, %f435, %f417, %f439; + abs.f32 %f441, %f881; + setp.leu.f32 %p55, %f441, 0f47CE4780; + @%p55 bra BB0_64; + + mov.b32 %r55, %f881; + shr.u32 %r56, %r55, 23; + shl.b32 %r209, %r55, 8; + or.b32 %r57, %r209, -2147483648; + mov.u32 %r354, 0; + mov.u64 %rd144, __cudart_i2opi_f; + mov.u32 %r353, -6; + mov.u64 %rd145, %rd2; + +BB0_55: + .pragma "nounroll"; + ld.const.u32 %r212, [%rd144]; + // inline asm + { + mad.lo.cc.u32 %r210, %r212, %r57, %r354; + madc.hi.u32 %r354, %r212, %r57, 0; + } + // inline asm + st.local.u32 [%rd145], %r210; + add.s64 %rd145, %rd145, 4; + add.s64 %rd144, %rd144, 4; + add.s32 %r353, %r353, 1; + setp.ne.s32 %p56, %r353, 0; + @%p56 bra BB0_55; + + and.b32 %r215, %r56, 255; + add.s32 %r216, %r215, -128; + shr.u32 %r217, %r216, 5; + and.b32 %r62, %r55, -2147483648; + st.local.u32 [%rd2+24], %r354; + mov.u32 %r218, 6; + sub.s32 %r219, %r218, %r217; + mul.wide.s32 %rd68, %r219, 4; + add.s64 %rd13, %rd2, %rd68; + ld.local.u32 %r355, [%rd13]; + ld.local.u32 %r356, [%rd13+-4]; + and.b32 %r65, %r56, 31; + setp.eq.s32 %p57, %r65, 0; + @%p57 bra BB0_58; + + mov.u32 %r220, 32; + sub.s32 %r221, %r220, %r65; + shr.u32 %r222, %r356, %r221; + shl.b32 %r223, %r355, %r65; + add.s32 %r355, %r222, %r223; + ld.local.u32 %r224, [%rd13+-8]; + shr.u32 %r225, %r224, %r221; + shl.b32 %r226, %r356, %r65; + add.s32 %r356, %r225, %r226; + +BB0_58: + shr.u32 %r227, %r356, 30; + shl.b32 %r228, %r355, 2; + add.s32 %r357, %r227, %r228; + shl.b32 %r71, %r356, 2; + shr.u32 %r229, %r357, 31; + shr.u32 %r230, %r355, 30; + add.s32 %r72, %r229, %r230; + setp.eq.s32 %p58, %r229, 0; + @%p58 bra BB0_59; + bra.uni BB0_60; + +BB0_59: + mov.u32 %r358, %r62; + mov.u32 %r359, %r71; + bra.uni BB0_61; + +BB0_60: + not.b32 %r231, %r357; + neg.s32 %r359, %r71; + setp.eq.s32 %p59, %r71, 0; + selp.u32 %r232, 1, 0, %p59; + add.s32 %r357, %r232, %r231; + xor.b32 %r358, %r62, -2147483648; + +BB0_61: + clz.b32 %r361, %r357; + setp.eq.s32 %p60, %r361, 0; + shl.b32 %r233, %r357, %r361; + mov.u32 %r234, 32; + sub.s32 %r235, %r234, %r361; + shr.u32 %r236, %r359, %r235; + add.s32 %r237, %r236, %r233; + selp.b32 %r80, %r357, %r237, %p60; + mov.u32 %r238, -921707870; + mul.hi.u32 %r360, %r80, %r238; + setp.eq.s32 %p61, %r62, 0; + neg.s32 %r239, %r72; + selp.b32 %r362, %r72, %r239, %p61; + setp.lt.s32 %p62, %r360, 1; + @%p62 bra BB0_63; + + mul.lo.s32 %r240, %r80, -921707870; + shr.u32 %r241, %r240, 31; + shl.b32 %r242, %r360, 1; + add.s32 %r360, %r241, %r242; + add.s32 %r361, %r361, 1; + +BB0_63: + mov.u32 %r243, 126; + sub.s32 %r244, %r243, %r361; + shl.b32 %r245, %r244, 23; + add.s32 %r246, %r360, 1; + shr.u32 %r247, %r246, 7; + add.s32 %r248, %r247, 1; + shr.u32 %r249, %r248, 1; + add.s32 %r250, %r249, %r245; + or.b32 %r251, %r250, %r358; + mov.b32 %f882, %r251; + +BB0_64: + mul.rn.f32 %f109, %f882, %f882; + and.b32 %r88, %r362, 1; + setp.eq.s32 %p63, %r88, 0; + @%p63 bra BB0_66; + bra.uni BB0_65; + +BB0_66: + mov.f32 %f444, 0f3C08839E; + mov.f32 %f445, 0fB94CA1F9; + fma.rn.f32 %f883, %f445, %f109, %f444; + bra.uni BB0_67; + +BB0_65: + mov.f32 %f442, 0fBAB6061A; + mov.f32 %f443, 0f37CCF5CE; + fma.rn.f32 %f883, %f443, %f109, %f442; + +BB0_67: + @%p63 bra BB0_69; + bra.uni BB0_68; + +BB0_69: + mov.f32 %f449, 0fBE2AAAA3; + fma.rn.f32 %f450, %f883, %f109, %f449; + mov.f32 %f451, 0f00000000; + fma.rn.f32 %f884, %f450, %f109, %f451; + bra.uni BB0_70; + +BB0_68: + mov.f32 %f446, 0f3D2AAAA5; + fma.rn.f32 %f447, %f883, %f109, %f446; + mov.f32 %f448, 0fBF000000; + fma.rn.f32 %f884, %f447, %f109, %f448; + +BB0_70: + fma.rn.f32 %f885, %f884, %f882, %f882; + @%p63 bra BB0_72; + + fma.rn.f32 %f885, %f884, %f109, %f370; + +BB0_72: + and.b32 %r252, %r362, 2; + setp.eq.s32 %p66, %r252, 0; + @%p66 bra BB0_74; + + mov.f32 %f453, 0f00000000; + mov.f32 %f454, 0fBF800000; + fma.rn.f32 %f885, %f885, %f454, %f453; + +BB0_74: + mul.f32 %f463, %f84, %f879; + mul.f32 %f464, %f463, %f463; + sub.f32 %f466, %f370, %f464; + mul.f32 %f467, %f84, %f885; + mul.f32 %f468, %f467, %f467; + sub.f32 %f469, %f466, %f468; + mov.f32 %f470, 0f00000000; + max.f32 %f471, %f470, %f469; + sqrt.rn.f32 %f472, %f471; + mul.f32 %f473, %f66, %f467; + mul.f32 %f474, %f67, %f467; + mul.f32 %f475, %f68, %f467; + fma.rn.f32 %f476, %f75, %f463, %f473; + fma.rn.f32 %f477, %f74, %f463, %f474; + fma.rn.f32 %f478, %f73, %f463, %f475; + fma.rn.f32 %f458, %f847, %f472, %f476; + fma.rn.f32 %f459, %f848, %f472, %f477; + fma.rn.f32 %f460, %f849, %f472, %f478; + mov.u32 %r254, 0; + st.local.u32 [%rd3+8], %r254; + st.local.u32 [%rd3+4], %r254; + st.local.u32 [%rd3], %r254; + ld.global.u32 %r253, [root]; + mov.f32 %f462, 0f6C4ECB8F; + // inline asm + call _rt_trace_64, (%r253, %f12, %f13, %f14, %f458, %f459, %f460, %r254, %f80, %f462, %rd64, %r117); + // inline asm + ld.local.f32 %f479, [%rd3]; + max.f32 %f480, %f479, %f470; + ld.local.f32 %f481, [%rd3+4]; + max.f32 %f482, %f481, %f470; + ld.local.f32 %f483, [%rd3+8]; + max.f32 %f484, %f483, %f470; + add.f32 %f874, %f874, %f480; + add.f32 %f873, %f873, %f482; + add.f32 %f872, %f872, %f484; + add.s32 %r341, %r341, 1; + setp.lt.s32 %p67, %r341, %r1; + @%p67 bra BB0_28; + + add.s32 %r339, %r339, 1; + setp.lt.s32 %p68, %r339, %r1; + @%p68 bra BB0_27; + +BB0_76: + mul.lo.s32 %r256, %r1, %r1; + cvt.rn.f32.s32 %f485, %r256; + rcp.rn.f32 %f486, %f485; + mul.f32 %f890, %f874, %f486; + mul.f32 %f891, %f873, %f486; + mul.f32 %f892, %f872, %f486; + div.rn.f32 %f893, %f375, %f485; + +BB0_77: + ld.global.u32 %r364, [imageEnabled]; + and.b32 %r257, %r364, 8; + setp.eq.s32 %p69, %r257, 0; + @%p69 bra BB0_90; + + mov.u32 %r328, 2; + cvt.u64.u32 %rd72, %r3; + cvt.u64.u32 %rd73, %r4; + mov.u64 %rd76, image_Mask; + cvta.global.u64 %rd71, %rd76; + // inline asm + call (%rd70), _rt_buffer_get_64, (%rd71, %r328, %r328, %rd72, %rd73, %rd24, %rd24); + // inline asm + mov.f32 %f490, 0f3E68BA2E; + cvt.rzi.f32.f32 %f491, %f490; + fma.rn.f32 %f492, %f491, 0fC0000000, 0f3EE8BA2E; + abs.f32 %f135, %f492; + abs.f32 %f136, %f893; + setp.lt.f32 %p70, %f136, 0f00800000; + mul.f32 %f493, %f136, 0f4B800000; + selp.f32 %f494, 0fC3170000, 0fC2FE0000, %p70; + selp.f32 %f495, %f493, %f136, %p70; + mov.b32 %r260, %f495; + and.b32 %r261, %r260, 8388607; + or.b32 %r262, %r261, 1065353216; + mov.b32 %f496, %r262; + shr.u32 %r263, %r260, 23; + cvt.rn.f32.u32 %f497, %r263; + add.f32 %f498, %f494, %f497; + setp.gt.f32 %p71, %f496, 0f3FB504F3; + mul.f32 %f499, %f496, 0f3F000000; + add.f32 %f500, %f498, 0f3F800000; + selp.f32 %f501, %f499, %f496, %p71; + selp.f32 %f502, %f500, %f498, %p71; + add.f32 %f503, %f501, 0fBF800000; + add.f32 %f489, %f501, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f488,%f489; + // inline asm + add.f32 %f504, %f503, %f503; + mul.f32 %f505, %f488, %f504; + mul.f32 %f506, %f505, %f505; + mov.f32 %f507, 0f3C4CAF63; + mov.f32 %f508, 0f3B18F0FE; + fma.rn.f32 %f509, %f508, %f506, %f507; + mov.f32 %f510, 0f3DAAAABD; + fma.rn.f32 %f511, %f509, %f506, %f510; + mul.rn.f32 %f512, %f511, %f506; + mul.rn.f32 %f513, %f512, %f505; + sub.f32 %f514, %f503, %f505; + neg.f32 %f515, %f505; + add.f32 %f516, %f514, %f514; + fma.rn.f32 %f517, %f515, %f503, %f516; + mul.rn.f32 %f518, %f488, %f517; + add.f32 %f519, %f513, %f505; + sub.f32 %f520, %f505, %f519; + add.f32 %f521, %f513, %f520; + add.f32 %f522, %f518, %f521; + add.f32 %f523, %f519, %f522; + sub.f32 %f524, %f519, %f523; + add.f32 %f525, %f522, %f524; + mov.f32 %f526, 0f3F317200; + mul.rn.f32 %f527, %f502, %f526; + mov.f32 %f528, 0f35BFBE8E; + mul.rn.f32 %f529, %f502, %f528; + add.f32 %f530, %f527, %f523; + sub.f32 %f531, %f527, %f530; + add.f32 %f532, %f523, %f531; + add.f32 %f533, %f525, %f532; + add.f32 %f534, %f529, %f533; + add.f32 %f535, %f530, %f534; + sub.f32 %f536, %f530, %f535; + add.f32 %f537, %f534, %f536; + mov.f32 %f538, 0f3EE8BA2E; + mul.rn.f32 %f539, %f538, %f535; + neg.f32 %f540, %f539; + fma.rn.f32 %f541, %f538, %f535, %f540; + fma.rn.f32 %f542, %f538, %f537, %f541; + mov.f32 %f543, 0f00000000; + fma.rn.f32 %f544, %f543, %f535, %f542; + add.rn.f32 %f545, %f539, %f544; + neg.f32 %f546, %f545; + add.rn.f32 %f547, %f539, %f546; + add.rn.f32 %f548, %f547, %f544; + mov.b32 %r264, %f545; + setp.eq.s32 %p72, %r264, 1118925336; + add.s32 %r265, %r264, -1; + mov.b32 %f549, %r265; + add.f32 %f550, %f548, 0f37000000; + selp.f32 %f551, %f549, %f545, %p72; + selp.f32 %f137, %f550, %f548, %p72; + mul.f32 %f552, %f551, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f553, %f552; + mov.f32 %f554, 0fBF317200; + fma.rn.f32 %f555, %f553, %f554, %f551; + mov.f32 %f556, 0fB5BFBE8E; + fma.rn.f32 %f557, %f553, %f556, %f555; + mul.f32 %f558, %f557, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f559, %f558; + add.f32 %f560, %f553, 0f00000000; + ex2.approx.f32 %f561, %f560; + mul.f32 %f562, %f559, %f561; + setp.lt.f32 %p73, %f551, 0fC2D20000; + selp.f32 %f563, 0f00000000, %f562, %p73; + setp.gt.f32 %p74, %f551, 0f42D20000; + selp.f32 %f894, 0f7F800000, %f563, %p74; + setp.eq.f32 %p75, %f894, 0f7F800000; + @%p75 bra BB0_80; + + fma.rn.f32 %f894, %f894, %f137, %f894; + +BB0_80: + setp.lt.f32 %p76, %f893, 0f00000000; + setp.eq.f32 %p77, %f135, 0f3F800000; + and.pred %p3, %p76, %p77; + mov.b32 %r266, %f894; + xor.b32 %r267, %r266, -2147483648; + mov.b32 %f564, %r267; + selp.f32 %f896, %f564, %f894, %p3; + setp.eq.f32 %p78, %f893, 0f00000000; + @%p78 bra BB0_83; + bra.uni BB0_81; + +BB0_83: + add.f32 %f567, %f893, %f893; + selp.f32 %f896, %f567, 0f00000000, %p77; + bra.uni BB0_84; + +BB0_136: + mov.u64 %rd137, image_HDR; + cvta.global.u64 %rd132, %rd137; + mov.u32 %r325, 8; + // inline asm + call (%rd131), _rt_buffer_get_64, (%rd132, %r101, %r325, %rd17, %rd18, %rd24, %rd24); + // inline asm + mov.f32 %f837, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs44, %f837;} + + // inline asm + mov.u16 %rs45, 0; + st.v4.u16 [%rd131], {%rs44, %rs44, %rs44, %rs45}; + bra.uni BB0_137; + +BB0_81: + setp.geu.f32 %p79, %f893, 0f00000000; + @%p79 bra BB0_84; + + cvt.rzi.f32.f32 %f566, %f538; + setp.neu.f32 %p80, %f566, 0f3EE8BA2E; + selp.f32 %f896, 0f7FFFFFFF, %f896, %p80; + +BB0_84: + add.f32 %f568, %f136, 0f3EE8BA2E; + mov.b32 %r268, %f568; + setp.lt.s32 %p82, %r268, 2139095040; + @%p82 bra BB0_89; + + setp.gtu.f32 %p83, %f136, 0f7F800000; + @%p83 bra BB0_88; + bra.uni BB0_86; + +BB0_88: + add.f32 %f896, %f893, 0f3EE8BA2E; + bra.uni BB0_89; + +BB0_86: + setp.neu.f32 %p84, %f136, 0f7F800000; + @%p84 bra BB0_89; + + selp.f32 %f896, 0fFF800000, 0f7F800000, %p3; + +BB0_89: + mul.f32 %f569, %f896, 0f437F0000; + setp.eq.f32 %p85, %f893, 0f3F800000; + selp.f32 %f570, 0f437F0000, %f569, %p85; + cvt.rzi.u32.f32 %r269, %f570; + cvt.u16.u32 %rs10, %r269; + mov.u16 %rs11, 255; + st.v2.u8 [%rd70], {%rs10, %rs11}; + ld.global.u32 %r364, [imageEnabled]; + +BB0_90: + ld.global.f32 %f571, [lightColor]; + mul.f32 %f148, %f890, %f571; + ld.global.f32 %f572, [lightColor+4]; + mul.f32 %f149, %f891, %f572; + ld.global.f32 %f573, [lightColor+8]; + mul.f32 %f150, %f892, %f573; + and.b32 %r270, %r364, 1; + setp.eq.b32 %p86, %r270, 1; + @!%p86 bra BB0_125; + bra.uni BB0_91; + +BB0_91: + mov.f32 %f576, 0f3E666666; + cvt.rzi.f32.f32 %f577, %f576; + fma.rn.f32 %f578, %f577, 0fC0000000, 0f3EE66666; + abs.f32 %f151, %f578; + abs.f32 %f152, %f148; + setp.lt.f32 %p87, %f152, 0f00800000; + mul.f32 %f579, %f152, 0f4B800000; + selp.f32 %f580, 0fC3170000, 0fC2FE0000, %p87; + selp.f32 %f581, %f579, %f152, %p87; + mov.b32 %r271, %f581; + and.b32 %r272, %r271, 8388607; + or.b32 %r273, %r272, 1065353216; + mov.b32 %f582, %r273; + shr.u32 %r274, %r271, 23; + cvt.rn.f32.u32 %f583, %r274; + add.f32 %f584, %f580, %f583; + setp.gt.f32 %p88, %f582, 0f3FB504F3; + mul.f32 %f585, %f582, 0f3F000000; + add.f32 %f586, %f584, 0f3F800000; + selp.f32 %f587, %f585, %f582, %p88; + selp.f32 %f588, %f586, %f584, %p88; + add.f32 %f589, %f587, 0fBF800000; + add.f32 %f575, %f587, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f574,%f575; + // inline asm + add.f32 %f590, %f589, %f589; + mul.f32 %f591, %f574, %f590; + mul.f32 %f592, %f591, %f591; + mov.f32 %f593, 0f3C4CAF63; + mov.f32 %f594, 0f3B18F0FE; + fma.rn.f32 %f595, %f594, %f592, %f593; + mov.f32 %f596, 0f3DAAAABD; + fma.rn.f32 %f597, %f595, %f592, %f596; + mul.rn.f32 %f598, %f597, %f592; + mul.rn.f32 %f599, %f598, %f591; + sub.f32 %f600, %f589, %f591; + neg.f32 %f601, %f591; + add.f32 %f602, %f600, %f600; + fma.rn.f32 %f603, %f601, %f589, %f602; + mul.rn.f32 %f604, %f574, %f603; + add.f32 %f605, %f599, %f591; + sub.f32 %f606, %f591, %f605; + add.f32 %f607, %f599, %f606; + add.f32 %f608, %f604, %f607; + add.f32 %f609, %f605, %f608; + sub.f32 %f610, %f605, %f609; + add.f32 %f611, %f608, %f610; + mov.f32 %f612, 0f3F317200; + mul.rn.f32 %f613, %f588, %f612; + mov.f32 %f614, 0f35BFBE8E; + mul.rn.f32 %f615, %f588, %f614; + add.f32 %f616, %f613, %f609; + sub.f32 %f617, %f613, %f616; + add.f32 %f618, %f609, %f617; + add.f32 %f619, %f611, %f618; + add.f32 %f620, %f615, %f619; + add.f32 %f621, %f616, %f620; + sub.f32 %f622, %f616, %f621; + add.f32 %f623, %f620, %f622; + mov.f32 %f624, 0f3EE66666; + mul.rn.f32 %f625, %f624, %f621; + neg.f32 %f626, %f625; + fma.rn.f32 %f627, %f624, %f621, %f626; + fma.rn.f32 %f628, %f624, %f623, %f627; + mov.f32 %f629, 0f00000000; + fma.rn.f32 %f630, %f629, %f621, %f628; + add.rn.f32 %f631, %f625, %f630; + neg.f32 %f632, %f631; + add.rn.f32 %f633, %f625, %f632; + add.rn.f32 %f634, %f633, %f630; + mov.b32 %r275, %f631; + setp.eq.s32 %p89, %r275, 1118925336; + add.s32 %r276, %r275, -1; + mov.b32 %f635, %r276; + add.f32 %f636, %f634, 0f37000000; + selp.f32 %f637, %f635, %f631, %p89; + selp.f32 %f153, %f636, %f634, %p89; + mul.f32 %f638, %f637, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f639, %f638; + mov.f32 %f640, 0fBF317200; + fma.rn.f32 %f641, %f639, %f640, %f637; + mov.f32 %f642, 0fB5BFBE8E; + fma.rn.f32 %f643, %f639, %f642, %f641; + mul.f32 %f644, %f643, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f645, %f644; + add.f32 %f646, %f639, 0f00000000; + ex2.approx.f32 %f647, %f646; + mul.f32 %f648, %f645, %f647; + setp.lt.f32 %p90, %f637, 0fC2D20000; + selp.f32 %f649, 0f00000000, %f648, %p90; + setp.gt.f32 %p91, %f637, 0f42D20000; + selp.f32 %f897, 0f7F800000, %f649, %p91; + setp.eq.f32 %p92, %f897, 0f7F800000; + @%p92 bra BB0_93; + + fma.rn.f32 %f897, %f897, %f153, %f897; + +BB0_93: + setp.lt.f32 %p93, %f148, 0f00000000; + setp.eq.f32 %p94, %f151, 0f3F800000; + and.pred %p4, %p93, %p94; + mov.b32 %r277, %f897; + xor.b32 %r278, %r277, -2147483648; + mov.b32 %f650, %r278; + selp.f32 %f899, %f650, %f897, %p4; + setp.eq.f32 %p95, %f148, 0f00000000; + @%p95 bra BB0_96; + bra.uni BB0_94; + +BB0_96: + add.f32 %f653, %f148, %f148; + selp.f32 %f899, %f653, 0f00000000, %p94; + bra.uni BB0_97; + +BB0_94: + setp.geu.f32 %p96, %f148, 0f00000000; + @%p96 bra BB0_97; + + cvt.rzi.f32.f32 %f652, %f624; + setp.neu.f32 %p97, %f652, 0f3EE66666; + selp.f32 %f899, 0f7FFFFFFF, %f899, %p97; + +BB0_97: + add.f32 %f654, %f152, 0f3EE66666; + mov.b32 %r279, %f654; + setp.lt.s32 %p99, %r279, 2139095040; + @%p99 bra BB0_102; + + setp.gtu.f32 %p100, %f152, 0f7F800000; + @%p100 bra BB0_101; + bra.uni BB0_99; + +BB0_101: + add.f32 %f899, %f148, 0f3EE66666; + bra.uni BB0_102; + +BB0_99: + setp.neu.f32 %p101, %f152, 0f7F800000; + @%p101 bra BB0_102; + + selp.f32 %f899, 0fFF800000, 0f7F800000, %p4; + +BB0_102: + setp.eq.f32 %p102, %f148, 0f3F800000; + selp.f32 %f164, 0f3F800000, %f899, %p102; + abs.f32 %f165, %f149; + setp.lt.f32 %p103, %f165, 0f00800000; + mul.f32 %f657, %f165, 0f4B800000; + selp.f32 %f658, 0fC3170000, 0fC2FE0000, %p103; + selp.f32 %f659, %f657, %f165, %p103; + mov.b32 %r280, %f659; + and.b32 %r281, %r280, 8388607; + or.b32 %r282, %r281, 1065353216; + mov.b32 %f660, %r282; + shr.u32 %r283, %r280, 23; + cvt.rn.f32.u32 %f661, %r283; + add.f32 %f662, %f658, %f661; + setp.gt.f32 %p104, %f660, 0f3FB504F3; + mul.f32 %f663, %f660, 0f3F000000; + add.f32 %f664, %f662, 0f3F800000; + selp.f32 %f665, %f663, %f660, %p104; + selp.f32 %f666, %f664, %f662, %p104; + add.f32 %f667, %f665, 0fBF800000; + add.f32 %f656, %f665, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f655,%f656; + // inline asm + add.f32 %f668, %f667, %f667; + mul.f32 %f669, %f655, %f668; + mul.f32 %f670, %f669, %f669; + fma.rn.f32 %f673, %f594, %f670, %f593; + fma.rn.f32 %f675, %f673, %f670, %f596; + mul.rn.f32 %f676, %f675, %f670; + mul.rn.f32 %f677, %f676, %f669; + sub.f32 %f678, %f667, %f669; + neg.f32 %f679, %f669; + add.f32 %f680, %f678, %f678; + fma.rn.f32 %f681, %f679, %f667, %f680; + mul.rn.f32 %f682, %f655, %f681; + add.f32 %f683, %f677, %f669; + sub.f32 %f684, %f669, %f683; + add.f32 %f685, %f677, %f684; + add.f32 %f686, %f682, %f685; + add.f32 %f687, %f683, %f686; + sub.f32 %f688, %f683, %f687; + add.f32 %f689, %f686, %f688; + mul.rn.f32 %f691, %f666, %f612; + mul.rn.f32 %f693, %f666, %f614; + add.f32 %f694, %f691, %f687; + sub.f32 %f695, %f691, %f694; + add.f32 %f696, %f687, %f695; + add.f32 %f697, %f689, %f696; + add.f32 %f698, %f693, %f697; + add.f32 %f699, %f694, %f698; + sub.f32 %f700, %f694, %f699; + add.f32 %f701, %f698, %f700; + mul.rn.f32 %f703, %f624, %f699; + neg.f32 %f704, %f703; + fma.rn.f32 %f705, %f624, %f699, %f704; + fma.rn.f32 %f706, %f624, %f701, %f705; + fma.rn.f32 %f708, %f629, %f699, %f706; + add.rn.f32 %f709, %f703, %f708; + neg.f32 %f710, %f709; + add.rn.f32 %f711, %f703, %f710; + add.rn.f32 %f712, %f711, %f708; + mov.b32 %r284, %f709; + setp.eq.s32 %p105, %r284, 1118925336; + add.s32 %r285, %r284, -1; + mov.b32 %f713, %r285; + add.f32 %f714, %f712, 0f37000000; + selp.f32 %f715, %f713, %f709, %p105; + selp.f32 %f166, %f714, %f712, %p105; + mul.f32 %f716, %f715, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f717, %f716; + fma.rn.f32 %f719, %f717, %f640, %f715; + fma.rn.f32 %f721, %f717, %f642, %f719; + mul.f32 %f722, %f721, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f723, %f722; + add.f32 %f724, %f717, 0f00000000; + ex2.approx.f32 %f725, %f724; + mul.f32 %f726, %f723, %f725; + setp.lt.f32 %p106, %f715, 0fC2D20000; + selp.f32 %f727, 0f00000000, %f726, %p106; + setp.gt.f32 %p107, %f715, 0f42D20000; + selp.f32 %f900, 0f7F800000, %f727, %p107; + setp.eq.f32 %p108, %f900, 0f7F800000; + @%p108 bra BB0_104; + + fma.rn.f32 %f900, %f900, %f166, %f900; + +BB0_104: + setp.lt.f32 %p109, %f149, 0f00000000; + and.pred %p5, %p109, %p94; + mov.b32 %r286, %f900; + xor.b32 %r287, %r286, -2147483648; + mov.b32 %f728, %r287; + selp.f32 %f902, %f728, %f900, %p5; + setp.eq.f32 %p111, %f149, 0f00000000; + @%p111 bra BB0_107; + bra.uni BB0_105; + +BB0_107: + add.f32 %f731, %f149, %f149; + selp.f32 %f902, %f731, 0f00000000, %p94; + bra.uni BB0_108; + +BB0_105: + setp.geu.f32 %p112, %f149, 0f00000000; + @%p112 bra BB0_108; + + cvt.rzi.f32.f32 %f730, %f624; + setp.neu.f32 %p113, %f730, 0f3EE66666; + selp.f32 %f902, 0f7FFFFFFF, %f902, %p113; + +BB0_108: + add.f32 %f732, %f165, 0f3EE66666; + mov.b32 %r288, %f732; + setp.lt.s32 %p115, %r288, 2139095040; + @%p115 bra BB0_113; + + setp.gtu.f32 %p116, %f165, 0f7F800000; + @%p116 bra BB0_112; + bra.uni BB0_110; + +BB0_112: + add.f32 %f902, %f149, 0f3EE66666; + bra.uni BB0_113; + +BB0_110: + setp.neu.f32 %p117, %f165, 0f7F800000; + @%p117 bra BB0_113; + + selp.f32 %f902, 0fFF800000, 0f7F800000, %p5; + +BB0_113: + setp.eq.f32 %p118, %f149, 0f3F800000; + selp.f32 %f177, 0f3F800000, %f902, %p118; + abs.f32 %f178, %f150; + setp.lt.f32 %p119, %f178, 0f00800000; + mul.f32 %f735, %f178, 0f4B800000; + selp.f32 %f736, 0fC3170000, 0fC2FE0000, %p119; + selp.f32 %f737, %f735, %f178, %p119; + mov.b32 %r289, %f737; + and.b32 %r290, %r289, 8388607; + or.b32 %r291, %r290, 1065353216; + mov.b32 %f738, %r291; + shr.u32 %r292, %r289, 23; + cvt.rn.f32.u32 %f739, %r292; + add.f32 %f740, %f736, %f739; + setp.gt.f32 %p120, %f738, 0f3FB504F3; + mul.f32 %f741, %f738, 0f3F000000; + add.f32 %f742, %f740, 0f3F800000; + selp.f32 %f743, %f741, %f738, %p120; + selp.f32 %f744, %f742, %f740, %p120; + add.f32 %f745, %f743, 0fBF800000; + add.f32 %f734, %f743, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f733,%f734; + // inline asm + add.f32 %f746, %f745, %f745; + mul.f32 %f747, %f733, %f746; + mul.f32 %f748, %f747, %f747; + fma.rn.f32 %f751, %f594, %f748, %f593; + fma.rn.f32 %f753, %f751, %f748, %f596; + mul.rn.f32 %f754, %f753, %f748; + mul.rn.f32 %f755, %f754, %f747; + sub.f32 %f756, %f745, %f747; + neg.f32 %f757, %f747; + add.f32 %f758, %f756, %f756; + fma.rn.f32 %f759, %f757, %f745, %f758; + mul.rn.f32 %f760, %f733, %f759; + add.f32 %f761, %f755, %f747; + sub.f32 %f762, %f747, %f761; + add.f32 %f763, %f755, %f762; + add.f32 %f764, %f760, %f763; + add.f32 %f765, %f761, %f764; + sub.f32 %f766, %f761, %f765; + add.f32 %f767, %f764, %f766; + mul.rn.f32 %f769, %f744, %f612; + mul.rn.f32 %f771, %f744, %f614; + add.f32 %f772, %f769, %f765; + sub.f32 %f773, %f769, %f772; + add.f32 %f774, %f765, %f773; + add.f32 %f775, %f767, %f774; + add.f32 %f776, %f771, %f775; + add.f32 %f777, %f772, %f776; + sub.f32 %f778, %f772, %f777; + add.f32 %f779, %f776, %f778; + mul.rn.f32 %f781, %f624, %f777; + neg.f32 %f782, %f781; + fma.rn.f32 %f783, %f624, %f777, %f782; + fma.rn.f32 %f784, %f624, %f779, %f783; + fma.rn.f32 %f786, %f629, %f777, %f784; + add.rn.f32 %f787, %f781, %f786; + neg.f32 %f788, %f787; + add.rn.f32 %f789, %f781, %f788; + add.rn.f32 %f790, %f789, %f786; + mov.b32 %r293, %f787; + setp.eq.s32 %p121, %r293, 1118925336; + add.s32 %r294, %r293, -1; + mov.b32 %f791, %r294; + add.f32 %f792, %f790, 0f37000000; + selp.f32 %f793, %f791, %f787, %p121; + selp.f32 %f179, %f792, %f790, %p121; + mul.f32 %f794, %f793, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f795, %f794; + fma.rn.f32 %f797, %f795, %f640, %f793; + fma.rn.f32 %f799, %f795, %f642, %f797; + mul.f32 %f800, %f799, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f801, %f800; + add.f32 %f802, %f795, 0f00000000; + ex2.approx.f32 %f803, %f802; + mul.f32 %f804, %f801, %f803; + setp.lt.f32 %p122, %f793, 0fC2D20000; + selp.f32 %f805, 0f00000000, %f804, %p122; + setp.gt.f32 %p123, %f793, 0f42D20000; + selp.f32 %f903, 0f7F800000, %f805, %p123; + setp.eq.f32 %p124, %f903, 0f7F800000; + @%p124 bra BB0_115; + + fma.rn.f32 %f903, %f903, %f179, %f903; + +BB0_115: + setp.lt.f32 %p125, %f150, 0f00000000; + and.pred %p6, %p125, %p94; + mov.b32 %r295, %f903; + xor.b32 %r296, %r295, -2147483648; + mov.b32 %f806, %r296; + selp.f32 %f905, %f806, %f903, %p6; + setp.eq.f32 %p127, %f150, 0f00000000; + @%p127 bra BB0_118; + bra.uni BB0_116; + +BB0_118: + add.f32 %f809, %f150, %f150; + selp.f32 %f905, %f809, 0f00000000, %p94; + bra.uni BB0_119; + +BB0_116: + setp.geu.f32 %p128, %f150, 0f00000000; + @%p128 bra BB0_119; + + cvt.rzi.f32.f32 %f808, %f624; + setp.neu.f32 %p129, %f808, 0f3EE66666; + selp.f32 %f905, 0f7FFFFFFF, %f905, %p129; + +BB0_119: + add.f32 %f810, %f178, 0f3EE66666; + mov.b32 %r297, %f810; + setp.lt.s32 %p131, %r297, 2139095040; + @%p131 bra BB0_124; + + setp.gtu.f32 %p132, %f178, 0f7F800000; + @%p132 bra BB0_123; + bra.uni BB0_121; + +BB0_123: + add.f32 %f905, %f150, 0f3EE66666; + bra.uni BB0_124; + +BB0_121: + setp.neu.f32 %p133, %f178, 0f7F800000; + @%p133 bra BB0_124; + + selp.f32 %f905, 0fFF800000, 0f7F800000, %p6; + +BB0_124: + mov.u32 %r329, 2; + setp.eq.f32 %p134, %f150, 0f3F800000; + selp.f32 %f811, 0f3F800000, %f905, %p134; + cvt.u64.u32 %rd80, %r4; + cvt.u64.u32 %rd79, %r3; + mov.u64 %rd83, image; + cvta.global.u64 %rd78, %rd83; + // inline asm + call (%rd77), _rt_buffer_get_64, (%rd78, %r329, %r102, %rd79, %rd80, %rd24, %rd24); + // inline asm + cvt.sat.f32.f32 %f812, %f811; + mul.f32 %f813, %f812, 0f437FFD71; + cvt.rzi.u32.f32 %r300, %f813; + cvt.sat.f32.f32 %f814, %f177; + mul.f32 %f815, %f814, 0f437FFD71; + cvt.rzi.u32.f32 %r301, %f815; + cvt.sat.f32.f32 %f816, %f164; + mul.f32 %f817, %f816, 0f437FFD71; + cvt.rzi.u32.f32 %r302, %f817; + cvt.u16.u32 %rs12, %r300; + cvt.u16.u32 %rs13, %r302; + cvt.u16.u32 %rs14, %r301; + mov.u16 %rs15, 255; + st.v4.u8 [%rd77], {%rs12, %rs14, %rs13, %rs15}; + ld.global.u32 %r364, [imageEnabled]; + +BB0_125: + and.b32 %r303, %r364, 4; + setp.eq.s32 %p135, %r303, 0; + @%p135 bra BB0_137; + + ld.global.u32 %r304, [additive]; + setp.eq.s32 %p136, %r304, 0; + cvt.u64.u32 %rd15, %r3; + cvt.u64.u32 %rd16, %r4; + // inline asm + { cvt.rn.f16.f32 %rs16, %f370;} + + // inline asm + @%p136 bra BB0_128; + + mov.u32 %r330, 2; + mov.u64 %rd96, image_HDR; + cvta.global.u64 %rd85, %rd96; + mov.u32 %r308, 8; + // inline asm + call (%rd84), _rt_buffer_get_64, (%rd85, %r330, %r308, %rd15, %rd16, %rd24, %rd24); + // inline asm + ld.v4.u16 {%rs23, %rs24, %rs25, %rs26}, [%rd84]; + // inline asm + { cvt.f32.f16 %f819, %rs23;} + + // inline asm + // inline asm + { cvt.f32.f16 %f820, %rs24;} + + // inline asm + // inline asm + { cvt.f32.f16 %f821, %rs25;} + + // inline asm + // inline asm + call (%rd90), _rt_buffer_get_64, (%rd85, %r330, %r308, %rd15, %rd16, %rd24, %rd24); + // inline asm + add.f32 %f822, %f148, %f819; + add.f32 %f823, %f149, %f820; + add.f32 %f824, %f150, %f821; + // inline asm + { cvt.rn.f16.f32 %rs22, %f824;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs21, %f823;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs20, %f822;} + + // inline asm + st.v4.u16 [%rd90], {%rs20, %rs21, %rs22, %rs16}; + bra.uni BB0_137; + +BB0_128: + mov.u32 %r331, 2; + mov.u64 %rd103, image_HDR; + cvta.global.u64 %rd98, %rd103; + mov.u32 %r310, 8; + // inline asm + call (%rd97), _rt_buffer_get_64, (%rd98, %r331, %r310, %rd15, %rd16, %rd24, %rd24); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs29, %f150;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs28, %f149;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs27, %f148;} + + // inline asm + st.v4.u16 [%rd97], {%rs27, %rs28, %rs29, %rs16}; + +BB0_137: + ret; +} + + |