diff options
Diffstat (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSSSSH.ptx')
| -rw-r--r-- | VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSSSSH.ptx | 1967 |
1 files changed, 1967 insertions, 0 deletions
diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSSSSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSSSSH.ptx new file mode 100644 index 00000000..dab0eee6 --- /dev/null +++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSSSSH.ptx @@ -0,0 +1,1967 @@ +// +// Generated by NVIDIA NVVM Compiler +// +// Compiler Build ID: CL-23083092 +// Cuda compilation tools, release 9.1, V9.1.85 +// Based on LLVM 3.4svn +// + +.version 6.1 +.target sm_30 +.address_size 64 + + // .globl _Z6oxMainv +.global .align 8 .b8 pixelID[8]; +.global .align 8 .b8 resolution[8]; +.global .align 4 .b8 normal[12]; +.global .align 4 .b8 camPos[12]; +.global .align 4 .b8 root[4]; +.global .align 4 .u32 imageEnabled; +.global .texref lightmap; +.global .align 16 .b8 tileInfo[16]; +.global .align 4 .u32 additive; +.global .align 1 .b8 image[1]; +.global .align 1 .b8 image_HDR[1]; +.global .align 1 .b8 image_HDR2[1]; +.global .align 1 .b8 image_RNM0[1]; +.global .align 1 .b8 image_RNM1[1]; +.global .align 1 .b8 image_RNM2[1]; +.global .align 1 .b8 image_RNM3[1]; +.global .align 8 .b8 texCoords[8]; +.global .align 1 .b8 uvpos[1]; +.global .align 1 .b8 uvnormal[1]; +.global .align 1 .b8 rnd_seeds[1]; +.global .align 1 .b8 lightmapDirect[1]; +.global .align 4 .u32 samples; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; +.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; +.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; +.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; +.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; +.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0}; +.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; +.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; + +.visible .entry _Z6oxMainv( + +) +{ + .local .align 4 .b8 __local_depot0[40]; + .reg .b64 %SP; + .reg .b64 %SPL; + .reg .pred %p<104>; + .reg .b16 %rs<139>; + .reg .f32 %f<793>; + .reg .b32 %r<383>; + .reg .b64 %rd<285>; + + + mov.u64 %rd284, __local_depot0; + cvta.local.u64 %SP, %rd284; + ld.global.v2.u32 {%r97, %r98}, [pixelID]; + cvt.u64.u32 %rd22, %r97; + cvt.u64.u32 %rd23, %r98; + mov.u64 %rd26, uvnormal; + cvta.global.u64 %rd21, %rd26; + mov.u32 %r95, 2; + mov.u32 %r96, 4; + mov.u64 %rd25, 0; + // inline asm + call (%rd20), _rt_buffer_get_64, (%rd21, %r95, %r96, %rd22, %rd23, %rd25, %rd25); + // inline asm + ld.u32 %r1, [%rd20]; + shr.u32 %r101, %r1, 16; + cvt.u16.u32 %rs1, %r101; + and.b16 %rs6, %rs1, 255; + cvt.u16.u32 %rs7, %r1; + or.b16 %rs8, %rs7, %rs6; + setp.eq.s16 %p4, %rs8, 0; + mov.f32 %f736, 0f00000000; + mov.f32 %f737, %f736; + mov.f32 %f738, %f736; + @%p4 bra BB0_2; + + ld.u8 %rs9, [%rd20+1]; + and.b16 %rs11, %rs7, 255; + cvt.rn.f32.u16 %f167, %rs11; + div.rn.f32 %f168, %f167, 0f437F0000; + fma.rn.f32 %f169, %f168, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f170, %rs9; + div.rn.f32 %f171, %f170, 0f437F0000; + fma.rn.f32 %f172, %f171, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f173, %rs6; + div.rn.f32 %f174, %f173, 0f437F0000; + fma.rn.f32 %f175, %f174, 0f40000000, 0fBF800000; + mul.f32 %f176, %f172, %f172; + fma.rn.f32 %f177, %f169, %f169, %f176; + fma.rn.f32 %f178, %f175, %f175, %f177; + sqrt.rn.f32 %f179, %f178; + rcp.rn.f32 %f180, %f179; + mul.f32 %f736, %f169, %f180; + mul.f32 %f737, %f172, %f180; + mul.f32 %f738, %f175, %f180; + +BB0_2: + ld.global.v2.u32 {%r102, %r103}, [pixelID]; + ld.global.v2.u32 {%r105, %r106}, [tileInfo]; + add.s32 %r2, %r102, %r105; + add.s32 %r3, %r103, %r106; + setp.eq.f32 %p5, %f737, 0f00000000; + setp.eq.f32 %p6, %f736, 0f00000000; + and.pred %p7, %p6, %p5; + setp.eq.f32 %p8, %f738, 0f00000000; + and.pred %p9, %p7, %p8; + @%p9 bra BB0_109; + bra.uni BB0_3; + +BB0_109: + ld.global.u32 %r382, [imageEnabled]; + and.b32 %r297, %r382, 1; + setp.eq.b32 %p97, %r297, 1; + @!%p97 bra BB0_111; + bra.uni BB0_110; + +BB0_110: + cvt.u64.u32 %rd170, %r2; + cvt.u64.u32 %rd171, %r3; + mov.u64 %rd174, image; + cvta.global.u64 %rd169, %rd174; + mov.u64 %rd173, 0; + // inline asm + call (%rd168), _rt_buffer_get_64, (%rd169, %r95, %r96, %rd170, %rd171, %rd173, %rd173); + // inline asm + mov.u16 %rs84, 0; + st.v4.u8 [%rd168], {%rs84, %rs84, %rs84, %rs84}; + ld.global.u32 %r382, [imageEnabled]; + +BB0_111: + and.b32 %r300, %r382, 4; + setp.eq.s32 %p98, %r300, 0; + @%p98 bra BB0_113; + + cvt.u64.u32 %rd178, %r3; + cvt.u64.u32 %rd177, %r2; + mov.u64 %rd181, image_HDR; + cvta.global.u64 %rd176, %rd181; + mov.u32 %r302, 8; + mov.u64 %rd180, 0; + // inline asm + call (%rd175), _rt_buffer_get_64, (%rd176, %r95, %r302, %rd177, %rd178, %rd180, %rd180); + // inline asm + mov.f32 %f649, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs85, %f649;} + + // inline asm + mov.u16 %rs86, 0; + st.v4.u16 [%rd175], {%rs85, %rs85, %rs85, %rs86}; + +BB0_113: + cvt.u64.u32 %rd18, %r2; + cvt.u64.u32 %rd19, %r3; + ld.global.u32 %r303, [additive]; + setp.eq.s32 %p99, %r303, 0; + @%p99 bra BB0_115; + + mov.u64 %rd194, image_RNM0; + cvta.global.u64 %rd183, %rd194; + mov.u32 %r307, 8; + mov.u64 %rd193, 0; + // inline asm + call (%rd182), _rt_buffer_get_64, (%rd183, %r95, %r307, %rd18, %rd19, %rd193, %rd193); + // inline asm + ld.v4.u16 {%rs93, %rs94, %rs95, %rs96}, [%rd182]; + // inline asm + { cvt.f32.f16 %f650, %rs93;} + + // inline asm + // inline asm + { cvt.f32.f16 %f651, %rs94;} + + // inline asm + // inline asm + { cvt.f32.f16 %f652, %rs95;} + + // inline asm + // inline asm + call (%rd188), _rt_buffer_get_64, (%rd183, %r95, %r307, %rd18, %rd19, %rd193, %rd193); + // inline asm + add.f32 %f653, %f650, 0f00000000; + add.f32 %f654, %f651, 0f00000000; + add.f32 %f655, %f652, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs92, %f655;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs91, %f654;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs90, %f653;} + + // inline asm + mov.u16 %rs97, 0; + st.v4.u16 [%rd188], {%rs90, %rs91, %rs92, %rs97}; + bra.uni BB0_116; + +BB0_3: + ld.global.v2.u32 {%r115, %r116}, [pixelID]; + cvt.u64.u32 %rd29, %r115; + cvt.u64.u32 %rd30, %r116; + mov.u64 %rd34, uvpos; + cvta.global.u64 %rd28, %rd34; + mov.u32 %r114, 12; + // inline asm + call (%rd27), _rt_buffer_get_64, (%rd28, %r95, %r114, %rd29, %rd30, %rd25, %rd25); + // inline asm + ld.f32 %f189, [%rd27+8]; + ld.f32 %f190, [%rd27+4]; + ld.f32 %f191, [%rd27]; + mul.f32 %f192, %f191, 0f3456BF95; + mul.f32 %f193, %f190, 0f3456BF95; + mul.f32 %f194, %f189, 0f3456BF95; + abs.f32 %f195, %f736; + div.rn.f32 %f196, %f192, %f195; + abs.f32 %f197, %f737; + div.rn.f32 %f198, %f193, %f197; + abs.f32 %f199, %f738; + div.rn.f32 %f200, %f194, %f199; + abs.f32 %f201, %f196; + abs.f32 %f202, %f198; + abs.f32 %f203, %f200; + mov.f32 %f204, 0f38D1B717; + max.f32 %f205, %f201, %f204; + max.f32 %f206, %f202, %f204; + max.f32 %f207, %f203, %f204; + fma.rn.f32 %f739, %f736, %f205, %f191; + fma.rn.f32 %f740, %f737, %f206, %f190; + fma.rn.f32 %f741, %f738, %f207, %f189; + add.u64 %rd33, %SP, 0; + cvta.to.local.u64 %rd35, %rd33; + mov.u32 %r113, 0; + st.local.u32 [%rd35+8], %r113; + st.local.u32 [%rd35+4], %r113; + st.local.u32 [%rd35], %r113; + ld.global.u32 %r112, [root]; + neg.f32 %f186, %f738; + neg.f32 %f185, %f737; + neg.f32 %f184, %f736; + mov.f32 %f748, 0f00000000; + mov.f32 %f188, 0f6C4ECB8F; + // inline asm + call _rt_trace_64, (%r112, %f739, %f740, %f741, %f184, %f185, %f186, %r113, %f748, %f188, %rd33, %r114); + // inline asm + ld.local.f32 %f13, [%rd35]; + abs.f32 %f14, %f184; + abs.f32 %f15, %f186; + setp.geu.f32 %p10, %f13, 0f00000000; + @%p10 bra BB0_5; + + neg.f32 %f687, %f738; + neg.f32 %f686, %f736; + neg.f32 %f685, %f737; + fma.rn.f32 %f208, %f736, %f13, %f739; + fma.rn.f32 %f209, %f737, %f13, %f740; + fma.rn.f32 %f210, %f738, %f13, %f741; + mul.f32 %f211, %f208, 0f3456BF95; + mul.f32 %f212, %f209, 0f3456BF95; + mul.f32 %f213, %f210, 0f3456BF95; + div.rn.f32 %f214, %f211, %f14; + abs.f32 %f215, %f685; + div.rn.f32 %f216, %f212, %f215; + div.rn.f32 %f217, %f213, %f15; + abs.f32 %f218, %f214; + abs.f32 %f219, %f216; + abs.f32 %f220, %f217; + max.f32 %f222, %f218, %f204; + max.f32 %f223, %f219, %f204; + max.f32 %f224, %f220, %f204; + fma.rn.f32 %f739, %f222, %f686, %f208; + fma.rn.f32 %f740, %f223, %f685, %f209; + fma.rn.f32 %f741, %f224, %f687, %f210; + +BB0_5: + mov.u64 %rd279, 0; + mov.u32 %r343, 4; + neg.f32 %f681, %f736; + neg.f32 %f680, %f737; + mov.u32 %r342, 2; + setp.gt.f32 %p11, %f14, %f15; + selp.f32 %f231, %f737, 0f00000000, %p11; + selp.f32 %f232, %f681, %f738, %p11; + selp.f32 %f233, 0f00000000, %f680, %p11; + mul.f32 %f234, %f232, %f232; + fma.rn.f32 %f235, %f231, %f231, %f234; + fma.rn.f32 %f236, %f233, %f233, %f235; + sqrt.rn.f32 %f237, %f236; + rcp.rn.f32 %f238, %f237; + mul.f32 %f22, %f231, %f238; + mul.f32 %f23, %f232, %f238; + mul.f32 %f24, %f233, %f238; + ld.global.v2.u32 {%r121, %r122}, [pixelID]; + cvt.u64.u32 %rd38, %r121; + cvt.u64.u32 %rd39, %r122; + mov.u64 %rd42, rnd_seeds; + cvta.global.u64 %rd37, %rd42; + // inline asm + call (%rd36), _rt_buffer_get_64, (%rd37, %r342, %r343, %rd38, %rd39, %rd279, %rd279); + // inline asm + ld.global.u32 %r353, [samples]; + setp.lt.s32 %p12, %r353, 1; + @%p12 bra BB0_6; + + mov.u32 %r354, 0; + neg.f32 %f684, %f738; + neg.f32 %f683, %f736; + neg.f32 %f682, %f737; + cvt.rn.f32.s32 %f245, %r353; + rcp.rn.f32 %f25, %f245; + ld.u32 %r379, [%rd36]; + mul.f32 %f26, %f739, 0f3456BF95; + mul.f32 %f27, %f740, 0f3456BF95; + mul.f32 %f28, %f741, 0f3456BF95; + mul.f32 %f246, %f23, %f683; + mul.f32 %f247, %f22, %f682; + sub.f32 %f29, %f247, %f246; + mul.f32 %f248, %f22, %f684; + mul.f32 %f249, %f24, %f683; + sub.f32 %f30, %f249, %f248; + mul.f32 %f250, %f24, %f682; + mul.f32 %f251, %f23, %f684; + sub.f32 %f31, %f251, %f250; + mov.f32 %f748, 0f00000000; + abs.f32 %f252, %f27; + abs.f32 %f253, %f26; + max.f32 %f254, %f253, %f252; + abs.f32 %f255, %f28; + max.f32 %f256, %f254, %f255; + mov.f32 %f749, %f748; + mov.f32 %f750, %f748; + mov.f32 %f751, %f748; + mov.f32 %f752, %f748; + mov.f32 %f753, %f748; + +BB0_8: + setp.lt.s32 %p13, %r353, 1; + @%p13 bra BB0_59; + + mov.u32 %r356, 0; + +BB0_10: + cvt.rn.f32.s32 %f678, %r354; + mad.lo.s32 %r127, %r379, 1664525, 1013904223; + and.b32 %r128, %r127, 16777215; + cvt.rn.f32.u32 %f258, %r128; + fma.rn.f32 %f259, %f258, 0f33800000, %f678; + mul.f32 %f46, %f25, %f259; + mad.lo.s32 %r11, %r127, 1664525, 1013904223; + and.b32 %r129, %r11, 16777215; + cvt.rn.f32.u32 %f260, %r129; + cvt.rn.f32.s32 %f261, %r356; + fma.rn.f32 %f262, %f260, 0f33800000, %f261; + mul.f32 %f263, %f25, %f262; + mul.f32 %f264, %f46, %f46; + mov.f32 %f265, 0f3F800000; + sub.f32 %f266, %f265, %f264; + mov.f32 %f267, 0f00000000; + max.f32 %f268, %f267, %f266; + sqrt.rn.f32 %f47, %f268; + mul.f32 %f760, %f263, 0f40C90FDB; + abs.f32 %f49, %f760; + setp.neu.f32 %p14, %f49, 0f7F800000; + mov.f32 %f754, %f760; + @%p14 bra BB0_12; + + mov.f32 %f695, 0f00000000; + mul.rn.f32 %f754, %f760, %f695; + +BB0_12: + mul.f32 %f270, %f754, 0f3F22F983; + cvt.rni.s32.f32 %r367, %f270; + cvt.rn.f32.s32 %f271, %r367; + neg.f32 %f272, %f271; + mov.f32 %f273, 0f3FC90FDA; + fma.rn.f32 %f274, %f272, %f273, %f754; + mov.f32 %f275, 0f33A22168; + fma.rn.f32 %f276, %f272, %f275, %f274; + mov.f32 %f277, 0f27C234C5; + fma.rn.f32 %f755, %f272, %f277, %f276; + abs.f32 %f278, %f754; + setp.leu.f32 %p15, %f278, 0f47CE4780; + @%p15 bra BB0_23; + + add.u64 %rd44, %SP, 12; + cvta.to.local.u64 %rd280, %rd44; + mov.b32 %r13, %f754; + shr.u32 %r14, %r13, 23; + shl.b32 %r132, %r13, 8; + or.b32 %r15, %r132, -2147483648; + mov.u32 %r358, 0; + mov.u64 %rd281, 0; + mov.u32 %r359, %r358; + +BB0_14: + .pragma "nounroll"; + add.u64 %rd264, %SP, 12; + cvta.to.local.u64 %rd263, %rd264; + shl.b64 %rd45, %rd281, 2; + mov.u64 %rd46, __cudart_i2opi_f; + add.s64 %rd47, %rd46, %rd45; + ld.const.u32 %r135, [%rd47]; + // inline asm + { + mad.lo.cc.u32 %r133, %r135, %r15, %r359; + madc.hi.u32 %r359, %r135, %r15, 0; + } + // inline asm + st.local.u32 [%rd280], %r133; + add.s32 %r358, %r358, 1; + cvt.s64.s32 %rd281, %r358; + mul.wide.s32 %rd50, %r358, 4; + add.s64 %rd280, %rd263, %rd50; + setp.ne.s32 %p16, %r358, 6; + @%p16 bra BB0_14; + + add.u64 %rd262, %SP, 12; + and.b32 %r138, %r14, 255; + add.s32 %r139, %r138, -128; + shr.u32 %r140, %r139, 5; + cvta.to.local.u64 %rd52, %rd262; + st.local.u32 [%rd52+24], %r359; + mov.u32 %r141, 6; + sub.s32 %r142, %r141, %r140; + mul.wide.s32 %rd53, %r142, 4; + add.s64 %rd8, %rd52, %rd53; + ld.local.u32 %r360, [%rd8]; + ld.local.u32 %r361, [%rd8+-4]; + and.b32 %r23, %r14, 31; + setp.eq.s32 %p17, %r23, 0; + @%p17 bra BB0_17; + + mov.u32 %r143, 32; + sub.s32 %r144, %r143, %r23; + shr.u32 %r145, %r361, %r144; + shl.b32 %r146, %r360, %r23; + add.s32 %r360, %r145, %r146; + ld.local.u32 %r147, [%rd8+-8]; + shr.u32 %r148, %r147, %r144; + shl.b32 %r149, %r361, %r23; + add.s32 %r361, %r148, %r149; + +BB0_17: + mov.b32 %r346, %f754; + and.b32 %r363, %r346, -2147483648; + shr.u32 %r150, %r361, 30; + shl.b32 %r151, %r360, 2; + add.s32 %r362, %r150, %r151; + shl.b32 %r29, %r361, 2; + shr.u32 %r152, %r362, 31; + shr.u32 %r153, %r360, 30; + add.s32 %r30, %r152, %r153; + setp.eq.s32 %p18, %r152, 0; + @%p18 bra BB0_18; + bra.uni BB0_19; + +BB0_18: + mov.u32 %r364, %r29; + bra.uni BB0_20; + +BB0_19: + mov.b32 %r348, %f754; + and.b32 %r347, %r348, -2147483648; + not.b32 %r154, %r362; + neg.s32 %r364, %r29; + setp.eq.s32 %p19, %r29, 0; + selp.u32 %r155, 1, 0, %p19; + add.s32 %r362, %r155, %r154; + xor.b32 %r363, %r347, -2147483648; + +BB0_20: + mov.b32 %r350, %f754; + and.b32 %r349, %r350, -2147483648; + clz.b32 %r366, %r362; + setp.eq.s32 %p20, %r366, 0; + shl.b32 %r156, %r362, %r366; + mov.u32 %r157, 32; + sub.s32 %r158, %r157, %r366; + shr.u32 %r159, %r364, %r158; + add.s32 %r160, %r159, %r156; + selp.b32 %r38, %r362, %r160, %p20; + mov.u32 %r161, -921707870; + mul.hi.u32 %r365, %r38, %r161; + setp.eq.s32 %p21, %r349, 0; + neg.s32 %r162, %r30; + selp.b32 %r367, %r30, %r162, %p21; + setp.lt.s32 %p22, %r365, 1; + @%p22 bra BB0_22; + + mul.lo.s32 %r163, %r38, -921707870; + shr.u32 %r164, %r163, 31; + shl.b32 %r165, %r365, 1; + add.s32 %r365, %r164, %r165; + add.s32 %r366, %r366, 1; + +BB0_22: + mov.u32 %r166, 126; + sub.s32 %r167, %r166, %r366; + shl.b32 %r168, %r167, 23; + add.s32 %r169, %r365, 1; + shr.u32 %r170, %r169, 7; + add.s32 %r171, %r170, 1; + shr.u32 %r172, %r171, 1; + add.s32 %r173, %r172, %r168; + or.b32 %r174, %r173, %r363; + mov.b32 %f755, %r174; + +BB0_23: + mul.rn.f32 %f55, %f755, %f755; + add.s32 %r46, %r367, 1; + and.b32 %r47, %r46, 1; + setp.eq.s32 %p23, %r47, 0; + @%p23 bra BB0_25; + bra.uni BB0_24; + +BB0_25: + mov.f32 %f281, 0f3C08839E; + mov.f32 %f282, 0fB94CA1F9; + fma.rn.f32 %f756, %f282, %f55, %f281; + bra.uni BB0_26; + +BB0_24: + mov.f32 %f279, 0fBAB6061A; + mov.f32 %f280, 0f37CCF5CE; + fma.rn.f32 %f756, %f280, %f55, %f279; + +BB0_26: + @%p23 bra BB0_28; + bra.uni BB0_27; + +BB0_28: + mov.f32 %f694, 0f00000000; + mov.f32 %f286, 0fBE2AAAA3; + fma.rn.f32 %f287, %f756, %f55, %f286; + fma.rn.f32 %f757, %f287, %f55, %f694; + bra.uni BB0_29; + +BB0_27: + mov.f32 %f283, 0f3D2AAAA5; + fma.rn.f32 %f284, %f756, %f55, %f283; + mov.f32 %f285, 0fBF000000; + fma.rn.f32 %f757, %f284, %f55, %f285; + +BB0_29: + fma.rn.f32 %f758, %f757, %f755, %f755; + @%p23 bra BB0_31; + + mul.rn.f32 %f700, %f755, %f755; + mov.f32 %f688, 0f3F800000; + fma.rn.f32 %f758, %f757, %f700, %f688; + +BB0_31: + and.b32 %r175, %r46, 2; + setp.eq.s32 %p26, %r175, 0; + @%p26 bra BB0_33; + + mov.f32 %f689, 0f00000000; + mov.f32 %f291, 0fBF800000; + fma.rn.f32 %f758, %f758, %f291, %f689; + +BB0_33: + abs.f32 %f699, %f760; + setp.neu.f32 %p103, %f699, 0f7F800000; + @%p103 bra BB0_35; + + mov.f32 %f693, 0f00000000; + mul.rn.f32 %f760, %f760, %f693; + +BB0_35: + mov.f32 %f698, 0f27C234C5; + mov.f32 %f697, 0f33A22168; + mov.f32 %f696, 0f3FC90FDA; + mul.f32 %f293, %f760, 0f3F22F983; + cvt.rni.s32.f32 %r377, %f293; + cvt.rn.f32.s32 %f294, %r377; + neg.f32 %f295, %f294; + fma.rn.f32 %f297, %f295, %f696, %f760; + fma.rn.f32 %f299, %f295, %f697, %f297; + fma.rn.f32 %f761, %f295, %f698, %f299; + abs.f32 %f301, %f760; + setp.leu.f32 %p28, %f301, 0f47CE4780; + @%p28 bra BB0_46; + + mov.u64 %rd283, 0; + add.u64 %rd55, %SP, 12; + cvta.to.local.u64 %rd282, %rd55; + mov.b32 %r49, %f760; + shr.u32 %r50, %r49, 23; + shl.b32 %r178, %r49, 8; + or.b32 %r51, %r178, -2147483648; + mov.u32 %r368, 0; + mov.u32 %r369, %r368; + +BB0_37: + .pragma "nounroll"; + add.u64 %rd267, %SP, 12; + cvta.to.local.u64 %rd266, %rd267; + shl.b64 %rd56, %rd283, 2; + mov.u64 %rd57, __cudart_i2opi_f; + add.s64 %rd58, %rd57, %rd56; + ld.const.u32 %r181, [%rd58]; + // inline asm + { + mad.lo.cc.u32 %r179, %r181, %r51, %r369; + madc.hi.u32 %r369, %r181, %r51, 0; + } + // inline asm + st.local.u32 [%rd282], %r179; + add.s32 %r368, %r368, 1; + cvt.s64.s32 %rd283, %r368; + mul.wide.s32 %rd59, %r368, 4; + add.s64 %rd282, %rd266, %rd59; + setp.ne.s32 %p29, %r368, 6; + @%p29 bra BB0_37; + + add.u64 %rd265, %SP, 12; + and.b32 %r184, %r50, 255; + add.s32 %r185, %r184, -128; + shr.u32 %r186, %r185, 5; + and.b32 %r56, %r49, -2147483648; + cvta.to.local.u64 %rd61, %rd265; + st.local.u32 [%rd61+24], %r369; + mov.u32 %r187, 6; + sub.s32 %r188, %r187, %r186; + mul.wide.s32 %rd62, %r188, 4; + add.s64 %rd15, %rd61, %rd62; + ld.local.u32 %r370, [%rd15]; + ld.local.u32 %r371, [%rd15+-4]; + and.b32 %r59, %r50, 31; + setp.eq.s32 %p30, %r59, 0; + @%p30 bra BB0_40; + + mov.u32 %r189, 32; + sub.s32 %r190, %r189, %r59; + shr.u32 %r191, %r371, %r190; + shl.b32 %r192, %r370, %r59; + add.s32 %r370, %r191, %r192; + ld.local.u32 %r193, [%rd15+-8]; + shr.u32 %r194, %r193, %r190; + shl.b32 %r195, %r371, %r59; + add.s32 %r371, %r194, %r195; + +BB0_40: + shr.u32 %r196, %r371, 30; + shl.b32 %r197, %r370, 2; + add.s32 %r372, %r196, %r197; + shl.b32 %r65, %r371, 2; + shr.u32 %r198, %r372, 31; + shr.u32 %r199, %r370, 30; + add.s32 %r66, %r198, %r199; + setp.eq.s32 %p31, %r198, 0; + @%p31 bra BB0_41; + bra.uni BB0_42; + +BB0_41: + mov.u32 %r373, %r56; + mov.u32 %r374, %r65; + bra.uni BB0_43; + +BB0_42: + not.b32 %r200, %r372; + neg.s32 %r374, %r65; + setp.eq.s32 %p32, %r65, 0; + selp.u32 %r201, 1, 0, %p32; + add.s32 %r372, %r201, %r200; + xor.b32 %r373, %r56, -2147483648; + +BB0_43: + clz.b32 %r376, %r372; + setp.eq.s32 %p33, %r376, 0; + shl.b32 %r202, %r372, %r376; + mov.u32 %r203, 32; + sub.s32 %r204, %r203, %r376; + shr.u32 %r205, %r374, %r204; + add.s32 %r206, %r205, %r202; + selp.b32 %r74, %r372, %r206, %p33; + mov.u32 %r207, -921707870; + mul.hi.u32 %r375, %r74, %r207; + setp.eq.s32 %p34, %r56, 0; + neg.s32 %r208, %r66; + selp.b32 %r377, %r66, %r208, %p34; + setp.lt.s32 %p35, %r375, 1; + @%p35 bra BB0_45; + + mul.lo.s32 %r209, %r74, -921707870; + shr.u32 %r210, %r209, 31; + shl.b32 %r211, %r375, 1; + add.s32 %r375, %r210, %r211; + add.s32 %r376, %r376, 1; + +BB0_45: + mov.u32 %r212, 126; + sub.s32 %r213, %r212, %r376; + shl.b32 %r214, %r213, 23; + add.s32 %r215, %r375, 1; + shr.u32 %r216, %r215, 7; + add.s32 %r217, %r216, 1; + shr.u32 %r218, %r217, 1; + add.s32 %r219, %r218, %r214; + or.b32 %r220, %r219, %r373; + mov.b32 %f761, %r220; + +BB0_46: + mul.rn.f32 %f72, %f761, %f761; + and.b32 %r82, %r377, 1; + setp.eq.s32 %p36, %r82, 0; + @%p36 bra BB0_48; + bra.uni BB0_47; + +BB0_48: + mov.f32 %f304, 0f3C08839E; + mov.f32 %f305, 0fB94CA1F9; + fma.rn.f32 %f762, %f305, %f72, %f304; + bra.uni BB0_49; + +BB0_47: + mov.f32 %f302, 0fBAB6061A; + mov.f32 %f303, 0f37CCF5CE; + fma.rn.f32 %f762, %f303, %f72, %f302; + +BB0_49: + @%p36 bra BB0_51; + bra.uni BB0_50; + +BB0_51: + mov.f32 %f692, 0f00000000; + mov.f32 %f309, 0fBE2AAAA3; + fma.rn.f32 %f310, %f762, %f72, %f309; + fma.rn.f32 %f763, %f310, %f72, %f692; + bra.uni BB0_52; + +BB0_50: + mov.f32 %f306, 0f3D2AAAA5; + fma.rn.f32 %f307, %f762, %f72, %f306; + mov.f32 %f308, 0fBF000000; + fma.rn.f32 %f763, %f307, %f72, %f308; + +BB0_52: + fma.rn.f32 %f764, %f763, %f761, %f761; + @%p36 bra BB0_54; + + mul.rn.f32 %f701, %f761, %f761; + mov.f32 %f690, 0f3F800000; + fma.rn.f32 %f764, %f763, %f701, %f690; + +BB0_54: + and.b32 %r221, %r377, 2; + setp.eq.s32 %p39, %r221, 0; + @%p39 bra BB0_56; + + mov.f32 %f691, 0f00000000; + mov.f32 %f314, 0fBF800000; + fma.rn.f32 %f764, %f764, %f314, %f691; + +BB0_56: + max.f32 %f679, %f256, %f204; + mul.f32 %f323, %f47, %f758; + mul.f32 %f324, %f47, %f764; + mul.f32 %f325, %f22, %f324; + mul.f32 %f326, %f23, %f324; + mul.f32 %f327, %f24, %f324; + fma.rn.f32 %f328, %f31, %f323, %f325; + fma.rn.f32 %f329, %f30, %f323, %f326; + fma.rn.f32 %f330, %f29, %f323, %f327; + mul.f32 %f331, %f46, %f736; + mul.f32 %f332, %f46, %f737; + mul.f32 %f333, %f46, %f738; + sub.f32 %f84, %f328, %f331; + sub.f32 %f85, %f329, %f332; + sub.f32 %f86, %f330, %f333; + mov.u32 %r225, -1082130432; + st.local.u32 [%rd35+8], %r225; + st.local.u32 [%rd35+4], %r225; + st.local.u32 [%rd35], %r225; + ld.global.u32 %r222, [root]; + mov.u32 %r223, 0; + // inline asm + call _rt_trace_64, (%r222, %f739, %f740, %f741, %f84, %f85, %f86, %r223, %f679, %f188, %rd33, %r114); + // inline asm + ld.local.f32 %f87, [%rd35]; + setp.lt.f32 %p40, %f87, 0f00000000; + @%p40 bra BB0_58; + + mul.f32 %f334, %f736, %f84; + mul.f32 %f335, %f737, %f85; + neg.f32 %f336, %f335; + sub.f32 %f337, %f336, %f334; + mul.f32 %f338, %f738, %f86; + sub.f32 %f339, %f337, %f338; + mul.f32 %f340, %f339, 0f40800000; + cvt.sat.f32.f32 %f341, %f340; + ld.local.f32 %f342, [%rd35+4]; + ld.local.f32 %f343, [%rd35+8]; + fma.rn.f32 %f750, %f341, %f87, %f750; + fma.rn.f32 %f749, %f341, %f342, %f749; + fma.rn.f32 %f748, %f341, %f343, %f748; + cvt.sat.f32.f32 %f344, %f339; + fma.rn.f32 %f753, %f344, %f87, %f753; + fma.rn.f32 %f752, %f344, %f342, %f752; + fma.rn.f32 %f751, %f344, %f343, %f751; + +BB0_58: + mad.lo.s32 %r352, %r379, 1664525, 1013904223; + mad.lo.s32 %r379, %r352, 1664525, 1013904223; + ld.global.u32 %r353, [samples]; + add.s32 %r356, %r356, 1; + setp.lt.s32 %p41, %r356, %r353; + @%p41 bra BB0_10; + +BB0_59: + add.s32 %r354, %r354, 1; + setp.lt.s32 %p42, %r354, %r353; + @%p42 bra BB0_8; + bra.uni BB0_60; + +BB0_115: + mov.u64 %rd201, image_RNM0; + cvta.global.u64 %rd196, %rd201; + mov.u32 %r309, 8; + mov.u64 %rd200, 0; + // inline asm + call (%rd195), _rt_buffer_get_64, (%rd196, %r95, %r309, %rd18, %rd19, %rd200, %rd200); + // inline asm + mov.f32 %f656, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs98, %f656;} + + // inline asm + mov.u16 %rs99, 0; + st.v4.u16 [%rd195], {%rs98, %rs98, %rs98, %rs99}; + +BB0_116: + ld.global.u32 %r310, [additive]; + setp.eq.s32 %p100, %r310, 0; + @%p100 bra BB0_118; + + mov.u64 %rd214, image_RNM1; + cvta.global.u64 %rd203, %rd214; + mov.u32 %r314, 8; + mov.u64 %rd213, 0; + // inline asm + call (%rd202), _rt_buffer_get_64, (%rd203, %r95, %r314, %rd18, %rd19, %rd213, %rd213); + // inline asm + ld.v4.u16 {%rs106, %rs107, %rs108, %rs109}, [%rd202]; + // inline asm + { cvt.f32.f16 %f657, %rs106;} + + // inline asm + // inline asm + { cvt.f32.f16 %f658, %rs107;} + + // inline asm + // inline asm + { cvt.f32.f16 %f659, %rs108;} + + // inline asm + // inline asm + call (%rd208), _rt_buffer_get_64, (%rd203, %r95, %r314, %rd18, %rd19, %rd213, %rd213); + // inline asm + add.f32 %f660, %f657, 0f00000000; + add.f32 %f661, %f658, 0f00000000; + add.f32 %f662, %f659, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs105, %f662;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs104, %f661;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs103, %f660;} + + // inline asm + mov.u16 %rs110, 0; + st.v4.u16 [%rd208], {%rs103, %rs104, %rs105, %rs110}; + bra.uni BB0_119; + +BB0_6: + mov.f32 %f749, %f748; + mov.f32 %f750, %f748; + mov.f32 %f751, %f748; + mov.f32 %f752, %f748; + mov.f32 %f753, %f748; + +BB0_60: + mul.lo.s32 %r226, %r353, %r353; + cvt.rn.f32.s32 %f345, %r226; + rcp.rn.f32 %f112, %f345; + mul.f32 %f346, %f753, %f112; + mul.f32 %f347, %f752, %f112; + mul.f32 %f348, %f751, %f112; + fma.rn.f32 %f113, %f753, %f112, %f346; + fma.rn.f32 %f114, %f752, %f112, %f347; + fma.rn.f32 %f115, %f751, %f112, %f348; + ld.global.u32 %r381, [imageEnabled]; + and.b32 %r227, %r381, 1; + setp.eq.b32 %p43, %r227, 1; + @!%p43 bra BB0_95; + bra.uni BB0_61; + +BB0_61: + abs.f32 %f117, %f113; + setp.lt.f32 %p44, %f117, 0f00800000; + mul.f32 %f354, %f117, 0f4B800000; + selp.f32 %f355, 0fC3170000, 0fC2FE0000, %p44; + selp.f32 %f356, %f354, %f117, %p44; + mov.b32 %r228, %f356; + and.b32 %r229, %r228, 8388607; + or.b32 %r230, %r229, 1065353216; + mov.b32 %f357, %r230; + shr.u32 %r231, %r228, 23; + cvt.rn.f32.u32 %f358, %r231; + add.f32 %f359, %f355, %f358; + setp.gt.f32 %p45, %f357, 0f3FB504F3; + mul.f32 %f360, %f357, 0f3F000000; + add.f32 %f361, %f359, 0f3F800000; + selp.f32 %f362, %f360, %f357, %p45; + selp.f32 %f363, %f361, %f359, %p45; + add.f32 %f364, %f362, 0fBF800000; + add.f32 %f350, %f362, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f349,%f350; + // inline asm + add.f32 %f365, %f364, %f364; + mul.f32 %f366, %f349, %f365; + mul.f32 %f367, %f366, %f366; + mov.f32 %f368, 0f3C4CAF63; + mov.f32 %f369, 0f3B18F0FE; + fma.rn.f32 %f370, %f369, %f367, %f368; + mov.f32 %f371, 0f3DAAAABD; + fma.rn.f32 %f372, %f370, %f367, %f371; + mul.rn.f32 %f373, %f372, %f367; + mul.rn.f32 %f374, %f373, %f366; + sub.f32 %f375, %f364, %f366; + neg.f32 %f376, %f366; + add.f32 %f377, %f375, %f375; + fma.rn.f32 %f378, %f376, %f364, %f377; + mul.rn.f32 %f379, %f349, %f378; + add.f32 %f380, %f374, %f366; + sub.f32 %f381, %f366, %f380; + add.f32 %f382, %f374, %f381; + add.f32 %f383, %f379, %f382; + add.f32 %f384, %f380, %f383; + sub.f32 %f385, %f380, %f384; + add.f32 %f386, %f383, %f385; + mov.f32 %f387, 0f3F317200; + mul.rn.f32 %f388, %f363, %f387; + mov.f32 %f389, 0f35BFBE8E; + mul.rn.f32 %f390, %f363, %f389; + add.f32 %f391, %f388, %f384; + sub.f32 %f392, %f388, %f391; + add.f32 %f393, %f384, %f392; + add.f32 %f394, %f386, %f393; + add.f32 %f395, %f390, %f394; + add.f32 %f396, %f391, %f395; + sub.f32 %f397, %f391, %f396; + add.f32 %f398, %f395, %f397; + mov.f32 %f399, 0f3EE66666; + mul.rn.f32 %f400, %f399, %f396; + neg.f32 %f401, %f400; + fma.rn.f32 %f402, %f399, %f396, %f401; + fma.rn.f32 %f403, %f399, %f398, %f402; + mov.f32 %f404, 0f00000000; + fma.rn.f32 %f405, %f404, %f396, %f403; + add.rn.f32 %f406, %f400, %f405; + neg.f32 %f407, %f406; + add.rn.f32 %f408, %f400, %f407; + add.rn.f32 %f409, %f408, %f405; + mov.b32 %r232, %f406; + setp.eq.s32 %p46, %r232, 1118925336; + add.s32 %r233, %r232, -1; + mov.b32 %f410, %r233; + add.f32 %f411, %f409, 0f37000000; + selp.f32 %f412, %f410, %f406, %p46; + selp.f32 %f118, %f411, %f409, %p46; + mul.f32 %f413, %f412, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f414, %f413; + mov.f32 %f415, 0fBF317200; + fma.rn.f32 %f416, %f414, %f415, %f412; + mov.f32 %f417, 0fB5BFBE8E; + fma.rn.f32 %f418, %f414, %f417, %f416; + mul.f32 %f419, %f418, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f420, %f419; + add.f32 %f421, %f414, 0f00000000; + ex2.approx.f32 %f422, %f421; + mul.f32 %f423, %f420, %f422; + setp.lt.f32 %p47, %f412, 0fC2D20000; + selp.f32 %f424, 0f00000000, %f423, %p47; + setp.gt.f32 %p48, %f412, 0f42D20000; + selp.f32 %f784, 0f7F800000, %f424, %p48; + setp.eq.f32 %p49, %f784, 0f7F800000; + @%p49 bra BB0_63; + + fma.rn.f32 %f784, %f784, %f118, %f784; + +BB0_63: + mov.f32 %f705, 0f3E666666; + cvt.rzi.f32.f32 %f704, %f705; + fma.rn.f32 %f703, %f704, 0fC0000000, 0f3EE66666; + abs.f32 %f702, %f703; + setp.lt.f32 %p50, %f113, 0f00000000; + setp.eq.f32 %p51, %f702, 0f3F800000; + and.pred %p1, %p50, %p51; + mov.b32 %r234, %f784; + xor.b32 %r235, %r234, -2147483648; + mov.b32 %f425, %r235; + selp.f32 %f786, %f425, %f784, %p1; + setp.eq.f32 %p52, %f113, 0f00000000; + @%p52 bra BB0_66; + bra.uni BB0_64; + +BB0_66: + add.f32 %f428, %f113, %f113; + selp.f32 %f786, %f428, 0f00000000, %p51; + bra.uni BB0_67; + +BB0_118: + mov.u64 %rd221, image_RNM1; + cvta.global.u64 %rd216, %rd221; + mov.u32 %r316, 8; + mov.u64 %rd220, 0; + // inline asm + call (%rd215), _rt_buffer_get_64, (%rd216, %r95, %r316, %rd18, %rd19, %rd220, %rd220); + // inline asm + mov.f32 %f663, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs111, %f663;} + + // inline asm + mov.u16 %rs112, 0; + st.v4.u16 [%rd215], {%rs111, %rs111, %rs111, %rs112}; + +BB0_119: + ld.global.u32 %r317, [additive]; + setp.eq.s32 %p101, %r317, 0; + @%p101 bra BB0_121; + + mov.u64 %rd234, image_RNM2; + cvta.global.u64 %rd223, %rd234; + mov.u32 %r321, 8; + mov.u64 %rd233, 0; + // inline asm + call (%rd222), _rt_buffer_get_64, (%rd223, %r95, %r321, %rd18, %rd19, %rd233, %rd233); + // inline asm + ld.v4.u16 {%rs119, %rs120, %rs121, %rs122}, [%rd222]; + // inline asm + { cvt.f32.f16 %f664, %rs119;} + + // inline asm + // inline asm + { cvt.f32.f16 %f665, %rs120;} + + // inline asm + // inline asm + { cvt.f32.f16 %f666, %rs121;} + + // inline asm + // inline asm + call (%rd228), _rt_buffer_get_64, (%rd223, %r95, %r321, %rd18, %rd19, %rd233, %rd233); + // inline asm + add.f32 %f667, %f664, 0f00000000; + add.f32 %f668, %f665, 0f00000000; + add.f32 %f669, %f666, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs118, %f669;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs117, %f668;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs116, %f667;} + + // inline asm + mov.u16 %rs123, 0; + st.v4.u16 [%rd228], {%rs116, %rs117, %rs118, %rs123}; + bra.uni BB0_122; + +BB0_121: + mov.u64 %rd241, image_RNM2; + cvta.global.u64 %rd236, %rd241; + mov.u32 %r323, 8; + mov.u64 %rd240, 0; + // inline asm + call (%rd235), _rt_buffer_get_64, (%rd236, %r95, %r323, %rd18, %rd19, %rd240, %rd240); + // inline asm + mov.f32 %f670, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs124, %f670;} + + // inline asm + mov.u16 %rs125, 0; + st.v4.u16 [%rd235], {%rs124, %rs124, %rs124, %rs125}; + +BB0_122: + ld.global.u32 %r324, [additive]; + setp.eq.s32 %p102, %r324, 0; + @%p102 bra BB0_124; + + mov.u64 %rd254, image_RNM3; + cvta.global.u64 %rd243, %rd254; + mov.u32 %r328, 8; + mov.u64 %rd253, 0; + // inline asm + call (%rd242), _rt_buffer_get_64, (%rd243, %r95, %r328, %rd18, %rd19, %rd253, %rd253); + // inline asm + ld.v4.u16 {%rs132, %rs133, %rs134, %rs135}, [%rd242]; + // inline asm + { cvt.f32.f16 %f671, %rs132;} + + // inline asm + // inline asm + { cvt.f32.f16 %f672, %rs133;} + + // inline asm + // inline asm + { cvt.f32.f16 %f673, %rs134;} + + // inline asm + // inline asm + call (%rd248), _rt_buffer_get_64, (%rd243, %r95, %r328, %rd18, %rd19, %rd253, %rd253); + // inline asm + add.f32 %f674, %f671, 0f00000000; + add.f32 %f675, %f672, 0f00000000; + add.f32 %f676, %f673, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs131, %f676;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs130, %f675;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs129, %f674;} + + // inline asm + mov.u16 %rs136, 0; + st.v4.u16 [%rd248], {%rs129, %rs130, %rs131, %rs136}; + bra.uni BB0_125; + +BB0_124: + mov.u64 %rd261, image_RNM3; + cvta.global.u64 %rd256, %rd261; + mov.u32 %r330, 8; + mov.u64 %rd260, 0; + // inline asm + call (%rd255), _rt_buffer_get_64, (%rd256, %r95, %r330, %rd18, %rd19, %rd260, %rd260); + // inline asm + mov.f32 %f677, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs137, %f677;} + + // inline asm + mov.u16 %rs138, 0; + st.v4.u16 [%rd255], {%rs137, %rs137, %rs137, %rs138}; + bra.uni BB0_125; + +BB0_64: + setp.geu.f32 %p53, %f113, 0f00000000; + @%p53 bra BB0_67; + + mov.f32 %f729, 0f3EE66666; + cvt.rzi.f32.f32 %f427, %f729; + setp.neu.f32 %p54, %f427, 0f3EE66666; + selp.f32 %f786, 0f7FFFFFFF, %f786, %p54; + +BB0_67: + abs.f32 %f706, %f113; + add.f32 %f429, %f706, 0f3EE66666; + mov.b32 %r236, %f429; + setp.lt.s32 %p56, %r236, 2139095040; + @%p56 bra BB0_72; + + abs.f32 %f727, %f113; + setp.gtu.f32 %p57, %f727, 0f7F800000; + @%p57 bra BB0_71; + bra.uni BB0_69; + +BB0_71: + add.f32 %f786, %f113, 0f3EE66666; + bra.uni BB0_72; + +BB0_69: + abs.f32 %f728, %f113; + setp.neu.f32 %p58, %f728, 0f7F800000; + @%p58 bra BB0_72; + + selp.f32 %f786, 0fFF800000, 0f7F800000, %p1; + +BB0_72: + mov.f32 %f715, 0fB5BFBE8E; + mov.f32 %f714, 0fBF317200; + mov.f32 %f713, 0f00000000; + mov.f32 %f712, 0f35BFBE8E; + mov.f32 %f711, 0f3F317200; + mov.f32 %f710, 0f3DAAAABD; + mov.f32 %f709, 0f3C4CAF63; + mov.f32 %f708, 0f3B18F0FE; + mov.f32 %f707, 0f3EE66666; + setp.eq.f32 %p59, %f113, 0f3F800000; + selp.f32 %f129, 0f3F800000, %f786, %p59; + abs.f32 %f130, %f114; + setp.lt.f32 %p60, %f130, 0f00800000; + mul.f32 %f432, %f130, 0f4B800000; + selp.f32 %f433, 0fC3170000, 0fC2FE0000, %p60; + selp.f32 %f434, %f432, %f130, %p60; + mov.b32 %r237, %f434; + and.b32 %r238, %r237, 8388607; + or.b32 %r239, %r238, 1065353216; + mov.b32 %f435, %r239; + shr.u32 %r240, %r237, 23; + cvt.rn.f32.u32 %f436, %r240; + add.f32 %f437, %f433, %f436; + setp.gt.f32 %p61, %f435, 0f3FB504F3; + mul.f32 %f438, %f435, 0f3F000000; + add.f32 %f439, %f437, 0f3F800000; + selp.f32 %f440, %f438, %f435, %p61; + selp.f32 %f441, %f439, %f437, %p61; + add.f32 %f442, %f440, 0fBF800000; + add.f32 %f431, %f440, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f430,%f431; + // inline asm + add.f32 %f443, %f442, %f442; + mul.f32 %f444, %f430, %f443; + mul.f32 %f445, %f444, %f444; + fma.rn.f32 %f448, %f708, %f445, %f709; + fma.rn.f32 %f450, %f448, %f445, %f710; + mul.rn.f32 %f451, %f450, %f445; + mul.rn.f32 %f452, %f451, %f444; + sub.f32 %f453, %f442, %f444; + neg.f32 %f454, %f444; + add.f32 %f455, %f453, %f453; + fma.rn.f32 %f456, %f454, %f442, %f455; + mul.rn.f32 %f457, %f430, %f456; + add.f32 %f458, %f452, %f444; + sub.f32 %f459, %f444, %f458; + add.f32 %f460, %f452, %f459; + add.f32 %f461, %f457, %f460; + add.f32 %f462, %f458, %f461; + sub.f32 %f463, %f458, %f462; + add.f32 %f464, %f461, %f463; + mul.rn.f32 %f466, %f441, %f711; + mul.rn.f32 %f468, %f441, %f712; + add.f32 %f469, %f466, %f462; + sub.f32 %f470, %f466, %f469; + add.f32 %f471, %f462, %f470; + add.f32 %f472, %f464, %f471; + add.f32 %f473, %f468, %f472; + add.f32 %f474, %f469, %f473; + sub.f32 %f475, %f469, %f474; + add.f32 %f476, %f473, %f475; + mul.rn.f32 %f478, %f707, %f474; + neg.f32 %f479, %f478; + fma.rn.f32 %f480, %f707, %f474, %f479; + fma.rn.f32 %f481, %f707, %f476, %f480; + fma.rn.f32 %f483, %f713, %f474, %f481; + add.rn.f32 %f484, %f478, %f483; + neg.f32 %f485, %f484; + add.rn.f32 %f486, %f478, %f485; + add.rn.f32 %f487, %f486, %f483; + mov.b32 %r241, %f484; + setp.eq.s32 %p62, %r241, 1118925336; + add.s32 %r242, %r241, -1; + mov.b32 %f488, %r242; + add.f32 %f489, %f487, 0f37000000; + selp.f32 %f490, %f488, %f484, %p62; + selp.f32 %f131, %f489, %f487, %p62; + mul.f32 %f491, %f490, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f492, %f491; + fma.rn.f32 %f494, %f492, %f714, %f490; + fma.rn.f32 %f496, %f492, %f715, %f494; + mul.f32 %f497, %f496, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f498, %f497; + add.f32 %f499, %f492, 0f00000000; + ex2.approx.f32 %f500, %f499; + mul.f32 %f501, %f498, %f500; + setp.lt.f32 %p63, %f490, 0fC2D20000; + selp.f32 %f502, 0f00000000, %f501, %p63; + setp.gt.f32 %p64, %f490, 0f42D20000; + selp.f32 %f787, 0f7F800000, %f502, %p64; + setp.eq.f32 %p65, %f787, 0f7F800000; + @%p65 bra BB0_74; + + fma.rn.f32 %f787, %f787, %f131, %f787; + +BB0_74: + setp.lt.f32 %p66, %f114, 0f00000000; + and.pred %p2, %p66, %p51; + mov.b32 %r243, %f787; + xor.b32 %r244, %r243, -2147483648; + mov.b32 %f503, %r244; + selp.f32 %f789, %f503, %f787, %p2; + setp.eq.f32 %p68, %f114, 0f00000000; + @%p68 bra BB0_77; + bra.uni BB0_75; + +BB0_77: + add.f32 %f506, %f114, %f114; + selp.f32 %f789, %f506, 0f00000000, %p51; + bra.uni BB0_78; + +BB0_75: + setp.geu.f32 %p69, %f114, 0f00000000; + @%p69 bra BB0_78; + + mov.f32 %f726, 0f3EE66666; + cvt.rzi.f32.f32 %f505, %f726; + setp.neu.f32 %p70, %f505, 0f3EE66666; + selp.f32 %f789, 0f7FFFFFFF, %f789, %p70; + +BB0_78: + abs.f32 %f730, %f114; + add.f32 %f507, %f730, 0f3EE66666; + mov.b32 %r245, %f507; + setp.lt.s32 %p72, %r245, 2139095040; + @%p72 bra BB0_83; + + abs.f32 %f731, %f114; + setp.gtu.f32 %p73, %f731, 0f7F800000; + @%p73 bra BB0_82; + bra.uni BB0_80; + +BB0_82: + add.f32 %f789, %f114, 0f3EE66666; + bra.uni BB0_83; + +BB0_80: + abs.f32 %f732, %f114; + setp.neu.f32 %p74, %f732, 0f7F800000; + @%p74 bra BB0_83; + + selp.f32 %f789, 0fFF800000, 0f7F800000, %p2; + +BB0_83: + mov.f32 %f724, 0fB5BFBE8E; + mov.f32 %f723, 0fBF317200; + mov.f32 %f722, 0f00000000; + mov.f32 %f721, 0f35BFBE8E; + mov.f32 %f720, 0f3F317200; + mov.f32 %f719, 0f3DAAAABD; + mov.f32 %f718, 0f3C4CAF63; + mov.f32 %f717, 0f3B18F0FE; + mov.f32 %f716, 0f3EE66666; + setp.eq.f32 %p75, %f114, 0f3F800000; + selp.f32 %f142, 0f3F800000, %f789, %p75; + abs.f32 %f143, %f115; + setp.lt.f32 %p76, %f143, 0f00800000; + mul.f32 %f510, %f143, 0f4B800000; + selp.f32 %f511, 0fC3170000, 0fC2FE0000, %p76; + selp.f32 %f512, %f510, %f143, %p76; + mov.b32 %r246, %f512; + and.b32 %r247, %r246, 8388607; + or.b32 %r248, %r247, 1065353216; + mov.b32 %f513, %r248; + shr.u32 %r249, %r246, 23; + cvt.rn.f32.u32 %f514, %r249; + add.f32 %f515, %f511, %f514; + setp.gt.f32 %p77, %f513, 0f3FB504F3; + mul.f32 %f516, %f513, 0f3F000000; + add.f32 %f517, %f515, 0f3F800000; + selp.f32 %f518, %f516, %f513, %p77; + selp.f32 %f519, %f517, %f515, %p77; + add.f32 %f520, %f518, 0fBF800000; + add.f32 %f509, %f518, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f508,%f509; + // inline asm + add.f32 %f521, %f520, %f520; + mul.f32 %f522, %f508, %f521; + mul.f32 %f523, %f522, %f522; + fma.rn.f32 %f526, %f717, %f523, %f718; + fma.rn.f32 %f528, %f526, %f523, %f719; + mul.rn.f32 %f529, %f528, %f523; + mul.rn.f32 %f530, %f529, %f522; + sub.f32 %f531, %f520, %f522; + neg.f32 %f532, %f522; + add.f32 %f533, %f531, %f531; + fma.rn.f32 %f534, %f532, %f520, %f533; + mul.rn.f32 %f535, %f508, %f534; + add.f32 %f536, %f530, %f522; + sub.f32 %f537, %f522, %f536; + add.f32 %f538, %f530, %f537; + add.f32 %f539, %f535, %f538; + add.f32 %f540, %f536, %f539; + sub.f32 %f541, %f536, %f540; + add.f32 %f542, %f539, %f541; + mul.rn.f32 %f544, %f519, %f720; + mul.rn.f32 %f546, %f519, %f721; + add.f32 %f547, %f544, %f540; + sub.f32 %f548, %f544, %f547; + add.f32 %f549, %f540, %f548; + add.f32 %f550, %f542, %f549; + add.f32 %f551, %f546, %f550; + add.f32 %f552, %f547, %f551; + sub.f32 %f553, %f547, %f552; + add.f32 %f554, %f551, %f553; + mul.rn.f32 %f556, %f716, %f552; + neg.f32 %f557, %f556; + fma.rn.f32 %f558, %f716, %f552, %f557; + fma.rn.f32 %f559, %f716, %f554, %f558; + fma.rn.f32 %f561, %f722, %f552, %f559; + add.rn.f32 %f562, %f556, %f561; + neg.f32 %f563, %f562; + add.rn.f32 %f564, %f556, %f563; + add.rn.f32 %f565, %f564, %f561; + mov.b32 %r250, %f562; + setp.eq.s32 %p78, %r250, 1118925336; + add.s32 %r251, %r250, -1; + mov.b32 %f566, %r251; + add.f32 %f567, %f565, 0f37000000; + selp.f32 %f568, %f566, %f562, %p78; + selp.f32 %f144, %f567, %f565, %p78; + mul.f32 %f569, %f568, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f570, %f569; + fma.rn.f32 %f572, %f570, %f723, %f568; + fma.rn.f32 %f574, %f570, %f724, %f572; + mul.f32 %f575, %f574, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f576, %f575; + add.f32 %f577, %f570, 0f00000000; + ex2.approx.f32 %f578, %f577; + mul.f32 %f579, %f576, %f578; + setp.lt.f32 %p79, %f568, 0fC2D20000; + selp.f32 %f580, 0f00000000, %f579, %p79; + setp.gt.f32 %p80, %f568, 0f42D20000; + selp.f32 %f790, 0f7F800000, %f580, %p80; + setp.eq.f32 %p81, %f790, 0f7F800000; + @%p81 bra BB0_85; + + fma.rn.f32 %f790, %f790, %f144, %f790; + +BB0_85: + setp.lt.f32 %p82, %f115, 0f00000000; + and.pred %p3, %p82, %p51; + mov.b32 %r252, %f790; + xor.b32 %r253, %r252, -2147483648; + mov.b32 %f581, %r253; + selp.f32 %f792, %f581, %f790, %p3; + setp.eq.f32 %p84, %f115, 0f00000000; + @%p84 bra BB0_88; + bra.uni BB0_86; + +BB0_88: + add.f32 %f584, %f115, %f115; + selp.f32 %f792, %f584, 0f00000000, %p51; + bra.uni BB0_89; + +BB0_86: + setp.geu.f32 %p85, %f115, 0f00000000; + @%p85 bra BB0_89; + + mov.f32 %f725, 0f3EE66666; + cvt.rzi.f32.f32 %f583, %f725; + setp.neu.f32 %p86, %f583, 0f3EE66666; + selp.f32 %f792, 0f7FFFFFFF, %f792, %p86; + +BB0_89: + abs.f32 %f733, %f115; + add.f32 %f585, %f733, 0f3EE66666; + mov.b32 %r254, %f585; + setp.lt.s32 %p88, %r254, 2139095040; + @%p88 bra BB0_94; + + abs.f32 %f734, %f115; + setp.gtu.f32 %p89, %f734, 0f7F800000; + @%p89 bra BB0_93; + bra.uni BB0_91; + +BB0_93: + add.f32 %f792, %f115, 0f3EE66666; + bra.uni BB0_94; + +BB0_91: + abs.f32 %f735, %f115; + setp.neu.f32 %p90, %f735, 0f7F800000; + @%p90 bra BB0_94; + + selp.f32 %f792, 0fFF800000, 0f7F800000, %p3; + +BB0_94: + mov.u64 %rd268, 0; + mov.u32 %r332, 4; + mov.u32 %r331, 2; + setp.eq.f32 %p91, %f115, 0f3F800000; + selp.f32 %f586, 0f3F800000, %f792, %p91; + cvt.u64.u32 %rd70, %r3; + cvt.u64.u32 %rd69, %r2; + mov.u64 %rd73, image; + cvta.global.u64 %rd68, %rd73; + // inline asm + call (%rd67), _rt_buffer_get_64, (%rd68, %r331, %r332, %rd69, %rd70, %rd268, %rd268); + // inline asm + cvt.sat.f32.f32 %f587, %f586; + mul.f32 %f588, %f587, 0f437FFD71; + cvt.rzi.u32.f32 %r257, %f588; + cvt.sat.f32.f32 %f589, %f142; + mul.f32 %f590, %f589, 0f437FFD71; + cvt.rzi.u32.f32 %r258, %f590; + cvt.sat.f32.f32 %f591, %f129; + mul.f32 %f592, %f591, 0f437FFD71; + cvt.rzi.u32.f32 %r259, %f592; + cvt.u16.u32 %rs13, %r257; + cvt.u16.u32 %rs14, %r259; + cvt.u16.u32 %rs15, %r258; + mov.u16 %rs16, 255; + st.v4.u8 [%rd67], {%rs13, %rs15, %rs14, %rs16}; + ld.global.u32 %r381, [imageEnabled]; + +BB0_95: + and.b32 %r260, %r381, 4; + setp.eq.s32 %p92, %r260, 0; + mul.f32 %f155, %f748, %f112; + mul.f32 %f156, %f749, %f112; + mul.f32 %f157, %f750, %f112; + @%p92 bra BB0_97; + + mov.u64 %rd269, 0; + mov.u32 %r333, 2; + cvt.u64.u32 %rd83, %r3; + ld.global.v2.u32 {%r265, %r266}, [pixelID]; + cvt.u64.u32 %rd76, %r265; + cvt.u64.u32 %rd77, %r266; + mov.u64 %rd86, lightmapDirect; + cvta.global.u64 %rd75, %rd86; + mov.u32 %r264, 8; + // inline asm + call (%rd74), _rt_buffer_get_64, (%rd75, %r333, %r264, %rd76, %rd77, %rd269, %rd269); + // inline asm + ld.v4.u16 {%rs24, %rs25, %rs26, %rs27}, [%rd74]; + // inline asm + { cvt.f32.f16 %f593, %rs24;} + + // inline asm + // inline asm + { cvt.f32.f16 %f594, %rs25;} + + // inline asm + // inline asm + { cvt.f32.f16 %f595, %rs26;} + + // inline asm + add.f32 %f596, %f113, %f593; + add.f32 %f597, %f114, %f594; + add.f32 %f598, %f115, %f595; + cvt.u64.u32 %rd82, %r2; + mov.u64 %rd87, image_HDR; + cvta.global.u64 %rd81, %rd87; + // inline asm + call (%rd80), _rt_buffer_get_64, (%rd81, %r333, %r264, %rd82, %rd83, %rd269, %rd269); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs22, %f598;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs21, %f597;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs20, %f596;} + + // inline asm + mov.f32 %f599, 0f3F800000; + // inline asm + { cvt.rn.f16.f32 %rs23, %f599;} + + // inline asm + st.v4.u16 [%rd80], {%rs20, %rs21, %rs22, %rs23}; + +BB0_97: + cvt.u64.u32 %rd16, %r2; + cvt.u64.u32 %rd17, %r3; + mul.f32 %f158, %f157, 0f3F000000; + mul.f32 %f159, %f156, 0f3F000000; + mul.f32 %f160, %f155, 0f3F000000; + ld.global.u32 %r269, [additive]; + setp.eq.s32 %p93, %r269, 0; + mov.f32 %f600, 0f3F800000; + // inline asm + { cvt.rn.f16.f32 %rs28, %f600;} + + // inline asm + @%p93 bra BB0_99; + + mov.u64 %rd270, 0; + mov.u32 %r334, 2; + mov.u64 %rd100, image_RNM0; + cvta.global.u64 %rd89, %rd100; + mov.u32 %r273, 8; + // inline asm + call (%rd88), _rt_buffer_get_64, (%rd89, %r334, %r273, %rd16, %rd17, %rd270, %rd270); + // inline asm + ld.v4.u16 {%rs35, %rs36, %rs37, %rs38}, [%rd88]; + // inline asm + { cvt.f32.f16 %f601, %rs35;} + + // inline asm + // inline asm + { cvt.f32.f16 %f602, %rs36;} + + // inline asm + // inline asm + { cvt.f32.f16 %f603, %rs37;} + + // inline asm + // inline asm + call (%rd94), _rt_buffer_get_64, (%rd89, %r334, %r273, %rd16, %rd17, %rd270, %rd270); + // inline asm + add.f32 %f604, %f158, %f601; + add.f32 %f605, %f159, %f602; + add.f32 %f606, %f160, %f603; + // inline asm + { cvt.rn.f16.f32 %rs34, %f606;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs33, %f605;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs32, %f604;} + + // inline asm + st.v4.u16 [%rd94], {%rs32, %rs33, %rs34, %rs28}; + bra.uni BB0_100; + +BB0_99: + mov.u64 %rd277, 0; + mov.u32 %r341, 2; + mov.u64 %rd107, image_RNM0; + cvta.global.u64 %rd102, %rd107; + mov.u32 %r275, 8; + // inline asm + call (%rd101), _rt_buffer_get_64, (%rd102, %r341, %r275, %rd16, %rd17, %rd277, %rd277); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs41, %f160;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs40, %f159;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs39, %f158;} + + // inline asm + st.v4.u16 [%rd101], {%rs39, %rs40, %rs41, %rs28}; + +BB0_100: + mul.f32 %f611, %f112, 0f00000000; + mul.f32 %f612, %f611, 0f3F000000; + mov.f32 %f613, 0f34000000; + max.f32 %f614, %f158, %f613; + div.rn.f32 %f615, %f612, %f614; + max.f32 %f616, %f159, %f613; + div.rn.f32 %f617, %f612, %f616; + max.f32 %f618, %f160, %f613; + div.rn.f32 %f619, %f612, %f618; + fma.rn.f32 %f161, %f615, 0f3F000000, 0f3F000000; + fma.rn.f32 %f162, %f617, 0f3F000000, 0f3F000000; + fma.rn.f32 %f163, %f619, 0f3F000000, 0f3F000000; + ld.global.u32 %r276, [additive]; + setp.eq.s32 %p94, %r276, 0; + // inline asm + { cvt.rn.f16.f32 %rs42, %f600;} + + // inline asm + @%p94 bra BB0_102; + + mov.u64 %rd271, 0; + mov.u32 %r335, 2; + mov.u64 %rd120, image_RNM1; + cvta.global.u64 %rd109, %rd120; + mov.u32 %r280, 8; + // inline asm + call (%rd108), _rt_buffer_get_64, (%rd109, %r335, %r280, %rd16, %rd17, %rd271, %rd271); + // inline asm + ld.v4.u16 {%rs49, %rs50, %rs51, %rs52}, [%rd108]; + // inline asm + { cvt.f32.f16 %f620, %rs49;} + + // inline asm + // inline asm + { cvt.f32.f16 %f621, %rs50;} + + // inline asm + // inline asm + { cvt.f32.f16 %f622, %rs51;} + + // inline asm + // inline asm + call (%rd114), _rt_buffer_get_64, (%rd109, %r335, %r280, %rd16, %rd17, %rd271, %rd271); + // inline asm + add.f32 %f623, %f161, %f620; + add.f32 %f624, %f162, %f621; + add.f32 %f625, %f163, %f622; + // inline asm + { cvt.rn.f16.f32 %rs48, %f625;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs47, %f624;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs46, %f623;} + + // inline asm + st.v4.u16 [%rd114], {%rs46, %rs47, %rs48, %rs42}; + bra.uni BB0_103; + +BB0_102: + mov.u64 %rd276, 0; + mov.u32 %r340, 2; + mov.u64 %rd127, image_RNM1; + cvta.global.u64 %rd122, %rd127; + mov.u32 %r282, 8; + // inline asm + call (%rd121), _rt_buffer_get_64, (%rd122, %r340, %r282, %rd16, %rd17, %rd276, %rd276); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs55, %f163;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs54, %f162;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs53, %f161;} + + // inline asm + st.v4.u16 [%rd121], {%rs53, %rs54, %rs55, %rs42}; + +BB0_103: + ld.global.u32 %r283, [additive]; + setp.eq.s32 %p95, %r283, 0; + // inline asm + { cvt.rn.f16.f32 %rs56, %f600;} + + // inline asm + @%p95 bra BB0_105; + + mov.u64 %rd272, 0; + mov.u32 %r336, 2; + mov.u64 %rd140, image_RNM2; + cvta.global.u64 %rd129, %rd140; + mov.u32 %r287, 8; + // inline asm + call (%rd128), _rt_buffer_get_64, (%rd129, %r336, %r287, %rd16, %rd17, %rd272, %rd272); + // inline asm + ld.v4.u16 {%rs63, %rs64, %rs65, %rs66}, [%rd128]; + // inline asm + { cvt.f32.f16 %f630, %rs63;} + + // inline asm + // inline asm + { cvt.f32.f16 %f631, %rs64;} + + // inline asm + // inline asm + { cvt.f32.f16 %f632, %rs65;} + + // inline asm + // inline asm + call (%rd134), _rt_buffer_get_64, (%rd129, %r336, %r287, %rd16, %rd17, %rd272, %rd272); + // inline asm + add.f32 %f633, %f161, %f630; + add.f32 %f634, %f162, %f631; + add.f32 %f635, %f163, %f632; + // inline asm + { cvt.rn.f16.f32 %rs62, %f635;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs61, %f634;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs60, %f633;} + + // inline asm + st.v4.u16 [%rd134], {%rs60, %rs61, %rs62, %rs56}; + bra.uni BB0_106; + +BB0_105: + mov.u64 %rd275, 0; + mov.u32 %r339, 2; + mov.u64 %rd147, image_RNM2; + cvta.global.u64 %rd142, %rd147; + mov.u32 %r289, 8; + // inline asm + call (%rd141), _rt_buffer_get_64, (%rd142, %r339, %r289, %rd16, %rd17, %rd275, %rd275); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs69, %f163;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs68, %f162;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs67, %f161;} + + // inline asm + st.v4.u16 [%rd141], {%rs67, %rs68, %rs69, %rs56}; + +BB0_106: + ld.global.u32 %r290, [additive]; + setp.eq.s32 %p96, %r290, 0; + // inline asm + { cvt.rn.f16.f32 %rs70, %f600;} + + // inline asm + @%p96 bra BB0_108; + + mov.u64 %rd273, 0; + mov.u32 %r337, 2; + mov.u64 %rd160, image_RNM3; + cvta.global.u64 %rd149, %rd160; + mov.u32 %r294, 8; + // inline asm + call (%rd148), _rt_buffer_get_64, (%rd149, %r337, %r294, %rd16, %rd17, %rd273, %rd273); + // inline asm + ld.v4.u16 {%rs77, %rs78, %rs79, %rs80}, [%rd148]; + // inline asm + { cvt.f32.f16 %f640, %rs77;} + + // inline asm + // inline asm + { cvt.f32.f16 %f641, %rs78;} + + // inline asm + // inline asm + { cvt.f32.f16 %f642, %rs79;} + + // inline asm + // inline asm + call (%rd154), _rt_buffer_get_64, (%rd149, %r337, %r294, %rd16, %rd17, %rd273, %rd273); + // inline asm + add.f32 %f643, %f161, %f640; + add.f32 %f644, %f162, %f641; + add.f32 %f645, %f163, %f642; + // inline asm + { cvt.rn.f16.f32 %rs76, %f645;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs75, %f644;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs74, %f643;} + + // inline asm + st.v4.u16 [%rd154], {%rs74, %rs75, %rs76, %rs70}; + bra.uni BB0_125; + +BB0_108: + mov.u64 %rd274, 0; + mov.u32 %r338, 2; + mov.u64 %rd167, image_RNM3; + cvta.global.u64 %rd162, %rd167; + mov.u32 %r296, 8; + // inline asm + call (%rd161), _rt_buffer_get_64, (%rd162, %r338, %r296, %rd16, %rd17, %rd274, %rd274); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs83, %f163;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs82, %f162;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs81, %f161;} + + // inline asm + st.v4.u16 [%rd161], {%rs81, %rs82, %rs83, %rs70}; + +BB0_125: + ret; +} + + |