summaryrefslogtreecommitdiff
path: root/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightProbeSH.ptx
diff options
context:
space:
mode:
Diffstat (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightProbeSH.ptx')
-rw-r--r--VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightProbeSH.ptx2284
1 files changed, 2284 insertions, 0 deletions
diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightProbeSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightProbeSH.ptx
new file mode 100644
index 00000000..4e98185e
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightProbeSH.ptx
@@ -0,0 +1,2284 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+ // .globl _Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 image_RNM3[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 4 .u32 samples;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightRadius;
+.global .align 4 .b8 lightPos[12];
+.global .align 4 .b8 lightColor[12];
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .u32 lightCubemap;
+.global .align 4 .b8 lightMatrix[36];
+.global .align 4 .f32 lightFalloffFakeDistanceMult;
+.global .align 4 .f32 lightFalloffMinRadiusSq;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12lightCubemapE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightMatrixE[8] = {82, 97, 121, 0, 36, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12lightCubemapE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename11lightMatrixE[10] = {77, 97, 116, 114, 105, 120, 51, 120, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12lightCubemapE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightMatrixE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12lightCubemapE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightMatrixE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12lightCubemapE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightMatrixE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+ .local .align 4 .b8 __local_depot0[4];
+ .reg .b64 %SP;
+ .reg .b64 %SPL;
+ .reg .pred %p<122>;
+ .reg .b16 %rs<221>;
+ .reg .f32 %f<879>;
+ .reg .b32 %r<245>;
+ .reg .b64 %rd<369>;
+
+
+ mov.u64 %rd368, __local_depot0;
+ cvta.local.u64 %SP, %rd368;
+ ld.global.v2.u32 {%r26, %r27}, [pixelID];
+ cvt.u64.u32 %rd12, %r26;
+ cvt.u64.u32 %rd13, %r27;
+ mov.u64 %rd16, uvnormal;
+ cvta.global.u64 %rd11, %rd16;
+ mov.u32 %r24, 2;
+ mov.u32 %r25, 4;
+ mov.u64 %rd15, 0;
+ // inline asm
+ call (%rd10), _rt_buffer_get_64, (%rd11, %r24, %r25, %rd12, %rd13, %rd15, %rd15);
+ // inline asm
+ ld.u32 %r1, [%rd10];
+ shr.u32 %r30, %r1, 16;
+ cvt.u16.u32 %rs1, %r30;
+ and.b16 %rs12, %rs1, 255;
+ cvt.u16.u32 %rs13, %r1;
+ or.b16 %rs14, %rs13, %rs12;
+ setp.eq.s16 %p6, %rs14, 0;
+ mov.f32 %f858, 0f00000000;
+ mov.f32 %f859, %f858;
+ mov.f32 %f860, %f858;
+ @%p6 bra BB0_2;
+
+ ld.u8 %rs15, [%rd10+1];
+ and.b16 %rs17, %rs13, 255;
+ cvt.rn.f32.u16 %f106, %rs17;
+ div.rn.f32 %f107, %f106, 0f437F0000;
+ fma.rn.f32 %f108, %f107, 0f40000000, 0fBF800000;
+ cvt.rn.f32.u16 %f109, %rs15;
+ div.rn.f32 %f110, %f109, 0f437F0000;
+ fma.rn.f32 %f111, %f110, 0f40000000, 0fBF800000;
+ cvt.rn.f32.u16 %f112, %rs12;
+ div.rn.f32 %f113, %f112, 0f437F0000;
+ fma.rn.f32 %f114, %f113, 0f40000000, 0fBF800000;
+ mul.f32 %f115, %f111, %f111;
+ fma.rn.f32 %f116, %f108, %f108, %f115;
+ fma.rn.f32 %f117, %f114, %f114, %f116;
+ sqrt.rn.f32 %f118, %f117;
+ rcp.rn.f32 %f119, %f118;
+ mul.f32 %f858, %f108, %f119;
+ mul.f32 %f859, %f111, %f119;
+ mul.f32 %f860, %f114, %f119;
+
+BB0_2:
+ ld.global.v2.u32 {%r31, %r32}, [pixelID];
+ ld.global.v2.u32 {%r34, %r35}, [tileInfo];
+ add.s32 %r2, %r31, %r34;
+ add.s32 %r3, %r32, %r35;
+ setp.eq.f32 %p7, %f859, 0f00000000;
+ setp.eq.f32 %p8, %f858, 0f00000000;
+ and.pred %p9, %p8, %p7;
+ setp.eq.f32 %p10, %f860, 0f00000000;
+ and.pred %p11, %p9, %p10;
+ @%p11 bra BB0_104;
+ bra.uni BB0_3;
+
+BB0_104:
+ ld.global.u32 %r244, [imageEnabled];
+ and.b32 %r193, %r244, 1;
+ setp.eq.b32 %p114, %r193, 1;
+ @!%p114 bra BB0_106;
+ bra.uni BB0_105;
+
+BB0_105:
+ cvt.u64.u32 %rd256, %r2;
+ cvt.u64.u32 %rd257, %r3;
+ mov.u64 %rd260, image;
+ cvta.global.u64 %rd255, %rd260;
+ // inline asm
+ call (%rd254), _rt_buffer_get_64, (%rd255, %r24, %r25, %rd256, %rd257, %rd15, %rd15);
+ // inline asm
+ mov.u16 %rs153, 0;
+ st.v4.u8 [%rd254], {%rs153, %rs153, %rs153, %rs153};
+ ld.global.u32 %r244, [imageEnabled];
+
+BB0_106:
+ and.b32 %r196, %r244, 8;
+ setp.eq.s32 %p115, %r196, 0;
+ @%p115 bra BB0_108;
+
+ cvt.u64.u32 %rd264, %r3;
+ cvt.u64.u32 %rd263, %r2;
+ mov.u64 %rd267, image_Mask;
+ cvta.global.u64 %rd262, %rd267;
+ // inline asm
+ call (%rd261), _rt_buffer_get_64, (%rd262, %r24, %r24, %rd263, %rd264, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f775, 0f00000000;
+ cvt.rzi.u32.f32 %r199, %f775;
+ cvt.u16.u32 %rs154, %r199;
+ mov.u16 %rs155, 0;
+ st.v2.u8 [%rd261], {%rs154, %rs155};
+ ld.global.u32 %r244, [imageEnabled];
+
+BB0_108:
+ cvt.u64.u32 %rd8, %r2;
+ cvt.u64.u32 %rd9, %r3;
+ and.b32 %r200, %r244, 4;
+ setp.eq.s32 %p116, %r200, 0;
+ @%p116 bra BB0_112;
+
+ ld.global.u32 %r201, [additive];
+ setp.eq.s32 %p117, %r201, 0;
+ @%p117 bra BB0_111;
+
+ mov.u64 %rd280, image_HDR;
+ cvta.global.u64 %rd269, %rd280;
+ mov.u32 %r205, 8;
+ // inline asm
+ call (%rd268), _rt_buffer_get_64, (%rd269, %r24, %r205, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs162, %rs163, %rs164, %rs165}, [%rd268];
+ // inline asm
+ { cvt.f32.f16 %f776, %rs162;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f777, %rs163;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f778, %rs164;}
+
+ // inline asm
+ // inline asm
+ call (%rd274), _rt_buffer_get_64, (%rd269, %r24, %r205, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f779, %f776, 0f00000000;
+ add.f32 %f780, %f777, 0f00000000;
+ add.f32 %f781, %f778, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs161, %f781;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs160, %f780;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs159, %f779;}
+
+ // inline asm
+ mov.u16 %rs166, 0;
+ st.v4.u16 [%rd274], {%rs159, %rs160, %rs161, %rs166};
+ bra.uni BB0_112;
+
+BB0_3:
+ ld.global.v2.u32 {%r41, %r42}, [pixelID];
+ cvt.u64.u32 %rd19, %r41;
+ cvt.u64.u32 %rd20, %r42;
+ mov.u64 %rd23, uvpos;
+ cvta.global.u64 %rd18, %rd23;
+ mov.u32 %r40, 12;
+ // inline asm
+ call (%rd17), _rt_buffer_get_64, (%rd18, %r24, %r40, %rd19, %rd20, %rd15, %rd15);
+ // inline asm
+ ld.global.f32 %f122, [lightPos];
+ ld.f32 %f9, [%rd17+8];
+ ld.f32 %f8, [%rd17+4];
+ ld.f32 %f7, [%rd17];
+ sub.f32 %f123, %f122, %f7;
+ ld.global.f32 %f124, [lightPos+4];
+ sub.f32 %f125, %f124, %f8;
+ ld.global.f32 %f126, [lightPos+8];
+ sub.f32 %f127, %f126, %f9;
+ mul.f32 %f128, %f125, %f125;
+ fma.rn.f32 %f129, %f123, %f123, %f128;
+ fma.rn.f32 %f130, %f127, %f127, %f129;
+ sqrt.rn.f32 %f131, %f130;
+ rcp.rn.f32 %f132, %f131;
+ mul.f32 %f10, %f123, %f132;
+ mul.f32 %f11, %f125, %f132;
+ mul.f32 %f12, %f127, %f132;
+ ld.global.f32 %f133, [lightFalloffFakeDistanceMult];
+ mul.f32 %f13, %f131, %f133;
+ ld.global.f32 %f134, [lightInvCutoff];
+ mul.f32 %f14, %f131, %f134;
+ mov.f32 %f138, 0f40800000;
+ abs.f32 %f16, %f14;
+ setp.lt.f32 %p12, %f16, 0f00800000;
+ mul.f32 %f140, %f16, 0f4B800000;
+ selp.f32 %f141, 0fC3170000, 0fC2FE0000, %p12;
+ selp.f32 %f142, %f140, %f16, %p12;
+ mov.b32 %r45, %f142;
+ and.b32 %r46, %r45, 8388607;
+ or.b32 %r47, %r46, 1065353216;
+ mov.b32 %f143, %r47;
+ shr.u32 %r48, %r45, 23;
+ cvt.rn.f32.u32 %f144, %r48;
+ add.f32 %f145, %f141, %f144;
+ setp.gt.f32 %p13, %f143, 0f3FB504F3;
+ mul.f32 %f146, %f143, 0f3F000000;
+ add.f32 %f147, %f145, 0f3F800000;
+ selp.f32 %f148, %f146, %f143, %p13;
+ selp.f32 %f149, %f147, %f145, %p13;
+ add.f32 %f150, %f148, 0fBF800000;
+ add.f32 %f121, %f148, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f120,%f121;
+ // inline asm
+ add.f32 %f151, %f150, %f150;
+ mul.f32 %f152, %f120, %f151;
+ mul.f32 %f153, %f152, %f152;
+ mov.f32 %f154, 0f3C4CAF63;
+ mov.f32 %f155, 0f3B18F0FE;
+ fma.rn.f32 %f156, %f155, %f153, %f154;
+ mov.f32 %f157, 0f3DAAAABD;
+ fma.rn.f32 %f158, %f156, %f153, %f157;
+ mul.rn.f32 %f159, %f158, %f153;
+ mul.rn.f32 %f160, %f159, %f152;
+ sub.f32 %f161, %f150, %f152;
+ neg.f32 %f162, %f152;
+ add.f32 %f163, %f161, %f161;
+ fma.rn.f32 %f164, %f162, %f150, %f163;
+ mul.rn.f32 %f165, %f120, %f164;
+ add.f32 %f166, %f160, %f152;
+ sub.f32 %f167, %f152, %f166;
+ add.f32 %f168, %f160, %f167;
+ add.f32 %f169, %f165, %f168;
+ add.f32 %f170, %f166, %f169;
+ sub.f32 %f171, %f166, %f170;
+ add.f32 %f172, %f169, %f171;
+ mov.f32 %f173, 0f3F317200;
+ mul.rn.f32 %f174, %f149, %f173;
+ mov.f32 %f175, 0f35BFBE8E;
+ mul.rn.f32 %f176, %f149, %f175;
+ add.f32 %f177, %f174, %f170;
+ sub.f32 %f178, %f174, %f177;
+ add.f32 %f179, %f170, %f178;
+ add.f32 %f180, %f172, %f179;
+ add.f32 %f181, %f176, %f180;
+ add.f32 %f182, %f177, %f181;
+ sub.f32 %f183, %f177, %f182;
+ add.f32 %f184, %f181, %f183;
+ mul.rn.f32 %f185, %f138, %f182;
+ neg.f32 %f186, %f185;
+ fma.rn.f32 %f187, %f138, %f182, %f186;
+ fma.rn.f32 %f188, %f138, %f184, %f187;
+ mov.f32 %f189, 0f00000000;
+ fma.rn.f32 %f190, %f189, %f182, %f188;
+ add.rn.f32 %f191, %f185, %f190;
+ neg.f32 %f192, %f191;
+ add.rn.f32 %f193, %f185, %f192;
+ add.rn.f32 %f194, %f193, %f190;
+ mov.b32 %r49, %f191;
+ setp.eq.s32 %p14, %r49, 1118925336;
+ add.s32 %r50, %r49, -1;
+ mov.b32 %f195, %r50;
+ add.f32 %f196, %f194, 0f37000000;
+ selp.f32 %f197, %f195, %f191, %p14;
+ selp.f32 %f17, %f196, %f194, %p14;
+ mul.f32 %f198, %f197, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f199, %f198;
+ mov.f32 %f200, 0fBF317200;
+ fma.rn.f32 %f201, %f199, %f200, %f197;
+ mov.f32 %f202, 0fB5BFBE8E;
+ fma.rn.f32 %f203, %f199, %f202, %f201;
+ mul.f32 %f204, %f203, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f205, %f204;
+ add.f32 %f206, %f199, 0f00000000;
+ ex2.approx.f32 %f207, %f206;
+ mul.f32 %f208, %f205, %f207;
+ setp.lt.f32 %p15, %f197, 0fC2D20000;
+ selp.f32 %f209, 0f00000000, %f208, %p15;
+ setp.gt.f32 %p16, %f197, 0f42D20000;
+ selp.f32 %f861, 0f7F800000, %f209, %p16;
+ setp.eq.f32 %p17, %f861, 0f7F800000;
+ @%p17 bra BB0_5;
+
+ fma.rn.f32 %f861, %f861, %f17, %f861;
+
+BB0_5:
+ mov.f32 %f816, 0f40000000;
+ cvt.rzi.f32.f32 %f815, %f816;
+ add.f32 %f814, %f815, %f815;
+ mov.f32 %f813, 0f40800000;
+ sub.f32 %f812, %f813, %f814;
+ abs.f32 %f811, %f812;
+ setp.lt.f32 %p18, %f14, 0f00000000;
+ setp.eq.f32 %p19, %f811, 0f3F800000;
+ and.pred %p1, %p18, %p19;
+ mov.b32 %r51, %f861;
+ xor.b32 %r52, %r51, -2147483648;
+ mov.b32 %f210, %r52;
+ selp.f32 %f863, %f210, %f861, %p1;
+ setp.eq.f32 %p20, %f14, 0f00000000;
+ @%p20 bra BB0_8;
+ bra.uni BB0_6;
+
+BB0_8:
+ add.f32 %f213, %f14, %f14;
+ selp.f32 %f863, %f213, 0f00000000, %p19;
+ bra.uni BB0_9;
+
+BB0_6:
+ setp.geu.f32 %p21, %f14, 0f00000000;
+ @%p21 bra BB0_9;
+
+ mov.f32 %f849, 0f40800000;
+ cvt.rzi.f32.f32 %f212, %f849;
+ setp.neu.f32 %p22, %f212, 0f40800000;
+ selp.f32 %f863, 0f7FFFFFFF, %f863, %p22;
+
+BB0_9:
+ abs.f32 %f817, %f14;
+ add.f32 %f214, %f817, 0f40800000;
+ mov.b32 %r53, %f214;
+ setp.lt.s32 %p24, %r53, 2139095040;
+ @%p24 bra BB0_14;
+
+ abs.f32 %f847, %f14;
+ setp.gtu.f32 %p25, %f847, 0f7F800000;
+ @%p25 bra BB0_13;
+ bra.uni BB0_11;
+
+BB0_13:
+ add.f32 %f863, %f14, 0f40800000;
+ bra.uni BB0_14;
+
+BB0_11:
+ abs.f32 %f848, %f14;
+ setp.neu.f32 %p26, %f848, 0f7F800000;
+ @%p26 bra BB0_14;
+
+ selp.f32 %f863, 0fFF800000, 0f7F800000, %p1;
+
+BB0_14:
+ mov.f32 %f866, 0f3F800000;
+ sub.f32 %f223, %f866, %f863;
+ setp.eq.f32 %p27, %f14, 0f3F800000;
+ selp.f32 %f224, 0f00000000, %f223, %p27;
+ cvt.sat.f32.f32 %f225, %f224;
+ ld.global.f32 %f226, [lightFalloffMinRadiusSq];
+ fma.rn.f32 %f227, %f13, %f13, %f226;
+ div.rn.f32 %f28, %f225, %f227;
+ mul.f32 %f228, %f859, %f11;
+ fma.rn.f32 %f229, %f858, %f10, %f228;
+ fma.rn.f32 %f230, %f860, %f12, %f229;
+ ld.global.u32 %r57, [imageEnabled];
+ and.b32 %r58, %r57, 32;
+ ld.global.u32 %r59, [ignoreNormal];
+ or.b32 %r60, %r58, %r59;
+ setp.eq.s32 %p28, %r60, 0;
+ selp.f32 %f29, %f230, 0f3F800000, %p28;
+ ld.global.f32 %f231, [lightMatrix];
+ fma.rn.f32 %f232, %f231, %f10, 0f00000000;
+ ld.global.f32 %f233, [lightMatrix+4];
+ fma.rn.f32 %f234, %f233, %f11, %f232;
+ ld.global.f32 %f235, [lightMatrix+8];
+ fma.rn.f32 %f221, %f235, %f12, %f234;
+ ld.global.f32 %f236, [lightMatrix+12];
+ fma.rn.f32 %f237, %f236, %f10, 0f00000000;
+ ld.global.f32 %f238, [lightMatrix+16];
+ fma.rn.f32 %f239, %f238, %f11, %f237;
+ ld.global.f32 %f240, [lightMatrix+20];
+ fma.rn.f32 %f220, %f240, %f12, %f239;
+ ld.global.f32 %f241, [lightMatrix+24];
+ fma.rn.f32 %f242, %f241, %f10, 0f00000000;
+ ld.global.f32 %f243, [lightMatrix+28];
+ fma.rn.f32 %f244, %f243, %f11, %f242;
+ ld.global.f32 %f245, [lightMatrix+32];
+ fma.rn.f32 %f219, %f245, %f12, %f244;
+ ld.global.u32 %r54, [lightCubemap];
+ mov.u32 %r55, 6;
+ mov.u32 %r237, 0;
+ // inline asm
+ call (%f215, %f216, %f217, %f218), _rt_texture_get_base_id, (%r54, %r55, %f219, %f220, %f221, %r237);
+ // inline asm
+ max.f32 %f246, %f215, %f216;
+ max.f32 %f247, %f246, %f217;
+ mul.f32 %f248, %f28, %f247;
+ ld.global.f32 %f249, [lightColor+4];
+ ld.global.f32 %f250, [lightColor];
+ max.f32 %f251, %f250, %f249;
+ ld.global.f32 %f252, [lightColor+8];
+ max.f32 %f253, %f251, %f252;
+ mul.f32 %f254, %f248, %f253;
+ setp.lt.f32 %p29, %f254, 0f3727C5AC;
+ @%p29 bra BB0_84;
+ bra.uni BB0_15;
+
+BB0_84:
+ ld.global.u32 %r242, [imageEnabled];
+ and.b32 %r150, %r242, 1;
+ setp.eq.b32 %p106, %r150, 1;
+ @!%p106 bra BB0_86;
+ bra.uni BB0_85;
+
+BB0_85:
+ cvt.u64.u32 %rd142, %r2;
+ cvt.u64.u32 %rd143, %r3;
+ mov.u64 %rd146, image;
+ cvta.global.u64 %rd141, %rd146;
+ // inline asm
+ call (%rd140), _rt_buffer_get_64, (%rd141, %r24, %r25, %rd142, %rd143, %rd15, %rd15);
+ // inline asm
+ mov.u16 %rs89, 1;
+ mov.u16 %rs90, 0;
+ st.v4.u8 [%rd140], {%rs90, %rs90, %rs90, %rs89};
+ ld.global.u32 %r242, [imageEnabled];
+
+BB0_86:
+ and.b32 %r153, %r242, 8;
+ setp.eq.s32 %p107, %r153, 0;
+ @%p107 bra BB0_88;
+
+ cvt.u64.u32 %rd150, %r3;
+ cvt.u64.u32 %rd149, %r2;
+ mov.u64 %rd153, image_Mask;
+ cvta.global.u64 %rd148, %rd153;
+ // inline asm
+ call (%rd147), _rt_buffer_get_64, (%rd148, %r24, %r24, %rd149, %rd150, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f732, 0f00000000;
+ cvt.rzi.u32.f32 %r156, %f732;
+ cvt.u16.u32 %rs91, %r156;
+ mov.u16 %rs92, 255;
+ st.v2.u8 [%rd147], {%rs91, %rs92};
+ ld.global.u32 %r242, [imageEnabled];
+
+BB0_88:
+ cvt.u64.u32 %rd6, %r2;
+ cvt.u64.u32 %rd7, %r3;
+ and.b32 %r157, %r242, 4;
+ setp.eq.s32 %p108, %r157, 0;
+ @%p108 bra BB0_92;
+
+ ld.global.u32 %r158, [additive];
+ setp.eq.s32 %p109, %r158, 0;
+ mov.f32 %f733, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs93, %f733;}
+
+ // inline asm
+ @%p109 bra BB0_91;
+
+ mov.u64 %rd166, image_HDR;
+ cvta.global.u64 %rd155, %rd166;
+ mov.u32 %r162, 8;
+ // inline asm
+ call (%rd154), _rt_buffer_get_64, (%rd155, %r24, %r162, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs100, %rs101, %rs102, %rs103}, [%rd154];
+ // inline asm
+ { cvt.f32.f16 %f734, %rs100;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f735, %rs101;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f736, %rs102;}
+
+ // inline asm
+ // inline asm
+ call (%rd160), _rt_buffer_get_64, (%rd155, %r24, %r162, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f737, %f734, 0f00000000;
+ add.f32 %f738, %f735, 0f00000000;
+ add.f32 %f739, %f736, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs99, %f739;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs98, %f738;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs97, %f737;}
+
+ // inline asm
+ st.v4.u16 [%rd160], {%rs97, %rs98, %rs99, %rs93};
+ bra.uni BB0_92;
+
+BB0_15:
+ mov.f32 %f865, 0f00000000;
+ mul.f32 %f256, %f7, 0f3456BF95;
+ abs.f32 %f257, %f858;
+ div.rn.f32 %f258, %f256, %f257;
+ abs.f32 %f259, %f859;
+ mul.f32 %f260, %f8, 0f3456BF95;
+ div.rn.f32 %f261, %f260, %f259;
+ abs.f32 %f262, %f860;
+ mul.f32 %f263, %f9, 0f3456BF95;
+ div.rn.f32 %f264, %f263, %f262;
+ abs.f32 %f265, %f258;
+ abs.f32 %f266, %f261;
+ abs.f32 %f267, %f264;
+ mov.f32 %f268, 0f38D1B717;
+ max.f32 %f269, %f265, %f268;
+ max.f32 %f270, %f266, %f268;
+ max.f32 %f271, %f267, %f268;
+ fma.rn.f32 %f33, %f858, %f269, %f7;
+ fma.rn.f32 %f34, %f859, %f270, %f8;
+ fma.rn.f32 %f35, %f860, %f271, %f9;
+ ld.global.u32 %r238, [samples];
+ setp.lt.s32 %p30, %r238, 1;
+ @%p30 bra BB0_18;
+
+ mul.f32 %f273, %f33, 0f3456BF95;
+ abs.f32 %f274, %f273;
+ mul.f32 %f275, %f34, 0f3456BF95;
+ abs.f32 %f276, %f275;
+ mul.f32 %f277, %f35, 0f3456BF95;
+ abs.f32 %f278, %f277;
+ max.f32 %f279, %f274, %f276;
+ max.f32 %f280, %f279, %f278;
+ max.f32 %f36, %f280, %f268;
+ add.u64 %rd24, %SP, 0;
+ cvta.to.local.u64 %rd2, %rd24;
+ mov.f32 %f865, 0f00000000;
+
+BB0_17:
+ cvt.rn.f32.s32 %f290, %r237;
+ mul.f32 %f291, %f290, 0f3DD32618;
+ cvt.rmi.f32.f32 %f292, %f291;
+ sub.f32 %f293, %f291, %f292;
+ mul.f32 %f294, %f290, 0f3DD2F1AA;
+ cvt.rmi.f32.f32 %f295, %f294;
+ sub.f32 %f296, %f294, %f295;
+ mul.f32 %f297, %f290, 0f3DC74539;
+ cvt.rmi.f32.f32 %f298, %f297;
+ sub.f32 %f299, %f297, %f298;
+ add.f32 %f300, %f296, 0f4199851F;
+ add.f32 %f301, %f299, 0f4199851F;
+ add.f32 %f302, %f293, 0f4199851F;
+ mul.f32 %f303, %f296, %f301;
+ fma.rn.f32 %f304, %f293, %f300, %f303;
+ fma.rn.f32 %f305, %f302, %f299, %f304;
+ add.f32 %f306, %f293, %f305;
+ add.f32 %f307, %f296, %f305;
+ add.f32 %f308, %f299, %f305;
+ add.f32 %f309, %f306, %f307;
+ mul.f32 %f310, %f308, %f309;
+ cvt.rmi.f32.f32 %f311, %f310;
+ sub.f32 %f312, %f310, %f311;
+ add.f32 %f313, %f306, %f308;
+ mul.f32 %f314, %f307, %f313;
+ cvt.rmi.f32.f32 %f315, %f314;
+ sub.f32 %f316, %f314, %f315;
+ add.f32 %f317, %f307, %f308;
+ mul.f32 %f318, %f306, %f317;
+ cvt.rmi.f32.f32 %f319, %f318;
+ sub.f32 %f320, %f318, %f319;
+ fma.rn.f32 %f321, %f312, 0f40000000, 0fBF800000;
+ fma.rn.f32 %f322, %f316, 0f40000000, 0fBF800000;
+ fma.rn.f32 %f323, %f320, 0f40000000, 0fBF800000;
+ ld.global.f32 %f324, [lightRadius];
+ ld.global.f32 %f325, [lightPos];
+ fma.rn.f32 %f326, %f324, %f321, %f325;
+ ld.global.f32 %f327, [lightPos+4];
+ fma.rn.f32 %f328, %f324, %f322, %f327;
+ ld.global.f32 %f329, [lightPos+8];
+ fma.rn.f32 %f330, %f324, %f323, %f329;
+ sub.f32 %f331, %f326, %f7;
+ sub.f32 %f332, %f328, %f8;
+ sub.f32 %f333, %f330, %f9;
+ mul.f32 %f334, %f332, %f332;
+ fma.rn.f32 %f335, %f331, %f331, %f334;
+ fma.rn.f32 %f336, %f333, %f333, %f335;
+ sqrt.rn.f32 %f289, %f336;
+ rcp.rn.f32 %f337, %f289;
+ mul.f32 %f285, %f337, %f331;
+ mul.f32 %f286, %f337, %f332;
+ mul.f32 %f287, %f337, %f333;
+ ld.global.u32 %r65, [imageEnabled];
+ and.b32 %r66, %r65, 32;
+ setp.eq.s32 %p31, %r66, 0;
+ selp.f32 %f338, 0f3F800000, 0f41200000, %p31;
+ mul.f32 %f288, %f338, %f36;
+ mov.u32 %r67, 1065353216;
+ st.local.u32 [%rd2], %r67;
+ ld.global.u32 %r62, [root];
+ mov.u32 %r63, 1;
+ // inline asm
+ call _rt_trace_64, (%r62, %f33, %f34, %f35, %f285, %f286, %f287, %r63, %f288, %f289, %rd24, %r25);
+ // inline asm
+ ld.local.f32 %f339, [%rd2];
+ add.f32 %f865, %f865, %f339;
+ ld.global.u32 %r238, [samples];
+ add.s32 %r237, %r237, 1;
+ setp.lt.s32 %p32, %r237, %r238;
+ @%p32 bra BB0_17;
+
+BB0_18:
+ setp.eq.s32 %p33, %r238, 0;
+ @%p33 bra BB0_20;
+
+ cvt.rn.f32.s32 %f341, %r238;
+ div.rn.f32 %f866, %f865, %f341;
+
+BB0_20:
+ cvt.sat.f32.f32 %f342, %f29;
+ mul.f32 %f343, %f28, %f342;
+ mul.f32 %f344, %f866, %f343;
+ ld.global.f32 %f345, [lightColor];
+ mul.f32 %f346, %f345, %f344;
+ ld.global.f32 %f347, [lightColor+4];
+ mul.f32 %f348, %f347, %f344;
+ ld.global.f32 %f349, [lightColor+8];
+ mul.f32 %f350, %f344, %f349;
+ mul.f32 %f42, %f215, %f346;
+ mul.f32 %f43, %f216, %f348;
+ mul.f32 %f44, %f217, %f350;
+ ld.global.u32 %r240, [imageEnabled];
+ and.b32 %r68, %r240, 8;
+ setp.eq.s32 %p34, %r68, 0;
+ @%p34 bra BB0_33;
+
+ mov.f32 %f825, 0fB5BFBE8E;
+ mov.f32 %f824, 0fBF317200;
+ mov.f32 %f823, 0f35BFBE8E;
+ mov.f32 %f822, 0f3F317200;
+ mov.f32 %f821, 0f3DAAAABD;
+ mov.f32 %f820, 0f3C4CAF63;
+ mov.f32 %f819, 0f3B18F0FE;
+ cvt.u64.u32 %rd28, %r2;
+ cvt.u64.u32 %rd29, %r3;
+ mov.u64 %rd32, image_Mask;
+ cvta.global.u64 %rd27, %rd32;
+ // inline asm
+ call (%rd26), _rt_buffer_get_64, (%rd27, %r24, %r24, %rd28, %rd29, %rd15, %rd15);
+ // inline asm
+ abs.f32 %f46, %f866;
+ setp.lt.f32 %p35, %f46, 0f00800000;
+ mul.f32 %f356, %f46, 0f4B800000;
+ selp.f32 %f357, 0fC3170000, 0fC2FE0000, %p35;
+ selp.f32 %f358, %f356, %f46, %p35;
+ mov.b32 %r71, %f358;
+ and.b32 %r72, %r71, 8388607;
+ or.b32 %r73, %r72, 1065353216;
+ mov.b32 %f359, %r73;
+ shr.u32 %r74, %r71, 23;
+ cvt.rn.f32.u32 %f360, %r74;
+ add.f32 %f361, %f357, %f360;
+ setp.gt.f32 %p36, %f359, 0f3FB504F3;
+ mul.f32 %f362, %f359, 0f3F000000;
+ add.f32 %f363, %f361, 0f3F800000;
+ selp.f32 %f364, %f362, %f359, %p36;
+ selp.f32 %f365, %f363, %f361, %p36;
+ add.f32 %f366, %f364, 0fBF800000;
+ add.f32 %f352, %f364, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f351,%f352;
+ // inline asm
+ add.f32 %f367, %f366, %f366;
+ mul.f32 %f368, %f351, %f367;
+ mul.f32 %f369, %f368, %f368;
+ fma.rn.f32 %f372, %f819, %f369, %f820;
+ fma.rn.f32 %f374, %f372, %f369, %f821;
+ mul.rn.f32 %f375, %f374, %f369;
+ mul.rn.f32 %f376, %f375, %f368;
+ sub.f32 %f377, %f366, %f368;
+ neg.f32 %f378, %f368;
+ add.f32 %f379, %f377, %f377;
+ fma.rn.f32 %f380, %f378, %f366, %f379;
+ mul.rn.f32 %f381, %f351, %f380;
+ add.f32 %f382, %f376, %f368;
+ sub.f32 %f383, %f368, %f382;
+ add.f32 %f384, %f376, %f383;
+ add.f32 %f385, %f381, %f384;
+ add.f32 %f386, %f382, %f385;
+ sub.f32 %f387, %f382, %f386;
+ add.f32 %f388, %f385, %f387;
+ mul.rn.f32 %f390, %f365, %f822;
+ mul.rn.f32 %f392, %f365, %f823;
+ add.f32 %f393, %f390, %f386;
+ sub.f32 %f394, %f390, %f393;
+ add.f32 %f395, %f386, %f394;
+ add.f32 %f396, %f388, %f395;
+ add.f32 %f397, %f392, %f396;
+ add.f32 %f398, %f393, %f397;
+ sub.f32 %f399, %f393, %f398;
+ add.f32 %f400, %f397, %f399;
+ mov.f32 %f401, 0f3EE8BA2E;
+ mul.rn.f32 %f402, %f401, %f398;
+ neg.f32 %f403, %f402;
+ fma.rn.f32 %f404, %f401, %f398, %f403;
+ fma.rn.f32 %f405, %f401, %f400, %f404;
+ mov.f32 %f406, 0f00000000;
+ fma.rn.f32 %f407, %f406, %f398, %f405;
+ add.rn.f32 %f408, %f402, %f407;
+ neg.f32 %f409, %f408;
+ add.rn.f32 %f410, %f402, %f409;
+ add.rn.f32 %f411, %f410, %f407;
+ mov.b32 %r75, %f408;
+ setp.eq.s32 %p37, %r75, 1118925336;
+ add.s32 %r76, %r75, -1;
+ mov.b32 %f412, %r76;
+ add.f32 %f413, %f411, 0f37000000;
+ selp.f32 %f414, %f412, %f408, %p37;
+ selp.f32 %f47, %f413, %f411, %p37;
+ mul.f32 %f415, %f414, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f416, %f415;
+ fma.rn.f32 %f418, %f416, %f824, %f414;
+ fma.rn.f32 %f420, %f416, %f825, %f418;
+ mul.f32 %f421, %f420, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f422, %f421;
+ add.f32 %f423, %f416, 0f00000000;
+ ex2.approx.f32 %f424, %f423;
+ mul.f32 %f425, %f422, %f424;
+ setp.lt.f32 %p38, %f414, 0fC2D20000;
+ selp.f32 %f426, 0f00000000, %f425, %p38;
+ setp.gt.f32 %p39, %f414, 0f42D20000;
+ selp.f32 %f867, 0f7F800000, %f426, %p39;
+ setp.eq.f32 %p40, %f867, 0f7F800000;
+ @%p40 bra BB0_23;
+
+ fma.rn.f32 %f867, %f867, %f47, %f867;
+
+BB0_23:
+ mov.f32 %f853, 0f3E68BA2E;
+ cvt.rzi.f32.f32 %f852, %f853;
+ fma.rn.f32 %f851, %f852, 0fC0000000, 0f3EE8BA2E;
+ abs.f32 %f850, %f851;
+ setp.lt.f32 %p41, %f866, 0f00000000;
+ setp.eq.f32 %p42, %f850, 0f3F800000;
+ and.pred %p2, %p41, %p42;
+ mov.b32 %r77, %f867;
+ xor.b32 %r78, %r77, -2147483648;
+ mov.b32 %f427, %r78;
+ selp.f32 %f869, %f427, %f867, %p2;
+ setp.eq.f32 %p43, %f866, 0f00000000;
+ @%p43 bra BB0_26;
+ bra.uni BB0_24;
+
+BB0_26:
+ add.f32 %f430, %f866, %f866;
+ selp.f32 %f869, %f430, 0f00000000, %p42;
+ bra.uni BB0_27;
+
+BB0_111:
+ mov.u64 %rd287, image_HDR;
+ cvta.global.u64 %rd282, %rd287;
+ mov.u32 %r207, 8;
+ // inline asm
+ call (%rd281), _rt_buffer_get_64, (%rd282, %r24, %r207, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f782, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs167, %f782;}
+
+ // inline asm
+ mov.u16 %rs168, 0;
+ st.v4.u16 [%rd281], {%rs167, %rs167, %rs167, %rs168};
+
+BB0_112:
+ ld.global.u32 %r208, [additive];
+ setp.eq.s32 %p118, %r208, 0;
+ @%p118 bra BB0_114;
+
+ mov.u64 %rd300, image_RNM0;
+ cvta.global.u64 %rd289, %rd300;
+ mov.u32 %r212, 8;
+ // inline asm
+ call (%rd288), _rt_buffer_get_64, (%rd289, %r24, %r212, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs175, %rs176, %rs177, %rs178}, [%rd288];
+ // inline asm
+ { cvt.f32.f16 %f783, %rs175;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f784, %rs176;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f785, %rs177;}
+
+ // inline asm
+ // inline asm
+ call (%rd294), _rt_buffer_get_64, (%rd289, %r24, %r212, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f786, %f783, 0f00000000;
+ add.f32 %f787, %f784, 0f00000000;
+ add.f32 %f788, %f785, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs174, %f788;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs173, %f787;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs172, %f786;}
+
+ // inline asm
+ mov.u16 %rs179, 0;
+ st.v4.u16 [%rd294], {%rs172, %rs173, %rs174, %rs179};
+ bra.uni BB0_115;
+
+BB0_114:
+ mov.u64 %rd307, image_RNM0;
+ cvta.global.u64 %rd302, %rd307;
+ mov.u32 %r214, 8;
+ // inline asm
+ call (%rd301), _rt_buffer_get_64, (%rd302, %r24, %r214, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f789, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs180, %f789;}
+
+ // inline asm
+ mov.u16 %rs181, 0;
+ st.v4.u16 [%rd301], {%rs180, %rs180, %rs180, %rs181};
+
+BB0_115:
+ ld.global.u32 %r215, [additive];
+ setp.eq.s32 %p119, %r215, 0;
+ @%p119 bra BB0_117;
+
+ mov.u64 %rd320, image_RNM1;
+ cvta.global.u64 %rd309, %rd320;
+ mov.u32 %r219, 8;
+ // inline asm
+ call (%rd308), _rt_buffer_get_64, (%rd309, %r24, %r219, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs188, %rs189, %rs190, %rs191}, [%rd308];
+ // inline asm
+ { cvt.f32.f16 %f790, %rs188;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f791, %rs189;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f792, %rs190;}
+
+ // inline asm
+ // inline asm
+ call (%rd314), _rt_buffer_get_64, (%rd309, %r24, %r219, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f793, %f790, 0f00000000;
+ add.f32 %f794, %f791, 0f00000000;
+ add.f32 %f795, %f792, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs187, %f795;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs186, %f794;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs185, %f793;}
+
+ // inline asm
+ mov.u16 %rs192, 0;
+ st.v4.u16 [%rd314], {%rs185, %rs186, %rs187, %rs192};
+ bra.uni BB0_118;
+
+BB0_117:
+ mov.u64 %rd327, image_RNM1;
+ cvta.global.u64 %rd322, %rd327;
+ mov.u32 %r221, 8;
+ // inline asm
+ call (%rd321), _rt_buffer_get_64, (%rd322, %r24, %r221, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f796, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs193, %f796;}
+
+ // inline asm
+ mov.u16 %rs194, 0;
+ st.v4.u16 [%rd321], {%rs193, %rs193, %rs193, %rs194};
+
+BB0_118:
+ ld.global.u32 %r222, [additive];
+ setp.eq.s32 %p120, %r222, 0;
+ @%p120 bra BB0_120;
+
+ mov.u64 %rd340, image_RNM2;
+ cvta.global.u64 %rd329, %rd340;
+ mov.u32 %r226, 8;
+ // inline asm
+ call (%rd328), _rt_buffer_get_64, (%rd329, %r24, %r226, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs201, %rs202, %rs203, %rs204}, [%rd328];
+ // inline asm
+ { cvt.f32.f16 %f797, %rs201;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f798, %rs202;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f799, %rs203;}
+
+ // inline asm
+ // inline asm
+ call (%rd334), _rt_buffer_get_64, (%rd329, %r24, %r226, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f800, %f797, 0f00000000;
+ add.f32 %f801, %f798, 0f00000000;
+ add.f32 %f802, %f799, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs200, %f802;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs199, %f801;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs198, %f800;}
+
+ // inline asm
+ mov.u16 %rs205, 0;
+ st.v4.u16 [%rd334], {%rs198, %rs199, %rs200, %rs205};
+ bra.uni BB0_121;
+
+BB0_120:
+ mov.u64 %rd347, image_RNM2;
+ cvta.global.u64 %rd342, %rd347;
+ mov.u32 %r228, 8;
+ // inline asm
+ call (%rd341), _rt_buffer_get_64, (%rd342, %r24, %r228, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f803, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs206, %f803;}
+
+ // inline asm
+ mov.u16 %rs207, 0;
+ st.v4.u16 [%rd341], {%rs206, %rs206, %rs206, %rs207};
+
+BB0_121:
+ ld.global.u32 %r229, [additive];
+ setp.eq.s32 %p121, %r229, 0;
+ @%p121 bra BB0_123;
+
+ mov.u64 %rd360, image_RNM3;
+ cvta.global.u64 %rd349, %rd360;
+ mov.u32 %r233, 8;
+ // inline asm
+ call (%rd348), _rt_buffer_get_64, (%rd349, %r24, %r233, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs214, %rs215, %rs216, %rs217}, [%rd348];
+ // inline asm
+ { cvt.f32.f16 %f804, %rs214;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f805, %rs215;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f806, %rs216;}
+
+ // inline asm
+ // inline asm
+ call (%rd354), _rt_buffer_get_64, (%rd349, %r24, %r233, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f807, %f804, 0f00000000;
+ add.f32 %f808, %f805, 0f00000000;
+ add.f32 %f809, %f806, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs213, %f809;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs212, %f808;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs211, %f807;}
+
+ // inline asm
+ mov.u16 %rs218, 0;
+ st.v4.u16 [%rd354], {%rs211, %rs212, %rs213, %rs218};
+ bra.uni BB0_124;
+
+BB0_123:
+ mov.u64 %rd367, image_RNM3;
+ cvta.global.u64 %rd362, %rd367;
+ mov.u32 %r235, 8;
+ // inline asm
+ call (%rd361), _rt_buffer_get_64, (%rd362, %r24, %r235, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f810, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs219, %f810;}
+
+ // inline asm
+ mov.u16 %rs220, 0;
+ st.v4.u16 [%rd361], {%rs219, %rs219, %rs219, %rs220};
+ bra.uni BB0_124;
+
+BB0_91:
+ mov.u64 %rd173, image_HDR;
+ cvta.global.u64 %rd168, %rd173;
+ mov.u32 %r164, 8;
+ // inline asm
+ call (%rd167), _rt_buffer_get_64, (%rd168, %r24, %r164, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f740, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs104, %f740;}
+
+ // inline asm
+ st.v4.u16 [%rd167], {%rs104, %rs104, %rs104, %rs93};
+
+BB0_92:
+ ld.global.u32 %r165, [additive];
+ setp.eq.s32 %p110, %r165, 0;
+ mov.f32 %f741, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs105, %f741;}
+
+ // inline asm
+ @%p110 bra BB0_94;
+
+ mov.u64 %rd186, image_RNM0;
+ cvta.global.u64 %rd175, %rd186;
+ mov.u32 %r169, 8;
+ // inline asm
+ call (%rd174), _rt_buffer_get_64, (%rd175, %r24, %r169, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs112, %rs113, %rs114, %rs115}, [%rd174];
+ // inline asm
+ { cvt.f32.f16 %f742, %rs112;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f743, %rs113;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f744, %rs114;}
+
+ // inline asm
+ // inline asm
+ call (%rd180), _rt_buffer_get_64, (%rd175, %r24, %r169, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f745, %f742, 0f00000000;
+ add.f32 %f746, %f743, 0f00000000;
+ add.f32 %f747, %f744, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs111, %f747;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs110, %f746;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs109, %f745;}
+
+ // inline asm
+ st.v4.u16 [%rd180], {%rs109, %rs110, %rs111, %rs105};
+ bra.uni BB0_95;
+
+BB0_94:
+ mov.u64 %rd193, image_RNM0;
+ cvta.global.u64 %rd188, %rd193;
+ mov.u32 %r171, 8;
+ // inline asm
+ call (%rd187), _rt_buffer_get_64, (%rd188, %r24, %r171, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f748, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs116, %f748;}
+
+ // inline asm
+ st.v4.u16 [%rd187], {%rs116, %rs116, %rs116, %rs105};
+
+BB0_95:
+ ld.global.u32 %r172, [additive];
+ setp.eq.s32 %p111, %r172, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs117, %f741;}
+
+ // inline asm
+ @%p111 bra BB0_97;
+
+ mov.u64 %rd206, image_RNM1;
+ cvta.global.u64 %rd195, %rd206;
+ mov.u32 %r176, 8;
+ // inline asm
+ call (%rd194), _rt_buffer_get_64, (%rd195, %r24, %r176, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd194];
+ // inline asm
+ { cvt.f32.f16 %f750, %rs124;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f751, %rs125;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f752, %rs126;}
+
+ // inline asm
+ // inline asm
+ call (%rd200), _rt_buffer_get_64, (%rd195, %r24, %r176, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f753, %f750, 0f00000000;
+ add.f32 %f754, %f751, 0f00000000;
+ add.f32 %f755, %f752, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs123, %f755;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs122, %f754;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs121, %f753;}
+
+ // inline asm
+ st.v4.u16 [%rd200], {%rs121, %rs122, %rs123, %rs117};
+ bra.uni BB0_98;
+
+BB0_97:
+ mov.u64 %rd213, image_RNM1;
+ cvta.global.u64 %rd208, %rd213;
+ mov.u32 %r178, 8;
+ // inline asm
+ call (%rd207), _rt_buffer_get_64, (%rd208, %r24, %r178, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f756, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs128, %f756;}
+
+ // inline asm
+ st.v4.u16 [%rd207], {%rs128, %rs128, %rs128, %rs117};
+
+BB0_98:
+ ld.global.u32 %r179, [additive];
+ setp.eq.s32 %p112, %r179, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs129, %f741;}
+
+ // inline asm
+ @%p112 bra BB0_100;
+
+ mov.u64 %rd226, image_RNM2;
+ cvta.global.u64 %rd215, %rd226;
+ mov.u32 %r183, 8;
+ // inline asm
+ call (%rd214), _rt_buffer_get_64, (%rd215, %r24, %r183, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs136, %rs137, %rs138, %rs139}, [%rd214];
+ // inline asm
+ { cvt.f32.f16 %f758, %rs136;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f759, %rs137;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f760, %rs138;}
+
+ // inline asm
+ // inline asm
+ call (%rd220), _rt_buffer_get_64, (%rd215, %r24, %r183, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f761, %f758, 0f00000000;
+ add.f32 %f762, %f759, 0f00000000;
+ add.f32 %f763, %f760, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs135, %f763;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs134, %f762;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs133, %f761;}
+
+ // inline asm
+ st.v4.u16 [%rd220], {%rs133, %rs134, %rs135, %rs129};
+ bra.uni BB0_101;
+
+BB0_100:
+ mov.u64 %rd233, image_RNM2;
+ cvta.global.u64 %rd228, %rd233;
+ mov.u32 %r185, 8;
+ // inline asm
+ call (%rd227), _rt_buffer_get_64, (%rd228, %r24, %r185, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f764, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs140, %f764;}
+
+ // inline asm
+ st.v4.u16 [%rd227], {%rs140, %rs140, %rs140, %rs129};
+
+BB0_101:
+ ld.global.u32 %r186, [additive];
+ setp.eq.s32 %p113, %r186, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs141, %f741;}
+
+ // inline asm
+ @%p113 bra BB0_103;
+
+ mov.u64 %rd246, image_RNM3;
+ cvta.global.u64 %rd235, %rd246;
+ mov.u32 %r190, 8;
+ // inline asm
+ call (%rd234), _rt_buffer_get_64, (%rd235, %r24, %r190, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs148, %rs149, %rs150, %rs151}, [%rd234];
+ // inline asm
+ { cvt.f32.f16 %f766, %rs148;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f767, %rs149;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f768, %rs150;}
+
+ // inline asm
+ // inline asm
+ call (%rd240), _rt_buffer_get_64, (%rd235, %r24, %r190, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f769, %f766, 0f00000000;
+ add.f32 %f770, %f767, 0f00000000;
+ add.f32 %f771, %f768, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs147, %f771;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs146, %f770;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs145, %f769;}
+
+ // inline asm
+ st.v4.u16 [%rd240], {%rs145, %rs146, %rs147, %rs141};
+ bra.uni BB0_124;
+
+BB0_103:
+ mov.u64 %rd253, image_RNM3;
+ cvta.global.u64 %rd248, %rd253;
+ mov.u32 %r192, 8;
+ // inline asm
+ call (%rd247), _rt_buffer_get_64, (%rd248, %r24, %r192, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f772, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs152, %f772;}
+
+ // inline asm
+ st.v4.u16 [%rd247], {%rs152, %rs152, %rs152, %rs141};
+ bra.uni BB0_124;
+
+BB0_24:
+ setp.geu.f32 %p44, %f866, 0f00000000;
+ @%p44 bra BB0_27;
+
+ mov.f32 %f857, 0f3EE8BA2E;
+ cvt.rzi.f32.f32 %f429, %f857;
+ setp.neu.f32 %p45, %f429, 0f3EE8BA2E;
+ selp.f32 %f869, 0f7FFFFFFF, %f869, %p45;
+
+BB0_27:
+ abs.f32 %f854, %f866;
+ add.f32 %f431, %f854, 0f3EE8BA2E;
+ mov.b32 %r79, %f431;
+ setp.lt.s32 %p47, %r79, 2139095040;
+ @%p47 bra BB0_32;
+
+ abs.f32 %f855, %f866;
+ setp.gtu.f32 %p48, %f855, 0f7F800000;
+ @%p48 bra BB0_31;
+ bra.uni BB0_29;
+
+BB0_31:
+ add.f32 %f869, %f866, 0f3EE8BA2E;
+ bra.uni BB0_32;
+
+BB0_29:
+ abs.f32 %f856, %f866;
+ setp.neu.f32 %p49, %f856, 0f7F800000;
+ @%p49 bra BB0_32;
+
+ selp.f32 %f869, 0fFF800000, 0f7F800000, %p2;
+
+BB0_32:
+ mul.f32 %f432, %f869, 0f437F0000;
+ setp.eq.f32 %p50, %f866, 0f3F800000;
+ selp.f32 %f433, 0f437F0000, %f432, %p50;
+ cvt.rzi.u32.f32 %r80, %f433;
+ cvt.u16.u32 %rs19, %r80;
+ mov.u16 %rs20, 255;
+ st.v2.u8 [%rd26], {%rs19, %rs20};
+ ld.global.u32 %r240, [imageEnabled];
+
+BB0_33:
+ and.b32 %r81, %r240, 1;
+ setp.eq.b32 %p51, %r81, 1;
+ @!%p51 bra BB0_68;
+ bra.uni BB0_34;
+
+BB0_34:
+ mov.f32 %f832, 0fB5BFBE8E;
+ mov.f32 %f831, 0fBF317200;
+ mov.f32 %f830, 0f35BFBE8E;
+ mov.f32 %f829, 0f3F317200;
+ mov.f32 %f828, 0f3DAAAABD;
+ mov.f32 %f827, 0f3C4CAF63;
+ mov.f32 %f826, 0f3B18F0FE;
+ mov.f32 %f436, 0f3E666666;
+ cvt.rzi.f32.f32 %f437, %f436;
+ fma.rn.f32 %f438, %f437, 0fC0000000, 0f3EE66666;
+ abs.f32 %f58, %f438;
+ abs.f32 %f59, %f42;
+ setp.lt.f32 %p52, %f59, 0f00800000;
+ mul.f32 %f439, %f59, 0f4B800000;
+ selp.f32 %f440, 0fC3170000, 0fC2FE0000, %p52;
+ selp.f32 %f441, %f439, %f59, %p52;
+ mov.b32 %r82, %f441;
+ and.b32 %r83, %r82, 8388607;
+ or.b32 %r84, %r83, 1065353216;
+ mov.b32 %f442, %r84;
+ shr.u32 %r85, %r82, 23;
+ cvt.rn.f32.u32 %f443, %r85;
+ add.f32 %f444, %f440, %f443;
+ setp.gt.f32 %p53, %f442, 0f3FB504F3;
+ mul.f32 %f445, %f442, 0f3F000000;
+ add.f32 %f446, %f444, 0f3F800000;
+ selp.f32 %f447, %f445, %f442, %p53;
+ selp.f32 %f448, %f446, %f444, %p53;
+ add.f32 %f449, %f447, 0fBF800000;
+ add.f32 %f435, %f447, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f434,%f435;
+ // inline asm
+ add.f32 %f450, %f449, %f449;
+ mul.f32 %f451, %f434, %f450;
+ mul.f32 %f452, %f451, %f451;
+ fma.rn.f32 %f455, %f826, %f452, %f827;
+ fma.rn.f32 %f457, %f455, %f452, %f828;
+ mul.rn.f32 %f458, %f457, %f452;
+ mul.rn.f32 %f459, %f458, %f451;
+ sub.f32 %f460, %f449, %f451;
+ neg.f32 %f461, %f451;
+ add.f32 %f462, %f460, %f460;
+ fma.rn.f32 %f463, %f461, %f449, %f462;
+ mul.rn.f32 %f464, %f434, %f463;
+ add.f32 %f465, %f459, %f451;
+ sub.f32 %f466, %f451, %f465;
+ add.f32 %f467, %f459, %f466;
+ add.f32 %f468, %f464, %f467;
+ add.f32 %f469, %f465, %f468;
+ sub.f32 %f470, %f465, %f469;
+ add.f32 %f471, %f468, %f470;
+ mul.rn.f32 %f473, %f448, %f829;
+ mul.rn.f32 %f475, %f448, %f830;
+ add.f32 %f476, %f473, %f469;
+ sub.f32 %f477, %f473, %f476;
+ add.f32 %f478, %f469, %f477;
+ add.f32 %f479, %f471, %f478;
+ add.f32 %f480, %f475, %f479;
+ add.f32 %f481, %f476, %f480;
+ sub.f32 %f482, %f476, %f481;
+ add.f32 %f483, %f480, %f482;
+ mov.f32 %f484, 0f3EE66666;
+ mul.rn.f32 %f485, %f484, %f481;
+ neg.f32 %f486, %f485;
+ fma.rn.f32 %f487, %f484, %f481, %f486;
+ fma.rn.f32 %f488, %f484, %f483, %f487;
+ mov.f32 %f489, 0f00000000;
+ fma.rn.f32 %f490, %f489, %f481, %f488;
+ add.rn.f32 %f491, %f485, %f490;
+ neg.f32 %f492, %f491;
+ add.rn.f32 %f493, %f485, %f492;
+ add.rn.f32 %f494, %f493, %f490;
+ mov.b32 %r86, %f491;
+ setp.eq.s32 %p54, %r86, 1118925336;
+ add.s32 %r87, %r86, -1;
+ mov.b32 %f495, %r87;
+ add.f32 %f496, %f494, 0f37000000;
+ selp.f32 %f497, %f495, %f491, %p54;
+ selp.f32 %f60, %f496, %f494, %p54;
+ mul.f32 %f498, %f497, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f499, %f498;
+ fma.rn.f32 %f501, %f499, %f831, %f497;
+ fma.rn.f32 %f503, %f499, %f832, %f501;
+ mul.f32 %f504, %f503, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f505, %f504;
+ add.f32 %f506, %f499, 0f00000000;
+ ex2.approx.f32 %f507, %f506;
+ mul.f32 %f508, %f505, %f507;
+ setp.lt.f32 %p55, %f497, 0fC2D20000;
+ selp.f32 %f509, 0f00000000, %f508, %p55;
+ setp.gt.f32 %p56, %f497, 0f42D20000;
+ selp.f32 %f870, 0f7F800000, %f509, %p56;
+ setp.eq.f32 %p57, %f870, 0f7F800000;
+ @%p57 bra BB0_36;
+
+ fma.rn.f32 %f870, %f870, %f60, %f870;
+
+BB0_36:
+ setp.lt.f32 %p58, %f42, 0f00000000;
+ setp.eq.f32 %p59, %f58, 0f3F800000;
+ and.pred %p3, %p58, %p59;
+ mov.b32 %r88, %f870;
+ xor.b32 %r89, %r88, -2147483648;
+ mov.b32 %f510, %r89;
+ selp.f32 %f872, %f510, %f870, %p3;
+ setp.eq.f32 %p60, %f42, 0f00000000;
+ @%p60 bra BB0_39;
+ bra.uni BB0_37;
+
+BB0_39:
+ add.f32 %f513, %f42, %f42;
+ selp.f32 %f872, %f513, 0f00000000, %p59;
+ bra.uni BB0_40;
+
+BB0_37:
+ setp.geu.f32 %p61, %f42, 0f00000000;
+ @%p61 bra BB0_40;
+
+ cvt.rzi.f32.f32 %f512, %f484;
+ setp.neu.f32 %p62, %f512, 0f3EE66666;
+ selp.f32 %f872, 0f7FFFFFFF, %f872, %p62;
+
+BB0_40:
+ add.f32 %f514, %f59, 0f3EE66666;
+ mov.b32 %r90, %f514;
+ setp.lt.s32 %p64, %r90, 2139095040;
+ @%p64 bra BB0_45;
+
+ setp.gtu.f32 %p65, %f59, 0f7F800000;
+ @%p65 bra BB0_44;
+ bra.uni BB0_42;
+
+BB0_44:
+ add.f32 %f872, %f42, 0f3EE66666;
+ bra.uni BB0_45;
+
+BB0_42:
+ setp.neu.f32 %p66, %f59, 0f7F800000;
+ @%p66 bra BB0_45;
+
+ selp.f32 %f872, 0fFF800000, 0f7F800000, %p3;
+
+BB0_45:
+ mov.f32 %f839, 0fB5BFBE8E;
+ mov.f32 %f838, 0fBF317200;
+ mov.f32 %f837, 0f35BFBE8E;
+ mov.f32 %f836, 0f3F317200;
+ mov.f32 %f835, 0f3DAAAABD;
+ mov.f32 %f834, 0f3C4CAF63;
+ mov.f32 %f833, 0f3B18F0FE;
+ setp.eq.f32 %p67, %f42, 0f3F800000;
+ selp.f32 %f71, 0f3F800000, %f872, %p67;
+ abs.f32 %f72, %f43;
+ setp.lt.f32 %p68, %f72, 0f00800000;
+ mul.f32 %f517, %f72, 0f4B800000;
+ selp.f32 %f518, 0fC3170000, 0fC2FE0000, %p68;
+ selp.f32 %f519, %f517, %f72, %p68;
+ mov.b32 %r91, %f519;
+ and.b32 %r92, %r91, 8388607;
+ or.b32 %r93, %r92, 1065353216;
+ mov.b32 %f520, %r93;
+ shr.u32 %r94, %r91, 23;
+ cvt.rn.f32.u32 %f521, %r94;
+ add.f32 %f522, %f518, %f521;
+ setp.gt.f32 %p69, %f520, 0f3FB504F3;
+ mul.f32 %f523, %f520, 0f3F000000;
+ add.f32 %f524, %f522, 0f3F800000;
+ selp.f32 %f525, %f523, %f520, %p69;
+ selp.f32 %f526, %f524, %f522, %p69;
+ add.f32 %f527, %f525, 0fBF800000;
+ add.f32 %f516, %f525, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f515,%f516;
+ // inline asm
+ add.f32 %f528, %f527, %f527;
+ mul.f32 %f529, %f515, %f528;
+ mul.f32 %f530, %f529, %f529;
+ fma.rn.f32 %f533, %f833, %f530, %f834;
+ fma.rn.f32 %f535, %f533, %f530, %f835;
+ mul.rn.f32 %f536, %f535, %f530;
+ mul.rn.f32 %f537, %f536, %f529;
+ sub.f32 %f538, %f527, %f529;
+ neg.f32 %f539, %f529;
+ add.f32 %f540, %f538, %f538;
+ fma.rn.f32 %f541, %f539, %f527, %f540;
+ mul.rn.f32 %f542, %f515, %f541;
+ add.f32 %f543, %f537, %f529;
+ sub.f32 %f544, %f529, %f543;
+ add.f32 %f545, %f537, %f544;
+ add.f32 %f546, %f542, %f545;
+ add.f32 %f547, %f543, %f546;
+ sub.f32 %f548, %f543, %f547;
+ add.f32 %f549, %f546, %f548;
+ mul.rn.f32 %f551, %f526, %f836;
+ mul.rn.f32 %f553, %f526, %f837;
+ add.f32 %f554, %f551, %f547;
+ sub.f32 %f555, %f551, %f554;
+ add.f32 %f556, %f547, %f555;
+ add.f32 %f557, %f549, %f556;
+ add.f32 %f558, %f553, %f557;
+ add.f32 %f559, %f554, %f558;
+ sub.f32 %f560, %f554, %f559;
+ add.f32 %f561, %f558, %f560;
+ mul.rn.f32 %f563, %f484, %f559;
+ neg.f32 %f564, %f563;
+ fma.rn.f32 %f565, %f484, %f559, %f564;
+ fma.rn.f32 %f566, %f484, %f561, %f565;
+ fma.rn.f32 %f568, %f489, %f559, %f566;
+ add.rn.f32 %f569, %f563, %f568;
+ neg.f32 %f570, %f569;
+ add.rn.f32 %f571, %f563, %f570;
+ add.rn.f32 %f572, %f571, %f568;
+ mov.b32 %r95, %f569;
+ setp.eq.s32 %p70, %r95, 1118925336;
+ add.s32 %r96, %r95, -1;
+ mov.b32 %f573, %r96;
+ add.f32 %f574, %f572, 0f37000000;
+ selp.f32 %f575, %f573, %f569, %p70;
+ selp.f32 %f73, %f574, %f572, %p70;
+ mul.f32 %f576, %f575, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f577, %f576;
+ fma.rn.f32 %f579, %f577, %f838, %f575;
+ fma.rn.f32 %f581, %f577, %f839, %f579;
+ mul.f32 %f582, %f581, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f583, %f582;
+ add.f32 %f584, %f577, 0f00000000;
+ ex2.approx.f32 %f585, %f584;
+ mul.f32 %f586, %f583, %f585;
+ setp.lt.f32 %p71, %f575, 0fC2D20000;
+ selp.f32 %f587, 0f00000000, %f586, %p71;
+ setp.gt.f32 %p72, %f575, 0f42D20000;
+ selp.f32 %f873, 0f7F800000, %f587, %p72;
+ setp.eq.f32 %p73, %f873, 0f7F800000;
+ @%p73 bra BB0_47;
+
+ fma.rn.f32 %f873, %f873, %f73, %f873;
+
+BB0_47:
+ setp.lt.f32 %p74, %f43, 0f00000000;
+ and.pred %p4, %p74, %p59;
+ mov.b32 %r97, %f873;
+ xor.b32 %r98, %r97, -2147483648;
+ mov.b32 %f588, %r98;
+ selp.f32 %f875, %f588, %f873, %p4;
+ setp.eq.f32 %p76, %f43, 0f00000000;
+ @%p76 bra BB0_50;
+ bra.uni BB0_48;
+
+BB0_50:
+ add.f32 %f591, %f43, %f43;
+ selp.f32 %f875, %f591, 0f00000000, %p59;
+ bra.uni BB0_51;
+
+BB0_48:
+ setp.geu.f32 %p77, %f43, 0f00000000;
+ @%p77 bra BB0_51;
+
+ cvt.rzi.f32.f32 %f590, %f484;
+ setp.neu.f32 %p78, %f590, 0f3EE66666;
+ selp.f32 %f875, 0f7FFFFFFF, %f875, %p78;
+
+BB0_51:
+ add.f32 %f592, %f72, 0f3EE66666;
+ mov.b32 %r99, %f592;
+ setp.lt.s32 %p80, %r99, 2139095040;
+ @%p80 bra BB0_56;
+
+ setp.gtu.f32 %p81, %f72, 0f7F800000;
+ @%p81 bra BB0_55;
+ bra.uni BB0_53;
+
+BB0_55:
+ add.f32 %f875, %f43, 0f3EE66666;
+ bra.uni BB0_56;
+
+BB0_53:
+ setp.neu.f32 %p82, %f72, 0f7F800000;
+ @%p82 bra BB0_56;
+
+ selp.f32 %f875, 0fFF800000, 0f7F800000, %p4;
+
+BB0_56:
+ mov.f32 %f846, 0fB5BFBE8E;
+ mov.f32 %f845, 0fBF317200;
+ mov.f32 %f844, 0f35BFBE8E;
+ mov.f32 %f843, 0f3F317200;
+ mov.f32 %f842, 0f3DAAAABD;
+ mov.f32 %f841, 0f3C4CAF63;
+ mov.f32 %f840, 0f3B18F0FE;
+ setp.eq.f32 %p83, %f43, 0f3F800000;
+ selp.f32 %f84, 0f3F800000, %f875, %p83;
+ abs.f32 %f85, %f44;
+ setp.lt.f32 %p84, %f85, 0f00800000;
+ mul.f32 %f595, %f85, 0f4B800000;
+ selp.f32 %f596, 0fC3170000, 0fC2FE0000, %p84;
+ selp.f32 %f597, %f595, %f85, %p84;
+ mov.b32 %r100, %f597;
+ and.b32 %r101, %r100, 8388607;
+ or.b32 %r102, %r101, 1065353216;
+ mov.b32 %f598, %r102;
+ shr.u32 %r103, %r100, 23;
+ cvt.rn.f32.u32 %f599, %r103;
+ add.f32 %f600, %f596, %f599;
+ setp.gt.f32 %p85, %f598, 0f3FB504F3;
+ mul.f32 %f601, %f598, 0f3F000000;
+ add.f32 %f602, %f600, 0f3F800000;
+ selp.f32 %f603, %f601, %f598, %p85;
+ selp.f32 %f604, %f602, %f600, %p85;
+ add.f32 %f605, %f603, 0fBF800000;
+ add.f32 %f594, %f603, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f593,%f594;
+ // inline asm
+ add.f32 %f606, %f605, %f605;
+ mul.f32 %f607, %f593, %f606;
+ mul.f32 %f608, %f607, %f607;
+ fma.rn.f32 %f611, %f840, %f608, %f841;
+ fma.rn.f32 %f613, %f611, %f608, %f842;
+ mul.rn.f32 %f614, %f613, %f608;
+ mul.rn.f32 %f615, %f614, %f607;
+ sub.f32 %f616, %f605, %f607;
+ neg.f32 %f617, %f607;
+ add.f32 %f618, %f616, %f616;
+ fma.rn.f32 %f619, %f617, %f605, %f618;
+ mul.rn.f32 %f620, %f593, %f619;
+ add.f32 %f621, %f615, %f607;
+ sub.f32 %f622, %f607, %f621;
+ add.f32 %f623, %f615, %f622;
+ add.f32 %f624, %f620, %f623;
+ add.f32 %f625, %f621, %f624;
+ sub.f32 %f626, %f621, %f625;
+ add.f32 %f627, %f624, %f626;
+ mul.rn.f32 %f629, %f604, %f843;
+ mul.rn.f32 %f631, %f604, %f844;
+ add.f32 %f632, %f629, %f625;
+ sub.f32 %f633, %f629, %f632;
+ add.f32 %f634, %f625, %f633;
+ add.f32 %f635, %f627, %f634;
+ add.f32 %f636, %f631, %f635;
+ add.f32 %f637, %f632, %f636;
+ sub.f32 %f638, %f632, %f637;
+ add.f32 %f639, %f636, %f638;
+ mul.rn.f32 %f641, %f484, %f637;
+ neg.f32 %f642, %f641;
+ fma.rn.f32 %f643, %f484, %f637, %f642;
+ fma.rn.f32 %f644, %f484, %f639, %f643;
+ fma.rn.f32 %f646, %f489, %f637, %f644;
+ add.rn.f32 %f647, %f641, %f646;
+ neg.f32 %f648, %f647;
+ add.rn.f32 %f649, %f641, %f648;
+ add.rn.f32 %f650, %f649, %f646;
+ mov.b32 %r104, %f647;
+ setp.eq.s32 %p86, %r104, 1118925336;
+ add.s32 %r105, %r104, -1;
+ mov.b32 %f651, %r105;
+ add.f32 %f652, %f650, 0f37000000;
+ selp.f32 %f653, %f651, %f647, %p86;
+ selp.f32 %f86, %f652, %f650, %p86;
+ mul.f32 %f654, %f653, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f655, %f654;
+ fma.rn.f32 %f657, %f655, %f845, %f653;
+ fma.rn.f32 %f659, %f655, %f846, %f657;
+ mul.f32 %f660, %f659, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f661, %f660;
+ add.f32 %f662, %f655, 0f00000000;
+ ex2.approx.f32 %f663, %f662;
+ mul.f32 %f664, %f661, %f663;
+ setp.lt.f32 %p87, %f653, 0fC2D20000;
+ selp.f32 %f665, 0f00000000, %f664, %p87;
+ setp.gt.f32 %p88, %f653, 0f42D20000;
+ selp.f32 %f876, 0f7F800000, %f665, %p88;
+ setp.eq.f32 %p89, %f876, 0f7F800000;
+ @%p89 bra BB0_58;
+
+ fma.rn.f32 %f876, %f876, %f86, %f876;
+
+BB0_58:
+ setp.lt.f32 %p90, %f44, 0f00000000;
+ and.pred %p5, %p90, %p59;
+ mov.b32 %r106, %f876;
+ xor.b32 %r107, %r106, -2147483648;
+ mov.b32 %f666, %r107;
+ selp.f32 %f878, %f666, %f876, %p5;
+ setp.eq.f32 %p92, %f44, 0f00000000;
+ @%p92 bra BB0_61;
+ bra.uni BB0_59;
+
+BB0_61:
+ add.f32 %f669, %f44, %f44;
+ selp.f32 %f878, %f669, 0f00000000, %p59;
+ bra.uni BB0_62;
+
+BB0_59:
+ setp.geu.f32 %p93, %f44, 0f00000000;
+ @%p93 bra BB0_62;
+
+ cvt.rzi.f32.f32 %f668, %f484;
+ setp.neu.f32 %p94, %f668, 0f3EE66666;
+ selp.f32 %f878, 0f7FFFFFFF, %f878, %p94;
+
+BB0_62:
+ add.f32 %f670, %f85, 0f3EE66666;
+ mov.b32 %r108, %f670;
+ setp.lt.s32 %p96, %r108, 2139095040;
+ @%p96 bra BB0_67;
+
+ setp.gtu.f32 %p97, %f85, 0f7F800000;
+ @%p97 bra BB0_66;
+ bra.uni BB0_64;
+
+BB0_66:
+ add.f32 %f878, %f44, 0f3EE66666;
+ bra.uni BB0_67;
+
+BB0_64:
+ setp.neu.f32 %p98, %f85, 0f7F800000;
+ @%p98 bra BB0_67;
+
+ selp.f32 %f878, 0fFF800000, 0f7F800000, %p5;
+
+BB0_67:
+ mov.u32 %r236, 4;
+ setp.eq.f32 %p99, %f44, 0f3F800000;
+ selp.f32 %f671, 0f3F800000, %f878, %p99;
+ cvt.u64.u32 %rd36, %r3;
+ cvt.u64.u32 %rd35, %r2;
+ mov.u64 %rd39, image;
+ cvta.global.u64 %rd34, %rd39;
+ // inline asm
+ call (%rd33), _rt_buffer_get_64, (%rd34, %r24, %r236, %rd35, %rd36, %rd15, %rd15);
+ // inline asm
+ cvt.sat.f32.f32 %f672, %f671;
+ mul.f32 %f673, %f672, 0f437FFD71;
+ cvt.rzi.u32.f32 %r111, %f673;
+ cvt.sat.f32.f32 %f674, %f84;
+ mul.f32 %f675, %f674, 0f437FFD71;
+ cvt.rzi.u32.f32 %r112, %f675;
+ cvt.sat.f32.f32 %f676, %f71;
+ mul.f32 %f677, %f676, 0f437FFD71;
+ cvt.rzi.u32.f32 %r113, %f677;
+ cvt.u16.u32 %rs21, %r111;
+ cvt.u16.u32 %rs22, %r113;
+ cvt.u16.u32 %rs23, %r112;
+ mov.u16 %rs24, 255;
+ st.v4.u8 [%rd33], {%rs21, %rs23, %rs22, %rs24};
+ ld.global.u32 %r240, [imageEnabled];
+
+BB0_68:
+ cvt.u64.u32 %rd4, %r2;
+ cvt.u64.u32 %rd5, %r3;
+ and.b32 %r114, %r240, 4;
+ setp.eq.s32 %p100, %r114, 0;
+ @%p100 bra BB0_72;
+
+ ld.global.u32 %r115, [additive];
+ setp.eq.s32 %p101, %r115, 0;
+ mov.f32 %f678, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs25, %f678;}
+
+ // inline asm
+ @%p101 bra BB0_71;
+
+ mov.u64 %rd52, image_HDR;
+ cvta.global.u64 %rd41, %rd52;
+ mov.u32 %r119, 8;
+ // inline asm
+ call (%rd40), _rt_buffer_get_64, (%rd41, %r24, %r119, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs32, %rs33, %rs34, %rs35}, [%rd40];
+ // inline asm
+ { cvt.f32.f16 %f679, %rs32;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f680, %rs33;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f681, %rs34;}
+
+ // inline asm
+ // inline asm
+ call (%rd46), _rt_buffer_get_64, (%rd41, %r24, %r119, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f682, %f42, %f679;
+ add.f32 %f683, %f43, %f680;
+ add.f32 %f684, %f44, %f681;
+ // inline asm
+ { cvt.rn.f16.f32 %rs31, %f684;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs30, %f683;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs29, %f682;}
+
+ // inline asm
+ st.v4.u16 [%rd46], {%rs29, %rs30, %rs31, %rs25};
+ bra.uni BB0_72;
+
+BB0_71:
+ mov.u64 %rd59, image_HDR;
+ cvta.global.u64 %rd54, %rd59;
+ mov.u32 %r121, 8;
+ // inline asm
+ call (%rd53), _rt_buffer_get_64, (%rd54, %r24, %r121, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs38, %f44;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs37, %f43;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs36, %f42;}
+
+ // inline asm
+ st.v4.u16 [%rd53], {%rs36, %rs37, %rs38, %rs25};
+
+BB0_72:
+ mul.f32 %f689, %f28, 0f3E800000;
+ mul.f32 %f690, %f689, %f866;
+ ld.global.f32 %f691, [lightColor];
+ mul.f32 %f692, %f690, %f691;
+ ld.global.f32 %f693, [lightColor+4];
+ mul.f32 %f694, %f690, %f693;
+ ld.global.f32 %f695, [lightColor+8];
+ mul.f32 %f696, %f690, %f695;
+ mul.f32 %f97, %f215, %f692;
+ mul.f32 %f98, %f216, %f694;
+ mul.f32 %f99, %f217, %f696;
+ ld.global.u32 %r122, [additive];
+ setp.eq.s32 %p102, %r122, 0;
+ mov.f32 %f688, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs39, %f688;}
+
+ // inline asm
+ @%p102 bra BB0_74;
+
+ mov.u64 %rd72, image_RNM0;
+ cvta.global.u64 %rd61, %rd72;
+ mov.u32 %r126, 8;
+ // inline asm
+ call (%rd60), _rt_buffer_get_64, (%rd61, %r24, %r126, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd60];
+ // inline asm
+ { cvt.f32.f16 %f697, %rs46;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f698, %rs47;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f699, %rs48;}
+
+ // inline asm
+ // inline asm
+ call (%rd66), _rt_buffer_get_64, (%rd61, %r24, %r126, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f700, %f97, %f697;
+ add.f32 %f701, %f98, %f698;
+ add.f32 %f702, %f99, %f699;
+ // inline asm
+ { cvt.rn.f16.f32 %rs45, %f702;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs44, %f701;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs43, %f700;}
+
+ // inline asm
+ st.v4.u16 [%rd66], {%rs43, %rs44, %rs45, %rs39};
+ bra.uni BB0_75;
+
+BB0_74:
+ mov.u64 %rd79, image_RNM0;
+ cvta.global.u64 %rd74, %rd79;
+ mov.u32 %r128, 8;
+ // inline asm
+ call (%rd73), _rt_buffer_get_64, (%rd74, %r24, %r128, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs52, %f99;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs51, %f98;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs50, %f97;}
+
+ // inline asm
+ st.v4.u16 [%rd73], {%rs50, %rs51, %rs52, %rs39};
+
+BB0_75:
+ fma.rn.f32 %f100, %f10, 0f3F000000, 0f3F000000;
+ fma.rn.f32 %f101, %f11, 0f3F000000, 0f3F000000;
+ fma.rn.f32 %f102, %f12, 0f3F000000, 0f3F000000;
+ ld.global.u32 %r129, [additive];
+ setp.eq.s32 %p103, %r129, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs53, %f688;}
+
+ // inline asm
+ @%p103 bra BB0_77;
+
+ mov.u64 %rd92, image_RNM1;
+ cvta.global.u64 %rd81, %rd92;
+ mov.u32 %r133, 8;
+ // inline asm
+ call (%rd80), _rt_buffer_get_64, (%rd81, %r24, %r133, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs60, %rs61, %rs62, %rs63}, [%rd80];
+ // inline asm
+ { cvt.f32.f16 %f707, %rs60;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f708, %rs61;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f709, %rs62;}
+
+ // inline asm
+ // inline asm
+ call (%rd86), _rt_buffer_get_64, (%rd81, %r24, %r133, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f710, %f100, %f707;
+ add.f32 %f711, %f100, %f708;
+ add.f32 %f712, %f100, %f709;
+ // inline asm
+ { cvt.rn.f16.f32 %rs59, %f712;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs58, %f711;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs57, %f710;}
+
+ // inline asm
+ st.v4.u16 [%rd86], {%rs57, %rs58, %rs59, %rs53};
+ bra.uni BB0_78;
+
+BB0_77:
+ mov.u64 %rd99, image_RNM1;
+ cvta.global.u64 %rd94, %rd99;
+ mov.u32 %r135, 8;
+ // inline asm
+ call (%rd93), _rt_buffer_get_64, (%rd94, %r24, %r135, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs64, %f100;}
+
+ // inline asm
+ st.v4.u16 [%rd93], {%rs64, %rs64, %rs64, %rs53};
+
+BB0_78:
+ ld.global.u32 %r136, [additive];
+ setp.eq.s32 %p104, %r136, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs65, %f688;}
+
+ // inline asm
+ @%p104 bra BB0_80;
+
+ mov.u64 %rd112, image_RNM2;
+ cvta.global.u64 %rd101, %rd112;
+ mov.u32 %r140, 8;
+ // inline asm
+ call (%rd100), _rt_buffer_get_64, (%rd101, %r24, %r140, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd100];
+ // inline asm
+ { cvt.f32.f16 %f715, %rs72;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f716, %rs73;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f717, %rs74;}
+
+ // inline asm
+ // inline asm
+ call (%rd106), _rt_buffer_get_64, (%rd101, %r24, %r140, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f718, %f101, %f715;
+ add.f32 %f719, %f101, %f716;
+ add.f32 %f720, %f101, %f717;
+ // inline asm
+ { cvt.rn.f16.f32 %rs71, %f720;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs70, %f719;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs69, %f718;}
+
+ // inline asm
+ st.v4.u16 [%rd106], {%rs69, %rs70, %rs71, %rs65};
+ bra.uni BB0_81;
+
+BB0_80:
+ mov.u64 %rd119, image_RNM2;
+ cvta.global.u64 %rd114, %rd119;
+ mov.u32 %r142, 8;
+ // inline asm
+ call (%rd113), _rt_buffer_get_64, (%rd114, %r24, %r142, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs76, %f101;}
+
+ // inline asm
+ st.v4.u16 [%rd113], {%rs76, %rs76, %rs76, %rs65};
+
+BB0_81:
+ ld.global.u32 %r143, [additive];
+ setp.eq.s32 %p105, %r143, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs77, %f688;}
+
+ // inline asm
+ @%p105 bra BB0_83;
+
+ mov.u64 %rd132, image_RNM3;
+ cvta.global.u64 %rd121, %rd132;
+ mov.u32 %r147, 8;
+ // inline asm
+ call (%rd120), _rt_buffer_get_64, (%rd121, %r24, %r147, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd120];
+ // inline asm
+ { cvt.f32.f16 %f723, %rs84;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f724, %rs85;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f725, %rs86;}
+
+ // inline asm
+ // inline asm
+ call (%rd126), _rt_buffer_get_64, (%rd121, %r24, %r147, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f726, %f102, %f723;
+ add.f32 %f727, %f102, %f724;
+ add.f32 %f728, %f102, %f725;
+ // inline asm
+ { cvt.rn.f16.f32 %rs83, %f728;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs82, %f727;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs81, %f726;}
+
+ // inline asm
+ st.v4.u16 [%rd126], {%rs81, %rs82, %rs83, %rs77};
+ bra.uni BB0_124;
+
+BB0_83:
+ mov.u64 %rd139, image_RNM3;
+ cvta.global.u64 %rd134, %rd139;
+ mov.u32 %r149, 8;
+ // inline asm
+ call (%rd133), _rt_buffer_get_64, (%rd134, %r24, %r149, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs88, %f102;}
+
+ // inline asm
+ st.v4.u16 [%rd133], {%rs88, %rs88, %rs88, %rs77};
+
+BB0_124:
+ ret;
+}
+
+
generated by cgit v1.2.3-freya (git 2.51.0) at 2025-10-02 13:00:02 +0000