summaryrefslogtreecommitdiff
path: root/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightSH.ptx
diff options
context:
space:
mode:
Diffstat (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightSH.ptx')
-rw-r--r--VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightSH.ptx2464
1 files changed, 2464 insertions, 0 deletions
diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightSH.ptx
new file mode 100644
index 00000000..e0649864
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightSH.ptx
@@ -0,0 +1,2464 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+ // .globl _Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 image_RNM3[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 4 .u32 samples;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightRadius;
+.global .align 4 .b8 lightPos[12];
+.global .align 4 .b8 lightColor[12];
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .u32 lightCookie;
+.global .align 4 .b8 lightMatrix[36];
+.global .align 4 .f32 lightFOV;
+.global .align 4 .f32 lightFalloffFakeDistanceMult;
+.global .align 4 .f32 lightFalloffMinRadiusSq;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightCookieE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightMatrixE[8] = {82, 97, 121, 0, 36, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightFOVE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename11lightCookieE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename11lightMatrixE[10] = {77, 97, 116, 114, 105, 120, 51, 120, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightFOVE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightCookieE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightMatrixE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightFOVE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightCookieE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightMatrixE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightFOVE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightCookieE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightMatrixE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightFOVE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+ .local .align 4 .b8 __local_depot0[4];
+ .reg .b64 %SP;
+ .reg .b64 %SPL;
+ .reg .pred %p<140>;
+ .reg .b16 %rs<221>;
+ .reg .f32 %f<1020>;
+ .reg .b32 %r<253>;
+ .reg .b64 %rd<369>;
+
+
+ mov.u64 %rd368, __local_depot0;
+ cvta.local.u64 %SP, %rd368;
+ ld.global.v2.u32 {%r26, %r27}, [pixelID];
+ cvt.u64.u32 %rd12, %r26;
+ cvt.u64.u32 %rd13, %r27;
+ mov.u64 %rd16, uvnormal;
+ cvta.global.u64 %rd11, %rd16;
+ mov.u32 %r24, 2;
+ mov.u32 %r25, 4;
+ mov.u64 %rd15, 0;
+ // inline asm
+ call (%rd10), _rt_buffer_get_64, (%rd11, %r24, %r25, %rd12, %rd13, %rd15, %rd15);
+ // inline asm
+ ld.u32 %r1, [%rd10];
+ shr.u32 %r30, %r1, 16;
+ cvt.u16.u32 %rs1, %r30;
+ and.b16 %rs12, %rs1, 255;
+ cvt.u16.u32 %rs13, %r1;
+ or.b16 %rs14, %rs13, %rs12;
+ setp.eq.s16 %p7, %rs14, 0;
+ mov.f32 %f996, 0f00000000;
+ mov.f32 %f997, %f996;
+ mov.f32 %f998, %f996;
+ @%p7 bra BB0_2;
+
+ ld.u8 %rs15, [%rd10+1];
+ and.b16 %rs17, %rs13, 255;
+ cvt.rn.f32.u16 %f122, %rs17;
+ div.rn.f32 %f123, %f122, 0f437F0000;
+ fma.rn.f32 %f124, %f123, 0f40000000, 0fBF800000;
+ cvt.rn.f32.u16 %f125, %rs15;
+ div.rn.f32 %f126, %f125, 0f437F0000;
+ fma.rn.f32 %f127, %f126, 0f40000000, 0fBF800000;
+ cvt.rn.f32.u16 %f128, %rs12;
+ div.rn.f32 %f129, %f128, 0f437F0000;
+ fma.rn.f32 %f130, %f129, 0f40000000, 0fBF800000;
+ mul.f32 %f131, %f127, %f127;
+ fma.rn.f32 %f132, %f124, %f124, %f131;
+ fma.rn.f32 %f133, %f130, %f130, %f132;
+ sqrt.rn.f32 %f134, %f133;
+ rcp.rn.f32 %f135, %f134;
+ mul.f32 %f996, %f124, %f135;
+ mul.f32 %f997, %f127, %f135;
+ mul.f32 %f998, %f130, %f135;
+
+BB0_2:
+ ld.global.v2.u32 {%r31, %r32}, [pixelID];
+ ld.global.v2.u32 {%r34, %r35}, [tileInfo];
+ add.s32 %r2, %r31, %r34;
+ add.s32 %r3, %r32, %r35;
+ setp.eq.f32 %p8, %f997, 0f00000000;
+ setp.eq.f32 %p9, %f996, 0f00000000;
+ and.pred %p10, %p9, %p8;
+ setp.eq.f32 %p11, %f998, 0f00000000;
+ and.pred %p12, %p10, %p11;
+ @%p12 bra BB0_115;
+ bra.uni BB0_3;
+
+BB0_115:
+ ld.global.u32 %r252, [imageEnabled];
+ and.b32 %r201, %r252, 1;
+ setp.eq.b32 %p132, %r201, 1;
+ @!%p132 bra BB0_117;
+ bra.uni BB0_116;
+
+BB0_116:
+ cvt.u64.u32 %rd256, %r2;
+ cvt.u64.u32 %rd257, %r3;
+ mov.u64 %rd260, image;
+ cvta.global.u64 %rd255, %rd260;
+ // inline asm
+ call (%rd254), _rt_buffer_get_64, (%rd255, %r24, %r25, %rd256, %rd257, %rd15, %rd15);
+ // inline asm
+ mov.u16 %rs153, 0;
+ st.v4.u8 [%rd254], {%rs153, %rs153, %rs153, %rs153};
+ ld.global.u32 %r252, [imageEnabled];
+
+BB0_117:
+ and.b32 %r204, %r252, 8;
+ setp.eq.s32 %p133, %r204, 0;
+ @%p133 bra BB0_119;
+
+ cvt.u64.u32 %rd264, %r3;
+ cvt.u64.u32 %rd263, %r2;
+ mov.u64 %rd267, image_Mask;
+ cvta.global.u64 %rd262, %rd267;
+ // inline asm
+ call (%rd261), _rt_buffer_get_64, (%rd262, %r24, %r24, %rd263, %rd264, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f896, 0f00000000;
+ cvt.rzi.u32.f32 %r207, %f896;
+ cvt.u16.u32 %rs154, %r207;
+ mov.u16 %rs155, 0;
+ st.v2.u8 [%rd261], {%rs154, %rs155};
+ ld.global.u32 %r252, [imageEnabled];
+
+BB0_119:
+ cvt.u64.u32 %rd8, %r2;
+ cvt.u64.u32 %rd9, %r3;
+ and.b32 %r208, %r252, 4;
+ setp.eq.s32 %p134, %r208, 0;
+ @%p134 bra BB0_123;
+
+ ld.global.u32 %r209, [additive];
+ setp.eq.s32 %p135, %r209, 0;
+ @%p135 bra BB0_122;
+
+ mov.u64 %rd280, image_HDR;
+ cvta.global.u64 %rd269, %rd280;
+ mov.u32 %r213, 8;
+ // inline asm
+ call (%rd268), _rt_buffer_get_64, (%rd269, %r24, %r213, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs162, %rs163, %rs164, %rs165}, [%rd268];
+ // inline asm
+ { cvt.f32.f16 %f897, %rs162;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f898, %rs163;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f899, %rs164;}
+
+ // inline asm
+ // inline asm
+ call (%rd274), _rt_buffer_get_64, (%rd269, %r24, %r213, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f900, %f897, 0f00000000;
+ add.f32 %f901, %f898, 0f00000000;
+ add.f32 %f902, %f899, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs161, %f902;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs160, %f901;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs159, %f900;}
+
+ // inline asm
+ mov.u16 %rs166, 0;
+ st.v4.u16 [%rd274], {%rs159, %rs160, %rs161, %rs166};
+ bra.uni BB0_123;
+
+BB0_3:
+ ld.global.v2.u32 {%r41, %r42}, [pixelID];
+ cvt.u64.u32 %rd19, %r41;
+ cvt.u64.u32 %rd20, %r42;
+ mov.u64 %rd23, uvpos;
+ cvta.global.u64 %rd18, %rd23;
+ mov.u32 %r40, 12;
+ // inline asm
+ call (%rd17), _rt_buffer_get_64, (%rd18, %r24, %r40, %rd19, %rd20, %rd15, %rd15);
+ // inline asm
+ ld.global.f32 %f138, [lightPos];
+ ld.f32 %f9, [%rd17+8];
+ ld.f32 %f8, [%rd17+4];
+ ld.f32 %f7, [%rd17];
+ sub.f32 %f139, %f138, %f7;
+ ld.global.f32 %f140, [lightPos+4];
+ sub.f32 %f141, %f140, %f8;
+ ld.global.f32 %f142, [lightPos+8];
+ sub.f32 %f143, %f142, %f9;
+ mul.f32 %f144, %f141, %f141;
+ fma.rn.f32 %f145, %f139, %f139, %f144;
+ fma.rn.f32 %f146, %f143, %f143, %f145;
+ sqrt.rn.f32 %f147, %f146;
+ rcp.rn.f32 %f148, %f147;
+ mul.f32 %f10, %f139, %f148;
+ mul.f32 %f11, %f141, %f148;
+ mul.f32 %f12, %f143, %f148;
+ ld.global.f32 %f149, [lightFalloffFakeDistanceMult];
+ mul.f32 %f13, %f147, %f149;
+ ld.global.f32 %f150, [lightInvCutoff];
+ mul.f32 %f14, %f147, %f150;
+ mov.f32 %f154, 0f40800000;
+ abs.f32 %f16, %f14;
+ setp.lt.f32 %p13, %f16, 0f00800000;
+ mul.f32 %f156, %f16, 0f4B800000;
+ selp.f32 %f157, 0fC3170000, 0fC2FE0000, %p13;
+ selp.f32 %f158, %f156, %f16, %p13;
+ mov.b32 %r45, %f158;
+ and.b32 %r46, %r45, 8388607;
+ or.b32 %r47, %r46, 1065353216;
+ mov.b32 %f159, %r47;
+ shr.u32 %r48, %r45, 23;
+ cvt.rn.f32.u32 %f160, %r48;
+ add.f32 %f161, %f157, %f160;
+ setp.gt.f32 %p14, %f159, 0f3FB504F3;
+ mul.f32 %f162, %f159, 0f3F000000;
+ add.f32 %f163, %f161, 0f3F800000;
+ selp.f32 %f164, %f162, %f159, %p14;
+ selp.f32 %f165, %f163, %f161, %p14;
+ add.f32 %f166, %f164, 0fBF800000;
+ add.f32 %f137, %f164, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f136,%f137;
+ // inline asm
+ add.f32 %f167, %f166, %f166;
+ mul.f32 %f168, %f136, %f167;
+ mul.f32 %f169, %f168, %f168;
+ mov.f32 %f170, 0f3C4CAF63;
+ mov.f32 %f171, 0f3B18F0FE;
+ fma.rn.f32 %f172, %f171, %f169, %f170;
+ mov.f32 %f173, 0f3DAAAABD;
+ fma.rn.f32 %f174, %f172, %f169, %f173;
+ mul.rn.f32 %f175, %f174, %f169;
+ mul.rn.f32 %f176, %f175, %f168;
+ sub.f32 %f177, %f166, %f168;
+ neg.f32 %f178, %f168;
+ add.f32 %f179, %f177, %f177;
+ fma.rn.f32 %f180, %f178, %f166, %f179;
+ mul.rn.f32 %f181, %f136, %f180;
+ add.f32 %f182, %f176, %f168;
+ sub.f32 %f183, %f168, %f182;
+ add.f32 %f184, %f176, %f183;
+ add.f32 %f185, %f181, %f184;
+ add.f32 %f186, %f182, %f185;
+ sub.f32 %f187, %f182, %f186;
+ add.f32 %f188, %f185, %f187;
+ mov.f32 %f189, 0f3F317200;
+ mul.rn.f32 %f190, %f165, %f189;
+ mov.f32 %f191, 0f35BFBE8E;
+ mul.rn.f32 %f192, %f165, %f191;
+ add.f32 %f193, %f190, %f186;
+ sub.f32 %f194, %f190, %f193;
+ add.f32 %f195, %f186, %f194;
+ add.f32 %f196, %f188, %f195;
+ add.f32 %f197, %f192, %f196;
+ add.f32 %f198, %f193, %f197;
+ sub.f32 %f199, %f193, %f198;
+ add.f32 %f200, %f197, %f199;
+ mul.rn.f32 %f201, %f154, %f198;
+ neg.f32 %f202, %f201;
+ fma.rn.f32 %f203, %f154, %f198, %f202;
+ fma.rn.f32 %f204, %f154, %f200, %f203;
+ mov.f32 %f205, 0f00000000;
+ fma.rn.f32 %f206, %f205, %f198, %f204;
+ add.rn.f32 %f207, %f201, %f206;
+ neg.f32 %f208, %f207;
+ add.rn.f32 %f209, %f201, %f208;
+ add.rn.f32 %f210, %f209, %f206;
+ mov.b32 %r49, %f207;
+ setp.eq.s32 %p15, %r49, 1118925336;
+ add.s32 %r50, %r49, -1;
+ mov.b32 %f211, %r50;
+ add.f32 %f212, %f210, 0f37000000;
+ selp.f32 %f213, %f211, %f207, %p15;
+ selp.f32 %f17, %f212, %f210, %p15;
+ mul.f32 %f214, %f213, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f215, %f214;
+ mov.f32 %f216, 0fBF317200;
+ fma.rn.f32 %f217, %f215, %f216, %f213;
+ mov.f32 %f218, 0fB5BFBE8E;
+ fma.rn.f32 %f219, %f215, %f218, %f217;
+ mul.f32 %f220, %f219, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f221, %f220;
+ add.f32 %f222, %f215, 0f00000000;
+ ex2.approx.f32 %f223, %f222;
+ mul.f32 %f224, %f221, %f223;
+ setp.lt.f32 %p16, %f213, 0fC2D20000;
+ selp.f32 %f225, 0f00000000, %f224, %p16;
+ setp.gt.f32 %p17, %f213, 0f42D20000;
+ selp.f32 %f999, 0f7F800000, %f225, %p17;
+ setp.eq.f32 %p18, %f999, 0f7F800000;
+ @%p18 bra BB0_5;
+
+ fma.rn.f32 %f999, %f999, %f17, %f999;
+
+BB0_5:
+ mov.f32 %f937, 0f40000000;
+ cvt.rzi.f32.f32 %f936, %f937;
+ add.f32 %f935, %f936, %f936;
+ mov.f32 %f934, 0f40800000;
+ sub.f32 %f933, %f934, %f935;
+ abs.f32 %f932, %f933;
+ setp.lt.f32 %p19, %f14, 0f00000000;
+ setp.eq.f32 %p20, %f932, 0f3F800000;
+ and.pred %p1, %p19, %p20;
+ mov.b32 %r51, %f999;
+ xor.b32 %r52, %r51, -2147483648;
+ mov.b32 %f226, %r52;
+ selp.f32 %f1001, %f226, %f999, %p1;
+ setp.eq.f32 %p21, %f14, 0f00000000;
+ @%p21 bra BB0_8;
+ bra.uni BB0_6;
+
+BB0_8:
+ add.f32 %f229, %f14, %f14;
+ selp.f32 %f1001, %f229, 0f00000000, %p20;
+ bra.uni BB0_9;
+
+BB0_6:
+ setp.geu.f32 %p22, %f14, 0f00000000;
+ @%p22 bra BB0_9;
+
+ mov.f32 %f979, 0f40800000;
+ cvt.rzi.f32.f32 %f228, %f979;
+ setp.neu.f32 %p23, %f228, 0f40800000;
+ selp.f32 %f1001, 0f7FFFFFFF, %f1001, %p23;
+
+BB0_9:
+ abs.f32 %f938, %f14;
+ add.f32 %f230, %f938, 0f40800000;
+ mov.b32 %r53, %f230;
+ setp.lt.s32 %p25, %r53, 2139095040;
+ @%p25 bra BB0_14;
+
+ abs.f32 %f977, %f14;
+ setp.gtu.f32 %p26, %f977, 0f7F800000;
+ @%p26 bra BB0_13;
+ bra.uni BB0_11;
+
+BB0_13:
+ add.f32 %f1001, %f14, 0f40800000;
+ bra.uni BB0_14;
+
+BB0_11:
+ abs.f32 %f978, %f14;
+ setp.neu.f32 %p27, %f978, 0f7F800000;
+ @%p27 bra BB0_14;
+
+ selp.f32 %f1001, 0fFF800000, 0f7F800000, %p1;
+
+BB0_14:
+ mov.f32 %f946, 0fB5BFBE8E;
+ mov.f32 %f945, 0fBF317200;
+ mov.f32 %f944, 0f00000000;
+ mov.f32 %f943, 0f35BFBE8E;
+ mov.f32 %f942, 0f3F317200;
+ mov.f32 %f941, 0f3DAAAABD;
+ mov.f32 %f940, 0f3C4CAF63;
+ mov.f32 %f939, 0f3B18F0FE;
+ mov.f32 %f233, 0f3F800000;
+ sub.f32 %f234, %f233, %f1001;
+ setp.eq.f32 %p28, %f14, 0f3F800000;
+ selp.f32 %f235, 0f00000000, %f234, %p28;
+ cvt.sat.f32.f32 %f236, %f235;
+ ld.global.f32 %f237, [lightFalloffMinRadiusSq];
+ fma.rn.f32 %f238, %f13, %f13, %f237;
+ div.rn.f32 %f28, %f236, %f238;
+ mul.f32 %f239, %f997, %f11;
+ fma.rn.f32 %f240, %f996, %f10, %f239;
+ fma.rn.f32 %f241, %f998, %f12, %f240;
+ ld.global.u32 %r54, [imageEnabled];
+ and.b32 %r55, %r54, 32;
+ ld.global.u32 %r56, [ignoreNormal];
+ or.b32 %r57, %r55, %r56;
+ setp.eq.s32 %p29, %r57, 0;
+ selp.f32 %f29, %f241, 0f3F800000, %p29;
+ fma.rn.f32 %f242, %f29, 0f3F000000, 0f3F000000;
+ cvt.sat.f32.f32 %f243, %f242;
+ add.f32 %f30, %f243, %f243;
+ mov.f32 %f247, 0f41A00000;
+ abs.f32 %f32, %f30;
+ setp.lt.f32 %p30, %f32, 0f00800000;
+ mul.f32 %f249, %f32, 0f4B800000;
+ selp.f32 %f250, 0fC3170000, 0fC2FE0000, %p30;
+ selp.f32 %f251, %f249, %f32, %p30;
+ mov.b32 %r58, %f251;
+ and.b32 %r59, %r58, 8388607;
+ or.b32 %r60, %r59, 1065353216;
+ mov.b32 %f252, %r60;
+ shr.u32 %r61, %r58, 23;
+ cvt.rn.f32.u32 %f253, %r61;
+ add.f32 %f254, %f250, %f253;
+ setp.gt.f32 %p31, %f252, 0f3FB504F3;
+ mul.f32 %f255, %f252, 0f3F000000;
+ add.f32 %f256, %f254, 0f3F800000;
+ selp.f32 %f257, %f255, %f252, %p31;
+ selp.f32 %f258, %f256, %f254, %p31;
+ add.f32 %f259, %f257, 0fBF800000;
+ add.f32 %f232, %f257, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f231,%f232;
+ // inline asm
+ add.f32 %f260, %f259, %f259;
+ mul.f32 %f261, %f231, %f260;
+ mul.f32 %f262, %f261, %f261;
+ fma.rn.f32 %f265, %f939, %f262, %f940;
+ fma.rn.f32 %f267, %f265, %f262, %f941;
+ mul.rn.f32 %f268, %f267, %f262;
+ mul.rn.f32 %f269, %f268, %f261;
+ sub.f32 %f270, %f259, %f261;
+ neg.f32 %f271, %f261;
+ add.f32 %f272, %f270, %f270;
+ fma.rn.f32 %f273, %f271, %f259, %f272;
+ mul.rn.f32 %f274, %f231, %f273;
+ add.f32 %f275, %f269, %f261;
+ sub.f32 %f276, %f261, %f275;
+ add.f32 %f277, %f269, %f276;
+ add.f32 %f278, %f274, %f277;
+ add.f32 %f279, %f275, %f278;
+ sub.f32 %f280, %f275, %f279;
+ add.f32 %f281, %f278, %f280;
+ mul.rn.f32 %f283, %f258, %f942;
+ mul.rn.f32 %f285, %f258, %f943;
+ add.f32 %f286, %f283, %f279;
+ sub.f32 %f287, %f283, %f286;
+ add.f32 %f288, %f279, %f287;
+ add.f32 %f289, %f281, %f288;
+ add.f32 %f290, %f285, %f289;
+ add.f32 %f291, %f286, %f290;
+ sub.f32 %f292, %f286, %f291;
+ add.f32 %f293, %f290, %f292;
+ mul.rn.f32 %f294, %f247, %f291;
+ neg.f32 %f295, %f294;
+ fma.rn.f32 %f296, %f247, %f291, %f295;
+ fma.rn.f32 %f297, %f247, %f293, %f296;
+ fma.rn.f32 %f299, %f944, %f291, %f297;
+ add.rn.f32 %f300, %f294, %f299;
+ neg.f32 %f301, %f300;
+ add.rn.f32 %f302, %f294, %f301;
+ add.rn.f32 %f303, %f302, %f299;
+ mov.b32 %r62, %f300;
+ setp.eq.s32 %p32, %r62, 1118925336;
+ add.s32 %r63, %r62, -1;
+ mov.b32 %f304, %r63;
+ add.f32 %f305, %f303, 0f37000000;
+ selp.f32 %f306, %f304, %f300, %p32;
+ selp.f32 %f33, %f305, %f303, %p32;
+ mul.f32 %f307, %f306, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f308, %f307;
+ fma.rn.f32 %f310, %f308, %f945, %f306;
+ fma.rn.f32 %f312, %f308, %f946, %f310;
+ mul.f32 %f313, %f312, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f314, %f313;
+ add.f32 %f315, %f308, 0f00000000;
+ ex2.approx.f32 %f316, %f315;
+ mul.f32 %f317, %f314, %f316;
+ setp.lt.f32 %p33, %f306, 0fC2D20000;
+ selp.f32 %f318, 0f00000000, %f317, %p33;
+ setp.gt.f32 %p34, %f306, 0f42D20000;
+ selp.f32 %f1002, 0f7F800000, %f318, %p34;
+ setp.eq.f32 %p35, %f1002, 0f7F800000;
+ @%p35 bra BB0_16;
+
+ fma.rn.f32 %f1002, %f1002, %f33, %f1002;
+
+BB0_16:
+ mov.f32 %f985, 0f41200000;
+ cvt.rzi.f32.f32 %f984, %f985;
+ add.f32 %f983, %f984, %f984;
+ mov.f32 %f982, 0f41A00000;
+ sub.f32 %f981, %f982, %f983;
+ abs.f32 %f980, %f981;
+ setp.lt.f32 %p36, %f30, 0f00000000;
+ setp.eq.f32 %p37, %f980, 0f3F800000;
+ and.pred %p2, %p36, %p37;
+ mov.b32 %r64, %f1002;
+ xor.b32 %r65, %r64, -2147483648;
+ mov.b32 %f319, %r65;
+ selp.f32 %f1004, %f319, %f1002, %p2;
+ setp.eq.f32 %p38, %f30, 0f00000000;
+ @%p38 bra BB0_19;
+ bra.uni BB0_17;
+
+BB0_19:
+ add.f32 %f322, %f30, %f30;
+ selp.f32 %f1004, %f322, 0f00000000, %p37;
+ bra.uni BB0_20;
+
+BB0_17:
+ setp.geu.f32 %p39, %f30, 0f00000000;
+ @%p39 bra BB0_20;
+
+ mov.f32 %f987, 0f41A00000;
+ cvt.rzi.f32.f32 %f321, %f987;
+ setp.neu.f32 %p40, %f321, 0f41A00000;
+ selp.f32 %f1004, 0f7FFFFFFF, %f1004, %p40;
+
+BB0_20:
+ add.f32 %f323, %f32, 0f41A00000;
+ mov.b32 %r66, %f323;
+ setp.lt.s32 %p42, %r66, 2139095040;
+ @%p42 bra BB0_25;
+
+ setp.gtu.f32 %p43, %f32, 0f7F800000;
+ @%p43 bra BB0_24;
+ bra.uni BB0_22;
+
+BB0_24:
+ add.f32 %f1004, %f30, 0f41A00000;
+ bra.uni BB0_25;
+
+BB0_22:
+ setp.neu.f32 %p44, %f32, 0f7F800000;
+ @%p44 bra BB0_25;
+
+ selp.f32 %f1004, 0fFF800000, 0f7F800000, %p2;
+
+BB0_25:
+ mov.f32 %f947, 0f00000000;
+ setp.eq.f32 %p45, %f30, 0f3F800000;
+ selp.f32 %f332, 0f3F800000, %f1004, %p45;
+ cvt.sat.f32.f32 %f333, %f332;
+ mul.f32 %f44, %f28, %f333;
+ mul.f32 %f334, %f29, 0f40800000;
+ cvt.sat.f32.f32 %f45, %f334;
+ ld.global.f32 %f335, [lightMatrix+24];
+ mul.f32 %f336, %f10, %f335;
+ ld.global.f32 %f337, [lightMatrix+28];
+ mul.f32 %f338, %f11, %f337;
+ neg.f32 %f339, %f338;
+ sub.f32 %f340, %f339, %f336;
+ ld.global.f32 %f341, [lightMatrix+32];
+ mul.f32 %f342, %f12, %f341;
+ sub.f32 %f343, %f340, %f342;
+ setp.gt.f32 %p46, %f343, 0f00000000;
+ ld.global.f32 %f344, [lightMatrix];
+ mul.f32 %f345, %f344, %f10;
+ sub.f32 %f346, %f947, %f345;
+ ld.global.f32 %f347, [lightMatrix+4];
+ mul.f32 %f348, %f347, %f11;
+ sub.f32 %f349, %f346, %f348;
+ ld.global.f32 %f350, [lightMatrix+8];
+ mul.f32 %f351, %f350, %f12;
+ sub.f32 %f352, %f349, %f351;
+ selp.f32 %f353, 0f3F800000, 0f00000000, %p46;
+ ld.global.f32 %f354, [lightMatrix+12];
+ mul.f32 %f355, %f354, %f10;
+ sub.f32 %f356, %f947, %f355;
+ ld.global.f32 %f357, [lightMatrix+16];
+ mul.f32 %f358, %f357, %f11;
+ sub.f32 %f359, %f356, %f358;
+ ld.global.f32 %f360, [lightMatrix+20];
+ mul.f32 %f361, %f360, %f12;
+ sub.f32 %f362, %f359, %f361;
+ ld.global.u32 %r67, [lightCookie];
+ ld.global.f32 %f363, [lightFOV];
+ fma.rn.f32 %f328, %f352, %f363, 0f3F000000;
+ fma.rn.f32 %f329, %f362, %f363, 0f3F000000;
+ // inline asm
+ call (%f324, %f325, %f326, %f327), _rt_texture_get_f_id, (%r67, %r24, %f328, %f329, %f947, %f947);
+ // inline asm
+ max.f32 %f364, %f324, %f325;
+ max.f32 %f365, %f364, %f326;
+ mul.f32 %f366, %f353, %f365;
+ mul.f32 %f367, %f44, %f45;
+ mul.f32 %f368, %f367, %f366;
+ ld.global.f32 %f369, [lightColor+4];
+ ld.global.f32 %f370, [lightColor];
+ max.f32 %f371, %f370, %f369;
+ ld.global.f32 %f372, [lightColor+8];
+ max.f32 %f373, %f371, %f372;
+ mul.f32 %f374, %f368, %f373;
+ setp.lt.f32 %p47, %f374, 0f3727C5AC;
+ @%p47 bra BB0_95;
+ bra.uni BB0_26;
+
+BB0_95:
+ ld.global.u32 %r250, [imageEnabled];
+ and.b32 %r158, %r250, 1;
+ setp.eq.b32 %p124, %r158, 1;
+ @!%p124 bra BB0_97;
+ bra.uni BB0_96;
+
+BB0_96:
+ cvt.u64.u32 %rd142, %r2;
+ cvt.u64.u32 %rd143, %r3;
+ mov.u64 %rd146, image;
+ cvta.global.u64 %rd141, %rd146;
+ // inline asm
+ call (%rd140), _rt_buffer_get_64, (%rd141, %r24, %r25, %rd142, %rd143, %rd15, %rd15);
+ // inline asm
+ mov.u16 %rs89, 1;
+ mov.u16 %rs90, 0;
+ st.v4.u8 [%rd140], {%rs90, %rs90, %rs90, %rs89};
+ ld.global.u32 %r250, [imageEnabled];
+
+BB0_97:
+ and.b32 %r161, %r250, 8;
+ setp.eq.s32 %p125, %r161, 0;
+ @%p125 bra BB0_99;
+
+ cvt.u64.u32 %rd150, %r3;
+ cvt.u64.u32 %rd149, %r2;
+ mov.u64 %rd153, image_Mask;
+ cvta.global.u64 %rd148, %rd153;
+ // inline asm
+ call (%rd147), _rt_buffer_get_64, (%rd148, %r24, %r24, %rd149, %rd150, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f853, 0f00000000;
+ cvt.rzi.u32.f32 %r164, %f853;
+ cvt.u16.u32 %rs91, %r164;
+ mov.u16 %rs92, 255;
+ st.v2.u8 [%rd147], {%rs91, %rs92};
+ ld.global.u32 %r250, [imageEnabled];
+
+BB0_99:
+ cvt.u64.u32 %rd6, %r2;
+ cvt.u64.u32 %rd7, %r3;
+ and.b32 %r165, %r250, 4;
+ setp.eq.s32 %p126, %r165, 0;
+ @%p126 bra BB0_103;
+
+ ld.global.u32 %r166, [additive];
+ setp.eq.s32 %p127, %r166, 0;
+ mov.f32 %f854, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs93, %f854;}
+
+ // inline asm
+ @%p127 bra BB0_102;
+
+ mov.u64 %rd166, image_HDR;
+ cvta.global.u64 %rd155, %rd166;
+ mov.u32 %r170, 8;
+ // inline asm
+ call (%rd154), _rt_buffer_get_64, (%rd155, %r24, %r170, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs100, %rs101, %rs102, %rs103}, [%rd154];
+ // inline asm
+ { cvt.f32.f16 %f855, %rs100;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f856, %rs101;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f857, %rs102;}
+
+ // inline asm
+ // inline asm
+ call (%rd160), _rt_buffer_get_64, (%rd155, %r24, %r170, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f858, %f855, 0f00000000;
+ add.f32 %f859, %f856, 0f00000000;
+ add.f32 %f860, %f857, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs99, %f860;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs98, %f859;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs97, %f858;}
+
+ // inline asm
+ st.v4.u16 [%rd160], {%rs97, %rs98, %rs99, %rs93};
+ bra.uni BB0_103;
+
+BB0_26:
+ mov.f32 %f1006, 0f00000000;
+ mul.f32 %f376, %f7, 0f3456BF95;
+ abs.f32 %f377, %f996;
+ div.rn.f32 %f378, %f376, %f377;
+ abs.f32 %f379, %f997;
+ mul.f32 %f380, %f8, 0f3456BF95;
+ div.rn.f32 %f381, %f380, %f379;
+ abs.f32 %f382, %f998;
+ mul.f32 %f383, %f9, 0f3456BF95;
+ div.rn.f32 %f384, %f383, %f382;
+ abs.f32 %f385, %f378;
+ abs.f32 %f386, %f381;
+ abs.f32 %f387, %f384;
+ mov.f32 %f388, 0f38D1B717;
+ max.f32 %f389, %f385, %f388;
+ max.f32 %f390, %f386, %f388;
+ max.f32 %f391, %f387, %f388;
+ fma.rn.f32 %f49, %f996, %f389, %f7;
+ fma.rn.f32 %f50, %f997, %f390, %f8;
+ fma.rn.f32 %f51, %f998, %f391, %f9;
+ ld.global.u32 %r246, [samples];
+ setp.lt.s32 %p48, %r246, 1;
+ @%p48 bra BB0_29;
+
+ mul.f32 %f393, %f49, 0f3456BF95;
+ abs.f32 %f394, %f393;
+ mul.f32 %f395, %f50, 0f3456BF95;
+ abs.f32 %f396, %f395;
+ mul.f32 %f397, %f51, 0f3456BF95;
+ abs.f32 %f398, %f397;
+ max.f32 %f399, %f394, %f396;
+ max.f32 %f400, %f399, %f398;
+ max.f32 %f52, %f400, %f388;
+ add.u64 %rd24, %SP, 0;
+ cvta.to.local.u64 %rd2, %rd24;
+ mov.f32 %f1006, 0f00000000;
+ mov.u32 %r245, 0;
+
+BB0_28:
+ cvt.rn.f32.s32 %f410, %r245;
+ mul.f32 %f411, %f410, 0f3DD32618;
+ cvt.rmi.f32.f32 %f412, %f411;
+ sub.f32 %f413, %f411, %f412;
+ mul.f32 %f414, %f410, 0f3DD2F1AA;
+ cvt.rmi.f32.f32 %f415, %f414;
+ sub.f32 %f416, %f414, %f415;
+ mul.f32 %f417, %f410, 0f3DC74539;
+ cvt.rmi.f32.f32 %f418, %f417;
+ sub.f32 %f419, %f417, %f418;
+ add.f32 %f420, %f416, 0f4199851F;
+ add.f32 %f421, %f419, 0f4199851F;
+ add.f32 %f422, %f413, 0f4199851F;
+ mul.f32 %f423, %f416, %f421;
+ fma.rn.f32 %f424, %f413, %f420, %f423;
+ fma.rn.f32 %f425, %f422, %f419, %f424;
+ add.f32 %f426, %f413, %f425;
+ add.f32 %f427, %f416, %f425;
+ add.f32 %f428, %f419, %f425;
+ add.f32 %f429, %f426, %f427;
+ mul.f32 %f430, %f428, %f429;
+ cvt.rmi.f32.f32 %f431, %f430;
+ sub.f32 %f432, %f430, %f431;
+ add.f32 %f433, %f426, %f428;
+ mul.f32 %f434, %f427, %f433;
+ cvt.rmi.f32.f32 %f435, %f434;
+ sub.f32 %f436, %f434, %f435;
+ add.f32 %f437, %f427, %f428;
+ mul.f32 %f438, %f426, %f437;
+ cvt.rmi.f32.f32 %f439, %f438;
+ sub.f32 %f440, %f438, %f439;
+ fma.rn.f32 %f441, %f432, 0f40000000, 0fBF800000;
+ fma.rn.f32 %f442, %f436, 0f40000000, 0fBF800000;
+ fma.rn.f32 %f443, %f440, 0f40000000, 0fBF800000;
+ ld.global.f32 %f444, [lightRadius];
+ ld.global.f32 %f445, [lightPos];
+ fma.rn.f32 %f446, %f444, %f441, %f445;
+ ld.global.f32 %f447, [lightPos+4];
+ fma.rn.f32 %f448, %f444, %f442, %f447;
+ ld.global.f32 %f449, [lightPos+8];
+ fma.rn.f32 %f450, %f444, %f443, %f449;
+ sub.f32 %f451, %f446, %f7;
+ sub.f32 %f452, %f448, %f8;
+ sub.f32 %f453, %f450, %f9;
+ mul.f32 %f454, %f452, %f452;
+ fma.rn.f32 %f455, %f451, %f451, %f454;
+ fma.rn.f32 %f456, %f453, %f453, %f455;
+ sqrt.rn.f32 %f409, %f456;
+ rcp.rn.f32 %f457, %f409;
+ mul.f32 %f405, %f457, %f451;
+ mul.f32 %f406, %f457, %f452;
+ mul.f32 %f407, %f457, %f453;
+ ld.global.u32 %r73, [imageEnabled];
+ and.b32 %r74, %r73, 32;
+ setp.eq.s32 %p49, %r74, 0;
+ selp.f32 %f458, 0f3F800000, 0f41200000, %p49;
+ mul.f32 %f408, %f458, %f52;
+ mov.u32 %r75, 1065353216;
+ st.local.u32 [%rd2], %r75;
+ ld.global.u32 %r70, [root];
+ mov.u32 %r71, 1;
+ // inline asm
+ call _rt_trace_64, (%r70, %f49, %f50, %f51, %f405, %f406, %f407, %r71, %f408, %f409, %rd24, %r25);
+ // inline asm
+ ld.local.f32 %f459, [%rd2];
+ add.f32 %f1006, %f1006, %f459;
+ ld.global.u32 %r246, [samples];
+ add.s32 %r245, %r245, 1;
+ setp.lt.s32 %p50, %r245, %r246;
+ @%p50 bra BB0_28;
+
+BB0_29:
+ mov.f32 %f1007, 0f3F800000;
+ setp.eq.s32 %p51, %r246, 0;
+ @%p51 bra BB0_31;
+
+ cvt.rn.f32.s32 %f461, %r246;
+ div.rn.f32 %f1007, %f1006, %f461;
+
+BB0_31:
+ cvt.sat.f32.f32 %f462, %f29;
+ mul.f32 %f463, %f44, %f462;
+ mul.f32 %f464, %f1007, %f463;
+ ld.global.f32 %f465, [lightColor];
+ mul.f32 %f466, %f465, %f464;
+ ld.global.f32 %f467, [lightColor+4];
+ mul.f32 %f468, %f467, %f464;
+ ld.global.f32 %f469, [lightColor+8];
+ mul.f32 %f470, %f464, %f469;
+ mul.f32 %f58, %f324, %f466;
+ mul.f32 %f59, %f325, %f468;
+ mul.f32 %f60, %f326, %f470;
+ ld.global.u32 %r248, [imageEnabled];
+ and.b32 %r76, %r248, 8;
+ setp.eq.s32 %p52, %r76, 0;
+ @%p52 bra BB0_44;
+
+ mov.f32 %f955, 0fB5BFBE8E;
+ mov.f32 %f954, 0fBF317200;
+ mov.f32 %f953, 0f35BFBE8E;
+ mov.f32 %f952, 0f3F317200;
+ mov.f32 %f951, 0f3DAAAABD;
+ mov.f32 %f950, 0f3C4CAF63;
+ mov.f32 %f949, 0f3B18F0FE;
+ cvt.u64.u32 %rd28, %r2;
+ cvt.u64.u32 %rd29, %r3;
+ mov.u64 %rd32, image_Mask;
+ cvta.global.u64 %rd27, %rd32;
+ // inline asm
+ call (%rd26), _rt_buffer_get_64, (%rd27, %r24, %r24, %rd28, %rd29, %rd15, %rd15);
+ // inline asm
+ abs.f32 %f62, %f1007;
+ setp.lt.f32 %p53, %f62, 0f00800000;
+ mul.f32 %f476, %f62, 0f4B800000;
+ selp.f32 %f477, 0fC3170000, 0fC2FE0000, %p53;
+ selp.f32 %f478, %f476, %f62, %p53;
+ mov.b32 %r79, %f478;
+ and.b32 %r80, %r79, 8388607;
+ or.b32 %r81, %r80, 1065353216;
+ mov.b32 %f479, %r81;
+ shr.u32 %r82, %r79, 23;
+ cvt.rn.f32.u32 %f480, %r82;
+ add.f32 %f481, %f477, %f480;
+ setp.gt.f32 %p54, %f479, 0f3FB504F3;
+ mul.f32 %f482, %f479, 0f3F000000;
+ add.f32 %f483, %f481, 0f3F800000;
+ selp.f32 %f484, %f482, %f479, %p54;
+ selp.f32 %f485, %f483, %f481, %p54;
+ add.f32 %f486, %f484, 0fBF800000;
+ add.f32 %f472, %f484, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f471,%f472;
+ // inline asm
+ add.f32 %f487, %f486, %f486;
+ mul.f32 %f488, %f471, %f487;
+ mul.f32 %f489, %f488, %f488;
+ fma.rn.f32 %f492, %f949, %f489, %f950;
+ fma.rn.f32 %f494, %f492, %f489, %f951;
+ mul.rn.f32 %f495, %f494, %f489;
+ mul.rn.f32 %f496, %f495, %f488;
+ sub.f32 %f497, %f486, %f488;
+ neg.f32 %f498, %f488;
+ add.f32 %f499, %f497, %f497;
+ fma.rn.f32 %f500, %f498, %f486, %f499;
+ mul.rn.f32 %f501, %f471, %f500;
+ add.f32 %f502, %f496, %f488;
+ sub.f32 %f503, %f488, %f502;
+ add.f32 %f504, %f496, %f503;
+ add.f32 %f505, %f501, %f504;
+ add.f32 %f506, %f502, %f505;
+ sub.f32 %f507, %f502, %f506;
+ add.f32 %f508, %f505, %f507;
+ mul.rn.f32 %f510, %f485, %f952;
+ mul.rn.f32 %f512, %f485, %f953;
+ add.f32 %f513, %f510, %f506;
+ sub.f32 %f514, %f510, %f513;
+ add.f32 %f515, %f506, %f514;
+ add.f32 %f516, %f508, %f515;
+ add.f32 %f517, %f512, %f516;
+ add.f32 %f518, %f513, %f517;
+ sub.f32 %f519, %f513, %f518;
+ add.f32 %f520, %f517, %f519;
+ mov.f32 %f521, 0f3EE8BA2E;
+ mul.rn.f32 %f522, %f521, %f518;
+ neg.f32 %f523, %f522;
+ fma.rn.f32 %f524, %f521, %f518, %f523;
+ fma.rn.f32 %f525, %f521, %f520, %f524;
+ mov.f32 %f526, 0f00000000;
+ fma.rn.f32 %f527, %f526, %f518, %f525;
+ add.rn.f32 %f528, %f522, %f527;
+ neg.f32 %f529, %f528;
+ add.rn.f32 %f530, %f522, %f529;
+ add.rn.f32 %f531, %f530, %f527;
+ mov.b32 %r83, %f528;
+ setp.eq.s32 %p55, %r83, 1118925336;
+ add.s32 %r84, %r83, -1;
+ mov.b32 %f532, %r84;
+ add.f32 %f533, %f531, 0f37000000;
+ selp.f32 %f534, %f532, %f528, %p55;
+ selp.f32 %f63, %f533, %f531, %p55;
+ mul.f32 %f535, %f534, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f536, %f535;
+ fma.rn.f32 %f538, %f536, %f954, %f534;
+ fma.rn.f32 %f540, %f536, %f955, %f538;
+ mul.f32 %f541, %f540, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f542, %f541;
+ add.f32 %f543, %f536, 0f00000000;
+ ex2.approx.f32 %f544, %f543;
+ mul.f32 %f545, %f542, %f544;
+ setp.lt.f32 %p56, %f534, 0fC2D20000;
+ selp.f32 %f546, 0f00000000, %f545, %p56;
+ setp.gt.f32 %p57, %f534, 0f42D20000;
+ selp.f32 %f1008, 0f7F800000, %f546, %p57;
+ setp.eq.f32 %p58, %f1008, 0f7F800000;
+ @%p58 bra BB0_34;
+
+ fma.rn.f32 %f1008, %f1008, %f63, %f1008;
+
+BB0_34:
+ mov.f32 %f991, 0f3E68BA2E;
+ cvt.rzi.f32.f32 %f990, %f991;
+ fma.rn.f32 %f989, %f990, 0fC0000000, 0f3EE8BA2E;
+ abs.f32 %f988, %f989;
+ setp.lt.f32 %p59, %f1007, 0f00000000;
+ setp.eq.f32 %p60, %f988, 0f3F800000;
+ and.pred %p3, %p59, %p60;
+ mov.b32 %r85, %f1008;
+ xor.b32 %r86, %r85, -2147483648;
+ mov.b32 %f547, %r86;
+ selp.f32 %f1010, %f547, %f1008, %p3;
+ setp.eq.f32 %p61, %f1007, 0f00000000;
+ @%p61 bra BB0_37;
+ bra.uni BB0_35;
+
+BB0_37:
+ add.f32 %f550, %f1007, %f1007;
+ selp.f32 %f1010, %f550, 0f00000000, %p60;
+ bra.uni BB0_38;
+
+BB0_122:
+ mov.u64 %rd287, image_HDR;
+ cvta.global.u64 %rd282, %rd287;
+ mov.u32 %r215, 8;
+ // inline asm
+ call (%rd281), _rt_buffer_get_64, (%rd282, %r24, %r215, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f903, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs167, %f903;}
+
+ // inline asm
+ mov.u16 %rs168, 0;
+ st.v4.u16 [%rd281], {%rs167, %rs167, %rs167, %rs168};
+
+BB0_123:
+ ld.global.u32 %r216, [additive];
+ setp.eq.s32 %p136, %r216, 0;
+ @%p136 bra BB0_125;
+
+ mov.u64 %rd300, image_RNM0;
+ cvta.global.u64 %rd289, %rd300;
+ mov.u32 %r220, 8;
+ // inline asm
+ call (%rd288), _rt_buffer_get_64, (%rd289, %r24, %r220, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs175, %rs176, %rs177, %rs178}, [%rd288];
+ // inline asm
+ { cvt.f32.f16 %f904, %rs175;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f905, %rs176;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f906, %rs177;}
+
+ // inline asm
+ // inline asm
+ call (%rd294), _rt_buffer_get_64, (%rd289, %r24, %r220, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f907, %f904, 0f00000000;
+ add.f32 %f908, %f905, 0f00000000;
+ add.f32 %f909, %f906, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs174, %f909;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs173, %f908;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs172, %f907;}
+
+ // inline asm
+ mov.u16 %rs179, 0;
+ st.v4.u16 [%rd294], {%rs172, %rs173, %rs174, %rs179};
+ bra.uni BB0_126;
+
+BB0_125:
+ mov.u64 %rd307, image_RNM0;
+ cvta.global.u64 %rd302, %rd307;
+ mov.u32 %r222, 8;
+ // inline asm
+ call (%rd301), _rt_buffer_get_64, (%rd302, %r24, %r222, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f910, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs180, %f910;}
+
+ // inline asm
+ mov.u16 %rs181, 0;
+ st.v4.u16 [%rd301], {%rs180, %rs180, %rs180, %rs181};
+
+BB0_126:
+ ld.global.u32 %r223, [additive];
+ setp.eq.s32 %p137, %r223, 0;
+ @%p137 bra BB0_128;
+
+ mov.u64 %rd320, image_RNM1;
+ cvta.global.u64 %rd309, %rd320;
+ mov.u32 %r227, 8;
+ // inline asm
+ call (%rd308), _rt_buffer_get_64, (%rd309, %r24, %r227, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs188, %rs189, %rs190, %rs191}, [%rd308];
+ // inline asm
+ { cvt.f32.f16 %f911, %rs188;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f912, %rs189;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f913, %rs190;}
+
+ // inline asm
+ // inline asm
+ call (%rd314), _rt_buffer_get_64, (%rd309, %r24, %r227, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f914, %f911, 0f00000000;
+ add.f32 %f915, %f912, 0f00000000;
+ add.f32 %f916, %f913, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs187, %f916;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs186, %f915;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs185, %f914;}
+
+ // inline asm
+ mov.u16 %rs192, 0;
+ st.v4.u16 [%rd314], {%rs185, %rs186, %rs187, %rs192};
+ bra.uni BB0_129;
+
+BB0_128:
+ mov.u64 %rd327, image_RNM1;
+ cvta.global.u64 %rd322, %rd327;
+ mov.u32 %r229, 8;
+ // inline asm
+ call (%rd321), _rt_buffer_get_64, (%rd322, %r24, %r229, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f917, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs193, %f917;}
+
+ // inline asm
+ mov.u16 %rs194, 0;
+ st.v4.u16 [%rd321], {%rs193, %rs193, %rs193, %rs194};
+
+BB0_129:
+ ld.global.u32 %r230, [additive];
+ setp.eq.s32 %p138, %r230, 0;
+ @%p138 bra BB0_131;
+
+ mov.u64 %rd340, image_RNM2;
+ cvta.global.u64 %rd329, %rd340;
+ mov.u32 %r234, 8;
+ // inline asm
+ call (%rd328), _rt_buffer_get_64, (%rd329, %r24, %r234, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs201, %rs202, %rs203, %rs204}, [%rd328];
+ // inline asm
+ { cvt.f32.f16 %f918, %rs201;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f919, %rs202;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f920, %rs203;}
+
+ // inline asm
+ // inline asm
+ call (%rd334), _rt_buffer_get_64, (%rd329, %r24, %r234, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f921, %f918, 0f00000000;
+ add.f32 %f922, %f919, 0f00000000;
+ add.f32 %f923, %f920, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs200, %f923;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs199, %f922;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs198, %f921;}
+
+ // inline asm
+ mov.u16 %rs205, 0;
+ st.v4.u16 [%rd334], {%rs198, %rs199, %rs200, %rs205};
+ bra.uni BB0_132;
+
+BB0_131:
+ mov.u64 %rd347, image_RNM2;
+ cvta.global.u64 %rd342, %rd347;
+ mov.u32 %r236, 8;
+ // inline asm
+ call (%rd341), _rt_buffer_get_64, (%rd342, %r24, %r236, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f924, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs206, %f924;}
+
+ // inline asm
+ mov.u16 %rs207, 0;
+ st.v4.u16 [%rd341], {%rs206, %rs206, %rs206, %rs207};
+
+BB0_132:
+ ld.global.u32 %r237, [additive];
+ setp.eq.s32 %p139, %r237, 0;
+ @%p139 bra BB0_134;
+
+ mov.u64 %rd360, image_RNM3;
+ cvta.global.u64 %rd349, %rd360;
+ mov.u32 %r241, 8;
+ // inline asm
+ call (%rd348), _rt_buffer_get_64, (%rd349, %r24, %r241, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs214, %rs215, %rs216, %rs217}, [%rd348];
+ // inline asm
+ { cvt.f32.f16 %f925, %rs214;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f926, %rs215;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f927, %rs216;}
+
+ // inline asm
+ // inline asm
+ call (%rd354), _rt_buffer_get_64, (%rd349, %r24, %r241, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ add.f32 %f928, %f925, 0f00000000;
+ add.f32 %f929, %f926, 0f00000000;
+ add.f32 %f930, %f927, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs213, %f930;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs212, %f929;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs211, %f928;}
+
+ // inline asm
+ mov.u16 %rs218, 0;
+ st.v4.u16 [%rd354], {%rs211, %rs212, %rs213, %rs218};
+ bra.uni BB0_135;
+
+BB0_134:
+ mov.u64 %rd367, image_RNM3;
+ cvta.global.u64 %rd362, %rd367;
+ mov.u32 %r243, 8;
+ // inline asm
+ call (%rd361), _rt_buffer_get_64, (%rd362, %r24, %r243, %rd8, %rd9, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f931, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs219, %f931;}
+
+ // inline asm
+ mov.u16 %rs220, 0;
+ st.v4.u16 [%rd361], {%rs219, %rs219, %rs219, %rs220};
+ bra.uni BB0_135;
+
+BB0_102:
+ mov.u64 %rd173, image_HDR;
+ cvta.global.u64 %rd168, %rd173;
+ mov.u32 %r172, 8;
+ // inline asm
+ call (%rd167), _rt_buffer_get_64, (%rd168, %r24, %r172, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f861, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs104, %f861;}
+
+ // inline asm
+ st.v4.u16 [%rd167], {%rs104, %rs104, %rs104, %rs93};
+
+BB0_103:
+ ld.global.u32 %r173, [additive];
+ setp.eq.s32 %p128, %r173, 0;
+ mov.f32 %f862, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs105, %f862;}
+
+ // inline asm
+ @%p128 bra BB0_105;
+
+ mov.u64 %rd186, image_RNM0;
+ cvta.global.u64 %rd175, %rd186;
+ mov.u32 %r177, 8;
+ // inline asm
+ call (%rd174), _rt_buffer_get_64, (%rd175, %r24, %r177, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs112, %rs113, %rs114, %rs115}, [%rd174];
+ // inline asm
+ { cvt.f32.f16 %f863, %rs112;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f864, %rs113;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f865, %rs114;}
+
+ // inline asm
+ // inline asm
+ call (%rd180), _rt_buffer_get_64, (%rd175, %r24, %r177, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f866, %f863, 0f00000000;
+ add.f32 %f867, %f864, 0f00000000;
+ add.f32 %f868, %f865, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs111, %f868;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs110, %f867;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs109, %f866;}
+
+ // inline asm
+ st.v4.u16 [%rd180], {%rs109, %rs110, %rs111, %rs105};
+ bra.uni BB0_106;
+
+BB0_105:
+ mov.u64 %rd193, image_RNM0;
+ cvta.global.u64 %rd188, %rd193;
+ mov.u32 %r179, 8;
+ // inline asm
+ call (%rd187), _rt_buffer_get_64, (%rd188, %r24, %r179, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f869, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs116, %f869;}
+
+ // inline asm
+ st.v4.u16 [%rd187], {%rs116, %rs116, %rs116, %rs105};
+
+BB0_106:
+ ld.global.u32 %r180, [additive];
+ setp.eq.s32 %p129, %r180, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs117, %f862;}
+
+ // inline asm
+ @%p129 bra BB0_108;
+
+ mov.u64 %rd206, image_RNM1;
+ cvta.global.u64 %rd195, %rd206;
+ mov.u32 %r184, 8;
+ // inline asm
+ call (%rd194), _rt_buffer_get_64, (%rd195, %r24, %r184, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd194];
+ // inline asm
+ { cvt.f32.f16 %f871, %rs124;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f872, %rs125;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f873, %rs126;}
+
+ // inline asm
+ // inline asm
+ call (%rd200), _rt_buffer_get_64, (%rd195, %r24, %r184, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f874, %f871, 0f00000000;
+ add.f32 %f875, %f872, 0f00000000;
+ add.f32 %f876, %f873, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs123, %f876;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs122, %f875;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs121, %f874;}
+
+ // inline asm
+ st.v4.u16 [%rd200], {%rs121, %rs122, %rs123, %rs117};
+ bra.uni BB0_109;
+
+BB0_108:
+ mov.u64 %rd213, image_RNM1;
+ cvta.global.u64 %rd208, %rd213;
+ mov.u32 %r186, 8;
+ // inline asm
+ call (%rd207), _rt_buffer_get_64, (%rd208, %r24, %r186, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f877, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs128, %f877;}
+
+ // inline asm
+ st.v4.u16 [%rd207], {%rs128, %rs128, %rs128, %rs117};
+
+BB0_109:
+ ld.global.u32 %r187, [additive];
+ setp.eq.s32 %p130, %r187, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs129, %f862;}
+
+ // inline asm
+ @%p130 bra BB0_111;
+
+ mov.u64 %rd226, image_RNM2;
+ cvta.global.u64 %rd215, %rd226;
+ mov.u32 %r191, 8;
+ // inline asm
+ call (%rd214), _rt_buffer_get_64, (%rd215, %r24, %r191, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs136, %rs137, %rs138, %rs139}, [%rd214];
+ // inline asm
+ { cvt.f32.f16 %f879, %rs136;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f880, %rs137;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f881, %rs138;}
+
+ // inline asm
+ // inline asm
+ call (%rd220), _rt_buffer_get_64, (%rd215, %r24, %r191, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f882, %f879, 0f00000000;
+ add.f32 %f883, %f880, 0f00000000;
+ add.f32 %f884, %f881, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs135, %f884;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs134, %f883;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs133, %f882;}
+
+ // inline asm
+ st.v4.u16 [%rd220], {%rs133, %rs134, %rs135, %rs129};
+ bra.uni BB0_112;
+
+BB0_111:
+ mov.u64 %rd233, image_RNM2;
+ cvta.global.u64 %rd228, %rd233;
+ mov.u32 %r193, 8;
+ // inline asm
+ call (%rd227), _rt_buffer_get_64, (%rd228, %r24, %r193, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f885, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs140, %f885;}
+
+ // inline asm
+ st.v4.u16 [%rd227], {%rs140, %rs140, %rs140, %rs129};
+
+BB0_112:
+ ld.global.u32 %r194, [additive];
+ setp.eq.s32 %p131, %r194, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs141, %f862;}
+
+ // inline asm
+ @%p131 bra BB0_114;
+
+ mov.u64 %rd246, image_RNM3;
+ cvta.global.u64 %rd235, %rd246;
+ mov.u32 %r198, 8;
+ // inline asm
+ call (%rd234), _rt_buffer_get_64, (%rd235, %r24, %r198, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs148, %rs149, %rs150, %rs151}, [%rd234];
+ // inline asm
+ { cvt.f32.f16 %f887, %rs148;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f888, %rs149;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f889, %rs150;}
+
+ // inline asm
+ // inline asm
+ call (%rd240), _rt_buffer_get_64, (%rd235, %r24, %r198, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ add.f32 %f890, %f887, 0f00000000;
+ add.f32 %f891, %f888, 0f00000000;
+ add.f32 %f892, %f889, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs147, %f892;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs146, %f891;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs145, %f890;}
+
+ // inline asm
+ st.v4.u16 [%rd240], {%rs145, %rs146, %rs147, %rs141};
+ bra.uni BB0_135;
+
+BB0_114:
+ mov.u64 %rd253, image_RNM3;
+ cvta.global.u64 %rd248, %rd253;
+ mov.u32 %r200, 8;
+ // inline asm
+ call (%rd247), _rt_buffer_get_64, (%rd248, %r24, %r200, %rd6, %rd7, %rd15, %rd15);
+ // inline asm
+ mov.f32 %f893, 0f00000000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs152, %f893;}
+
+ // inline asm
+ st.v4.u16 [%rd247], {%rs152, %rs152, %rs152, %rs141};
+ bra.uni BB0_135;
+
+BB0_35:
+ setp.geu.f32 %p62, %f1007, 0f00000000;
+ @%p62 bra BB0_38;
+
+ mov.f32 %f995, 0f3EE8BA2E;
+ cvt.rzi.f32.f32 %f549, %f995;
+ setp.neu.f32 %p63, %f549, 0f3EE8BA2E;
+ selp.f32 %f1010, 0f7FFFFFFF, %f1010, %p63;
+
+BB0_38:
+ abs.f32 %f992, %f1007;
+ add.f32 %f551, %f992, 0f3EE8BA2E;
+ mov.b32 %r87, %f551;
+ setp.lt.s32 %p65, %r87, 2139095040;
+ @%p65 bra BB0_43;
+
+ abs.f32 %f993, %f1007;
+ setp.gtu.f32 %p66, %f993, 0f7F800000;
+ @%p66 bra BB0_42;
+ bra.uni BB0_40;
+
+BB0_42:
+ add.f32 %f1010, %f1007, 0f3EE8BA2E;
+ bra.uni BB0_43;
+
+BB0_40:
+ abs.f32 %f994, %f1007;
+ setp.neu.f32 %p67, %f994, 0f7F800000;
+ @%p67 bra BB0_43;
+
+ selp.f32 %f1010, 0fFF800000, 0f7F800000, %p3;
+
+BB0_43:
+ mul.f32 %f552, %f1010, 0f437F0000;
+ setp.eq.f32 %p68, %f1007, 0f3F800000;
+ selp.f32 %f553, 0f437F0000, %f552, %p68;
+ cvt.rzi.u32.f32 %r88, %f553;
+ cvt.u16.u32 %rs19, %r88;
+ mov.u16 %rs20, 255;
+ st.v2.u8 [%rd26], {%rs19, %rs20};
+ ld.global.u32 %r248, [imageEnabled];
+
+BB0_44:
+ and.b32 %r89, %r248, 1;
+ setp.eq.b32 %p69, %r89, 1;
+ @!%p69 bra BB0_79;
+ bra.uni BB0_45;
+
+BB0_45:
+ mov.f32 %f962, 0fB5BFBE8E;
+ mov.f32 %f961, 0fBF317200;
+ mov.f32 %f960, 0f35BFBE8E;
+ mov.f32 %f959, 0f3F317200;
+ mov.f32 %f958, 0f3DAAAABD;
+ mov.f32 %f957, 0f3C4CAF63;
+ mov.f32 %f956, 0f3B18F0FE;
+ mov.f32 %f556, 0f3E666666;
+ cvt.rzi.f32.f32 %f557, %f556;
+ fma.rn.f32 %f558, %f557, 0fC0000000, 0f3EE66666;
+ abs.f32 %f74, %f558;
+ abs.f32 %f75, %f58;
+ setp.lt.f32 %p70, %f75, 0f00800000;
+ mul.f32 %f559, %f75, 0f4B800000;
+ selp.f32 %f560, 0fC3170000, 0fC2FE0000, %p70;
+ selp.f32 %f561, %f559, %f75, %p70;
+ mov.b32 %r90, %f561;
+ and.b32 %r91, %r90, 8388607;
+ or.b32 %r92, %r91, 1065353216;
+ mov.b32 %f562, %r92;
+ shr.u32 %r93, %r90, 23;
+ cvt.rn.f32.u32 %f563, %r93;
+ add.f32 %f564, %f560, %f563;
+ setp.gt.f32 %p71, %f562, 0f3FB504F3;
+ mul.f32 %f565, %f562, 0f3F000000;
+ add.f32 %f566, %f564, 0f3F800000;
+ selp.f32 %f567, %f565, %f562, %p71;
+ selp.f32 %f568, %f566, %f564, %p71;
+ add.f32 %f569, %f567, 0fBF800000;
+ add.f32 %f555, %f567, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f554,%f555;
+ // inline asm
+ add.f32 %f570, %f569, %f569;
+ mul.f32 %f571, %f554, %f570;
+ mul.f32 %f572, %f571, %f571;
+ fma.rn.f32 %f575, %f956, %f572, %f957;
+ fma.rn.f32 %f577, %f575, %f572, %f958;
+ mul.rn.f32 %f578, %f577, %f572;
+ mul.rn.f32 %f579, %f578, %f571;
+ sub.f32 %f580, %f569, %f571;
+ neg.f32 %f581, %f571;
+ add.f32 %f582, %f580, %f580;
+ fma.rn.f32 %f583, %f581, %f569, %f582;
+ mul.rn.f32 %f584, %f554, %f583;
+ add.f32 %f585, %f579, %f571;
+ sub.f32 %f586, %f571, %f585;
+ add.f32 %f587, %f579, %f586;
+ add.f32 %f588, %f584, %f587;
+ add.f32 %f589, %f585, %f588;
+ sub.f32 %f590, %f585, %f589;
+ add.f32 %f591, %f588, %f590;
+ mul.rn.f32 %f593, %f568, %f959;
+ mul.rn.f32 %f595, %f568, %f960;
+ add.f32 %f596, %f593, %f589;
+ sub.f32 %f597, %f593, %f596;
+ add.f32 %f598, %f589, %f597;
+ add.f32 %f599, %f591, %f598;
+ add.f32 %f600, %f595, %f599;
+ add.f32 %f601, %f596, %f600;
+ sub.f32 %f602, %f596, %f601;
+ add.f32 %f603, %f600, %f602;
+ mov.f32 %f604, 0f3EE66666;
+ mul.rn.f32 %f605, %f604, %f601;
+ neg.f32 %f606, %f605;
+ fma.rn.f32 %f607, %f604, %f601, %f606;
+ fma.rn.f32 %f608, %f604, %f603, %f607;
+ mov.f32 %f609, 0f00000000;
+ fma.rn.f32 %f610, %f609, %f601, %f608;
+ add.rn.f32 %f611, %f605, %f610;
+ neg.f32 %f612, %f611;
+ add.rn.f32 %f613, %f605, %f612;
+ add.rn.f32 %f614, %f613, %f610;
+ mov.b32 %r94, %f611;
+ setp.eq.s32 %p72, %r94, 1118925336;
+ add.s32 %r95, %r94, -1;
+ mov.b32 %f615, %r95;
+ add.f32 %f616, %f614, 0f37000000;
+ selp.f32 %f617, %f615, %f611, %p72;
+ selp.f32 %f76, %f616, %f614, %p72;
+ mul.f32 %f618, %f617, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f619, %f618;
+ fma.rn.f32 %f621, %f619, %f961, %f617;
+ fma.rn.f32 %f623, %f619, %f962, %f621;
+ mul.f32 %f624, %f623, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f625, %f624;
+ add.f32 %f626, %f619, 0f00000000;
+ ex2.approx.f32 %f627, %f626;
+ mul.f32 %f628, %f625, %f627;
+ setp.lt.f32 %p73, %f617, 0fC2D20000;
+ selp.f32 %f629, 0f00000000, %f628, %p73;
+ setp.gt.f32 %p74, %f617, 0f42D20000;
+ selp.f32 %f1011, 0f7F800000, %f629, %p74;
+ setp.eq.f32 %p75, %f1011, 0f7F800000;
+ @%p75 bra BB0_47;
+
+ fma.rn.f32 %f1011, %f1011, %f76, %f1011;
+
+BB0_47:
+ setp.lt.f32 %p76, %f58, 0f00000000;
+ setp.eq.f32 %p77, %f74, 0f3F800000;
+ and.pred %p4, %p76, %p77;
+ mov.b32 %r96, %f1011;
+ xor.b32 %r97, %r96, -2147483648;
+ mov.b32 %f630, %r97;
+ selp.f32 %f1013, %f630, %f1011, %p4;
+ setp.eq.f32 %p78, %f58, 0f00000000;
+ @%p78 bra BB0_50;
+ bra.uni BB0_48;
+
+BB0_50:
+ add.f32 %f633, %f58, %f58;
+ selp.f32 %f1013, %f633, 0f00000000, %p77;
+ bra.uni BB0_51;
+
+BB0_48:
+ setp.geu.f32 %p79, %f58, 0f00000000;
+ @%p79 bra BB0_51;
+
+ cvt.rzi.f32.f32 %f632, %f604;
+ setp.neu.f32 %p80, %f632, 0f3EE66666;
+ selp.f32 %f1013, 0f7FFFFFFF, %f1013, %p80;
+
+BB0_51:
+ add.f32 %f634, %f75, 0f3EE66666;
+ mov.b32 %r98, %f634;
+ setp.lt.s32 %p82, %r98, 2139095040;
+ @%p82 bra BB0_56;
+
+ setp.gtu.f32 %p83, %f75, 0f7F800000;
+ @%p83 bra BB0_55;
+ bra.uni BB0_53;
+
+BB0_55:
+ add.f32 %f1013, %f58, 0f3EE66666;
+ bra.uni BB0_56;
+
+BB0_53:
+ setp.neu.f32 %p84, %f75, 0f7F800000;
+ @%p84 bra BB0_56;
+
+ selp.f32 %f1013, 0fFF800000, 0f7F800000, %p4;
+
+BB0_56:
+ mov.f32 %f969, 0fB5BFBE8E;
+ mov.f32 %f968, 0fBF317200;
+ mov.f32 %f967, 0f35BFBE8E;
+ mov.f32 %f966, 0f3F317200;
+ mov.f32 %f965, 0f3DAAAABD;
+ mov.f32 %f964, 0f3C4CAF63;
+ mov.f32 %f963, 0f3B18F0FE;
+ setp.eq.f32 %p85, %f58, 0f3F800000;
+ selp.f32 %f87, 0f3F800000, %f1013, %p85;
+ abs.f32 %f88, %f59;
+ setp.lt.f32 %p86, %f88, 0f00800000;
+ mul.f32 %f637, %f88, 0f4B800000;
+ selp.f32 %f638, 0fC3170000, 0fC2FE0000, %p86;
+ selp.f32 %f639, %f637, %f88, %p86;
+ mov.b32 %r99, %f639;
+ and.b32 %r100, %r99, 8388607;
+ or.b32 %r101, %r100, 1065353216;
+ mov.b32 %f640, %r101;
+ shr.u32 %r102, %r99, 23;
+ cvt.rn.f32.u32 %f641, %r102;
+ add.f32 %f642, %f638, %f641;
+ setp.gt.f32 %p87, %f640, 0f3FB504F3;
+ mul.f32 %f643, %f640, 0f3F000000;
+ add.f32 %f644, %f642, 0f3F800000;
+ selp.f32 %f645, %f643, %f640, %p87;
+ selp.f32 %f646, %f644, %f642, %p87;
+ add.f32 %f647, %f645, 0fBF800000;
+ add.f32 %f636, %f645, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f635,%f636;
+ // inline asm
+ add.f32 %f648, %f647, %f647;
+ mul.f32 %f649, %f635, %f648;
+ mul.f32 %f650, %f649, %f649;
+ fma.rn.f32 %f653, %f963, %f650, %f964;
+ fma.rn.f32 %f655, %f653, %f650, %f965;
+ mul.rn.f32 %f656, %f655, %f650;
+ mul.rn.f32 %f657, %f656, %f649;
+ sub.f32 %f658, %f647, %f649;
+ neg.f32 %f659, %f649;
+ add.f32 %f660, %f658, %f658;
+ fma.rn.f32 %f661, %f659, %f647, %f660;
+ mul.rn.f32 %f662, %f635, %f661;
+ add.f32 %f663, %f657, %f649;
+ sub.f32 %f664, %f649, %f663;
+ add.f32 %f665, %f657, %f664;
+ add.f32 %f666, %f662, %f665;
+ add.f32 %f667, %f663, %f666;
+ sub.f32 %f668, %f663, %f667;
+ add.f32 %f669, %f666, %f668;
+ mul.rn.f32 %f671, %f646, %f966;
+ mul.rn.f32 %f673, %f646, %f967;
+ add.f32 %f674, %f671, %f667;
+ sub.f32 %f675, %f671, %f674;
+ add.f32 %f676, %f667, %f675;
+ add.f32 %f677, %f669, %f676;
+ add.f32 %f678, %f673, %f677;
+ add.f32 %f679, %f674, %f678;
+ sub.f32 %f680, %f674, %f679;
+ add.f32 %f681, %f678, %f680;
+ mul.rn.f32 %f683, %f604, %f679;
+ neg.f32 %f684, %f683;
+ fma.rn.f32 %f685, %f604, %f679, %f684;
+ fma.rn.f32 %f686, %f604, %f681, %f685;
+ fma.rn.f32 %f688, %f609, %f679, %f686;
+ add.rn.f32 %f689, %f683, %f688;
+ neg.f32 %f690, %f689;
+ add.rn.f32 %f691, %f683, %f690;
+ add.rn.f32 %f692, %f691, %f688;
+ mov.b32 %r103, %f689;
+ setp.eq.s32 %p88, %r103, 1118925336;
+ add.s32 %r104, %r103, -1;
+ mov.b32 %f693, %r104;
+ add.f32 %f694, %f692, 0f37000000;
+ selp.f32 %f695, %f693, %f689, %p88;
+ selp.f32 %f89, %f694, %f692, %p88;
+ mul.f32 %f696, %f695, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f697, %f696;
+ fma.rn.f32 %f699, %f697, %f968, %f695;
+ fma.rn.f32 %f701, %f697, %f969, %f699;
+ mul.f32 %f702, %f701, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f703, %f702;
+ add.f32 %f704, %f697, 0f00000000;
+ ex2.approx.f32 %f705, %f704;
+ mul.f32 %f706, %f703, %f705;
+ setp.lt.f32 %p89, %f695, 0fC2D20000;
+ selp.f32 %f707, 0f00000000, %f706, %p89;
+ setp.gt.f32 %p90, %f695, 0f42D20000;
+ selp.f32 %f1014, 0f7F800000, %f707, %p90;
+ setp.eq.f32 %p91, %f1014, 0f7F800000;
+ @%p91 bra BB0_58;
+
+ fma.rn.f32 %f1014, %f1014, %f89, %f1014;
+
+BB0_58:
+ setp.lt.f32 %p92, %f59, 0f00000000;
+ and.pred %p5, %p92, %p77;
+ mov.b32 %r105, %f1014;
+ xor.b32 %r106, %r105, -2147483648;
+ mov.b32 %f708, %r106;
+ selp.f32 %f1016, %f708, %f1014, %p5;
+ setp.eq.f32 %p94, %f59, 0f00000000;
+ @%p94 bra BB0_61;
+ bra.uni BB0_59;
+
+BB0_61:
+ add.f32 %f711, %f59, %f59;
+ selp.f32 %f1016, %f711, 0f00000000, %p77;
+ bra.uni BB0_62;
+
+BB0_59:
+ setp.geu.f32 %p95, %f59, 0f00000000;
+ @%p95 bra BB0_62;
+
+ cvt.rzi.f32.f32 %f710, %f604;
+ setp.neu.f32 %p96, %f710, 0f3EE66666;
+ selp.f32 %f1016, 0f7FFFFFFF, %f1016, %p96;
+
+BB0_62:
+ add.f32 %f712, %f88, 0f3EE66666;
+ mov.b32 %r107, %f712;
+ setp.lt.s32 %p98, %r107, 2139095040;
+ @%p98 bra BB0_67;
+
+ setp.gtu.f32 %p99, %f88, 0f7F800000;
+ @%p99 bra BB0_66;
+ bra.uni BB0_64;
+
+BB0_66:
+ add.f32 %f1016, %f59, 0f3EE66666;
+ bra.uni BB0_67;
+
+BB0_64:
+ setp.neu.f32 %p100, %f88, 0f7F800000;
+ @%p100 bra BB0_67;
+
+ selp.f32 %f1016, 0fFF800000, 0f7F800000, %p5;
+
+BB0_67:
+ mov.f32 %f976, 0fB5BFBE8E;
+ mov.f32 %f975, 0fBF317200;
+ mov.f32 %f974, 0f35BFBE8E;
+ mov.f32 %f973, 0f3F317200;
+ mov.f32 %f972, 0f3DAAAABD;
+ mov.f32 %f971, 0f3C4CAF63;
+ mov.f32 %f970, 0f3B18F0FE;
+ setp.eq.f32 %p101, %f59, 0f3F800000;
+ selp.f32 %f100, 0f3F800000, %f1016, %p101;
+ abs.f32 %f101, %f60;
+ setp.lt.f32 %p102, %f101, 0f00800000;
+ mul.f32 %f715, %f101, 0f4B800000;
+ selp.f32 %f716, 0fC3170000, 0fC2FE0000, %p102;
+ selp.f32 %f717, %f715, %f101, %p102;
+ mov.b32 %r108, %f717;
+ and.b32 %r109, %r108, 8388607;
+ or.b32 %r110, %r109, 1065353216;
+ mov.b32 %f718, %r110;
+ shr.u32 %r111, %r108, 23;
+ cvt.rn.f32.u32 %f719, %r111;
+ add.f32 %f720, %f716, %f719;
+ setp.gt.f32 %p103, %f718, 0f3FB504F3;
+ mul.f32 %f721, %f718, 0f3F000000;
+ add.f32 %f722, %f720, 0f3F800000;
+ selp.f32 %f723, %f721, %f718, %p103;
+ selp.f32 %f724, %f722, %f720, %p103;
+ add.f32 %f725, %f723, 0fBF800000;
+ add.f32 %f714, %f723, 0f3F800000;
+ // inline asm
+ rcp.approx.ftz.f32 %f713,%f714;
+ // inline asm
+ add.f32 %f726, %f725, %f725;
+ mul.f32 %f727, %f713, %f726;
+ mul.f32 %f728, %f727, %f727;
+ fma.rn.f32 %f731, %f970, %f728, %f971;
+ fma.rn.f32 %f733, %f731, %f728, %f972;
+ mul.rn.f32 %f734, %f733, %f728;
+ mul.rn.f32 %f735, %f734, %f727;
+ sub.f32 %f736, %f725, %f727;
+ neg.f32 %f737, %f727;
+ add.f32 %f738, %f736, %f736;
+ fma.rn.f32 %f739, %f737, %f725, %f738;
+ mul.rn.f32 %f740, %f713, %f739;
+ add.f32 %f741, %f735, %f727;
+ sub.f32 %f742, %f727, %f741;
+ add.f32 %f743, %f735, %f742;
+ add.f32 %f744, %f740, %f743;
+ add.f32 %f745, %f741, %f744;
+ sub.f32 %f746, %f741, %f745;
+ add.f32 %f747, %f744, %f746;
+ mul.rn.f32 %f749, %f724, %f973;
+ mul.rn.f32 %f751, %f724, %f974;
+ add.f32 %f752, %f749, %f745;
+ sub.f32 %f753, %f749, %f752;
+ add.f32 %f754, %f745, %f753;
+ add.f32 %f755, %f747, %f754;
+ add.f32 %f756, %f751, %f755;
+ add.f32 %f757, %f752, %f756;
+ sub.f32 %f758, %f752, %f757;
+ add.f32 %f759, %f756, %f758;
+ mul.rn.f32 %f761, %f604, %f757;
+ neg.f32 %f762, %f761;
+ fma.rn.f32 %f763, %f604, %f757, %f762;
+ fma.rn.f32 %f764, %f604, %f759, %f763;
+ fma.rn.f32 %f766, %f609, %f757, %f764;
+ add.rn.f32 %f767, %f761, %f766;
+ neg.f32 %f768, %f767;
+ add.rn.f32 %f769, %f761, %f768;
+ add.rn.f32 %f770, %f769, %f766;
+ mov.b32 %r112, %f767;
+ setp.eq.s32 %p104, %r112, 1118925336;
+ add.s32 %r113, %r112, -1;
+ mov.b32 %f771, %r113;
+ add.f32 %f772, %f770, 0f37000000;
+ selp.f32 %f773, %f771, %f767, %p104;
+ selp.f32 %f102, %f772, %f770, %p104;
+ mul.f32 %f774, %f773, 0f3FB8AA3B;
+ cvt.rzi.f32.f32 %f775, %f774;
+ fma.rn.f32 %f777, %f775, %f975, %f773;
+ fma.rn.f32 %f779, %f775, %f976, %f777;
+ mul.f32 %f780, %f779, 0f3FB8AA3B;
+ ex2.approx.ftz.f32 %f781, %f780;
+ add.f32 %f782, %f775, 0f00000000;
+ ex2.approx.f32 %f783, %f782;
+ mul.f32 %f784, %f781, %f783;
+ setp.lt.f32 %p105, %f773, 0fC2D20000;
+ selp.f32 %f785, 0f00000000, %f784, %p105;
+ setp.gt.f32 %p106, %f773, 0f42D20000;
+ selp.f32 %f1017, 0f7F800000, %f785, %p106;
+ setp.eq.f32 %p107, %f1017, 0f7F800000;
+ @%p107 bra BB0_69;
+
+ fma.rn.f32 %f1017, %f1017, %f102, %f1017;
+
+BB0_69:
+ setp.lt.f32 %p108, %f60, 0f00000000;
+ and.pred %p6, %p108, %p77;
+ mov.b32 %r114, %f1017;
+ xor.b32 %r115, %r114, -2147483648;
+ mov.b32 %f786, %r115;
+ selp.f32 %f1019, %f786, %f1017, %p6;
+ setp.eq.f32 %p110, %f60, 0f00000000;
+ @%p110 bra BB0_72;
+ bra.uni BB0_70;
+
+BB0_72:
+ add.f32 %f789, %f60, %f60;
+ selp.f32 %f1019, %f789, 0f00000000, %p77;
+ bra.uni BB0_73;
+
+BB0_70:
+ setp.geu.f32 %p111, %f60, 0f00000000;
+ @%p111 bra BB0_73;
+
+ cvt.rzi.f32.f32 %f788, %f604;
+ setp.neu.f32 %p112, %f788, 0f3EE66666;
+ selp.f32 %f1019, 0f7FFFFFFF, %f1019, %p112;
+
+BB0_73:
+ add.f32 %f790, %f101, 0f3EE66666;
+ mov.b32 %r116, %f790;
+ setp.lt.s32 %p114, %r116, 2139095040;
+ @%p114 bra BB0_78;
+
+ setp.gtu.f32 %p115, %f101, 0f7F800000;
+ @%p115 bra BB0_77;
+ bra.uni BB0_75;
+
+BB0_77:
+ add.f32 %f1019, %f60, 0f3EE66666;
+ bra.uni BB0_78;
+
+BB0_75:
+ setp.neu.f32 %p116, %f101, 0f7F800000;
+ @%p116 bra BB0_78;
+
+ selp.f32 %f1019, 0fFF800000, 0f7F800000, %p6;
+
+BB0_78:
+ mov.u32 %r244, 4;
+ setp.eq.f32 %p117, %f60, 0f3F800000;
+ selp.f32 %f791, 0f3F800000, %f1019, %p117;
+ cvt.u64.u32 %rd36, %r3;
+ cvt.u64.u32 %rd35, %r2;
+ mov.u64 %rd39, image;
+ cvta.global.u64 %rd34, %rd39;
+ // inline asm
+ call (%rd33), _rt_buffer_get_64, (%rd34, %r24, %r244, %rd35, %rd36, %rd15, %rd15);
+ // inline asm
+ cvt.sat.f32.f32 %f792, %f791;
+ mul.f32 %f793, %f792, 0f437FFD71;
+ cvt.rzi.u32.f32 %r119, %f793;
+ cvt.sat.f32.f32 %f794, %f100;
+ mul.f32 %f795, %f794, 0f437FFD71;
+ cvt.rzi.u32.f32 %r120, %f795;
+ cvt.sat.f32.f32 %f796, %f87;
+ mul.f32 %f797, %f796, 0f437FFD71;
+ cvt.rzi.u32.f32 %r121, %f797;
+ cvt.u16.u32 %rs21, %r119;
+ cvt.u16.u32 %rs22, %r121;
+ cvt.u16.u32 %rs23, %r120;
+ mov.u16 %rs24, 255;
+ st.v4.u8 [%rd33], {%rs21, %rs23, %rs22, %rs24};
+ ld.global.u32 %r248, [imageEnabled];
+
+BB0_79:
+ cvt.u64.u32 %rd4, %r2;
+ cvt.u64.u32 %rd5, %r3;
+ and.b32 %r122, %r248, 4;
+ setp.eq.s32 %p118, %r122, 0;
+ @%p118 bra BB0_83;
+
+ ld.global.u32 %r123, [additive];
+ setp.eq.s32 %p119, %r123, 0;
+ mov.f32 %f798, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs25, %f798;}
+
+ // inline asm
+ @%p119 bra BB0_82;
+
+ mov.u64 %rd52, image_HDR;
+ cvta.global.u64 %rd41, %rd52;
+ mov.u32 %r127, 8;
+ // inline asm
+ call (%rd40), _rt_buffer_get_64, (%rd41, %r24, %r127, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs32, %rs33, %rs34, %rs35}, [%rd40];
+ // inline asm
+ { cvt.f32.f16 %f799, %rs32;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f800, %rs33;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f801, %rs34;}
+
+ // inline asm
+ // inline asm
+ call (%rd46), _rt_buffer_get_64, (%rd41, %r24, %r127, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f802, %f58, %f799;
+ add.f32 %f803, %f59, %f800;
+ add.f32 %f804, %f60, %f801;
+ // inline asm
+ { cvt.rn.f16.f32 %rs31, %f804;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs30, %f803;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs29, %f802;}
+
+ // inline asm
+ st.v4.u16 [%rd46], {%rs29, %rs30, %rs31, %rs25};
+ bra.uni BB0_83;
+
+BB0_82:
+ mov.u64 %rd59, image_HDR;
+ cvta.global.u64 %rd54, %rd59;
+ mov.u32 %r129, 8;
+ // inline asm
+ call (%rd53), _rt_buffer_get_64, (%rd54, %r24, %r129, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs38, %f60;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs37, %f59;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs36, %f58;}
+
+ // inline asm
+ st.v4.u16 [%rd53], {%rs36, %rs37, %rs38, %rs25};
+
+BB0_83:
+ mul.f32 %f809, %f44, 0f3E800000;
+ mul.f32 %f810, %f809, %f1007;
+ mul.f32 %f811, %f45, %f810;
+ ld.global.f32 %f812, [lightColor];
+ mul.f32 %f813, %f811, %f812;
+ ld.global.f32 %f814, [lightColor+4];
+ mul.f32 %f815, %f811, %f814;
+ ld.global.f32 %f816, [lightColor+8];
+ mul.f32 %f817, %f811, %f816;
+ mul.f32 %f113, %f324, %f813;
+ mul.f32 %f114, %f325, %f815;
+ mul.f32 %f115, %f326, %f817;
+ ld.global.u32 %r130, [additive];
+ setp.eq.s32 %p120, %r130, 0;
+ mov.f32 %f808, 0f3F800000;
+ // inline asm
+ { cvt.rn.f16.f32 %rs39, %f808;}
+
+ // inline asm
+ @%p120 bra BB0_85;
+
+ mov.u64 %rd72, image_RNM0;
+ cvta.global.u64 %rd61, %rd72;
+ mov.u32 %r134, 8;
+ // inline asm
+ call (%rd60), _rt_buffer_get_64, (%rd61, %r24, %r134, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd60];
+ // inline asm
+ { cvt.f32.f16 %f818, %rs46;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f819, %rs47;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f820, %rs48;}
+
+ // inline asm
+ // inline asm
+ call (%rd66), _rt_buffer_get_64, (%rd61, %r24, %r134, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f821, %f113, %f818;
+ add.f32 %f822, %f114, %f819;
+ add.f32 %f823, %f115, %f820;
+ // inline asm
+ { cvt.rn.f16.f32 %rs45, %f823;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs44, %f822;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs43, %f821;}
+
+ // inline asm
+ st.v4.u16 [%rd66], {%rs43, %rs44, %rs45, %rs39};
+ bra.uni BB0_86;
+
+BB0_85:
+ mov.u64 %rd79, image_RNM0;
+ cvta.global.u64 %rd74, %rd79;
+ mov.u32 %r136, 8;
+ // inline asm
+ call (%rd73), _rt_buffer_get_64, (%rd74, %r24, %r136, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs52, %f115;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs51, %f114;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs50, %f113;}
+
+ // inline asm
+ st.v4.u16 [%rd73], {%rs50, %rs51, %rs52, %rs39};
+
+BB0_86:
+ fma.rn.f32 %f116, %f10, 0f3F000000, 0f3F000000;
+ fma.rn.f32 %f117, %f11, 0f3F000000, 0f3F000000;
+ fma.rn.f32 %f118, %f12, 0f3F000000, 0f3F000000;
+ ld.global.u32 %r137, [additive];
+ setp.eq.s32 %p121, %r137, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs53, %f808;}
+
+ // inline asm
+ @%p121 bra BB0_88;
+
+ mov.u64 %rd92, image_RNM1;
+ cvta.global.u64 %rd81, %rd92;
+ mov.u32 %r141, 8;
+ // inline asm
+ call (%rd80), _rt_buffer_get_64, (%rd81, %r24, %r141, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs60, %rs61, %rs62, %rs63}, [%rd80];
+ // inline asm
+ { cvt.f32.f16 %f828, %rs60;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f829, %rs61;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f830, %rs62;}
+
+ // inline asm
+ // inline asm
+ call (%rd86), _rt_buffer_get_64, (%rd81, %r24, %r141, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f831, %f116, %f828;
+ add.f32 %f832, %f116, %f829;
+ add.f32 %f833, %f116, %f830;
+ // inline asm
+ { cvt.rn.f16.f32 %rs59, %f833;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs58, %f832;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs57, %f831;}
+
+ // inline asm
+ st.v4.u16 [%rd86], {%rs57, %rs58, %rs59, %rs53};
+ bra.uni BB0_89;
+
+BB0_88:
+ mov.u64 %rd99, image_RNM1;
+ cvta.global.u64 %rd94, %rd99;
+ mov.u32 %r143, 8;
+ // inline asm
+ call (%rd93), _rt_buffer_get_64, (%rd94, %r24, %r143, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs64, %f116;}
+
+ // inline asm
+ st.v4.u16 [%rd93], {%rs64, %rs64, %rs64, %rs53};
+
+BB0_89:
+ ld.global.u32 %r144, [additive];
+ setp.eq.s32 %p122, %r144, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs65, %f808;}
+
+ // inline asm
+ @%p122 bra BB0_91;
+
+ mov.u64 %rd112, image_RNM2;
+ cvta.global.u64 %rd101, %rd112;
+ mov.u32 %r148, 8;
+ // inline asm
+ call (%rd100), _rt_buffer_get_64, (%rd101, %r24, %r148, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd100];
+ // inline asm
+ { cvt.f32.f16 %f836, %rs72;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f837, %rs73;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f838, %rs74;}
+
+ // inline asm
+ // inline asm
+ call (%rd106), _rt_buffer_get_64, (%rd101, %r24, %r148, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f839, %f117, %f836;
+ add.f32 %f840, %f117, %f837;
+ add.f32 %f841, %f117, %f838;
+ // inline asm
+ { cvt.rn.f16.f32 %rs71, %f841;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs70, %f840;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs69, %f839;}
+
+ // inline asm
+ st.v4.u16 [%rd106], {%rs69, %rs70, %rs71, %rs65};
+ bra.uni BB0_92;
+
+BB0_91:
+ mov.u64 %rd119, image_RNM2;
+ cvta.global.u64 %rd114, %rd119;
+ mov.u32 %r150, 8;
+ // inline asm
+ call (%rd113), _rt_buffer_get_64, (%rd114, %r24, %r150, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs76, %f117;}
+
+ // inline asm
+ st.v4.u16 [%rd113], {%rs76, %rs76, %rs76, %rs65};
+
+BB0_92:
+ ld.global.u32 %r151, [additive];
+ setp.eq.s32 %p123, %r151, 0;
+ // inline asm
+ { cvt.rn.f16.f32 %rs77, %f808;}
+
+ // inline asm
+ @%p123 bra BB0_94;
+
+ mov.u64 %rd132, image_RNM3;
+ cvta.global.u64 %rd121, %rd132;
+ mov.u32 %r155, 8;
+ // inline asm
+ call (%rd120), _rt_buffer_get_64, (%rd121, %r24, %r155, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd120];
+ // inline asm
+ { cvt.f32.f16 %f844, %rs84;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f845, %rs85;}
+
+ // inline asm
+ // inline asm
+ { cvt.f32.f16 %f846, %rs86;}
+
+ // inline asm
+ // inline asm
+ call (%rd126), _rt_buffer_get_64, (%rd121, %r24, %r155, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ add.f32 %f847, %f118, %f844;
+ add.f32 %f848, %f118, %f845;
+ add.f32 %f849, %f118, %f846;
+ // inline asm
+ { cvt.rn.f16.f32 %rs83, %f849;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs82, %f848;}
+
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs81, %f847;}
+
+ // inline asm
+ st.v4.u16 [%rd126], {%rs81, %rs82, %rs83, %rs77};
+ bra.uni BB0_135;
+
+BB0_94:
+ mov.u64 %rd139, image_RNM3;
+ cvta.global.u64 %rd134, %rd139;
+ mov.u32 %r157, 8;
+ // inline asm
+ call (%rd133), _rt_buffer_get_64, (%rd134, %r24, %r157, %rd4, %rd5, %rd15, %rd15);
+ // inline asm
+ // inline asm
+ { cvt.rn.f16.f32 %rs88, %f118;}
+
+ // inline asm
+ st.v4.u16 [%rd133], {%rs88, %rs88, %rs88, %rs77};
+
+BB0_135:
+ ret;
+}
+
+
generated by cgit v1.2.3-freya (git 2.51.0) at 2025-10-02 15:47:11 +0000