move to self host

1 files changed, 2088 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexGIRNM.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexGIRNM.ptx
new file mode 100644
index 00000000..65e05d9c
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexGIRNM.ptx
@@ -0,0 +1,2088 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 uvtangent[1];
+.global .align 8 .b8 texCoords[8];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 1 .b8 rnd_seeds[1];
+.global .align 1 .b8 lightmapDirect[1];
+.global .texref albedoTex;
+.global .align 4 .u32 samples;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[40];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<110>;
+	.reg .b16 	%rs<144>;
+	.reg .f32 	%f<955>;
+	.reg .b32 	%r<413>;
+	.reg .b64 	%rd<278>;
+
+
+	mov.u64 	%rd277, __local_depot0;
+	cvta.local.u64 	%SP, %rd277;
+	ld.global.u32 	%r1, [samples];
+	ld.global.v2.u32 	{%r102, %r103}, [pixelID];
+	cvt.u64.u32	%rd24, %r102;
+	cvt.u64.u32	%rd25, %r103;
+	mov.u64 	%rd28, uvnormal;
+	cvta.global.u64 	%rd23, %rd28;
+	mov.u32 	%r100, 2;
+	mov.u32 	%r101, 4;
+	mov.u64 	%rd27, 0;
+	// inline asm
+	call (%rd22), _rt_buffer_get_64, (%rd23, %r100, %r101, %rd24, %rd25, %rd27, %rd27);
+	// inline asm
+	ld.u32 	%r2, [%rd22];
+	shr.u32 	%r106, %r2, 16;
+	cvt.u16.u32	%rs1, %r106;
+	and.b16  	%rs5, %rs1, 255;
+	cvt.u16.u32	%rs6, %r2;
+	or.b16  	%rs7, %rs6, %rs5;
+	setp.eq.s16	%p4, %rs7, 0;
+	mov.f32 	%f886, 0f00000000;
+	mov.f32 	%f887, %f886;
+	mov.f32 	%f888, %f886;
+	@%p4 bra 	BB0_2;
+
+	ld.u8 	%rs8, [%rd22+1];
+	and.b16  	%rs10, %rs6, 255;
+	cvt.rn.f32.u16	%f210, %rs10;
+	div.rn.f32 	%f211, %f210, 0f437F0000;
+	fma.rn.f32 	%f212, %f211, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f213, %rs8;
+	div.rn.f32 	%f214, %f213, 0f437F0000;
+	fma.rn.f32 	%f215, %f214, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f216, %rs5;
+	div.rn.f32 	%f217, %f216, 0f437F0000;
+	fma.rn.f32 	%f218, %f217, 0f40000000, 0fBF800000;
+	mul.f32 	%f219, %f215, %f215;
+	fma.rn.f32 	%f220, %f212, %f212, %f219;
+	fma.rn.f32 	%f221, %f218, %f218, %f220;
+	sqrt.rn.f32 	%f222, %f221;
+	rcp.rn.f32 	%f223, %f222;
+	mul.f32 	%f886, %f212, %f223;
+	mul.f32 	%f887, %f215, %f223;
+	mul.f32 	%f888, %f218, %f223;
+
+BB0_2:
+	ld.global.v2.u32 	{%r107, %r108}, [pixelID];
+	ld.global.v2.u32 	{%r110, %r111}, [tileInfo];
+	add.s32 	%r3, %r107, %r110;
+	add.s32 	%r4, %r108, %r111;
+	setp.eq.f32	%p5, %f887, 0f00000000;
+	setp.eq.f32	%p6, %f886, 0f00000000;
+	and.pred  	%p7, %p6, %p5;
+	setp.eq.f32	%p8, %f888, 0f00000000;
+	and.pred  	%p9, %p7, %p8;
+	@%p9 bra 	BB0_108;
+	bra.uni 	BB0_3;
+
+BB0_108:
+	ld.global.u32 	%r412, [imageEnabled];
+	and.b32  	%r312, %r412, 1;
+	setp.eq.b32	%p103, %r312, 1;
+	@!%p103 bra 	BB0_110;
+	bra.uni 	BB0_109;
+
+BB0_109:
+	cvt.u64.u32	%rd177, %r3;
+	cvt.u64.u32	%rd178, %r4;
+	mov.u64 	%rd181, image;
+	cvta.global.u64 	%rd176, %rd181;
+	mov.u64 	%rd180, 0;
+	// inline asm
+	call (%rd175), _rt_buffer_get_64, (%rd176, %r100, %r101, %rd177, %rd178, %rd180, %rd180);
+	// inline asm
+	mov.u16 	%rs100, 0;
+	st.v4.u8 	[%rd175], {%rs100, %rs100, %rs100, %rs100};
+	ld.global.u32 	%r412, [imageEnabled];
+
+BB0_110:
+	and.b32  	%r315, %r412, 4;
+	setp.eq.s32	%p104, %r315, 0;
+	@%p104 bra 	BB0_112;
+
+	cvt.u64.u32	%rd184, %r3;
+	cvt.u64.u32	%rd185, %r4;
+	mov.u64 	%rd188, image_HDR;
+	cvta.global.u64 	%rd183, %rd188;
+	mov.u32 	%r317, 8;
+	mov.u64 	%rd187, 0;
+	// inline asm
+	call (%rd182), _rt_buffer_get_64, (%rd183, %r100, %r317, %rd184, %rd185, %rd187, %rd187);
+	// inline asm
+	mov.f32 	%f801, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs101, %f801;}
+
+	// inline asm
+	mov.u16 	%rs102, 0;
+	st.v4.u16 	[%rd182], {%rs101, %rs101, %rs101, %rs102};
+	ld.global.u32 	%r412, [imageEnabled];
+
+BB0_112:
+	and.b32  	%r318, %r412, 16;
+	setp.eq.s32	%p105, %r318, 0;
+	@%p105 bra 	BB0_114;
+
+	cvt.u64.u32	%rd192, %r4;
+	cvt.u64.u32	%rd191, %r3;
+	mov.u64 	%rd195, image_HDR2;
+	cvta.global.u64 	%rd190, %rd195;
+	mov.u32 	%r320, 8;
+	mov.u64 	%rd194, 0;
+	// inline asm
+	call (%rd189), _rt_buffer_get_64, (%rd190, %r100, %r320, %rd191, %rd192, %rd194, %rd194);
+	// inline asm
+	mov.f32 	%f802, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs103, %f802;}
+
+	// inline asm
+	mov.u16 	%rs104, 0;
+	st.v4.u16 	[%rd189], {%rs103, %rs103, %rs103, %rs104};
+
+BB0_114:
+	cvt.u64.u32	%rd20, %r3;
+	cvt.u64.u32	%rd21, %r4;
+	ld.global.u32 	%r321, [additive];
+	setp.eq.s32	%p106, %r321, 0;
+	@%p106 bra 	BB0_116;
+
+	mov.u64 	%rd208, image_RNM0;
+	cvta.global.u64 	%rd197, %rd208;
+	mov.u32 	%r325, 8;
+	mov.u64 	%rd207, 0;
+	// inline asm
+	call (%rd196), _rt_buffer_get_64, (%rd197, %r100, %r325, %rd20, %rd21, %rd207, %rd207);
+	// inline asm
+	ld.v4.u16 	{%rs111, %rs112, %rs113, %rs114}, [%rd196];
+	// inline asm
+	{  cvt.f32.f16 %f803, %rs111;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f804, %rs112;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f805, %rs113;}
+
+	// inline asm
+	// inline asm
+	call (%rd202), _rt_buffer_get_64, (%rd197, %r100, %r325, %rd20, %rd21, %rd207, %rd207);
+	// inline asm
+	add.f32 	%f806, %f803, 0f00000000;
+	add.f32 	%f807, %f804, 0f00000000;
+	add.f32 	%f808, %f805, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs110, %f808;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs109, %f807;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs108, %f806;}
+
+	// inline asm
+	mov.u16 	%rs115, 0;
+	st.v4.u16 	[%rd202], {%rs108, %rs109, %rs110, %rs115};
+	bra.uni 	BB0_117;
+
+BB0_3:
+	ld.global.v2.u32 	{%r123, %r124}, [pixelID];
+	cvt.u64.u32	%rd31, %r123;
+	cvt.u64.u32	%rd32, %r124;
+	mov.u64 	%rd53, lightmapDirect;
+	cvta.global.u64 	%rd30, %rd53;
+	mov.u32 	%r116, 8;
+	// inline asm
+	call (%rd29), _rt_buffer_get_64, (%rd30, %r100, %r116, %rd31, %rd32, %rd27, %rd27);
+	// inline asm
+	ld.v4.u16 	{%rs15, %rs16, %rs17, %rs18}, [%rd29];
+	// inline asm
+	{  cvt.f32.f16 %f224, %rs15;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f225, %rs16;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f226, %rs17;}
+
+	// inline asm
+	ld.global.v2.u32 	{%r127, %r128}, [pixelID];
+	cvt.u64.u32	%rd37, %r127;
+	cvt.u64.u32	%rd38, %r128;
+	mov.u64 	%rd54, uvpos;
+	cvta.global.u64 	%rd36, %rd54;
+	mov.u32 	%r118, 12;
+	// inline asm
+	call (%rd35), _rt_buffer_get_64, (%rd36, %r100, %r118, %rd37, %rd38, %rd27, %rd27);
+	// inline asm
+	ld.f32 	%f230, [%rd35+8];
+	ld.f32 	%f231, [%rd35+4];
+	ld.f32 	%f232, [%rd35];
+	mul.f32 	%f233, %f232, 0f3456BF95;
+	mul.f32 	%f234, %f231, 0f3456BF95;
+	mul.f32 	%f235, %f230, 0f3456BF95;
+	abs.f32 	%f236, %f886;
+	div.rn.f32 	%f237, %f233, %f236;
+	abs.f32 	%f238, %f887;
+	div.rn.f32 	%f239, %f234, %f238;
+	abs.f32 	%f240, %f888;
+	div.rn.f32 	%f241, %f235, %f240;
+	abs.f32 	%f242, %f237;
+	abs.f32 	%f243, %f239;
+	abs.f32 	%f244, %f241;
+	mov.f32 	%f245, 0f38D1B717;
+	max.f32 	%f246, %f242, %f245;
+	max.f32 	%f247, %f243, %f245;
+	max.f32 	%f248, %f244, %f245;
+	fma.rn.f32 	%f10, %f886, %f246, %f232;
+	fma.rn.f32 	%f11, %f887, %f247, %f231;
+	fma.rn.f32 	%f12, %f888, %f248, %f230;
+	setp.gt.f32	%p10, %f236, %f240;
+	neg.f32 	%f249, %f887;
+	selp.f32	%f250, %f249, 0f00000000, %p10;
+	neg.f32 	%f251, %f888;
+	selp.f32	%f252, %f886, %f251, %p10;
+	selp.f32	%f253, 0f00000000, %f887, %p10;
+	mul.f32 	%f254, %f252, %f252;
+	fma.rn.f32 	%f255, %f250, %f250, %f254;
+	fma.rn.f32 	%f256, %f253, %f253, %f255;
+	sqrt.rn.f32 	%f257, %f256;
+	rcp.rn.f32 	%f258, %f257;
+	mul.f32 	%f13, %f250, %f258;
+	mul.f32 	%f14, %f252, %f258;
+	mul.f32 	%f15, %f253, %f258;
+	ld.global.v2.u32 	{%r131, %r132}, [pixelID];
+	cvt.u64.u32	%rd43, %r131;
+	cvt.u64.u32	%rd44, %r132;
+	mov.u64 	%rd55, rnd_seeds;
+	cvta.global.u64 	%rd42, %rd55;
+	// inline asm
+	call (%rd41), _rt_buffer_get_64, (%rd42, %r100, %r101, %rd43, %rd44, %rd27, %rd27);
+	// inline asm
+	ld.u32 	%r388, [%rd41];
+	ld.global.v2.u32 	{%r135, %r136}, [pixelID];
+	cvt.u64.u32	%rd49, %r135;
+	cvt.u64.u32	%rd50, %r136;
+	mov.u64 	%rd56, uvtangent;
+	cvta.global.u64 	%rd48, %rd56;
+	// inline asm
+	call (%rd47), _rt_buffer_get_64, (%rd48, %r100, %r101, %rd49, %rd50, %rd27, %rd27);
+	// inline asm
+	ld.u32 	%r6, [%rd47];
+	shr.u32 	%r7, %r6, 16;
+	cvt.u16.u32	%rs19, %r7;
+	and.b16  	%rs20, %rs19, 255;
+	cvt.u16.u32	%rs21, %r6;
+	or.b16  	%rs22, %rs21, %rs20;
+	setp.eq.s16	%p11, %rs22, 0;
+	mov.f32 	%f892, 0f00000000;
+	mov.f32 	%f889, %f892;
+	mov.f32 	%f890, %f892;
+	mov.f32 	%f891, %f892;
+	@%p11 bra 	BB0_5;
+
+	ld.u8 	%rs23, [%rd47+1];
+	and.b16  	%rs25, %rs21, 255;
+	cvt.rn.f32.u16	%f259, %rs25;
+	div.rn.f32 	%f260, %f259, 0f437F0000;
+	fma.rn.f32 	%f261, %f260, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f262, %rs23;
+	div.rn.f32 	%f263, %f262, 0f437F0000;
+	fma.rn.f32 	%f264, %f263, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f265, %rs20;
+	div.rn.f32 	%f266, %f265, 0f437F0000;
+	fma.rn.f32 	%f267, %f266, 0f40000000, 0fBF800000;
+	mul.f32 	%f268, %f264, %f264;
+	fma.rn.f32 	%f269, %f261, %f261, %f268;
+	fma.rn.f32 	%f270, %f267, %f267, %f269;
+	sqrt.rn.f32 	%f271, %f270;
+	rcp.rn.f32 	%f272, %f271;
+	mul.f32 	%f889, %f261, %f272;
+	mul.f32 	%f890, %f264, %f272;
+	mul.f32 	%f891, %f267, %f272;
+
+BB0_5:
+	mul.f32 	%f276, %f888, %f890;
+	mul.f32 	%f277, %f887, %f891;
+	sub.f32 	%f278, %f277, %f276;
+	mul.f32 	%f279, %f886, %f891;
+	mul.f32 	%f280, %f888, %f889;
+	sub.f32 	%f281, %f280, %f279;
+	mul.f32 	%f282, %f887, %f889;
+	mul.f32 	%f283, %f886, %f890;
+	sub.f32 	%f284, %f283, %f282;
+	setp.lt.u32	%p12, %r6, 16777216;
+	selp.f32	%f285, 0fBF800000, 0f3F800000, %p12;
+	mul.f32 	%f286, %f278, %f285;
+	mul.f32 	%f287, %f281, %f285;
+	mul.f32 	%f288, %f284, %f285;
+	mul.f32 	%f289, %f286, 0f00000000;
+	mul.f32 	%f290, %f287, 0f00000000;
+	mul.f32 	%f291, %f288, 0f00000000;
+	fma.rn.f32 	%f292, %f889, 0f3F5105EC, %f289;
+	fma.rn.f32 	%f293, %f890, 0f3F5105EC, %f290;
+	fma.rn.f32 	%f294, %f891, 0f3F5105EC, %f291;
+	mul.f32 	%f22, %f886, 0f3F13CD3A;
+	add.f32 	%f23, %f22, %f292;
+	mul.f32 	%f24, %f887, 0f3F13CD3A;
+	add.f32 	%f25, %f24, %f293;
+	mul.f32 	%f26, %f888, 0f3F13CD3A;
+	add.f32 	%f27, %f26, %f294;
+	ld.global.v2.u32 	{%r141, %r142}, [pixelID];
+	cvt.u64.u32	%rd59, %r141;
+	cvt.u64.u32	%rd60, %r142;
+	// inline asm
+	call (%rd57), _rt_buffer_get_64, (%rd48, %r100, %r101, %rd59, %rd60, %rd27, %rd27);
+	// inline asm
+	ld.u32 	%r8, [%rd57];
+	shr.u32 	%r9, %r8, 16;
+	cvt.u16.u32	%rs28, %r9;
+	and.b16  	%rs29, %rs28, 255;
+	cvt.u16.u32	%rs30, %r8;
+	or.b16  	%rs31, %rs30, %rs29;
+	setp.eq.s16	%p13, %rs31, 0;
+	mov.f32 	%f893, %f892;
+	mov.f32 	%f894, %f892;
+	@%p13 bra 	BB0_7;
+
+	ld.u8 	%rs32, [%rd57+1];
+	and.b16  	%rs34, %rs30, 255;
+	cvt.rn.f32.u16	%f295, %rs34;
+	div.rn.f32 	%f296, %f295, 0f437F0000;
+	fma.rn.f32 	%f297, %f296, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f298, %rs32;
+	div.rn.f32 	%f299, %f298, 0f437F0000;
+	fma.rn.f32 	%f300, %f299, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f301, %rs29;
+	div.rn.f32 	%f302, %f301, 0f437F0000;
+	fma.rn.f32 	%f303, %f302, 0f40000000, 0fBF800000;
+	mul.f32 	%f304, %f300, %f300;
+	fma.rn.f32 	%f305, %f297, %f297, %f304;
+	fma.rn.f32 	%f306, %f303, %f303, %f305;
+	sqrt.rn.f32 	%f307, %f306;
+	rcp.rn.f32 	%f308, %f307;
+	mul.f32 	%f892, %f297, %f308;
+	mul.f32 	%f893, %f300, %f308;
+	mul.f32 	%f894, %f303, %f308;
+
+BB0_7:
+	mov.f32 	%f895, 0f00000000;
+	mov.u32 	%r384, 4;
+	mov.u64 	%rd272, 0;
+	mov.u32 	%r383, 2;
+	mul.f32 	%f312, %f888, %f893;
+	mul.f32 	%f313, %f887, %f894;
+	sub.f32 	%f314, %f313, %f312;
+	mul.f32 	%f315, %f886, %f894;
+	mul.f32 	%f316, %f888, %f892;
+	sub.f32 	%f317, %f316, %f315;
+	mul.f32 	%f318, %f887, %f892;
+	mul.f32 	%f319, %f886, %f893;
+	sub.f32 	%f320, %f319, %f318;
+	setp.lt.u32	%p14, %r8, 16777216;
+	selp.f32	%f321, 0fBF800000, 0f3F800000, %p14;
+	mul.f32 	%f322, %f314, %f321;
+	mul.f32 	%f323, %f317, %f321;
+	mul.f32 	%f324, %f320, %f321;
+	mul.f32 	%f325, %f322, 0f3F3504F3;
+	mul.f32 	%f326, %f323, 0f3F3504F3;
+	mul.f32 	%f327, %f324, 0f3F3504F3;
+	fma.rn.f32 	%f328, %f892, 0fBED105EC, %f325;
+	fma.rn.f32 	%f329, %f893, 0fBED105EC, %f326;
+	fma.rn.f32 	%f330, %f894, 0fBED105EC, %f327;
+	add.f32 	%f34, %f22, %f328;
+	add.f32 	%f35, %f24, %f329;
+	add.f32 	%f36, %f26, %f330;
+	ld.global.v2.u32 	{%r147, %r148}, [pixelID];
+	cvt.u64.u32	%rd66, %r147;
+	cvt.u64.u32	%rd67, %r148;
+	// inline asm
+	call (%rd64), _rt_buffer_get_64, (%rd48, %r383, %r384, %rd66, %rd67, %rd272, %rd272);
+	// inline asm
+	ld.u32 	%r10, [%rd64];
+	shr.u32 	%r11, %r10, 16;
+	cvt.u16.u32	%rs37, %r11;
+	and.b16  	%rs38, %rs37, 255;
+	cvt.u16.u32	%rs39, %r10;
+	or.b16  	%rs40, %rs39, %rs38;
+	setp.eq.s16	%p15, %rs40, 0;
+	mov.f32 	%f896, %f895;
+	mov.f32 	%f897, %f895;
+	@%p15 bra 	BB0_9;
+
+	ld.u8 	%rs41, [%rd64+1];
+	and.b16  	%rs43, %rs39, 255;
+	cvt.rn.f32.u16	%f331, %rs43;
+	div.rn.f32 	%f332, %f331, 0f437F0000;
+	fma.rn.f32 	%f333, %f332, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f334, %rs41;
+	div.rn.f32 	%f335, %f334, 0f437F0000;
+	fma.rn.f32 	%f336, %f335, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f337, %rs38;
+	div.rn.f32 	%f338, %f337, 0f437F0000;
+	fma.rn.f32 	%f339, %f338, 0f40000000, 0fBF800000;
+	mul.f32 	%f340, %f336, %f336;
+	fma.rn.f32 	%f341, %f333, %f333, %f340;
+	fma.rn.f32 	%f342, %f339, %f339, %f341;
+	sqrt.rn.f32 	%f343, %f342;
+	rcp.rn.f32 	%f344, %f343;
+	mul.f32 	%f895, %f333, %f344;
+	mul.f32 	%f896, %f336, %f344;
+	mul.f32 	%f897, %f339, %f344;
+
+BB0_9:
+	mul.f32 	%f881, %f887, 0f3F13CD3A;
+	mul.f32 	%f880, %f886, 0f3F13CD3A;
+	mov.f32 	%f910, 0f00000000;
+	mul.f32 	%f357, %f888, %f896;
+	mul.f32 	%f358, %f887, %f897;
+	sub.f32 	%f359, %f358, %f357;
+	mul.f32 	%f360, %f886, %f897;
+	mul.f32 	%f361, %f888, %f895;
+	sub.f32 	%f362, %f361, %f360;
+	mul.f32 	%f363, %f887, %f895;
+	mul.f32 	%f364, %f886, %f896;
+	sub.f32 	%f365, %f364, %f363;
+	setp.lt.u32	%p16, %r10, 16777216;
+	selp.f32	%f366, 0fBF800000, 0f3F800000, %p16;
+	mul.f32 	%f367, %f359, %f366;
+	mul.f32 	%f368, %f362, %f366;
+	mul.f32 	%f369, %f365, %f366;
+	mul.f32 	%f370, %f367, 0fBF3504F3;
+	mul.f32 	%f371, %f368, 0fBF3504F3;
+	mul.f32 	%f372, %f369, 0fBF3504F3;
+	fma.rn.f32 	%f373, %f895, 0fBED105EC, %f370;
+	fma.rn.f32 	%f374, %f896, 0fBED105EC, %f371;
+	fma.rn.f32 	%f375, %f897, 0fBED105EC, %f372;
+	add.f32 	%f43, %f880, %f373;
+	add.f32 	%f44, %f881, %f374;
+	add.f32 	%f45, %f26, %f375;
+	setp.lt.s32	%p17, %r1, 1;
+	mov.f32 	%f911, %f910;
+	mov.f32 	%f912, %f910;
+	mov.f32 	%f913, %f910;
+	mov.f32 	%f914, %f910;
+	mov.f32 	%f915, %f910;
+	mov.f32 	%f916, %f910;
+	mov.f32 	%f917, %f910;
+	mov.f32 	%f918, %f910;
+	mov.f32 	%f919, %f910;
+	mov.f32 	%f920, %f910;
+	mov.f32 	%f921, %f910;
+	@%p17 bra 	BB0_60;
+
+	cvt.rn.f32.s32	%f388, %r1;
+	rcp.rn.f32 	%f46, %f388;
+	mul.f32 	%f47, %f10, 0f3456BF95;
+	mul.f32 	%f48, %f11, 0f3456BF95;
+	mul.f32 	%f49, %f12, 0f3456BF95;
+	mul.f32 	%f389, %f888, %f14;
+	mul.f32 	%f390, %f887, %f15;
+	sub.f32 	%f50, %f389, %f390;
+	mul.f32 	%f391, %f886, %f15;
+	mul.f32 	%f392, %f888, %f13;
+	sub.f32 	%f51, %f391, %f392;
+	mul.f32 	%f393, %f887, %f13;
+	mul.f32 	%f394, %f886, %f14;
+	sub.f32 	%f52, %f393, %f394;
+	mov.f32 	%f910, 0f00000000;
+	mov.u32 	%r151, 0;
+	abs.f32 	%f395, %f48;
+	abs.f32 	%f396, %f47;
+	max.f32 	%f397, %f396, %f395;
+	abs.f32 	%f398, %f49;
+	max.f32 	%f399, %f397, %f398;
+	mov.u32 	%r385, %r151;
+	mov.f32 	%f911, %f910;
+	mov.f32 	%f912, %f910;
+	mov.f32 	%f913, %f910;
+	mov.f32 	%f914, %f910;
+	mov.f32 	%f915, %f910;
+	mov.f32 	%f916, %f910;
+	mov.f32 	%f917, %f910;
+	mov.f32 	%f918, %f910;
+	mov.f32 	%f919, %f910;
+	mov.f32 	%f920, %f910;
+	mov.f32 	%f921, %f910;
+
+BB0_11:
+	mov.u32 	%r387, %r151;
+
+BB0_12:
+	mov.u32 	%r15, %r388;
+	cvt.rn.f32.s32	%f864, %r385;
+	mad.lo.s32 	%r153, %r15, 1664525, 1013904223;
+	and.b32  	%r154, %r153, 16777215;
+	cvt.rn.f32.u32	%f401, %r154;
+	fma.rn.f32 	%f402, %f401, 0f33800000, %f864;
+	mul.f32 	%f79, %f46, %f402;
+	mad.lo.s32 	%r16, %r153, 1664525, 1013904223;
+	and.b32  	%r155, %r16, 16777215;
+	cvt.rn.f32.u32	%f403, %r155;
+	cvt.rn.f32.s32	%f404, %r387;
+	fma.rn.f32 	%f405, %f403, 0f33800000, %f404;
+	mul.f32 	%f406, %f46, %f405;
+	mul.f32 	%f407, %f79, %f79;
+	mov.f32 	%f408, 0f3F800000;
+	sub.f32 	%f409, %f408, %f407;
+	mov.f32 	%f410, 0f00000000;
+	max.f32 	%f411, %f410, %f409;
+	sqrt.rn.f32 	%f80, %f411;
+	mul.f32 	%f928, %f406, 0f40C90FDB;
+	abs.f32 	%f82, %f928;
+	setp.neu.f32	%p18, %f82, 0f7F800000;
+	mov.f32 	%f922, %f928;
+	@%p18 bra 	BB0_14;
+
+	mov.f32 	%f865, 0f00000000;
+	mul.rn.f32 	%f922, %f928, %f865;
+
+BB0_14:
+	mul.f32 	%f413, %f922, 0f3F22F983;
+	cvt.rni.s32.f32	%r398, %f413;
+	cvt.rn.f32.s32	%f414, %r398;
+	neg.f32 	%f415, %f414;
+	mov.f32 	%f416, 0f3FC90FDA;
+	fma.rn.f32 	%f417, %f415, %f416, %f922;
+	mov.f32 	%f418, 0f33A22168;
+	fma.rn.f32 	%f419, %f415, %f418, %f417;
+	mov.f32 	%f420, 0f27C234C5;
+	fma.rn.f32 	%f923, %f415, %f420, %f419;
+	abs.f32 	%f421, %f922;
+	setp.leu.f32	%p19, %f421, 0f47CE4780;
+	@%p19 bra 	BB0_25;
+
+	add.u64 	%rd72, %SP, 12;
+	cvta.to.local.u64 	%rd273, %rd72;
+	mov.b32 	 %r18, %f922;
+	shl.b32 	%r158, %r18, 8;
+	or.b32  	%r20, %r158, -2147483648;
+	mov.u32 	%r389, 0;
+	mov.u64 	%rd274, 0;
+	mov.u32 	%r390, %r389;
+
+BB0_16:
+	.pragma "nounroll";
+	add.u64 	%rd267, %SP, 12;
+	cvta.to.local.u64 	%rd266, %rd267;
+	shl.b64 	%rd73, %rd274, 2;
+	mov.u64 	%rd74, __cudart_i2opi_f;
+	add.s64 	%rd75, %rd74, %rd73;
+	ld.const.u32 	%r161, [%rd75];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r159, %r161, %r20, %r390;
+	madc.hi.u32     %r390, %r161, %r20,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd273], %r159;
+	add.s32 	%r389, %r389, 1;
+	cvt.s64.s32	%rd274, %r389;
+	mul.wide.s32 	%rd78, %r389, 4;
+	add.s64 	%rd273, %rd266, %rd78;
+	setp.ne.s32	%p20, %r389, 6;
+	@%p20 bra 	BB0_16;
+
+	mov.b32 	 %r365, %f922;
+	shr.u32 	%r364, %r365, 23;
+	add.u64 	%rd268, %SP, 12;
+	and.b32  	%r164, %r364, 255;
+	add.s32 	%r165, %r164, -128;
+	shr.u32 	%r166, %r165, 5;
+	cvta.to.local.u64 	%rd80, %rd268;
+	st.local.u32 	[%rd80+24], %r390;
+	mov.u32 	%r167, 6;
+	sub.s32 	%r168, %r167, %r166;
+	mul.wide.s32 	%rd81, %r168, 4;
+	add.s64 	%rd10, %rd80, %rd81;
+	ld.local.u32 	%r391, [%rd10];
+	ld.local.u32 	%r392, [%rd10+-4];
+	and.b32  	%r28, %r364, 31;
+	setp.eq.s32	%p21, %r28, 0;
+	@%p21 bra 	BB0_19;
+
+	mov.u32 	%r169, 32;
+	sub.s32 	%r170, %r169, %r28;
+	shr.u32 	%r171, %r392, %r170;
+	shl.b32 	%r172, %r391, %r28;
+	add.s32 	%r391, %r171, %r172;
+	ld.local.u32 	%r173, [%rd10+-8];
+	shr.u32 	%r174, %r173, %r170;
+	shl.b32 	%r175, %r392, %r28;
+	add.s32 	%r392, %r174, %r175;
+
+BB0_19:
+	mov.b32 	 %r368, %f922;
+	and.b32  	%r394, %r368, -2147483648;
+	shr.u32 	%r176, %r392, 30;
+	shl.b32 	%r177, %r391, 2;
+	add.s32 	%r393, %r176, %r177;
+	shl.b32 	%r34, %r392, 2;
+	shr.u32 	%r178, %r393, 31;
+	shr.u32 	%r179, %r391, 30;
+	add.s32 	%r35, %r178, %r179;
+	setp.eq.s32	%p22, %r178, 0;
+	@%p22 bra 	BB0_20;
+	bra.uni 	BB0_21;
+
+BB0_20:
+	mov.u32 	%r395, %r34;
+	bra.uni 	BB0_22;
+
+BB0_21:
+	mov.b32 	 %r370, %f922;
+	and.b32  	%r369, %r370, -2147483648;
+	not.b32 	%r180, %r393;
+	neg.s32 	%r395, %r34;
+	setp.eq.s32	%p23, %r34, 0;
+	selp.u32	%r181, 1, 0, %p23;
+	add.s32 	%r393, %r181, %r180;
+	xor.b32  	%r394, %r369, -2147483648;
+
+BB0_22:
+	mov.b32 	 %r372, %f922;
+	and.b32  	%r371, %r372, -2147483648;
+	clz.b32 	%r397, %r393;
+	setp.eq.s32	%p24, %r397, 0;
+	shl.b32 	%r182, %r393, %r397;
+	mov.u32 	%r183, 32;
+	sub.s32 	%r184, %r183, %r397;
+	shr.u32 	%r185, %r395, %r184;
+	add.s32 	%r186, %r185, %r182;
+	selp.b32	%r43, %r393, %r186, %p24;
+	mov.u32 	%r187, -921707870;
+	mul.hi.u32 	%r396, %r43, %r187;
+	setp.eq.s32	%p25, %r371, 0;
+	neg.s32 	%r188, %r35;
+	selp.b32	%r398, %r35, %r188, %p25;
+	setp.lt.s32	%p26, %r396, 1;
+	@%p26 bra 	BB0_24;
+
+	mul.lo.s32 	%r189, %r43, -921707870;
+	shr.u32 	%r190, %r189, 31;
+	shl.b32 	%r191, %r396, 1;
+	add.s32 	%r396, %r190, %r191;
+	add.s32 	%r397, %r397, 1;
+
+BB0_24:
+	mov.u32 	%r192, 126;
+	sub.s32 	%r193, %r192, %r397;
+	shl.b32 	%r194, %r193, 23;
+	add.s32 	%r195, %r396, 1;
+	shr.u32 	%r196, %r195, 7;
+	add.s32 	%r197, %r196, 1;
+	shr.u32 	%r198, %r197, 1;
+	add.s32 	%r199, %r198, %r194;
+	or.b32  	%r200, %r199, %r394;
+	mov.b32 	 %f923, %r200;
+
+BB0_25:
+	add.s32 	%r51, %r398, 1;
+	and.b32  	%r52, %r51, 1;
+	setp.eq.s32	%p27, %r52, 0;
+	@%p27 bra 	BB0_27;
+	bra.uni 	BB0_26;
+
+BB0_27:
+	mul.rn.f32 	%f873, %f923, %f923;
+	mov.f32 	%f424, 0f3C08839E;
+	mov.f32 	%f425, 0fB94CA1F9;
+	fma.rn.f32 	%f924, %f425, %f873, %f424;
+	bra.uni 	BB0_28;
+
+BB0_26:
+	mul.rn.f32 	%f869, %f923, %f923;
+	mov.f32 	%f422, 0fBAB6061A;
+	mov.f32 	%f423, 0f37CCF5CE;
+	fma.rn.f32 	%f924, %f423, %f869, %f422;
+
+BB0_28:
+	@%p27 bra 	BB0_30;
+	bra.uni 	BB0_29;
+
+BB0_30:
+	mul.rn.f32 	%f872, %f923, %f923;
+	mov.f32 	%f868, 0f00000000;
+	mov.f32 	%f429, 0fBE2AAAA3;
+	fma.rn.f32 	%f430, %f924, %f872, %f429;
+	fma.rn.f32 	%f925, %f430, %f872, %f868;
+	bra.uni 	BB0_31;
+
+BB0_29:
+	mul.rn.f32 	%f870, %f923, %f923;
+	mov.f32 	%f426, 0f3D2AAAA5;
+	fma.rn.f32 	%f427, %f924, %f870, %f426;
+	mov.f32 	%f428, 0fBF000000;
+	fma.rn.f32 	%f925, %f427, %f870, %f428;
+
+BB0_31:
+	fma.rn.f32 	%f926, %f925, %f923, %f923;
+	@%p27 bra 	BB0_33;
+
+	mul.rn.f32 	%f871, %f923, %f923;
+	mov.f32 	%f855, 0f3F800000;
+	fma.rn.f32 	%f926, %f925, %f871, %f855;
+
+BB0_33:
+	add.s32 	%r373, %r398, 1;
+	and.b32  	%r201, %r373, 2;
+	setp.eq.s32	%p30, %r201, 0;
+	@%p30 bra 	BB0_35;
+
+	mov.f32 	%f856, 0f00000000;
+	mov.f32 	%f434, 0fBF800000;
+	fma.rn.f32 	%f926, %f926, %f434, %f856;
+
+BB0_35:
+	abs.f32 	%f857, %f928;
+	setp.neu.f32	%p109, %f857, 0f7F800000;
+	@%p109 bra 	BB0_37;
+
+	mov.f32 	%f867, 0f00000000;
+	mul.rn.f32 	%f928, %f928, %f867;
+
+BB0_37:
+	mov.f32 	%f860, 0f27C234C5;
+	mov.f32 	%f859, 0f33A22168;
+	mov.f32 	%f858, 0f3FC90FDA;
+	mul.f32 	%f436, %f928, 0f3F22F983;
+	cvt.rni.s32.f32	%r408, %f436;
+	cvt.rn.f32.s32	%f437, %r408;
+	neg.f32 	%f438, %f437;
+	fma.rn.f32 	%f440, %f438, %f858, %f928;
+	fma.rn.f32 	%f442, %f438, %f859, %f440;
+	fma.rn.f32 	%f929, %f438, %f860, %f442;
+	abs.f32 	%f444, %f928;
+	setp.leu.f32	%p32, %f444, 0f47CE4780;
+	@%p32 bra 	BB0_48;
+
+	mov.u64 	%rd276, 0;
+	add.u64 	%rd83, %SP, 12;
+	cvta.to.local.u64 	%rd275, %rd83;
+	mov.b32 	 %r54, %f928;
+	shl.b32 	%r204, %r54, 8;
+	or.b32  	%r56, %r204, -2147483648;
+	mov.u32 	%r399, 0;
+	mov.u32 	%r400, %r399;
+
+BB0_39:
+	.pragma "nounroll";
+	add.u64 	%rd270, %SP, 12;
+	cvta.to.local.u64 	%rd269, %rd270;
+	shl.b64 	%rd84, %rd276, 2;
+	mov.u64 	%rd85, __cudart_i2opi_f;
+	add.s64 	%rd86, %rd85, %rd84;
+	ld.const.u32 	%r207, [%rd86];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r205, %r207, %r56, %r400;
+	madc.hi.u32     %r400, %r207, %r56,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd275], %r205;
+	add.s32 	%r399, %r399, 1;
+	cvt.s64.s32	%rd276, %r399;
+	mul.wide.s32 	%rd87, %r399, 4;
+	add.s64 	%rd275, %rd269, %rd87;
+	setp.ne.s32	%p33, %r399, 6;
+	@%p33 bra 	BB0_39;
+
+	mov.b32 	 %r375, %f928;
+	shr.u32 	%r374, %r375, 23;
+	add.u64 	%rd271, %SP, 12;
+	and.b32  	%r210, %r374, 255;
+	add.s32 	%r211, %r210, -128;
+	shr.u32 	%r212, %r211, 5;
+	cvta.to.local.u64 	%rd89, %rd271;
+	st.local.u32 	[%rd89+24], %r400;
+	mov.u32 	%r213, 6;
+	sub.s32 	%r214, %r213, %r212;
+	mul.wide.s32 	%rd90, %r214, 4;
+	add.s64 	%rd17, %rd89, %rd90;
+	ld.local.u32 	%r401, [%rd17];
+	ld.local.u32 	%r402, [%rd17+-4];
+	and.b32  	%r64, %r374, 31;
+	setp.eq.s32	%p34, %r64, 0;
+	@%p34 bra 	BB0_42;
+
+	mov.u32 	%r215, 32;
+	sub.s32 	%r216, %r215, %r64;
+	shr.u32 	%r217, %r402, %r216;
+	shl.b32 	%r218, %r401, %r64;
+	add.s32 	%r401, %r217, %r218;
+	ld.local.u32 	%r219, [%rd17+-8];
+	shr.u32 	%r220, %r219, %r216;
+	shl.b32 	%r221, %r402, %r64;
+	add.s32 	%r402, %r220, %r221;
+
+BB0_42:
+	mov.b32 	 %r378, %f928;
+	and.b32  	%r404, %r378, -2147483648;
+	shr.u32 	%r222, %r402, 30;
+	shl.b32 	%r223, %r401, 2;
+	add.s32 	%r403, %r222, %r223;
+	shl.b32 	%r70, %r402, 2;
+	shr.u32 	%r224, %r403, 31;
+	shr.u32 	%r225, %r401, 30;
+	add.s32 	%r71, %r224, %r225;
+	setp.eq.s32	%p35, %r224, 0;
+	@%p35 bra 	BB0_43;
+	bra.uni 	BB0_44;
+
+BB0_43:
+	mov.u32 	%r405, %r70;
+	bra.uni 	BB0_45;
+
+BB0_44:
+	mov.b32 	 %r380, %f928;
+	and.b32  	%r379, %r380, -2147483648;
+	not.b32 	%r226, %r403;
+	neg.s32 	%r405, %r70;
+	setp.eq.s32	%p36, %r70, 0;
+	selp.u32	%r227, 1, 0, %p36;
+	add.s32 	%r403, %r227, %r226;
+	xor.b32  	%r404, %r379, -2147483648;
+
+BB0_45:
+	mov.b32 	 %r382, %f928;
+	and.b32  	%r381, %r382, -2147483648;
+	clz.b32 	%r407, %r403;
+	setp.eq.s32	%p37, %r407, 0;
+	shl.b32 	%r228, %r403, %r407;
+	mov.u32 	%r229, 32;
+	sub.s32 	%r230, %r229, %r407;
+	shr.u32 	%r231, %r405, %r230;
+	add.s32 	%r232, %r231, %r228;
+	selp.b32	%r79, %r403, %r232, %p37;
+	mov.u32 	%r233, -921707870;
+	mul.hi.u32 	%r406, %r79, %r233;
+	setp.eq.s32	%p38, %r381, 0;
+	neg.s32 	%r234, %r71;
+	selp.b32	%r408, %r71, %r234, %p38;
+	setp.lt.s32	%p39, %r406, 1;
+	@%p39 bra 	BB0_47;
+
+	mul.lo.s32 	%r235, %r79, -921707870;
+	shr.u32 	%r236, %r235, 31;
+	shl.b32 	%r237, %r406, 1;
+	add.s32 	%r406, %r236, %r237;
+	add.s32 	%r407, %r407, 1;
+
+BB0_47:
+	mov.u32 	%r238, 126;
+	sub.s32 	%r239, %r238, %r407;
+	shl.b32 	%r240, %r239, 23;
+	add.s32 	%r241, %r406, 1;
+	shr.u32 	%r242, %r241, 7;
+	add.s32 	%r243, %r242, 1;
+	shr.u32 	%r244, %r243, 1;
+	add.s32 	%r245, %r244, %r240;
+	or.b32  	%r246, %r245, %r404;
+	mov.b32 	 %f929, %r246;
+
+BB0_48:
+	and.b32  	%r87, %r408, 1;
+	setp.eq.s32	%p40, %r87, 0;
+	@%p40 bra 	BB0_50;
+	bra.uni 	BB0_49;
+
+BB0_50:
+	mul.rn.f32 	%f885, %f929, %f929;
+	mov.f32 	%f447, 0f3C08839E;
+	mov.f32 	%f448, 0fB94CA1F9;
+	fma.rn.f32 	%f930, %f448, %f885, %f447;
+	bra.uni 	BB0_51;
+
+BB0_49:
+	mul.rn.f32 	%f882, %f929, %f929;
+	mov.f32 	%f445, 0fBAB6061A;
+	mov.f32 	%f446, 0f37CCF5CE;
+	fma.rn.f32 	%f930, %f446, %f882, %f445;
+
+BB0_51:
+	@%p40 bra 	BB0_53;
+	bra.uni 	BB0_52;
+
+BB0_53:
+	mul.rn.f32 	%f884, %f929, %f929;
+	mov.f32 	%f866, 0f00000000;
+	mov.f32 	%f452, 0fBE2AAAA3;
+	fma.rn.f32 	%f453, %f930, %f884, %f452;
+	fma.rn.f32 	%f931, %f453, %f884, %f866;
+	bra.uni 	BB0_54;
+
+BB0_52:
+	mul.rn.f32 	%f883, %f929, %f929;
+	mov.f32 	%f449, 0f3D2AAAA5;
+	fma.rn.f32 	%f450, %f930, %f883, %f449;
+	mov.f32 	%f451, 0fBF000000;
+	fma.rn.f32 	%f931, %f450, %f883, %f451;
+
+BB0_54:
+	fma.rn.f32 	%f932, %f931, %f929, %f929;
+	@%p40 bra 	BB0_56;
+
+	mul.rn.f32 	%f874, %f929, %f929;
+	mov.f32 	%f861, 0f3F800000;
+	fma.rn.f32 	%f932, %f931, %f874, %f861;
+
+BB0_56:
+	and.b32  	%r247, %r408, 2;
+	setp.eq.s32	%p43, %r247, 0;
+	@%p43 bra 	BB0_58;
+
+	mov.f32 	%f862, 0f00000000;
+	mov.f32 	%f457, 0fBF800000;
+	fma.rn.f32 	%f932, %f932, %f457, %f862;
+
+BB0_58:
+	mad.lo.s32 	%r361, %r15, 1664525, 1013904223;
+	mad.lo.s32 	%r388, %r361, 1664525, 1013904223;
+	max.f32 	%f863, %f399, %f245;
+	mul.f32 	%f466, %f80, %f926;
+	add.u64 	%rd91, %SP, 0;
+	cvta.to.local.u64 	%rd92, %rd91;
+	mul.f32 	%f467, %f80, %f932;
+	mul.f32 	%f468, %f13, %f467;
+	mul.f32 	%f469, %f14, %f467;
+	mul.f32 	%f470, %f15, %f467;
+	fma.rn.f32 	%f471, %f50, %f466, %f468;
+	fma.rn.f32 	%f472, %f51, %f466, %f469;
+	fma.rn.f32 	%f473, %f52, %f466, %f470;
+	fma.rn.f32 	%f461, %f886, %f79, %f471;
+	fma.rn.f32 	%f462, %f887, %f79, %f472;
+	fma.rn.f32 	%f463, %f888, %f79, %f473;
+	mov.u32 	%r249, 0;
+	st.local.u32 	[%rd92+8], %r249;
+	st.local.u32 	[%rd92+4], %r249;
+	st.local.u32 	[%rd92], %r249;
+	ld.global.u32 	%r248, [root];
+	mov.f32 	%f465, 0f6C4ECB8F;
+	// inline asm
+	call _rt_trace_64, (%r248, %f10, %f11, %f12, %f461, %f462, %f463, %r249, %f863, %f465, %rd91, %r118);
+	// inline asm
+	mul.f32 	%f474, %f25, %f462;
+	fma.rn.f32 	%f475, %f23, %f461, %f474;
+	fma.rn.f32 	%f476, %f27, %f463, %f475;
+	cvt.sat.f32.f32	%f477, %f476;
+	ld.local.f32 	%f478, [%rd92];
+	ld.local.f32 	%f479, [%rd92+4];
+	ld.local.f32 	%f480, [%rd92+8];
+	fma.rn.f32 	%f915, %f477, %f478, %f915;
+	fma.rn.f32 	%f914, %f477, %f479, %f914;
+	fma.rn.f32 	%f913, %f477, %f480, %f913;
+	mul.f32 	%f481, %f35, %f462;
+	fma.rn.f32 	%f482, %f34, %f461, %f481;
+	fma.rn.f32 	%f483, %f36, %f463, %f482;
+	cvt.sat.f32.f32	%f484, %f483;
+	fma.rn.f32 	%f918, %f484, %f478, %f918;
+	fma.rn.f32 	%f917, %f484, %f479, %f917;
+	fma.rn.f32 	%f916, %f484, %f480, %f916;
+	mul.f32 	%f485, %f44, %f462;
+	fma.rn.f32 	%f486, %f43, %f461, %f485;
+	fma.rn.f32 	%f487, %f45, %f463, %f486;
+	cvt.sat.f32.f32	%f488, %f487;
+	fma.rn.f32 	%f921, %f488, %f478, %f921;
+	fma.rn.f32 	%f920, %f488, %f479, %f920;
+	fma.rn.f32 	%f919, %f488, %f480, %f919;
+	mul.f32 	%f489, %f887, %f462;
+	fma.rn.f32 	%f490, %f886, %f461, %f489;
+	fma.rn.f32 	%f491, %f888, %f463, %f490;
+	cvt.sat.f32.f32	%f492, %f491;
+	fma.rn.f32 	%f912, %f492, %f478, %f912;
+	fma.rn.f32 	%f911, %f492, %f479, %f911;
+	fma.rn.f32 	%f910, %f492, %f480, %f910;
+	add.s32 	%r387, %r387, 1;
+	setp.lt.s32	%p44, %r387, %r1;
+	@%p44 bra 	BB0_12;
+
+	mad.lo.s32 	%r363, %r15, 1664525, 1013904223;
+	mad.lo.s32 	%r388, %r363, 1664525, 1013904223;
+	add.s32 	%r385, %r385, 1;
+	setp.lt.s32	%p45, %r385, %r1;
+	@%p45 bra 	BB0_11;
+
+BB0_60:
+	mul.lo.s32 	%r251, %r1, %r1;
+	cvt.rn.f32.s32	%f493, %r251;
+	rcp.rn.f32 	%f494, %f493;
+	cvt.rn.f32.u32	%f495, %r4;
+	cvt.rn.f32.u32	%f496, %r3;
+	tex.2d.v4.f32.f32	{%f497, %f498, %f499, %f500}, [albedoTex, {%f496, %f495}];
+	mul.f32 	%f141, %f915, %f494;
+	mul.f32 	%f142, %f914, %f494;
+	mul.f32 	%f143, %f913, %f494;
+	mul.f32 	%f144, %f918, %f494;
+	mul.f32 	%f145, %f917, %f494;
+	mul.f32 	%f146, %f916, %f494;
+	mul.f32 	%f147, %f921, %f494;
+	mul.f32 	%f148, %f920, %f494;
+	mul.f32 	%f149, %f919, %f494;
+	mul.f32 	%f501, %f912, %f494;
+	mul.f32 	%f502, %f911, %f494;
+	mul.f32 	%f503, %f910, %f494;
+	fma.rn.f32 	%f150, %f912, %f494, %f501;
+	fma.rn.f32 	%f151, %f911, %f494, %f502;
+	fma.rn.f32 	%f152, %f910, %f494, %f503;
+	mul.f32 	%f153, %f150, %f497;
+	mul.f32 	%f154, %f151, %f498;
+	mul.f32 	%f155, %f152, %f499;
+	add.f32 	%f156, %f224, %f153;
+	add.f32 	%f157, %f225, %f154;
+	add.f32 	%f158, %f226, %f155;
+	ld.global.u32 	%r410, [imageEnabled];
+	and.b32  	%r252, %r410, 1;
+	setp.eq.b32	%p46, %r252, 1;
+	@!%p46 bra 	BB0_95;
+	bra.uni 	BB0_61;
+
+BB0_61:
+	abs.f32 	%f160, %f156;
+	setp.lt.f32	%p47, %f160, 0f00800000;
+	mul.f32 	%f509, %f160, 0f4B800000;
+	selp.f32	%f510, 0fC3170000, 0fC2FE0000, %p47;
+	selp.f32	%f511, %f509, %f160, %p47;
+	mov.b32 	 %r253, %f511;
+	and.b32  	%r254, %r253, 8388607;
+	or.b32  	%r255, %r254, 1065353216;
+	mov.b32 	 %f512, %r255;
+	shr.u32 	%r256, %r253, 23;
+	cvt.rn.f32.u32	%f513, %r256;
+	add.f32 	%f514, %f510, %f513;
+	setp.gt.f32	%p48, %f512, 0f3FB504F3;
+	mul.f32 	%f515, %f512, 0f3F000000;
+	add.f32 	%f516, %f514, 0f3F800000;
+	selp.f32	%f517, %f515, %f512, %p48;
+	selp.f32	%f518, %f516, %f514, %p48;
+	add.f32 	%f519, %f517, 0fBF800000;
+	add.f32 	%f505, %f517, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f504,%f505;
+	// inline asm
+	add.f32 	%f520, %f519, %f519;
+	mul.f32 	%f521, %f504, %f520;
+	mul.f32 	%f522, %f521, %f521;
+	mov.f32 	%f523, 0f3C4CAF63;
+	mov.f32 	%f524, 0f3B18F0FE;
+	fma.rn.f32 	%f525, %f524, %f522, %f523;
+	mov.f32 	%f526, 0f3DAAAABD;
+	fma.rn.f32 	%f527, %f525, %f522, %f526;
+	mul.rn.f32 	%f528, %f527, %f522;
+	mul.rn.f32 	%f529, %f528, %f521;
+	sub.f32 	%f530, %f519, %f521;
+	neg.f32 	%f531, %f521;
+	add.f32 	%f532, %f530, %f530;
+	fma.rn.f32 	%f533, %f531, %f519, %f532;
+	mul.rn.f32 	%f534, %f504, %f533;
+	add.f32 	%f535, %f529, %f521;
+	sub.f32 	%f536, %f521, %f535;
+	add.f32 	%f537, %f529, %f536;
+	add.f32 	%f538, %f534, %f537;
+	add.f32 	%f539, %f535, %f538;
+	sub.f32 	%f540, %f535, %f539;
+	add.f32 	%f541, %f538, %f540;
+	mov.f32 	%f542, 0f3F317200;
+	mul.rn.f32 	%f543, %f518, %f542;
+	mov.f32 	%f544, 0f35BFBE8E;
+	mul.rn.f32 	%f545, %f518, %f544;
+	add.f32 	%f546, %f543, %f539;
+	sub.f32 	%f547, %f543, %f546;
+	add.f32 	%f548, %f539, %f547;
+	add.f32 	%f549, %f541, %f548;
+	add.f32 	%f550, %f545, %f549;
+	add.f32 	%f551, %f546, %f550;
+	sub.f32 	%f552, %f546, %f551;
+	add.f32 	%f553, %f550, %f552;
+	mov.f32 	%f554, 0f3EE66666;
+	mul.rn.f32 	%f555, %f554, %f551;
+	neg.f32 	%f556, %f555;
+	fma.rn.f32 	%f557, %f554, %f551, %f556;
+	fma.rn.f32 	%f558, %f554, %f553, %f557;
+	mov.f32 	%f559, 0f00000000;
+	fma.rn.f32 	%f560, %f559, %f551, %f558;
+	add.rn.f32 	%f561, %f555, %f560;
+	neg.f32 	%f562, %f561;
+	add.rn.f32 	%f563, %f555, %f562;
+	add.rn.f32 	%f564, %f563, %f560;
+	mov.b32 	 %r257, %f561;
+	setp.eq.s32	%p49, %r257, 1118925336;
+	add.s32 	%r258, %r257, -1;
+	mov.b32 	 %f565, %r258;
+	add.f32 	%f566, %f564, 0f37000000;
+	selp.f32	%f567, %f565, %f561, %p49;
+	selp.f32	%f161, %f566, %f564, %p49;
+	mul.f32 	%f568, %f567, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f569, %f568;
+	mov.f32 	%f570, 0fBF317200;
+	fma.rn.f32 	%f571, %f569, %f570, %f567;
+	mov.f32 	%f572, 0fB5BFBE8E;
+	fma.rn.f32 	%f573, %f569, %f572, %f571;
+	mul.f32 	%f574, %f573, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f575, %f574;
+	add.f32 	%f576, %f569, 0f00000000;
+	ex2.approx.f32 	%f577, %f576;
+	mul.f32 	%f578, %f575, %f577;
+	setp.lt.f32	%p50, %f567, 0fC2D20000;
+	selp.f32	%f579, 0f00000000, %f578, %p50;
+	setp.gt.f32	%p51, %f567, 0f42D20000;
+	selp.f32	%f946, 0f7F800000, %f579, %p51;
+	setp.eq.f32	%p52, %f946, 0f7F800000;
+	@%p52 bra 	BB0_63;
+
+	fma.rn.f32 	%f946, %f946, %f161, %f946;
+
+BB0_63:
+	mov.f32 	%f827, 0f3E666666;
+	cvt.rzi.f32.f32	%f826, %f827;
+	fma.rn.f32 	%f825, %f826, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f824, %f825;
+	setp.lt.f32	%p53, %f156, 0f00000000;
+	setp.eq.f32	%p54, %f824, 0f3F800000;
+	and.pred  	%p1, %p53, %p54;
+	mov.b32 	 %r259, %f946;
+	xor.b32  	%r260, %r259, -2147483648;
+	mov.b32 	 %f580, %r260;
+	selp.f32	%f948, %f580, %f946, %p1;
+	setp.eq.f32	%p55, %f156, 0f00000000;
+	@%p55 bra 	BB0_66;
+	bra.uni 	BB0_64;
+
+BB0_66:
+	add.f32 	%f583, %f156, %f156;
+	selp.f32	%f948, %f583, 0f00000000, %p54;
+	bra.uni 	BB0_67;
+
+BB0_116:
+	mov.u64 	%rd215, image_RNM0;
+	cvta.global.u64 	%rd210, %rd215;
+	mov.u32 	%r327, 8;
+	mov.u64 	%rd214, 0;
+	// inline asm
+	call (%rd209), _rt_buffer_get_64, (%rd210, %r100, %r327, %rd20, %rd21, %rd214, %rd214);
+	// inline asm
+	mov.f32 	%f809, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs116, %f809;}
+
+	// inline asm
+	mov.u16 	%rs117, 0;
+	st.v4.u16 	[%rd209], {%rs116, %rs116, %rs116, %rs117};
+
+BB0_117:
+	ld.global.u32 	%r328, [additive];
+	setp.eq.s32	%p107, %r328, 0;
+	@%p107 bra 	BB0_119;
+
+	mov.u64 	%rd228, image_RNM1;
+	cvta.global.u64 	%rd217, %rd228;
+	mov.u32 	%r332, 8;
+	mov.u64 	%rd227, 0;
+	// inline asm
+	call (%rd216), _rt_buffer_get_64, (%rd217, %r100, %r332, %rd20, %rd21, %rd227, %rd227);
+	// inline asm
+	ld.v4.u16 	{%rs124, %rs125, %rs126, %rs127}, [%rd216];
+	// inline asm
+	{  cvt.f32.f16 %f810, %rs124;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f811, %rs125;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f812, %rs126;}
+
+	// inline asm
+	// inline asm
+	call (%rd222), _rt_buffer_get_64, (%rd217, %r100, %r332, %rd20, %rd21, %rd227, %rd227);
+	// inline asm
+	add.f32 	%f813, %f810, 0f00000000;
+	add.f32 	%f814, %f811, 0f00000000;
+	add.f32 	%f815, %f812, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs123, %f815;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs122, %f814;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs121, %f813;}
+
+	// inline asm
+	mov.u16 	%rs128, 0;
+	st.v4.u16 	[%rd222], {%rs121, %rs122, %rs123, %rs128};
+	bra.uni 	BB0_120;
+
+BB0_119:
+	mov.u64 	%rd235, image_RNM1;
+	cvta.global.u64 	%rd230, %rd235;
+	mov.u32 	%r334, 8;
+	mov.u64 	%rd234, 0;
+	// inline asm
+	call (%rd229), _rt_buffer_get_64, (%rd230, %r100, %r334, %rd20, %rd21, %rd234, %rd234);
+	// inline asm
+	mov.f32 	%f816, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs129, %f816;}
+
+	// inline asm
+	mov.u16 	%rs130, 0;
+	st.v4.u16 	[%rd229], {%rs129, %rs129, %rs129, %rs130};
+
+BB0_120:
+	ld.global.u32 	%r335, [additive];
+	setp.eq.s32	%p108, %r335, 0;
+	@%p108 bra 	BB0_122;
+
+	mov.u64 	%rd248, image_RNM2;
+	cvta.global.u64 	%rd237, %rd248;
+	mov.u32 	%r339, 8;
+	mov.u64 	%rd247, 0;
+	// inline asm
+	call (%rd236), _rt_buffer_get_64, (%rd237, %r100, %r339, %rd20, %rd21, %rd247, %rd247);
+	// inline asm
+	ld.v4.u16 	{%rs137, %rs138, %rs139, %rs140}, [%rd236];
+	// inline asm
+	{  cvt.f32.f16 %f817, %rs137;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f818, %rs138;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f819, %rs139;}
+
+	// inline asm
+	// inline asm
+	call (%rd242), _rt_buffer_get_64, (%rd237, %r100, %r339, %rd20, %rd21, %rd247, %rd247);
+	// inline asm
+	add.f32 	%f820, %f817, 0f00000000;
+	add.f32 	%f821, %f818, 0f00000000;
+	add.f32 	%f822, %f819, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs136, %f822;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs135, %f821;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs134, %f820;}
+
+	// inline asm
+	mov.u16 	%rs141, 0;
+	st.v4.u16 	[%rd242], {%rs134, %rs135, %rs136, %rs141};
+	bra.uni 	BB0_123;
+
+BB0_122:
+	mov.u64 	%rd255, image_RNM2;
+	cvta.global.u64 	%rd250, %rd255;
+	mov.u32 	%r341, 8;
+	mov.u64 	%rd254, 0;
+	// inline asm
+	call (%rd249), _rt_buffer_get_64, (%rd250, %r100, %r341, %rd20, %rd21, %rd254, %rd254);
+	// inline asm
+	mov.f32 	%f823, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs142, %f823;}
+
+	// inline asm
+	mov.u16 	%rs143, 0;
+	st.v4.u16 	[%rd249], {%rs142, %rs142, %rs142, %rs143};
+	bra.uni 	BB0_123;
+
+BB0_64:
+	setp.geu.f32	%p56, %f156, 0f00000000;
+	@%p56 bra 	BB0_67;
+
+	mov.f32 	%f851, 0f3EE66666;
+	cvt.rzi.f32.f32	%f582, %f851;
+	setp.neu.f32	%p57, %f582, 0f3EE66666;
+	selp.f32	%f948, 0f7FFFFFFF, %f948, %p57;
+
+BB0_67:
+	abs.f32 	%f828, %f156;
+	add.f32 	%f584, %f828, 0f3EE66666;
+	mov.b32 	 %r261, %f584;
+	setp.lt.s32	%p59, %r261, 2139095040;
+	@%p59 bra 	BB0_72;
+
+	abs.f32 	%f849, %f156;
+	setp.gtu.f32	%p60, %f849, 0f7F800000;
+	@%p60 bra 	BB0_71;
+	bra.uni 	BB0_69;
+
+BB0_71:
+	add.f32 	%f948, %f156, 0f3EE66666;
+	bra.uni 	BB0_72;
+
+BB0_69:
+	abs.f32 	%f850, %f156;
+	setp.neu.f32	%p61, %f850, 0f7F800000;
+	@%p61 bra 	BB0_72;
+
+	selp.f32	%f948, 0fFF800000, 0f7F800000, %p1;
+
+BB0_72:
+	mov.f32 	%f837, 0fB5BFBE8E;
+	mov.f32 	%f836, 0fBF317200;
+	mov.f32 	%f835, 0f00000000;
+	mov.f32 	%f834, 0f35BFBE8E;
+	mov.f32 	%f833, 0f3F317200;
+	mov.f32 	%f832, 0f3DAAAABD;
+	mov.f32 	%f831, 0f3C4CAF63;
+	mov.f32 	%f830, 0f3B18F0FE;
+	mov.f32 	%f829, 0f3EE66666;
+	setp.eq.f32	%p62, %f156, 0f3F800000;
+	selp.f32	%f172, 0f3F800000, %f948, %p62;
+	abs.f32 	%f173, %f157;
+	setp.lt.f32	%p63, %f173, 0f00800000;
+	mul.f32 	%f587, %f173, 0f4B800000;
+	selp.f32	%f588, 0fC3170000, 0fC2FE0000, %p63;
+	selp.f32	%f589, %f587, %f173, %p63;
+	mov.b32 	 %r262, %f589;
+	and.b32  	%r263, %r262, 8388607;
+	or.b32  	%r264, %r263, 1065353216;
+	mov.b32 	 %f590, %r264;
+	shr.u32 	%r265, %r262, 23;
+	cvt.rn.f32.u32	%f591, %r265;
+	add.f32 	%f592, %f588, %f591;
+	setp.gt.f32	%p64, %f590, 0f3FB504F3;
+	mul.f32 	%f593, %f590, 0f3F000000;
+	add.f32 	%f594, %f592, 0f3F800000;
+	selp.f32	%f595, %f593, %f590, %p64;
+	selp.f32	%f596, %f594, %f592, %p64;
+	add.f32 	%f597, %f595, 0fBF800000;
+	add.f32 	%f586, %f595, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f585,%f586;
+	// inline asm
+	add.f32 	%f598, %f597, %f597;
+	mul.f32 	%f599, %f585, %f598;
+	mul.f32 	%f600, %f599, %f599;
+	fma.rn.f32 	%f603, %f830, %f600, %f831;
+	fma.rn.f32 	%f605, %f603, %f600, %f832;
+	mul.rn.f32 	%f606, %f605, %f600;
+	mul.rn.f32 	%f607, %f606, %f599;
+	sub.f32 	%f608, %f597, %f599;
+	neg.f32 	%f609, %f599;
+	add.f32 	%f610, %f608, %f608;
+	fma.rn.f32 	%f611, %f609, %f597, %f610;
+	mul.rn.f32 	%f612, %f585, %f611;
+	add.f32 	%f613, %f607, %f599;
+	sub.f32 	%f614, %f599, %f613;
+	add.f32 	%f615, %f607, %f614;
+	add.f32 	%f616, %f612, %f615;
+	add.f32 	%f617, %f613, %f616;
+	sub.f32 	%f618, %f613, %f617;
+	add.f32 	%f619, %f616, %f618;
+	mul.rn.f32 	%f621, %f596, %f833;
+	mul.rn.f32 	%f623, %f596, %f834;
+	add.f32 	%f624, %f621, %f617;
+	sub.f32 	%f625, %f621, %f624;
+	add.f32 	%f626, %f617, %f625;
+	add.f32 	%f627, %f619, %f626;
+	add.f32 	%f628, %f623, %f627;
+	add.f32 	%f629, %f624, %f628;
+	sub.f32 	%f630, %f624, %f629;
+	add.f32 	%f631, %f628, %f630;
+	mul.rn.f32 	%f633, %f829, %f629;
+	neg.f32 	%f634, %f633;
+	fma.rn.f32 	%f635, %f829, %f629, %f634;
+	fma.rn.f32 	%f636, %f829, %f631, %f635;
+	fma.rn.f32 	%f638, %f835, %f629, %f636;
+	add.rn.f32 	%f639, %f633, %f638;
+	neg.f32 	%f640, %f639;
+	add.rn.f32 	%f641, %f633, %f640;
+	add.rn.f32 	%f642, %f641, %f638;
+	mov.b32 	 %r266, %f639;
+	setp.eq.s32	%p65, %r266, 1118925336;
+	add.s32 	%r267, %r266, -1;
+	mov.b32 	 %f643, %r267;
+	add.f32 	%f644, %f642, 0f37000000;
+	selp.f32	%f645, %f643, %f639, %p65;
+	selp.f32	%f174, %f644, %f642, %p65;
+	mul.f32 	%f646, %f645, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f647, %f646;
+	fma.rn.f32 	%f649, %f647, %f836, %f645;
+	fma.rn.f32 	%f651, %f647, %f837, %f649;
+	mul.f32 	%f652, %f651, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f653, %f652;
+	add.f32 	%f654, %f647, 0f00000000;
+	ex2.approx.f32 	%f655, %f654;
+	mul.f32 	%f656, %f653, %f655;
+	setp.lt.f32	%p66, %f645, 0fC2D20000;
+	selp.f32	%f657, 0f00000000, %f656, %p66;
+	setp.gt.f32	%p67, %f645, 0f42D20000;
+	selp.f32	%f949, 0f7F800000, %f657, %p67;
+	setp.eq.f32	%p68, %f949, 0f7F800000;
+	@%p68 bra 	BB0_74;
+
+	fma.rn.f32 	%f949, %f949, %f174, %f949;
+
+BB0_74:
+	setp.lt.f32	%p69, %f157, 0f00000000;
+	and.pred  	%p2, %p69, %p54;
+	mov.b32 	 %r268, %f949;
+	xor.b32  	%r269, %r268, -2147483648;
+	mov.b32 	 %f658, %r269;
+	selp.f32	%f951, %f658, %f949, %p2;
+	setp.eq.f32	%p71, %f157, 0f00000000;
+	@%p71 bra 	BB0_77;
+	bra.uni 	BB0_75;
+
+BB0_77:
+	add.f32 	%f661, %f157, %f157;
+	selp.f32	%f951, %f661, 0f00000000, %p54;
+	bra.uni 	BB0_78;
+
+BB0_75:
+	setp.geu.f32	%p72, %f157, 0f00000000;
+	@%p72 bra 	BB0_78;
+
+	mov.f32 	%f848, 0f3EE66666;
+	cvt.rzi.f32.f32	%f660, %f848;
+	setp.neu.f32	%p73, %f660, 0f3EE66666;
+	selp.f32	%f951, 0f7FFFFFFF, %f951, %p73;
+
+BB0_78:
+	abs.f32 	%f852, %f157;
+	add.f32 	%f662, %f852, 0f3EE66666;
+	mov.b32 	 %r270, %f662;
+	setp.lt.s32	%p75, %r270, 2139095040;
+	@%p75 bra 	BB0_83;
+
+	abs.f32 	%f853, %f157;
+	setp.gtu.f32	%p76, %f853, 0f7F800000;
+	@%p76 bra 	BB0_82;
+	bra.uni 	BB0_80;
+
+BB0_82:
+	add.f32 	%f951, %f157, 0f3EE66666;
+	bra.uni 	BB0_83;
+
+BB0_80:
+	abs.f32 	%f854, %f157;
+	setp.neu.f32	%p77, %f854, 0f7F800000;
+	@%p77 bra 	BB0_83;
+
+	selp.f32	%f951, 0fFF800000, 0f7F800000, %p2;
+
+BB0_83:
+	mov.f32 	%f846, 0fB5BFBE8E;
+	mov.f32 	%f845, 0fBF317200;
+	mov.f32 	%f844, 0f00000000;
+	mov.f32 	%f843, 0f35BFBE8E;
+	mov.f32 	%f842, 0f3F317200;
+	mov.f32 	%f841, 0f3DAAAABD;
+	mov.f32 	%f840, 0f3C4CAF63;
+	mov.f32 	%f839, 0f3B18F0FE;
+	mov.f32 	%f838, 0f3EE66666;
+	setp.eq.f32	%p78, %f157, 0f3F800000;
+	selp.f32	%f185, 0f3F800000, %f951, %p78;
+	abs.f32 	%f186, %f158;
+	setp.lt.f32	%p79, %f186, 0f00800000;
+	mul.f32 	%f665, %f186, 0f4B800000;
+	selp.f32	%f666, 0fC3170000, 0fC2FE0000, %p79;
+	selp.f32	%f667, %f665, %f186, %p79;
+	mov.b32 	 %r271, %f667;
+	and.b32  	%r272, %r271, 8388607;
+	or.b32  	%r273, %r272, 1065353216;
+	mov.b32 	 %f668, %r273;
+	shr.u32 	%r274, %r271, 23;
+	cvt.rn.f32.u32	%f669, %r274;
+	add.f32 	%f670, %f666, %f669;
+	setp.gt.f32	%p80, %f668, 0f3FB504F3;
+	mul.f32 	%f671, %f668, 0f3F000000;
+	add.f32 	%f672, %f670, 0f3F800000;
+	selp.f32	%f673, %f671, %f668, %p80;
+	selp.f32	%f674, %f672, %f670, %p80;
+	add.f32 	%f675, %f673, 0fBF800000;
+	add.f32 	%f664, %f673, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f663,%f664;
+	// inline asm
+	add.f32 	%f676, %f675, %f675;
+	mul.f32 	%f677, %f663, %f676;
+	mul.f32 	%f678, %f677, %f677;
+	fma.rn.f32 	%f681, %f839, %f678, %f840;
+	fma.rn.f32 	%f683, %f681, %f678, %f841;
+	mul.rn.f32 	%f684, %f683, %f678;
+	mul.rn.f32 	%f685, %f684, %f677;
+	sub.f32 	%f686, %f675, %f677;
+	neg.f32 	%f687, %f677;
+	add.f32 	%f688, %f686, %f686;
+	fma.rn.f32 	%f689, %f687, %f675, %f688;
+	mul.rn.f32 	%f690, %f663, %f689;
+	add.f32 	%f691, %f685, %f677;
+	sub.f32 	%f692, %f677, %f691;
+	add.f32 	%f693, %f685, %f692;
+	add.f32 	%f694, %f690, %f693;
+	add.f32 	%f695, %f691, %f694;
+	sub.f32 	%f696, %f691, %f695;
+	add.f32 	%f697, %f694, %f696;
+	mul.rn.f32 	%f699, %f674, %f842;
+	mul.rn.f32 	%f701, %f674, %f843;
+	add.f32 	%f702, %f699, %f695;
+	sub.f32 	%f703, %f699, %f702;
+	add.f32 	%f704, %f695, %f703;
+	add.f32 	%f705, %f697, %f704;
+	add.f32 	%f706, %f701, %f705;
+	add.f32 	%f707, %f702, %f706;
+	sub.f32 	%f708, %f702, %f707;
+	add.f32 	%f709, %f706, %f708;
+	mul.rn.f32 	%f711, %f838, %f707;
+	neg.f32 	%f712, %f711;
+	fma.rn.f32 	%f713, %f838, %f707, %f712;
+	fma.rn.f32 	%f714, %f838, %f709, %f713;
+	fma.rn.f32 	%f716, %f844, %f707, %f714;
+	add.rn.f32 	%f717, %f711, %f716;
+	neg.f32 	%f718, %f717;
+	add.rn.f32 	%f719, %f711, %f718;
+	add.rn.f32 	%f720, %f719, %f716;
+	mov.b32 	 %r275, %f717;
+	setp.eq.s32	%p81, %r275, 1118925336;
+	add.s32 	%r276, %r275, -1;
+	mov.b32 	 %f721, %r276;
+	add.f32 	%f722, %f720, 0f37000000;
+	selp.f32	%f723, %f721, %f717, %p81;
+	selp.f32	%f187, %f722, %f720, %p81;
+	mul.f32 	%f724, %f723, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f725, %f724;
+	fma.rn.f32 	%f727, %f725, %f845, %f723;
+	fma.rn.f32 	%f729, %f725, %f846, %f727;
+	mul.f32 	%f730, %f729, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f731, %f730;
+	add.f32 	%f732, %f725, 0f00000000;
+	ex2.approx.f32 	%f733, %f732;
+	mul.f32 	%f734, %f731, %f733;
+	setp.lt.f32	%p82, %f723, 0fC2D20000;
+	selp.f32	%f735, 0f00000000, %f734, %p82;
+	setp.gt.f32	%p83, %f723, 0f42D20000;
+	selp.f32	%f952, 0f7F800000, %f735, %p83;
+	setp.eq.f32	%p84, %f952, 0f7F800000;
+	@%p84 bra 	BB0_85;
+
+	fma.rn.f32 	%f952, %f952, %f187, %f952;
+
+BB0_85:
+	setp.lt.f32	%p85, %f158, 0f00000000;
+	and.pred  	%p3, %p85, %p54;
+	mov.b32 	 %r277, %f952;
+	xor.b32  	%r278, %r277, -2147483648;
+	mov.b32 	 %f736, %r278;
+	selp.f32	%f954, %f736, %f952, %p3;
+	setp.eq.f32	%p87, %f158, 0f00000000;
+	@%p87 bra 	BB0_88;
+	bra.uni 	BB0_86;
+
+BB0_88:
+	add.f32 	%f739, %f158, %f158;
+	selp.f32	%f954, %f739, 0f00000000, %p54;
+	bra.uni 	BB0_89;
+
+BB0_86:
+	setp.geu.f32	%p88, %f158, 0f00000000;
+	@%p88 bra 	BB0_89;
+
+	mov.f32 	%f847, 0f3EE66666;
+	cvt.rzi.f32.f32	%f738, %f847;
+	setp.neu.f32	%p89, %f738, 0f3EE66666;
+	selp.f32	%f954, 0f7FFFFFFF, %f954, %p89;
+
+BB0_89:
+	abs.f32 	%f875, %f158;
+	add.f32 	%f740, %f875, 0f3EE66666;
+	mov.b32 	 %r279, %f740;
+	setp.lt.s32	%p91, %r279, 2139095040;
+	@%p91 bra 	BB0_94;
+
+	abs.f32 	%f876, %f158;
+	setp.gtu.f32	%p92, %f876, 0f7F800000;
+	@%p92 bra 	BB0_93;
+	bra.uni 	BB0_91;
+
+BB0_93:
+	add.f32 	%f954, %f158, 0f3EE66666;
+	bra.uni 	BB0_94;
+
+BB0_91:
+	abs.f32 	%f877, %f158;
+	setp.neu.f32	%p93, %f877, 0f7F800000;
+	@%p93 bra 	BB0_94;
+
+	selp.f32	%f954, 0fFF800000, 0f7F800000, %p3;
+
+BB0_94:
+	mov.u32 	%r351, 2;
+	mov.u32 	%r342, 4;
+	mov.u64 	%rd256, 0;
+	setp.eq.f32	%p94, %f158, 0f3F800000;
+	selp.f32	%f741, 0f3F800000, %f954, %p94;
+	cvt.u64.u32	%rd97, %r4;
+	cvt.u64.u32	%rd96, %r3;
+	mov.u64 	%rd100, image;
+	cvta.global.u64 	%rd95, %rd100;
+	// inline asm
+	call (%rd94), _rt_buffer_get_64, (%rd95, %r351, %r342, %rd96, %rd97, %rd256, %rd256);
+	// inline asm
+	cvt.sat.f32.f32	%f742, %f741;
+	mul.f32 	%f743, %f742, 0f437FFD71;
+	cvt.rzi.u32.f32	%r282, %f743;
+	cvt.sat.f32.f32	%f744, %f185;
+	mul.f32 	%f745, %f744, 0f437FFD71;
+	cvt.rzi.u32.f32	%r283, %f745;
+	cvt.sat.f32.f32	%f746, %f172;
+	mul.f32 	%f747, %f746, 0f437FFD71;
+	cvt.rzi.u32.f32	%r284, %f747;
+	cvt.u16.u32	%rs46, %r282;
+	cvt.u16.u32	%rs47, %r284;
+	cvt.u16.u32	%rs48, %r283;
+	mov.u16 	%rs49, 255;
+	st.v4.u8 	[%rd94], {%rs46, %rs48, %rs47, %rs49};
+	ld.global.u32 	%r410, [imageEnabled];
+
+BB0_95:
+	and.b32  	%r285, %r410, 4;
+	setp.eq.s32	%p95, %r285, 0;
+	@%p95 bra 	BB0_97;
+
+	mov.u32 	%r352, 2;
+	mov.u32 	%r343, 8;
+	mov.u64 	%rd257, 0;
+	cvt.u64.u32	%rd103, %r3;
+	cvt.u64.u32	%rd104, %r4;
+	mov.u64 	%rd107, image_HDR;
+	cvta.global.u64 	%rd102, %rd107;
+	// inline asm
+	call (%rd101), _rt_buffer_get_64, (%rd102, %r352, %r343, %rd103, %rd104, %rd257, %rd257);
+	// inline asm
+	mov.f32 	%f751, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs53, %f751;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs52, %f158;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs51, %f157;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs50, %f156;}
+
+	// inline asm
+	st.v4.u16 	[%rd101], {%rs50, %rs51, %rs52, %rs53};
+	ld.global.u32 	%r410, [imageEnabled];
+
+BB0_97:
+	and.b32  	%r288, %r410, 16;
+	setp.eq.s32	%p96, %r288, 0;
+	@%p96 bra 	BB0_99;
+
+	mov.u32 	%r353, 2;
+	mov.u32 	%r344, 8;
+	mov.u64 	%rd258, 0;
+	cvt.u64.u32	%rd111, %r4;
+	cvt.u64.u32	%rd110, %r3;
+	mov.u64 	%rd114, image_HDR2;
+	cvta.global.u64 	%rd109, %rd114;
+	// inline asm
+	call (%rd108), _rt_buffer_get_64, (%rd109, %r353, %r344, %rd110, %rd111, %rd258, %rd258);
+	// inline asm
+	mov.f32 	%f755, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs57, %f755;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs56, %f155;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs55, %f154;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs54, %f153;}
+
+	// inline asm
+	st.v4.u16 	[%rd108], {%rs54, %rs55, %rs56, %rs57};
+
+BB0_99:
+	cvt.u64.u32	%rd18, %r3;
+	cvt.u64.u32	%rd19, %r4;
+	add.f32 	%f757, %f141, %f144;
+	add.f32 	%f758, %f147, %f757;
+	add.f32 	%f759, %f142, %f145;
+	add.f32 	%f760, %f148, %f759;
+	add.f32 	%f761, %f143, %f146;
+	add.f32 	%f762, %f149, %f761;
+	mul.f32 	%f763, %f758, 0f3F13CD3A;
+	mul.f32 	%f764, %f760, 0f3F13CD3A;
+	mul.f32 	%f765, %f762, 0f3F13CD3A;
+	div.rn.f32 	%f766, %f150, %f763;
+	div.rn.f32 	%f767, %f151, %f764;
+	div.rn.f32 	%f768, %f152, %f765;
+	setp.eq.f32	%p97, %f150, 0f00000000;
+	selp.f32	%f769, 0f00000000, %f766, %p97;
+	setp.eq.f32	%p98, %f151, 0f00000000;
+	selp.f32	%f770, 0f00000000, %f767, %p98;
+	setp.eq.f32	%p99, %f152, 0f00000000;
+	selp.f32	%f771, 0f00000000, %f768, %p99;
+	mul.f32 	%f198, %f141, %f769;
+	mul.f32 	%f199, %f142, %f770;
+	mul.f32 	%f200, %f143, %f771;
+	mul.f32 	%f201, %f144, %f769;
+	mul.f32 	%f202, %f145, %f770;
+	mul.f32 	%f203, %f146, %f771;
+	mul.f32 	%f204, %f147, %f769;
+	mul.f32 	%f205, %f148, %f770;
+	mul.f32 	%f206, %f149, %f771;
+	ld.global.u32 	%r291, [additive];
+	setp.eq.s32	%p100, %r291, 0;
+	mov.f32 	%f756, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs58, %f756;}
+
+	// inline asm
+	@%p100 bra 	BB0_101;
+
+	mov.u32 	%r354, 2;
+	mov.u32 	%r345, 8;
+	mov.u64 	%rd259, 0;
+	mov.u64 	%rd127, image_RNM0;
+	cvta.global.u64 	%rd116, %rd127;
+	// inline asm
+	call (%rd115), _rt_buffer_get_64, (%rd116, %r354, %r345, %rd18, %rd19, %rd259, %rd259);
+	// inline asm
+	ld.v4.u16 	{%rs65, %rs66, %rs67, %rs68}, [%rd115];
+	// inline asm
+	{  cvt.f32.f16 %f772, %rs65;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f773, %rs66;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f774, %rs67;}
+
+	// inline asm
+	// inline asm
+	call (%rd121), _rt_buffer_get_64, (%rd116, %r354, %r345, %rd18, %rd19, %rd259, %rd259);
+	// inline asm
+	add.f32 	%f775, %f198, %f772;
+	add.f32 	%f776, %f199, %f773;
+	add.f32 	%f777, %f200, %f774;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f777;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs63, %f776;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs62, %f775;}
+
+	// inline asm
+	st.v4.u16 	[%rd121], {%rs62, %rs63, %rs64, %rs58};
+	bra.uni 	BB0_102;
+
+BB0_101:
+	mov.u32 	%r359, 2;
+	mov.u32 	%r350, 8;
+	mov.u64 	%rd264, 0;
+	mov.u64 	%rd134, image_RNM0;
+	cvta.global.u64 	%rd129, %rd134;
+	// inline asm
+	call (%rd128), _rt_buffer_get_64, (%rd129, %r359, %r350, %rd18, %rd19, %rd264, %rd264);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs71, %f200;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs70, %f199;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs69, %f198;}
+
+	// inline asm
+	st.v4.u16 	[%rd128], {%rs69, %rs70, %rs71, %rs58};
+
+BB0_102:
+	ld.global.u32 	%r298, [additive];
+	setp.eq.s32	%p101, %r298, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs72, %f756;}
+
+	// inline asm
+	@%p101 bra 	BB0_104;
+
+	mov.u32 	%r355, 2;
+	mov.u32 	%r346, 8;
+	mov.u64 	%rd260, 0;
+	mov.u64 	%rd147, image_RNM1;
+	cvta.global.u64 	%rd136, %rd147;
+	// inline asm
+	call (%rd135), _rt_buffer_get_64, (%rd136, %r355, %r346, %rd18, %rd19, %rd260, %rd260);
+	// inline asm
+	ld.v4.u16 	{%rs79, %rs80, %rs81, %rs82}, [%rd135];
+	// inline asm
+	{  cvt.f32.f16 %f782, %rs79;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f783, %rs80;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f784, %rs81;}
+
+	// inline asm
+	// inline asm
+	call (%rd141), _rt_buffer_get_64, (%rd136, %r355, %r346, %rd18, %rd19, %rd260, %rd260);
+	// inline asm
+	add.f32 	%f785, %f201, %f782;
+	add.f32 	%f786, %f202, %f783;
+	add.f32 	%f787, %f203, %f784;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs78, %f787;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs77, %f786;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs76, %f785;}
+
+	// inline asm
+	st.v4.u16 	[%rd141], {%rs76, %rs77, %rs78, %rs72};
+	bra.uni 	BB0_105;
+
+BB0_104:
+	mov.u32 	%r358, 2;
+	mov.u32 	%r349, 8;
+	mov.u64 	%rd263, 0;
+	mov.u64 	%rd154, image_RNM1;
+	cvta.global.u64 	%rd149, %rd154;
+	// inline asm
+	call (%rd148), _rt_buffer_get_64, (%rd149, %r358, %r349, %rd18, %rd19, %rd263, %rd263);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs85, %f203;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs84, %f202;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs83, %f201;}
+
+	// inline asm
+	st.v4.u16 	[%rd148], {%rs83, %rs84, %rs85, %rs72};
+
+BB0_105:
+	ld.global.u32 	%r305, [additive];
+	setp.eq.s32	%p102, %r305, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs86, %f756;}
+
+	// inline asm
+	@%p102 bra 	BB0_107;
+
+	mov.u32 	%r356, 2;
+	mov.u32 	%r347, 8;
+	mov.u64 	%rd261, 0;
+	mov.u64 	%rd167, image_RNM2;
+	cvta.global.u64 	%rd156, %rd167;
+	// inline asm
+	call (%rd155), _rt_buffer_get_64, (%rd156, %r356, %r347, %rd18, %rd19, %rd261, %rd261);
+	// inline asm
+	ld.v4.u16 	{%rs93, %rs94, %rs95, %rs96}, [%rd155];
+	// inline asm
+	{  cvt.f32.f16 %f792, %rs93;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f793, %rs94;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f794, %rs95;}
+
+	// inline asm
+	// inline asm
+	call (%rd161), _rt_buffer_get_64, (%rd156, %r356, %r347, %rd18, %rd19, %rd261, %rd261);
+	// inline asm
+	add.f32 	%f795, %f204, %f792;
+	add.f32 	%f796, %f205, %f793;
+	add.f32 	%f797, %f206, %f794;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs92, %f797;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs91, %f796;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs90, %f795;}
+
+	// inline asm
+	st.v4.u16 	[%rd161], {%rs90, %rs91, %rs92, %rs86};
+	bra.uni 	BB0_123;
+
+BB0_107:
+	mov.u32 	%r357, 2;
+	mov.u32 	%r348, 8;
+	mov.u64 	%rd262, 0;
+	mov.u64 	%rd174, image_RNM2;
+	cvta.global.u64 	%rd169, %rd174;
+	// inline asm
+	call (%rd168), _rt_buffer_get_64, (%rd169, %r357, %r348, %rd18, %rd19, %rd262, %rd262);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs99, %f206;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs98, %f205;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs97, %f204;}
+
+	// inline asm
+	st.v4.u16 	[%rd168], {%rs97, %rs98, %rs99, %rs86};
+
+BB0_123:
+	ret;
+}
+
+