move to self host

1 files changed, 2489 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightProbeSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightProbeSH.ptx
new file mode 100644
index 00000000..120df982
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightProbeSH.ptx
@@ -0,0 +1,2489 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 image_RNM3[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 1 .b8 lightMeshBuffer[1];
+.global .align 4 .u32 lightMeshBufferSize;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightPointSize;
+.global .align 4 .b8 lightColor[12];
+.global .align 1 .b8 rnd_seeds[1];
+.global .align 4 .u32 samples;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[44];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<148>;
+	.reg .b16 	%rs<158>;
+	.reg .f32 	%f<1253>;
+	.reg .b32 	%r<412>;
+	.reg .b64 	%rd<317>;
+
+
+	mov.u64 	%rd316, __local_depot0;
+	cvta.local.u64 	%SP, %rd316;
+	ld.global.u32 	%r1, [samples];
+	shl.b32 	%r2, %r1, 1;
+	ld.global.v2.u32 	{%r100, %r101}, [pixelID];
+	cvt.u64.u32	%rd23, %r100;
+	cvt.u64.u32	%rd24, %r101;
+	mov.u64 	%rd27, uvnormal;
+	cvta.global.u64 	%rd22, %rd27;
+	mov.u32 	%r98, 2;
+	mov.u32 	%r99, 4;
+	mov.u64 	%rd26, 0;
+	// inline asm
+	call (%rd21), _rt_buffer_get_64, (%rd22, %r98, %r99, %rd23, %rd24, %rd26, %rd26);
+	// inline asm
+	ld.u32 	%r3, [%rd21];
+	shr.u32 	%r104, %r3, 16;
+	cvt.u16.u32	%rs1, %r104;
+	and.b16  	%rs7, %rs1, 255;
+	cvt.u16.u32	%rs8, %r3;
+	or.b16  	%rs9, %rs8, %rs7;
+	setp.eq.s16	%p7, %rs9, 0;
+	mov.f32 	%f1114, 0f00000000;
+	mov.f32 	%f1115, %f1114;
+	mov.f32 	%f1116, %f1114;
+	@%p7 bra 	BB0_2;
+
+	ld.u8 	%rs10, [%rd21+1];
+	and.b16  	%rs12, %rs8, 255;
+	cvt.rn.f32.u16	%f334, %rs12;
+	div.rn.f32 	%f335, %f334, 0f437F0000;
+	fma.rn.f32 	%f336, %f335, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f337, %rs10;
+	div.rn.f32 	%f338, %f337, 0f437F0000;
+	fma.rn.f32 	%f339, %f338, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f340, %rs7;
+	div.rn.f32 	%f341, %f340, 0f437F0000;
+	fma.rn.f32 	%f342, %f341, 0f40000000, 0fBF800000;
+	mul.f32 	%f343, %f339, %f339;
+	fma.rn.f32 	%f344, %f336, %f336, %f343;
+	fma.rn.f32 	%f345, %f342, %f342, %f344;
+	sqrt.rn.f32 	%f346, %f345;
+	rcp.rn.f32 	%f347, %f346;
+	mul.f32 	%f1114, %f336, %f347;
+	mul.f32 	%f1115, %f339, %f347;
+	mul.f32 	%f1116, %f342, %f347;
+
+BB0_2:
+	ld.global.v2.u32 	{%r105, %r106}, [pixelID];
+	ld.global.v2.u32 	{%r108, %r109}, [tileInfo];
+	add.s32 	%r4, %r105, %r108;
+	add.s32 	%r5, %r106, %r109;
+	setp.eq.f32	%p8, %f1115, 0f00000000;
+	setp.eq.f32	%p9, %f1114, 0f00000000;
+	and.pred  	%p10, %p9, %p8;
+	setp.eq.f32	%p11, %f1116, 0f00000000;
+	and.pred  	%p12, %p10, %p11;
+	@%p12 bra 	BB0_139;
+	bra.uni 	BB0_3;
+
+BB0_139:
+	ld.global.u32 	%r411, [imageEnabled];
+	and.b32  	%r336, %r411, 1;
+	setp.eq.b32	%p139, %r336, 1;
+	@!%p139 bra 	BB0_141;
+	bra.uni 	BB0_140;
+
+BB0_140:
+	cvt.u64.u32	%rd196, %r4;
+	cvt.u64.u32	%rd197, %r5;
+	mov.u64 	%rd200, image;
+	cvta.global.u64 	%rd195, %rd200;
+	mov.u64 	%rd199, 0;
+	// inline asm
+	call (%rd194), _rt_buffer_get_64, (%rd195, %r98, %r99, %rd196, %rd197, %rd199, %rd199);
+	// inline asm
+	mov.u16 	%rs90, 0;
+	st.v4.u8 	[%rd194], {%rs90, %rs90, %rs90, %rs90};
+	ld.global.u32 	%r411, [imageEnabled];
+
+BB0_141:
+	and.b32  	%r339, %r411, 8;
+	setp.eq.s32	%p140, %r339, 0;
+	@%p140 bra 	BB0_143;
+
+	cvt.u64.u32	%rd204, %r5;
+	cvt.u64.u32	%rd203, %r4;
+	mov.u64 	%rd207, image_Mask;
+	cvta.global.u64 	%rd202, %rd207;
+	mov.u64 	%rd206, 0;
+	// inline asm
+	call (%rd201), _rt_buffer_get_64, (%rd202, %r98, %r98, %rd203, %rd204, %rd206, %rd206);
+	// inline asm
+	mov.f32 	%f1071, 0f00000000;
+	cvt.rzi.u32.f32	%r342, %f1071;
+	cvt.u16.u32	%rs91, %r342;
+	mov.u16 	%rs92, 0;
+	st.v2.u8 	[%rd201], {%rs91, %rs92};
+	ld.global.u32 	%r411, [imageEnabled];
+
+BB0_143:
+	cvt.u64.u32	%rd19, %r4;
+	cvt.u64.u32	%rd20, %r5;
+	and.b32  	%r343, %r411, 4;
+	setp.eq.s32	%p141, %r343, 0;
+	@%p141 bra 	BB0_147;
+
+	ld.global.u32 	%r344, [additive];
+	setp.eq.s32	%p142, %r344, 0;
+	@%p142 bra 	BB0_146;
+
+	mov.u64 	%rd220, image_HDR;
+	cvta.global.u64 	%rd209, %rd220;
+	mov.u32 	%r348, 8;
+	mov.u64 	%rd219, 0;
+	// inline asm
+	call (%rd208), _rt_buffer_get_64, (%rd209, %r98, %r348, %rd19, %rd20, %rd219, %rd219);
+	// inline asm
+	ld.v4.u16 	{%rs99, %rs100, %rs101, %rs102}, [%rd208];
+	// inline asm
+	{  cvt.f32.f16 %f1072, %rs99;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1073, %rs100;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1074, %rs101;}
+
+	// inline asm
+	// inline asm
+	call (%rd214), _rt_buffer_get_64, (%rd209, %r98, %r348, %rd19, %rd20, %rd219, %rd219);
+	// inline asm
+	add.f32 	%f1075, %f1072, 0f00000000;
+	add.f32 	%f1076, %f1073, 0f00000000;
+	add.f32 	%f1077, %f1074, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs98, %f1077;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs97, %f1076;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs96, %f1075;}
+
+	// inline asm
+	mov.u16 	%rs103, 0;
+	st.v4.u16 	[%rd214], {%rs96, %rs97, %rs98, %rs103};
+	bra.uni 	BB0_147;
+
+BB0_3:
+	ld.global.v2.u32 	{%r118, %r119}, [pixelID];
+	cvt.u64.u32	%rd30, %r118;
+	cvt.u64.u32	%rd31, %r119;
+	mov.u64 	%rd40, uvpos;
+	cvta.global.u64 	%rd29, %rd40;
+	mov.u32 	%r114, 12;
+	// inline asm
+	call (%rd28), _rt_buffer_get_64, (%rd29, %r98, %r114, %rd30, %rd31, %rd26, %rd26);
+	// inline asm
+	ld.f32 	%f9, [%rd28+8];
+	ld.f32 	%f8, [%rd28+4];
+	ld.f32 	%f7, [%rd28];
+	mul.f32 	%f364, %f7, 0f3456BF95;
+	mul.f32 	%f365, %f8, 0f3456BF95;
+	mul.f32 	%f366, %f9, 0f3456BF95;
+	abs.f32 	%f367, %f1114;
+	div.rn.f32 	%f368, %f364, %f367;
+	abs.f32 	%f369, %f1115;
+	div.rn.f32 	%f370, %f365, %f369;
+	abs.f32 	%f371, %f1116;
+	div.rn.f32 	%f372, %f366, %f371;
+	abs.f32 	%f373, %f368;
+	abs.f32 	%f374, %f370;
+	abs.f32 	%f375, %f372;
+	mov.f32 	%f376, 0f38D1B717;
+	max.f32 	%f377, %f373, %f376;
+	max.f32 	%f378, %f374, %f376;
+	max.f32 	%f379, %f375, %f376;
+	fma.rn.f32 	%f10, %f1114, %f377, %f7;
+	fma.rn.f32 	%f11, %f1115, %f378, %f8;
+	fma.rn.f32 	%f12, %f1116, %f379, %f9;
+	ld.global.v2.u32 	{%r122, %r123}, [pixelID];
+	cvt.u64.u32	%rd36, %r122;
+	cvt.u64.u32	%rd37, %r123;
+	mov.u64 	%rd41, rnd_seeds;
+	cvta.global.u64 	%rd35, %rd41;
+	// inline asm
+	call (%rd34), _rt_buffer_get_64, (%rd35, %r98, %r99, %rd36, %rd37, %rd26, %rd26);
+	// inline asm
+	ld.u32 	%r126, [%rd34];
+	mad.lo.s32 	%r6, %r126, 1664525, 1013904223;
+	ld.global.u32 	%r127, [lightMeshBufferSize];
+	setp.eq.s32	%p14, %r127, 0;
+	mov.pred 	%p13, 0;
+	mov.f32 	%f18, 0f00000000;
+	mov.u32 	%r383, 0;
+	@%p14 bra 	BB0_4;
+
+	ld.global.f32 	%f13, [lightPointSize];
+	mul.f32 	%f14, %f10, 0f3456BF95;
+	mul.f32 	%f15, %f11, 0f3456BF95;
+	mul.f32 	%f16, %f12, 0f3456BF95;
+	and.b32  	%r129, %r6, 16777215;
+	cvt.rn.f32.u32	%f396, %r129;
+	mul.f32 	%f397, %f396, 0fB3800000;
+	fma.rn.f32 	%f17, %f397, 0f3F333333, 0f3F800000;
+	mov.f32 	%f18, 0f00000000;
+	mov.u32 	%r383, 0;
+	abs.f32 	%f520, %f15;
+	abs.f32 	%f521, %f14;
+	max.f32 	%f522, %f521, %f520;
+	abs.f32 	%f523, %f16;
+	max.f32 	%f524, %f522, %f523;
+	mov.f32 	%f19, %f18;
+	mov.f32 	%f20, %f18;
+	mov.f32 	%f21, %f18;
+	mov.f32 	%f22, %f18;
+	mov.f32 	%f23, %f18;
+	mov.f32 	%f24, %f18;
+	mov.f32 	%f25, %f18;
+	mov.f32 	%f26, %f18;
+	mov.f32 	%f27, %f18;
+	mov.f32 	%f28, %f18;
+	mov.f32 	%f29, %f18;
+	mov.f32 	%f30, %f18;
+	mov.f32 	%f31, %f18;
+	mov.f32 	%f32, %f18;
+	mov.f32 	%f33, %f18;
+
+BB0_6:
+	mul.lo.s32 	%r132, %r383, 3;
+	cvt.s64.s32	%rd44, %r132;
+	mov.u64 	%rd48, lightMeshBuffer;
+	cvta.global.u64 	%rd43, %rd48;
+	mov.u32 	%r130, 1;
+	// inline asm
+	call (%rd42), _rt_buffer_get_64, (%rd43, %r130, %r114, %rd44, %rd26, %rd26, %rd26);
+	// inline asm
+	ld.f32 	%f398, [%rd42];
+	sub.f32 	%f399, %f398, %f7;
+	ld.f32 	%f400, [%rd42+4];
+	sub.f32 	%f401, %f400, %f8;
+	ld.f32 	%f402, [%rd42+8];
+	sub.f32 	%f403, %f402, %f9;
+	mul.f32 	%f404, %f401, %f401;
+	fma.rn.f32 	%f405, %f399, %f399, %f404;
+	fma.rn.f32 	%f406, %f403, %f403, %f405;
+	sqrt.rn.f32 	%f34, %f406;
+	rcp.rn.f32 	%f407, %f34;
+	mul.f32 	%f35, %f399, %f407;
+	mul.f32 	%f36, %f401, %f407;
+	mul.f32 	%f37, %f403, %f407;
+	mul.f32 	%f408, %f34, %f34;
+	mul.f32 	%f409, %f408, 0f40C90FDB;
+	div.rn.f32 	%f410, %f13, %f409;
+	add.f32 	%f38, %f410, %f410;
+	setp.gt.f32	%p16, %f38, %f17;
+	setp.ne.s32	%p17, %r1, 0;
+	and.pred  	%p18, %p17, %p16;
+	mov.pred 	%p147, -1;
+	@%p18 bra 	BB0_22;
+
+	ld.global.f32 	%f413, [lightInvCutoff];
+	mul.f32 	%f39, %f34, %f413;
+	mov.f32 	%f417, 0f40800000;
+	abs.f32 	%f41, %f39;
+	setp.lt.f32	%p19, %f41, 0f00800000;
+	mul.f32 	%f419, %f41, 0f4B800000;
+	selp.f32	%f420, 0fC3170000, 0fC2FE0000, %p19;
+	selp.f32	%f421, %f419, %f41, %p19;
+	mov.b32 	 %r133, %f421;
+	and.b32  	%r134, %r133, 8388607;
+	or.b32  	%r135, %r134, 1065353216;
+	mov.b32 	 %f422, %r135;
+	shr.u32 	%r136, %r133, 23;
+	cvt.rn.f32.u32	%f423, %r136;
+	add.f32 	%f424, %f420, %f423;
+	setp.gt.f32	%p20, %f422, 0f3FB504F3;
+	mul.f32 	%f425, %f422, 0f3F000000;
+	add.f32 	%f426, %f424, 0f3F800000;
+	selp.f32	%f427, %f425, %f422, %p20;
+	selp.f32	%f428, %f426, %f424, %p20;
+	add.f32 	%f429, %f427, 0fBF800000;
+	add.f32 	%f412, %f427, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f411,%f412;
+	// inline asm
+	add.f32 	%f430, %f429, %f429;
+	mul.f32 	%f431, %f411, %f430;
+	mul.f32 	%f432, %f431, %f431;
+	mov.f32 	%f433, 0f3C4CAF63;
+	mov.f32 	%f434, 0f3B18F0FE;
+	fma.rn.f32 	%f435, %f434, %f432, %f433;
+	mov.f32 	%f436, 0f3DAAAABD;
+	fma.rn.f32 	%f437, %f435, %f432, %f436;
+	mul.rn.f32 	%f438, %f437, %f432;
+	mul.rn.f32 	%f439, %f438, %f431;
+	sub.f32 	%f440, %f429, %f431;
+	neg.f32 	%f441, %f431;
+	add.f32 	%f442, %f440, %f440;
+	fma.rn.f32 	%f443, %f441, %f429, %f442;
+	mul.rn.f32 	%f444, %f411, %f443;
+	add.f32 	%f445, %f439, %f431;
+	sub.f32 	%f446, %f431, %f445;
+	add.f32 	%f447, %f439, %f446;
+	add.f32 	%f448, %f444, %f447;
+	add.f32 	%f449, %f445, %f448;
+	sub.f32 	%f450, %f445, %f449;
+	add.f32 	%f451, %f448, %f450;
+	mov.f32 	%f452, 0f3F317200;
+	mul.rn.f32 	%f453, %f428, %f452;
+	mov.f32 	%f454, 0f35BFBE8E;
+	mul.rn.f32 	%f455, %f428, %f454;
+	add.f32 	%f456, %f453, %f449;
+	sub.f32 	%f457, %f453, %f456;
+	add.f32 	%f458, %f449, %f457;
+	add.f32 	%f459, %f451, %f458;
+	add.f32 	%f460, %f455, %f459;
+	add.f32 	%f461, %f456, %f460;
+	sub.f32 	%f462, %f456, %f461;
+	add.f32 	%f463, %f460, %f462;
+	mul.rn.f32 	%f464, %f417, %f461;
+	neg.f32 	%f465, %f464;
+	fma.rn.f32 	%f466, %f417, %f461, %f465;
+	fma.rn.f32 	%f467, %f417, %f463, %f466;
+	mov.f32 	%f468, 0f00000000;
+	fma.rn.f32 	%f469, %f468, %f461, %f467;
+	add.rn.f32 	%f470, %f464, %f469;
+	neg.f32 	%f471, %f470;
+	add.rn.f32 	%f472, %f464, %f471;
+	add.rn.f32 	%f473, %f472, %f469;
+	mov.b32 	 %r137, %f470;
+	setp.eq.s32	%p21, %r137, 1118925336;
+	add.s32 	%r138, %r137, -1;
+	mov.b32 	 %f474, %r138;
+	add.f32 	%f475, %f473, 0f37000000;
+	selp.f32	%f476, %f474, %f470, %p21;
+	selp.f32	%f42, %f475, %f473, %p21;
+	mul.f32 	%f477, %f476, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f478, %f477;
+	mov.f32 	%f479, 0fBF317200;
+	fma.rn.f32 	%f480, %f478, %f479, %f476;
+	mov.f32 	%f481, 0fB5BFBE8E;
+	fma.rn.f32 	%f482, %f478, %f481, %f480;
+	mul.f32 	%f483, %f482, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f484, %f483;
+	add.f32 	%f485, %f478, 0f00000000;
+	ex2.approx.f32 	%f486, %f485;
+	mul.f32 	%f487, %f484, %f486;
+	setp.lt.f32	%p22, %f476, 0fC2D20000;
+	selp.f32	%f488, 0f00000000, %f487, %p22;
+	setp.gt.f32	%p23, %f476, 0f42D20000;
+	selp.f32	%f1133, 0f7F800000, %f488, %p23;
+	setp.eq.f32	%p24, %f1133, 0f7F800000;
+	@%p24 bra 	BB0_9;
+
+	fma.rn.f32 	%f1133, %f1133, %f42, %f1133;
+
+BB0_9:
+	mov.f32 	%f1112, 0f40000000;
+	cvt.rzi.f32.f32	%f1111, %f1112;
+	add.f32 	%f1110, %f1111, %f1111;
+	mov.f32 	%f1109, 0f40800000;
+	sub.f32 	%f1108, %f1109, %f1110;
+	abs.f32 	%f1107, %f1108;
+	setp.lt.f32	%p25, %f39, 0f00000000;
+	setp.eq.f32	%p26, %f1107, 0f3F800000;
+	and.pred  	%p1, %p25, %p26;
+	mov.b32 	 %r139, %f1133;
+	xor.b32  	%r140, %r139, -2147483648;
+	mov.b32 	 %f489, %r140;
+	selp.f32	%f1135, %f489, %f1133, %p1;
+	setp.eq.f32	%p27, %f39, 0f00000000;
+	@%p27 bra 	BB0_12;
+	bra.uni 	BB0_10;
+
+BB0_12:
+	add.f32 	%f492, %f39, %f39;
+	selp.f32	%f1135, %f492, 0f00000000, %p26;
+	bra.uni 	BB0_13;
+
+BB0_10:
+	setp.geu.f32	%p28, %f39, 0f00000000;
+	@%p28 bra 	BB0_13;
+
+	mov.f32 	%f1113, 0f40800000;
+	cvt.rzi.f32.f32	%f491, %f1113;
+	setp.neu.f32	%p29, %f491, 0f40800000;
+	selp.f32	%f1135, 0f7FFFFFFF, %f1135, %p29;
+
+BB0_13:
+	add.f32 	%f493, %f41, 0f40800000;
+	mov.b32 	 %r141, %f493;
+	setp.lt.s32	%p31, %r141, 2139095040;
+	@%p31 bra 	BB0_18;
+
+	setp.gtu.f32	%p32, %f41, 0f7F800000;
+	@%p32 bra 	BB0_17;
+	bra.uni 	BB0_15;
+
+BB0_17:
+	add.f32 	%f1135, %f39, 0f40800000;
+	bra.uni 	BB0_18;
+
+BB0_15:
+	setp.neu.f32	%p33, %f41, 0f7F800000;
+	@%p33 bra 	BB0_18;
+
+	selp.f32	%f1135, 0fFF800000, 0f7F800000, %p1;
+
+BB0_18:
+	mov.u32 	%r379, 1;
+	mov.u64 	%rd309, lightMeshBuffer;
+	cvta.global.u64 	%rd308, %rd309;
+	mov.f32 	%f494, 0f3F800000;
+	sub.f32 	%f495, %f494, %f1135;
+	setp.eq.f32	%p34, %f39, 0f3F800000;
+	selp.f32	%f496, 0f00000000, %f495, %p34;
+	cvt.sat.f32.f32	%f497, %f496;
+	mul.f32 	%f498, %f38, %f497;
+	mad.lo.s32 	%r144, %r383, 3, 1;
+	cvt.s64.s32	%rd51, %r144;
+	// inline asm
+	call (%rd49), _rt_buffer_get_64, (%rd308, %r379, %r114, %rd51, %rd26, %rd26, %rd26);
+	// inline asm
+	ld.f32 	%f499, [%rd49];
+	mul.f32 	%f500, %f35, %f499;
+	ld.f32 	%f501, [%rd49+4];
+	mul.f32 	%f502, %f36, %f501;
+	neg.f32 	%f503, %f502;
+	sub.f32 	%f504, %f503, %f500;
+	ld.f32 	%f505, [%rd49+8];
+	mul.f32 	%f506, %f37, %f505;
+	sub.f32 	%f507, %f504, %f506;
+	cvt.sat.f32.f32	%f508, %f507;
+	mul.f32 	%f53, %f498, %f508;
+	mul.f32 	%f509, %f1115, %f36;
+	fma.rn.f32 	%f510, %f1114, %f35, %f509;
+	fma.rn.f32 	%f54, %f1116, %f37, %f510;
+	setp.leu.f32	%p35, %f53, 0f3727C5AC;
+	@%p35 bra 	BB0_20;
+
+	mov.u32 	%r381, 1;
+	mov.u64 	%rd311, lightMeshBuffer;
+	cvta.global.u64 	%rd310, %rd311;
+	cvt.sat.f32.f32	%f519, %f54;
+	add.u64 	%rd56, %SP, 12;
+	cvta.to.local.u64 	%rd63, %rd56;
+	max.f32 	%f517, %f524, %f376;
+	sub.f32 	%f518, %f34, %f517;
+	mov.u32 	%r150, 1065353216;
+	st.local.u32 	[%rd63], %r150;
+	ld.global.u32 	%r145, [root];
+	// inline asm
+	call _rt_trace_64, (%r145, %f10, %f11, %f12, %f35, %f36, %f37, %r381, %f517, %f518, %rd56, %r99);
+	// inline asm
+	mad.lo.s32 	%r151, %r383, 3, 2;
+	cvt.s64.s32	%rd59, %r151;
+	// inline asm
+	call (%rd57), _rt_buffer_get_64, (%rd310, %r381, %r114, %rd59, %rd26, %rd26, %rd26);
+	// inline asm
+	ld.f32 	%f526, [%rd57];
+	ld.local.f32 	%f527, [%rd63];
+	mul.f32 	%f528, %f527, %f526;
+	ld.f32 	%f529, [%rd57+4];
+	mul.f32 	%f530, %f527, %f529;
+	ld.f32 	%f531, [%rd57+8];
+	mul.f32 	%f532, %f527, %f531;
+	mul.f32 	%f533, %f53, %f528;
+	mul.f32 	%f534, %f53, %f530;
+	mul.f32 	%f535, %f53, %f532;
+	fma.rn.f32 	%f21, %f519, %f533, %f21;
+	fma.rn.f32 	%f20, %f519, %f534, %f20;
+	fma.rn.f32 	%f19, %f519, %f535, %f19;
+	fma.rn.f32 	%f27, %f35, %f533, %f27;
+	fma.rn.f32 	%f26, %f35, %f534, %f26;
+	fma.rn.f32 	%f25, %f35, %f535, %f25;
+	fma.rn.f32 	%f30, %f36, %f533, %f30;
+	fma.rn.f32 	%f29, %f36, %f534, %f29;
+	fma.rn.f32 	%f28, %f36, %f535, %f28;
+	fma.rn.f32 	%f33, %f37, %f533, %f33;
+	fma.rn.f32 	%f32, %f37, %f534, %f32;
+	fma.rn.f32 	%f31, %f37, %f535, %f31;
+	add.f32 	%f24, %f24, %f533;
+	add.f32 	%f23, %f23, %f534;
+	add.f32 	%f22, %f22, %f535;
+	add.f32 	%f18, %f18, %f527;
+
+BB0_20:
+	ld.global.u32 	%r152, [lightMeshBufferSize];
+	add.s32 	%r383, %r383, 1;
+	setp.lt.u32	%p37, %r383, %r152;
+	@%p37 bra 	BB0_6;
+	bra.uni 	BB0_21;
+
+BB0_4:
+	mov.f32 	%f19, %f18;
+	mov.f32 	%f20, %f18;
+	mov.f32 	%f21, %f18;
+	mov.f32 	%f22, %f18;
+	mov.f32 	%f23, %f18;
+	mov.f32 	%f24, %f18;
+	mov.f32 	%f25, %f18;
+	mov.f32 	%f26, %f18;
+	mov.f32 	%f27, %f18;
+	mov.f32 	%f28, %f18;
+	mov.f32 	%f29, %f18;
+	mov.f32 	%f30, %f18;
+	mov.f32 	%f31, %f18;
+	mov.f32 	%f32, %f18;
+	mov.f32 	%f33, %f18;
+
+BB0_21:
+	mov.pred 	%p147, %p13;
+
+BB0_22:
+	cvt.rn.f32.s32	%f536, %r383;
+	mov.f32 	%f537, 0f3F800000;
+	max.f32 	%f538, %f536, %f537;
+	rcp.rn.f32 	%f539, %f538;
+	mul.f32 	%f1237, %f21, %f539;
+	mul.f32 	%f1238, %f20, %f539;
+	mul.f32 	%f1239, %f19, %f539;
+	div.rn.f32 	%f1240, %f18, %f538;
+	mul.f32 	%f1234, %f24, %f539;
+	mul.f32 	%f1235, %f23, %f539;
+	mul.f32 	%f1236, %f22, %f539;
+	mul.f32 	%f1231, %f27, %f539;
+	mul.f32 	%f1232, %f26, %f539;
+	mul.f32 	%f1233, %f25, %f539;
+	mul.f32 	%f1228, %f30, %f539;
+	mul.f32 	%f1229, %f29, %f539;
+	mul.f32 	%f1230, %f28, %f539;
+	mul.f32 	%f1225, %f33, %f539;
+	mul.f32 	%f1226, %f32, %f539;
+	mul.f32 	%f1227, %f31, %f539;
+	@!%p147 bra 	BB0_75;
+	bra.uni 	BB0_23;
+
+BB0_23:
+	mov.f32 	%f554, 0f00000000;
+	setp.lt.s32	%p38, %r1, 1;
+	mov.f32 	%f1183, %f554;
+	mov.f32 	%f1184, %f554;
+	mov.f32 	%f1185, %f554;
+	mov.f32 	%f1186, %f554;
+	mov.f32 	%f1187, %f554;
+	mov.f32 	%f1188, %f554;
+	mov.f32 	%f1189, %f554;
+	mov.f32 	%f1190, %f554;
+	mov.f32 	%f1191, %f554;
+	mov.f32 	%f1192, %f554;
+	mov.f32 	%f1193, %f554;
+	mov.f32 	%f1194, %f554;
+	mov.f32 	%f1195, %f554;
+	mov.f32 	%f1196, %f554;
+	mov.f32 	%f1197, %f554;
+	@%p38 bra 	BB0_74;
+
+	mad.lo.s32 	%r387, %r126, 1664525, 1013904223;
+	cvt.rn.f32.s32	%f570, %r2;
+	rcp.rn.f32 	%f119, %f570;
+	add.u64 	%rd65, %SP, 16;
+	cvta.to.local.u64 	%rd2, %rd65;
+	mul.f32 	%f120, %f10, 0f3456BF95;
+	mul.f32 	%f121, %f11, 0f3456BF95;
+	mul.f32 	%f122, %f12, 0f3456BF95;
+	add.u64 	%rd66, %SP, 0;
+	cvta.to.local.u64 	%rd3, %rd66;
+	mov.f32 	%f1183, 0f00000000;
+	mov.u32 	%r153, 0;
+	abs.f32 	%f571, %f121;
+	abs.f32 	%f572, %f120;
+	max.f32 	%f573, %f572, %f571;
+	abs.f32 	%f574, %f122;
+	max.f32 	%f575, %f573, %f574;
+	mov.u32 	%r384, %r153;
+	mov.f32 	%f1184, %f1183;
+	mov.f32 	%f1185, %f1183;
+	mov.f32 	%f1186, %f1183;
+	mov.f32 	%f1187, %f1183;
+	mov.f32 	%f1188, %f1183;
+	mov.f32 	%f1189, %f1183;
+	mov.f32 	%f1190, %f1183;
+	mov.f32 	%f1191, %f1183;
+	mov.f32 	%f1192, %f1183;
+	mov.f32 	%f1193, %f1183;
+	mov.f32 	%f1194, %f1183;
+	mov.f32 	%f1195, %f1183;
+	mov.f32 	%f1196, %f1183;
+	mov.f32 	%f1197, %f1183;
+
+BB0_25:
+	cvt.rn.f32.s32	%f138, %r384;
+	max.f32 	%f139, %f575, %f376;
+	mov.u32 	%r386, %r153;
+
+BB0_26:
+	mad.lo.s32 	%r155, %r387, 1664525, 1013904223;
+	and.b32  	%r156, %r155, 16777215;
+	cvt.rn.f32.u32	%f577, %r156;
+	fma.rn.f32 	%f578, %f577, 0f33800000, %f138;
+	mul.f32 	%f579, %f119, %f578;
+	mad.lo.s32 	%r387, %r155, 1664525, 1013904223;
+	and.b32  	%r157, %r387, 16777215;
+	cvt.rn.f32.u32	%f580, %r157;
+	cvt.rn.f32.s32	%f581, %r386;
+	fma.rn.f32 	%f582, %f580, 0f33800000, %f581;
+	mul.f32 	%f583, %f119, %f582;
+	fma.rn.f32 	%f155, %f579, 0fC0000000, 0f3F800000;
+	mul.f32 	%f584, %f155, %f155;
+	sub.f32 	%f586, %f537, %f584;
+	mov.f32 	%f587, 0f00000000;
+	max.f32 	%f588, %f587, %f586;
+	sqrt.rn.f32 	%f156, %f588;
+	mul.f32 	%f1204, %f583, 0f40C90FDB;
+	abs.f32 	%f158, %f1204;
+	setp.neu.f32	%p39, %f158, 0f7F800000;
+	mov.f32 	%f1198, %f1204;
+	@%p39 bra 	BB0_28;
+
+	mul.rn.f32 	%f1198, %f1204, %f587;
+
+BB0_28:
+	mul.f32 	%f590, %f1198, 0f3F22F983;
+	cvt.rni.s32.f32	%r397, %f590;
+	cvt.rn.f32.s32	%f591, %r397;
+	neg.f32 	%f592, %f591;
+	mov.f32 	%f593, 0f3FC90FDA;
+	fma.rn.f32 	%f594, %f592, %f593, %f1198;
+	mov.f32 	%f595, 0f33A22168;
+	fma.rn.f32 	%f596, %f592, %f595, %f594;
+	mov.f32 	%f597, 0f27C234C5;
+	fma.rn.f32 	%f1199, %f592, %f597, %f596;
+	abs.f32 	%f598, %f1198;
+	setp.leu.f32	%p40, %f598, 0f47CE4780;
+	@%p40 bra 	BB0_39;
+
+	mov.b32 	 %r16, %f1198;
+	shr.u32 	%r17, %r16, 23;
+	shl.b32 	%r160, %r16, 8;
+	or.b32  	%r18, %r160, -2147483648;
+	mov.u32 	%r388, 0;
+	mov.u64 	%rd313, 0;
+	mov.u64 	%rd312, %rd2;
+	mov.u32 	%r389, %r388;
+
+BB0_30:
+	.pragma "nounroll";
+	shl.b64 	%rd68, %rd313, 2;
+	mov.u64 	%rd69, __cudart_i2opi_f;
+	add.s64 	%rd70, %rd69, %rd68;
+	ld.const.u32 	%r163, [%rd70];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r161, %r163, %r18, %r389;
+	madc.hi.u32     %r389, %r163, %r18,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd312], %r161;
+	add.s32 	%r388, %r388, 1;
+	cvt.s64.s32	%rd313, %r388;
+	mul.wide.s32 	%rd71, %r388, 4;
+	add.s64 	%rd312, %rd2, %rd71;
+	setp.ne.s32	%p41, %r388, 6;
+	@%p41 bra 	BB0_30;
+
+	and.b32  	%r166, %r17, 255;
+	add.s32 	%r167, %r166, -128;
+	shr.u32 	%r168, %r167, 5;
+	and.b32  	%r23, %r16, -2147483648;
+	st.local.u32 	[%rd2+24], %r389;
+	mov.u32 	%r169, 6;
+	sub.s32 	%r170, %r169, %r168;
+	mul.wide.s32 	%rd72, %r170, 4;
+	add.s64 	%rd9, %rd2, %rd72;
+	ld.local.u32 	%r390, [%rd9];
+	ld.local.u32 	%r391, [%rd9+-4];
+	and.b32  	%r26, %r17, 31;
+	setp.eq.s32	%p42, %r26, 0;
+	@%p42 bra 	BB0_33;
+
+	mov.u32 	%r171, 32;
+	sub.s32 	%r172, %r171, %r26;
+	shr.u32 	%r173, %r391, %r172;
+	shl.b32 	%r174, %r390, %r26;
+	add.s32 	%r390, %r173, %r174;
+	ld.local.u32 	%r175, [%rd9+-8];
+	shr.u32 	%r176, %r175, %r172;
+	shl.b32 	%r177, %r391, %r26;
+	add.s32 	%r391, %r176, %r177;
+
+BB0_33:
+	shr.u32 	%r178, %r391, 30;
+	shl.b32 	%r179, %r390, 2;
+	add.s32 	%r392, %r178, %r179;
+	shl.b32 	%r32, %r391, 2;
+	shr.u32 	%r180, %r392, 31;
+	shr.u32 	%r181, %r390, 30;
+	add.s32 	%r33, %r180, %r181;
+	setp.eq.s32	%p43, %r180, 0;
+	@%p43 bra 	BB0_34;
+	bra.uni 	BB0_35;
+
+BB0_34:
+	mov.u32 	%r393, %r23;
+	mov.u32 	%r394, %r32;
+	bra.uni 	BB0_36;
+
+BB0_35:
+	not.b32 	%r182, %r392;
+	neg.s32 	%r394, %r32;
+	setp.eq.s32	%p44, %r32, 0;
+	selp.u32	%r183, 1, 0, %p44;
+	add.s32 	%r392, %r183, %r182;
+	xor.b32  	%r393, %r23, -2147483648;
+
+BB0_36:
+	clz.b32 	%r396, %r392;
+	setp.eq.s32	%p45, %r396, 0;
+	shl.b32 	%r184, %r392, %r396;
+	mov.u32 	%r185, 32;
+	sub.s32 	%r186, %r185, %r396;
+	shr.u32 	%r187, %r394, %r186;
+	add.s32 	%r188, %r187, %r184;
+	selp.b32	%r41, %r392, %r188, %p45;
+	mov.u32 	%r189, -921707870;
+	mul.hi.u32 	%r395, %r41, %r189;
+	setp.eq.s32	%p46, %r23, 0;
+	neg.s32 	%r190, %r33;
+	selp.b32	%r397, %r33, %r190, %p46;
+	setp.lt.s32	%p47, %r395, 1;
+	@%p47 bra 	BB0_38;
+
+	mul.lo.s32 	%r191, %r41, -921707870;
+	shr.u32 	%r192, %r191, 31;
+	shl.b32 	%r193, %r395, 1;
+	add.s32 	%r395, %r192, %r193;
+	add.s32 	%r396, %r396, 1;
+
+BB0_38:
+	mov.u32 	%r194, 126;
+	sub.s32 	%r195, %r194, %r396;
+	shl.b32 	%r196, %r195, 23;
+	add.s32 	%r197, %r395, 1;
+	shr.u32 	%r198, %r197, 7;
+	add.s32 	%r199, %r198, 1;
+	shr.u32 	%r200, %r199, 1;
+	add.s32 	%r201, %r200, %r196;
+	or.b32  	%r202, %r201, %r393;
+	mov.b32 	 %f1199, %r202;
+
+BB0_39:
+	mul.rn.f32 	%f164, %f1199, %f1199;
+	add.s32 	%r49, %r397, 1;
+	and.b32  	%r50, %r49, 1;
+	setp.eq.s32	%p48, %r50, 0;
+	@%p48 bra 	BB0_41;
+	bra.uni 	BB0_40;
+
+BB0_41:
+	mov.f32 	%f601, 0f3C08839E;
+	mov.f32 	%f602, 0fB94CA1F9;
+	fma.rn.f32 	%f1200, %f602, %f164, %f601;
+	bra.uni 	BB0_42;
+
+BB0_40:
+	mov.f32 	%f599, 0fBAB6061A;
+	mov.f32 	%f600, 0f37CCF5CE;
+	fma.rn.f32 	%f1200, %f600, %f164, %f599;
+
+BB0_42:
+	@%p48 bra 	BB0_44;
+	bra.uni 	BB0_43;
+
+BB0_44:
+	mov.f32 	%f606, 0fBE2AAAA3;
+	fma.rn.f32 	%f607, %f1200, %f164, %f606;
+	fma.rn.f32 	%f1201, %f607, %f164, %f587;
+	bra.uni 	BB0_45;
+
+BB0_43:
+	mov.f32 	%f603, 0f3D2AAAA5;
+	fma.rn.f32 	%f604, %f1200, %f164, %f603;
+	mov.f32 	%f605, 0fBF000000;
+	fma.rn.f32 	%f1201, %f604, %f164, %f605;
+
+BB0_45:
+	fma.rn.f32 	%f1202, %f1201, %f1199, %f1199;
+	@%p48 bra 	BB0_47;
+
+	fma.rn.f32 	%f1202, %f1201, %f164, %f537;
+
+BB0_47:
+	and.b32  	%r203, %r49, 2;
+	setp.eq.s32	%p51, %r203, 0;
+	@%p51 bra 	BB0_49;
+
+	mov.f32 	%f611, 0fBF800000;
+	fma.rn.f32 	%f1202, %f1202, %f611, %f587;
+
+BB0_49:
+	@%p39 bra 	BB0_51;
+
+	mul.rn.f32 	%f1204, %f1204, %f587;
+
+BB0_51:
+	mul.f32 	%f613, %f1204, 0f3F22F983;
+	cvt.rni.s32.f32	%r407, %f613;
+	cvt.rn.f32.s32	%f614, %r407;
+	neg.f32 	%f615, %f614;
+	fma.rn.f32 	%f617, %f615, %f593, %f1204;
+	fma.rn.f32 	%f619, %f615, %f595, %f617;
+	fma.rn.f32 	%f1205, %f615, %f597, %f619;
+	abs.f32 	%f621, %f1204;
+	setp.leu.f32	%p53, %f621, 0f47CE4780;
+	@%p53 bra 	BB0_62;
+
+	mov.b32 	 %r52, %f1204;
+	shr.u32 	%r53, %r52, 23;
+	shl.b32 	%r206, %r52, 8;
+	or.b32  	%r54, %r206, -2147483648;
+	mov.u32 	%r398, 0;
+	mov.u64 	%rd314, %rd2;
+	mov.u64 	%rd315, %rd26;
+	mov.u32 	%r399, %r398;
+
+BB0_53:
+	.pragma "nounroll";
+	shl.b64 	%rd74, %rd315, 2;
+	mov.u64 	%rd75, __cudart_i2opi_f;
+	add.s64 	%rd76, %rd75, %rd74;
+	ld.const.u32 	%r209, [%rd76];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r207, %r209, %r54, %r399;
+	madc.hi.u32     %r399, %r209, %r54,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd314], %r207;
+	add.s32 	%r398, %r398, 1;
+	cvt.s64.s32	%rd315, %r398;
+	mul.wide.s32 	%rd77, %r398, 4;
+	add.s64 	%rd314, %rd2, %rd77;
+	setp.ne.s32	%p54, %r398, 6;
+	@%p54 bra 	BB0_53;
+
+	and.b32  	%r212, %r53, 255;
+	add.s32 	%r213, %r212, -128;
+	shr.u32 	%r214, %r213, 5;
+	and.b32  	%r59, %r52, -2147483648;
+	st.local.u32 	[%rd2+24], %r399;
+	mov.u32 	%r215, 6;
+	sub.s32 	%r216, %r215, %r214;
+	mul.wide.s32 	%rd78, %r216, 4;
+	add.s64 	%rd15, %rd2, %rd78;
+	ld.local.u32 	%r400, [%rd15];
+	ld.local.u32 	%r401, [%rd15+-4];
+	and.b32  	%r62, %r53, 31;
+	setp.eq.s32	%p55, %r62, 0;
+	@%p55 bra 	BB0_56;
+
+	mov.u32 	%r217, 32;
+	sub.s32 	%r218, %r217, %r62;
+	shr.u32 	%r219, %r401, %r218;
+	shl.b32 	%r220, %r400, %r62;
+	add.s32 	%r400, %r219, %r220;
+	ld.local.u32 	%r221, [%rd15+-8];
+	shr.u32 	%r222, %r221, %r218;
+	shl.b32 	%r223, %r401, %r62;
+	add.s32 	%r401, %r222, %r223;
+
+BB0_56:
+	shr.u32 	%r224, %r401, 30;
+	shl.b32 	%r225, %r400, 2;
+	add.s32 	%r402, %r224, %r225;
+	shl.b32 	%r68, %r401, 2;
+	shr.u32 	%r226, %r402, 31;
+	shr.u32 	%r227, %r400, 30;
+	add.s32 	%r69, %r226, %r227;
+	setp.eq.s32	%p56, %r226, 0;
+	@%p56 bra 	BB0_57;
+	bra.uni 	BB0_58;
+
+BB0_57:
+	mov.u32 	%r403, %r59;
+	mov.u32 	%r404, %r68;
+	bra.uni 	BB0_59;
+
+BB0_58:
+	not.b32 	%r228, %r402;
+	neg.s32 	%r404, %r68;
+	setp.eq.s32	%p57, %r68, 0;
+	selp.u32	%r229, 1, 0, %p57;
+	add.s32 	%r402, %r229, %r228;
+	xor.b32  	%r403, %r59, -2147483648;
+
+BB0_59:
+	clz.b32 	%r406, %r402;
+	setp.eq.s32	%p58, %r406, 0;
+	shl.b32 	%r230, %r402, %r406;
+	mov.u32 	%r231, 32;
+	sub.s32 	%r232, %r231, %r406;
+	shr.u32 	%r233, %r404, %r232;
+	add.s32 	%r234, %r233, %r230;
+	selp.b32	%r77, %r402, %r234, %p58;
+	mov.u32 	%r235, -921707870;
+	mul.hi.u32 	%r405, %r77, %r235;
+	setp.eq.s32	%p59, %r59, 0;
+	neg.s32 	%r236, %r69;
+	selp.b32	%r407, %r69, %r236, %p59;
+	setp.lt.s32	%p60, %r405, 1;
+	@%p60 bra 	BB0_61;
+
+	mul.lo.s32 	%r237, %r77, -921707870;
+	shr.u32 	%r238, %r237, 31;
+	shl.b32 	%r239, %r405, 1;
+	add.s32 	%r405, %r238, %r239;
+	add.s32 	%r406, %r406, 1;
+
+BB0_61:
+	mov.u32 	%r240, 126;
+	sub.s32 	%r241, %r240, %r406;
+	shl.b32 	%r242, %r241, 23;
+	add.s32 	%r243, %r405, 1;
+	shr.u32 	%r244, %r243, 7;
+	add.s32 	%r245, %r244, 1;
+	shr.u32 	%r246, %r245, 1;
+	add.s32 	%r247, %r246, %r242;
+	or.b32  	%r248, %r247, %r403;
+	mov.b32 	 %f1205, %r248;
+
+BB0_62:
+	mul.rn.f32 	%f181, %f1205, %f1205;
+	and.b32  	%r85, %r407, 1;
+	setp.eq.s32	%p61, %r85, 0;
+	@%p61 bra 	BB0_64;
+	bra.uni 	BB0_63;
+
+BB0_64:
+	mov.f32 	%f624, 0f3C08839E;
+	mov.f32 	%f625, 0fB94CA1F9;
+	fma.rn.f32 	%f1206, %f625, %f181, %f624;
+	bra.uni 	BB0_65;
+
+BB0_63:
+	mov.f32 	%f622, 0fBAB6061A;
+	mov.f32 	%f623, 0f37CCF5CE;
+	fma.rn.f32 	%f1206, %f623, %f181, %f622;
+
+BB0_65:
+	@%p61 bra 	BB0_67;
+	bra.uni 	BB0_66;
+
+BB0_67:
+	mov.f32 	%f629, 0fBE2AAAA3;
+	fma.rn.f32 	%f630, %f1206, %f181, %f629;
+	fma.rn.f32 	%f1207, %f630, %f181, %f587;
+	bra.uni 	BB0_68;
+
+BB0_66:
+	mov.f32 	%f626, 0f3D2AAAA5;
+	fma.rn.f32 	%f627, %f1206, %f181, %f626;
+	mov.f32 	%f628, 0fBF000000;
+	fma.rn.f32 	%f1207, %f627, %f181, %f628;
+
+BB0_68:
+	fma.rn.f32 	%f1208, %f1207, %f1205, %f1205;
+	@%p61 bra 	BB0_70;
+
+	fma.rn.f32 	%f1208, %f1207, %f181, %f537;
+
+BB0_70:
+	and.b32  	%r249, %r407, 2;
+	setp.eq.s32	%p64, %r249, 0;
+	@%p64 bra 	BB0_72;
+
+	mov.f32 	%f634, 0fBF800000;
+	fma.rn.f32 	%f1208, %f1208, %f634, %f587;
+
+BB0_72:
+	mul.f32 	%f638, %f156, %f1202;
+	mov.u32 	%r251, 0;
+	st.local.u32 	[%rd3+8], %r251;
+	st.local.u32 	[%rd3+4], %r251;
+	st.local.u32 	[%rd3], %r251;
+	ld.global.u32 	%r250, [root];
+	mul.f32 	%f639, %f156, %f1208;
+	mov.f32 	%f642, 0f6C4ECB8F;
+	// inline asm
+	call _rt_trace_64, (%r250, %f10, %f11, %f12, %f638, %f639, %f155, %r251, %f139, %f642, %rd66, %r114);
+	// inline asm
+	ld.local.f32 	%f643, [%rd3];
+	max.f32 	%f645, %f643, %f587;
+	ld.local.f32 	%f646, [%rd3+4];
+	max.f32 	%f647, %f646, %f587;
+	ld.local.f32 	%f648, [%rd3+8];
+	max.f32 	%f649, %f648, %f587;
+	fma.rn.f32 	%f1191, %f638, %f645, %f1191;
+	fma.rn.f32 	%f1190, %f638, %f647, %f1190;
+	fma.rn.f32 	%f1189, %f638, %f649, %f1189;
+	fma.rn.f32 	%f1194, %f639, %f645, %f1194;
+	fma.rn.f32 	%f1193, %f639, %f647, %f1193;
+	fma.rn.f32 	%f1192, %f639, %f649, %f1192;
+	fma.rn.f32 	%f1197, %f155, %f645, %f1197;
+	fma.rn.f32 	%f1196, %f155, %f647, %f1196;
+	fma.rn.f32 	%f1195, %f155, %f649, %f1195;
+	add.f32 	%f1188, %f1188, %f645;
+	add.f32 	%f1187, %f1187, %f647;
+	add.f32 	%f1186, %f1186, %f649;
+	mul.f32 	%f650, %f1115, %f639;
+	fma.rn.f32 	%f651, %f1114, %f638, %f650;
+	fma.rn.f32 	%f652, %f1116, %f155, %f651;
+	cvt.sat.f32.f32	%f653, %f652;
+	fma.rn.f32 	%f1185, %f645, %f653, %f1185;
+	fma.rn.f32 	%f1184, %f647, %f653, %f1184;
+	fma.rn.f32 	%f1183, %f649, %f653, %f1183;
+	add.s32 	%r386, %r386, 1;
+	setp.lt.s32	%p65, %r386, %r2;
+	@%p65 bra 	BB0_26;
+
+	add.s32 	%r384, %r384, 1;
+	setp.lt.s32	%p66, %r384, %r2;
+	@%p66 bra 	BB0_25;
+
+BB0_74:
+	mul.lo.s32 	%r253, %r2, %r2;
+	cvt.rn.f32.s32	%f654, %r253;
+	rcp.rn.f32 	%f655, %f654;
+	mul.f32 	%f656, %f1185, %f655;
+	mul.f32 	%f657, %f1184, %f655;
+	mul.f32 	%f658, %f1183, %f655;
+	div.rn.f32 	%f1240, %f554, %f654;
+	mul.f32 	%f1234, %f1188, %f655;
+	mul.f32 	%f1235, %f1187, %f655;
+	mul.f32 	%f1236, %f1186, %f655;
+	mul.f32 	%f1231, %f1191, %f655;
+	mul.f32 	%f1232, %f1190, %f655;
+	mul.f32 	%f1233, %f1189, %f655;
+	mul.f32 	%f1228, %f1194, %f655;
+	mul.f32 	%f1229, %f1193, %f655;
+	mul.f32 	%f1230, %f1192, %f655;
+	mul.f32 	%f1225, %f1197, %f655;
+	mul.f32 	%f1226, %f1196, %f655;
+	mul.f32 	%f1227, %f1195, %f655;
+	fma.rn.f32 	%f1237, %f1185, %f655, %f656;
+	fma.rn.f32 	%f1238, %f1184, %f655, %f657;
+	fma.rn.f32 	%f1239, %f1183, %f655, %f658;
+
+BB0_75:
+	ld.global.u32 	%r409, [imageEnabled];
+	and.b32  	%r254, %r409, 8;
+	setp.eq.s32	%p67, %r254, 0;
+	@%p67 bra 	BB0_88;
+
+	cvt.u64.u32	%rd82, %r4;
+	cvt.u64.u32	%rd83, %r5;
+	mov.u64 	%rd86, image_Mask;
+	cvta.global.u64 	%rd81, %rd86;
+	// inline asm
+	call (%rd80), _rt_buffer_get_64, (%rd81, %r98, %r98, %rd82, %rd83, %rd26, %rd26);
+	// inline asm
+	mov.f32 	%f662, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f663, %f662;
+	fma.rn.f32 	%f664, %f663, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f255, %f664;
+	abs.f32 	%f256, %f1240;
+	setp.lt.f32	%p68, %f256, 0f00800000;
+	mul.f32 	%f665, %f256, 0f4B800000;
+	selp.f32	%f666, 0fC3170000, 0fC2FE0000, %p68;
+	selp.f32	%f667, %f665, %f256, %p68;
+	mov.b32 	 %r257, %f667;
+	and.b32  	%r258, %r257, 8388607;
+	or.b32  	%r259, %r258, 1065353216;
+	mov.b32 	 %f668, %r259;
+	shr.u32 	%r260, %r257, 23;
+	cvt.rn.f32.u32	%f669, %r260;
+	add.f32 	%f670, %f666, %f669;
+	setp.gt.f32	%p69, %f668, 0f3FB504F3;
+	mul.f32 	%f671, %f668, 0f3F000000;
+	add.f32 	%f672, %f670, 0f3F800000;
+	selp.f32	%f673, %f671, %f668, %p69;
+	selp.f32	%f674, %f672, %f670, %p69;
+	add.f32 	%f675, %f673, 0fBF800000;
+	add.f32 	%f661, %f673, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f660,%f661;
+	// inline asm
+	add.f32 	%f676, %f675, %f675;
+	mul.f32 	%f677, %f660, %f676;
+	mul.f32 	%f678, %f677, %f677;
+	mov.f32 	%f679, 0f3C4CAF63;
+	mov.f32 	%f680, 0f3B18F0FE;
+	fma.rn.f32 	%f681, %f680, %f678, %f679;
+	mov.f32 	%f682, 0f3DAAAABD;
+	fma.rn.f32 	%f683, %f681, %f678, %f682;
+	mul.rn.f32 	%f684, %f683, %f678;
+	mul.rn.f32 	%f685, %f684, %f677;
+	sub.f32 	%f686, %f675, %f677;
+	neg.f32 	%f687, %f677;
+	add.f32 	%f688, %f686, %f686;
+	fma.rn.f32 	%f689, %f687, %f675, %f688;
+	mul.rn.f32 	%f690, %f660, %f689;
+	add.f32 	%f691, %f685, %f677;
+	sub.f32 	%f692, %f677, %f691;
+	add.f32 	%f693, %f685, %f692;
+	add.f32 	%f694, %f690, %f693;
+	add.f32 	%f695, %f691, %f694;
+	sub.f32 	%f696, %f691, %f695;
+	add.f32 	%f697, %f694, %f696;
+	mov.f32 	%f698, 0f3F317200;
+	mul.rn.f32 	%f699, %f674, %f698;
+	mov.f32 	%f700, 0f35BFBE8E;
+	mul.rn.f32 	%f701, %f674, %f700;
+	add.f32 	%f702, %f699, %f695;
+	sub.f32 	%f703, %f699, %f702;
+	add.f32 	%f704, %f695, %f703;
+	add.f32 	%f705, %f697, %f704;
+	add.f32 	%f706, %f701, %f705;
+	add.f32 	%f707, %f702, %f706;
+	sub.f32 	%f708, %f702, %f707;
+	add.f32 	%f709, %f706, %f708;
+	mov.f32 	%f710, 0f3EE8BA2E;
+	mul.rn.f32 	%f711, %f710, %f707;
+	neg.f32 	%f712, %f711;
+	fma.rn.f32 	%f713, %f710, %f707, %f712;
+	fma.rn.f32 	%f714, %f710, %f709, %f713;
+	mov.f32 	%f715, 0f00000000;
+	fma.rn.f32 	%f716, %f715, %f707, %f714;
+	add.rn.f32 	%f717, %f711, %f716;
+	neg.f32 	%f718, %f717;
+	add.rn.f32 	%f719, %f711, %f718;
+	add.rn.f32 	%f720, %f719, %f716;
+	mov.b32 	 %r261, %f717;
+	setp.eq.s32	%p70, %r261, 1118925336;
+	add.s32 	%r262, %r261, -1;
+	mov.b32 	 %f721, %r262;
+	add.f32 	%f722, %f720, 0f37000000;
+	selp.f32	%f723, %f721, %f717, %p70;
+	selp.f32	%f257, %f722, %f720, %p70;
+	mul.f32 	%f724, %f723, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f725, %f724;
+	mov.f32 	%f726, 0fBF317200;
+	fma.rn.f32 	%f727, %f725, %f726, %f723;
+	mov.f32 	%f728, 0fB5BFBE8E;
+	fma.rn.f32 	%f729, %f725, %f728, %f727;
+	mul.f32 	%f730, %f729, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f731, %f730;
+	add.f32 	%f732, %f725, 0f00000000;
+	ex2.approx.f32 	%f733, %f732;
+	mul.f32 	%f734, %f731, %f733;
+	setp.lt.f32	%p71, %f723, 0fC2D20000;
+	selp.f32	%f735, 0f00000000, %f734, %p71;
+	setp.gt.f32	%p72, %f723, 0f42D20000;
+	selp.f32	%f1241, 0f7F800000, %f735, %p72;
+	setp.eq.f32	%p73, %f1241, 0f7F800000;
+	@%p73 bra 	BB0_78;
+
+	fma.rn.f32 	%f1241, %f1241, %f257, %f1241;
+
+BB0_78:
+	setp.lt.f32	%p74, %f1240, 0f00000000;
+	setp.eq.f32	%p75, %f255, 0f3F800000;
+	and.pred  	%p3, %p74, %p75;
+	mov.b32 	 %r263, %f1241;
+	xor.b32  	%r264, %r263, -2147483648;
+	mov.b32 	 %f736, %r264;
+	selp.f32	%f1243, %f736, %f1241, %p3;
+	setp.eq.f32	%p76, %f1240, 0f00000000;
+	@%p76 bra 	BB0_81;
+	bra.uni 	BB0_79;
+
+BB0_81:
+	add.f32 	%f739, %f1240, %f1240;
+	selp.f32	%f1243, %f739, 0f00000000, %p75;
+	bra.uni 	BB0_82;
+
+BB0_146:
+	mov.u64 	%rd227, image_HDR;
+	cvta.global.u64 	%rd222, %rd227;
+	mov.u32 	%r350, 8;
+	mov.u64 	%rd226, 0;
+	// inline asm
+	call (%rd221), _rt_buffer_get_64, (%rd222, %r98, %r350, %rd19, %rd20, %rd226, %rd226);
+	// inline asm
+	mov.f32 	%f1078, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs104, %f1078;}
+
+	// inline asm
+	mov.u16 	%rs105, 0;
+	st.v4.u16 	[%rd221], {%rs104, %rs104, %rs104, %rs105};
+
+BB0_147:
+	ld.global.u32 	%r351, [additive];
+	setp.eq.s32	%p143, %r351, 0;
+	@%p143 bra 	BB0_149;
+
+	mov.u64 	%rd240, image_RNM0;
+	cvta.global.u64 	%rd229, %rd240;
+	mov.u32 	%r355, 8;
+	mov.u64 	%rd239, 0;
+	// inline asm
+	call (%rd228), _rt_buffer_get_64, (%rd229, %r98, %r355, %rd19, %rd20, %rd239, %rd239);
+	// inline asm
+	ld.v4.u16 	{%rs112, %rs113, %rs114, %rs115}, [%rd228];
+	// inline asm
+	{  cvt.f32.f16 %f1079, %rs112;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1080, %rs113;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1081, %rs114;}
+
+	// inline asm
+	// inline asm
+	call (%rd234), _rt_buffer_get_64, (%rd229, %r98, %r355, %rd19, %rd20, %rd239, %rd239);
+	// inline asm
+	add.f32 	%f1082, %f1079, 0f00000000;
+	add.f32 	%f1083, %f1080, 0f00000000;
+	add.f32 	%f1084, %f1081, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs111, %f1084;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs110, %f1083;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs109, %f1082;}
+
+	// inline asm
+	mov.u16 	%rs116, 0;
+	st.v4.u16 	[%rd234], {%rs109, %rs110, %rs111, %rs116};
+	bra.uni 	BB0_150;
+
+BB0_149:
+	mov.u64 	%rd247, image_RNM0;
+	cvta.global.u64 	%rd242, %rd247;
+	mov.u32 	%r357, 8;
+	mov.u64 	%rd246, 0;
+	// inline asm
+	call (%rd241), _rt_buffer_get_64, (%rd242, %r98, %r357, %rd19, %rd20, %rd246, %rd246);
+	// inline asm
+	mov.f32 	%f1085, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs117, %f1085;}
+
+	// inline asm
+	mov.u16 	%rs118, 0;
+	st.v4.u16 	[%rd241], {%rs117, %rs117, %rs117, %rs118};
+
+BB0_150:
+	ld.global.u32 	%r358, [additive];
+	setp.eq.s32	%p144, %r358, 0;
+	@%p144 bra 	BB0_152;
+
+	mov.u64 	%rd260, image_RNM1;
+	cvta.global.u64 	%rd249, %rd260;
+	mov.u32 	%r362, 8;
+	mov.u64 	%rd259, 0;
+	// inline asm
+	call (%rd248), _rt_buffer_get_64, (%rd249, %r98, %r362, %rd19, %rd20, %rd259, %rd259);
+	// inline asm
+	ld.v4.u16 	{%rs125, %rs126, %rs127, %rs128}, [%rd248];
+	// inline asm
+	{  cvt.f32.f16 %f1086, %rs125;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1087, %rs126;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1088, %rs127;}
+
+	// inline asm
+	// inline asm
+	call (%rd254), _rt_buffer_get_64, (%rd249, %r98, %r362, %rd19, %rd20, %rd259, %rd259);
+	// inline asm
+	add.f32 	%f1089, %f1086, 0f00000000;
+	add.f32 	%f1090, %f1087, 0f00000000;
+	add.f32 	%f1091, %f1088, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs124, %f1091;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs123, %f1090;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs122, %f1089;}
+
+	// inline asm
+	mov.u16 	%rs129, 0;
+	st.v4.u16 	[%rd254], {%rs122, %rs123, %rs124, %rs129};
+	bra.uni 	BB0_153;
+
+BB0_152:
+	mov.u64 	%rd267, image_RNM1;
+	cvta.global.u64 	%rd262, %rd267;
+	mov.u32 	%r364, 8;
+	mov.u64 	%rd266, 0;
+	// inline asm
+	call (%rd261), _rt_buffer_get_64, (%rd262, %r98, %r364, %rd19, %rd20, %rd266, %rd266);
+	// inline asm
+	mov.f32 	%f1092, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs130, %f1092;}
+
+	// inline asm
+	mov.u16 	%rs131, 0;
+	st.v4.u16 	[%rd261], {%rs130, %rs130, %rs130, %rs131};
+
+BB0_153:
+	ld.global.u32 	%r365, [additive];
+	setp.eq.s32	%p145, %r365, 0;
+	@%p145 bra 	BB0_155;
+
+	mov.u64 	%rd280, image_RNM2;
+	cvta.global.u64 	%rd269, %rd280;
+	mov.u32 	%r369, 8;
+	mov.u64 	%rd279, 0;
+	// inline asm
+	call (%rd268), _rt_buffer_get_64, (%rd269, %r98, %r369, %rd19, %rd20, %rd279, %rd279);
+	// inline asm
+	ld.v4.u16 	{%rs138, %rs139, %rs140, %rs141}, [%rd268];
+	// inline asm
+	{  cvt.f32.f16 %f1093, %rs138;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1094, %rs139;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1095, %rs140;}
+
+	// inline asm
+	// inline asm
+	call (%rd274), _rt_buffer_get_64, (%rd269, %r98, %r369, %rd19, %rd20, %rd279, %rd279);
+	// inline asm
+	add.f32 	%f1096, %f1093, 0f00000000;
+	add.f32 	%f1097, %f1094, 0f00000000;
+	add.f32 	%f1098, %f1095, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs137, %f1098;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs136, %f1097;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs135, %f1096;}
+
+	// inline asm
+	mov.u16 	%rs142, 0;
+	st.v4.u16 	[%rd274], {%rs135, %rs136, %rs137, %rs142};
+	bra.uni 	BB0_156;
+
+BB0_155:
+	mov.u64 	%rd287, image_RNM2;
+	cvta.global.u64 	%rd282, %rd287;
+	mov.u32 	%r371, 8;
+	mov.u64 	%rd286, 0;
+	// inline asm
+	call (%rd281), _rt_buffer_get_64, (%rd282, %r98, %r371, %rd19, %rd20, %rd286, %rd286);
+	// inline asm
+	mov.f32 	%f1099, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs143, %f1099;}
+
+	// inline asm
+	mov.u16 	%rs144, 0;
+	st.v4.u16 	[%rd281], {%rs143, %rs143, %rs143, %rs144};
+
+BB0_156:
+	ld.global.u32 	%r372, [additive];
+	setp.eq.s32	%p146, %r372, 0;
+	@%p146 bra 	BB0_158;
+
+	mov.u64 	%rd300, image_RNM3;
+	cvta.global.u64 	%rd289, %rd300;
+	mov.u32 	%r376, 8;
+	mov.u64 	%rd299, 0;
+	// inline asm
+	call (%rd288), _rt_buffer_get_64, (%rd289, %r98, %r376, %rd19, %rd20, %rd299, %rd299);
+	// inline asm
+	ld.v4.u16 	{%rs151, %rs152, %rs153, %rs154}, [%rd288];
+	// inline asm
+	{  cvt.f32.f16 %f1100, %rs151;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1101, %rs152;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1102, %rs153;}
+
+	// inline asm
+	// inline asm
+	call (%rd294), _rt_buffer_get_64, (%rd289, %r98, %r376, %rd19, %rd20, %rd299, %rd299);
+	// inline asm
+	add.f32 	%f1103, %f1100, 0f00000000;
+	add.f32 	%f1104, %f1101, 0f00000000;
+	add.f32 	%f1105, %f1102, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs150, %f1105;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs149, %f1104;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs148, %f1103;}
+
+	// inline asm
+	mov.u16 	%rs155, 0;
+	st.v4.u16 	[%rd294], {%rs148, %rs149, %rs150, %rs155};
+	bra.uni 	BB0_159;
+
+BB0_158:
+	mov.u64 	%rd307, image_RNM3;
+	cvta.global.u64 	%rd302, %rd307;
+	mov.u32 	%r378, 8;
+	mov.u64 	%rd306, 0;
+	// inline asm
+	call (%rd301), _rt_buffer_get_64, (%rd302, %r98, %r378, %rd19, %rd20, %rd306, %rd306);
+	// inline asm
+	mov.f32 	%f1106, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs156, %f1106;}
+
+	// inline asm
+	mov.u16 	%rs157, 0;
+	st.v4.u16 	[%rd301], {%rs156, %rs156, %rs156, %rs157};
+	bra.uni 	BB0_159;
+
+BB0_79:
+	setp.geu.f32	%p77, %f1240, 0f00000000;
+	@%p77 bra 	BB0_82;
+
+	cvt.rzi.f32.f32	%f738, %f710;
+	setp.neu.f32	%p78, %f738, 0f3EE8BA2E;
+	selp.f32	%f1243, 0f7FFFFFFF, %f1243, %p78;
+
+BB0_82:
+	add.f32 	%f740, %f256, 0f3EE8BA2E;
+	mov.b32 	 %r265, %f740;
+	setp.lt.s32	%p80, %r265, 2139095040;
+	@%p80 bra 	BB0_87;
+
+	setp.gtu.f32	%p81, %f256, 0f7F800000;
+	@%p81 bra 	BB0_86;
+	bra.uni 	BB0_84;
+
+BB0_86:
+	add.f32 	%f1243, %f1240, 0f3EE8BA2E;
+	bra.uni 	BB0_87;
+
+BB0_84:
+	setp.neu.f32	%p82, %f256, 0f7F800000;
+	@%p82 bra 	BB0_87;
+
+	selp.f32	%f1243, 0fFF800000, 0f7F800000, %p3;
+
+BB0_87:
+	mul.f32 	%f741, %f1243, 0f437F0000;
+	setp.eq.f32	%p83, %f1240, 0f3F800000;
+	selp.f32	%f742, 0f437F0000, %f741, %p83;
+	cvt.rzi.u32.f32	%r266, %f742;
+	cvt.u16.u32	%rs14, %r266;
+	mov.u16 	%rs15, 255;
+	st.v2.u8 	[%rd80], {%rs14, %rs15};
+	ld.global.u32 	%r409, [imageEnabled];
+
+BB0_88:
+	ld.global.f32 	%f743, [lightColor];
+	mul.f32 	%f268, %f1237, %f743;
+	ld.global.f32 	%f744, [lightColor+4];
+	mul.f32 	%f269, %f1238, %f744;
+	ld.global.f32 	%f745, [lightColor+8];
+	mul.f32 	%f270, %f1239, %f745;
+	and.b32  	%r267, %r409, 1;
+	setp.eq.b32	%p84, %r267, 1;
+	@!%p84 bra 	BB0_123;
+	bra.uni 	BB0_89;
+
+BB0_89:
+	mov.f32 	%f748, 0f3E666666;
+	cvt.rzi.f32.f32	%f749, %f748;
+	fma.rn.f32 	%f750, %f749, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f271, %f750;
+	abs.f32 	%f272, %f268;
+	setp.lt.f32	%p85, %f272, 0f00800000;
+	mul.f32 	%f751, %f272, 0f4B800000;
+	selp.f32	%f752, 0fC3170000, 0fC2FE0000, %p85;
+	selp.f32	%f753, %f751, %f272, %p85;
+	mov.b32 	 %r268, %f753;
+	and.b32  	%r269, %r268, 8388607;
+	or.b32  	%r270, %r269, 1065353216;
+	mov.b32 	 %f754, %r270;
+	shr.u32 	%r271, %r268, 23;
+	cvt.rn.f32.u32	%f755, %r271;
+	add.f32 	%f756, %f752, %f755;
+	setp.gt.f32	%p86, %f754, 0f3FB504F3;
+	mul.f32 	%f757, %f754, 0f3F000000;
+	add.f32 	%f758, %f756, 0f3F800000;
+	selp.f32	%f759, %f757, %f754, %p86;
+	selp.f32	%f760, %f758, %f756, %p86;
+	add.f32 	%f761, %f759, 0fBF800000;
+	add.f32 	%f747, %f759, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f746,%f747;
+	// inline asm
+	add.f32 	%f762, %f761, %f761;
+	mul.f32 	%f763, %f746, %f762;
+	mul.f32 	%f764, %f763, %f763;
+	mov.f32 	%f765, 0f3C4CAF63;
+	mov.f32 	%f766, 0f3B18F0FE;
+	fma.rn.f32 	%f767, %f766, %f764, %f765;
+	mov.f32 	%f768, 0f3DAAAABD;
+	fma.rn.f32 	%f769, %f767, %f764, %f768;
+	mul.rn.f32 	%f770, %f769, %f764;
+	mul.rn.f32 	%f771, %f770, %f763;
+	sub.f32 	%f772, %f761, %f763;
+	neg.f32 	%f773, %f763;
+	add.f32 	%f774, %f772, %f772;
+	fma.rn.f32 	%f775, %f773, %f761, %f774;
+	mul.rn.f32 	%f776, %f746, %f775;
+	add.f32 	%f777, %f771, %f763;
+	sub.f32 	%f778, %f763, %f777;
+	add.f32 	%f779, %f771, %f778;
+	add.f32 	%f780, %f776, %f779;
+	add.f32 	%f781, %f777, %f780;
+	sub.f32 	%f782, %f777, %f781;
+	add.f32 	%f783, %f780, %f782;
+	mov.f32 	%f784, 0f3F317200;
+	mul.rn.f32 	%f785, %f760, %f784;
+	mov.f32 	%f786, 0f35BFBE8E;
+	mul.rn.f32 	%f787, %f760, %f786;
+	add.f32 	%f788, %f785, %f781;
+	sub.f32 	%f789, %f785, %f788;
+	add.f32 	%f790, %f781, %f789;
+	add.f32 	%f791, %f783, %f790;
+	add.f32 	%f792, %f787, %f791;
+	add.f32 	%f793, %f788, %f792;
+	sub.f32 	%f794, %f788, %f793;
+	add.f32 	%f795, %f792, %f794;
+	mov.f32 	%f796, 0f3EE66666;
+	mul.rn.f32 	%f797, %f796, %f793;
+	neg.f32 	%f798, %f797;
+	fma.rn.f32 	%f799, %f796, %f793, %f798;
+	fma.rn.f32 	%f800, %f796, %f795, %f799;
+	mov.f32 	%f801, 0f00000000;
+	fma.rn.f32 	%f802, %f801, %f793, %f800;
+	add.rn.f32 	%f803, %f797, %f802;
+	neg.f32 	%f804, %f803;
+	add.rn.f32 	%f805, %f797, %f804;
+	add.rn.f32 	%f806, %f805, %f802;
+	mov.b32 	 %r272, %f803;
+	setp.eq.s32	%p87, %r272, 1118925336;
+	add.s32 	%r273, %r272, -1;
+	mov.b32 	 %f807, %r273;
+	add.f32 	%f808, %f806, 0f37000000;
+	selp.f32	%f809, %f807, %f803, %p87;
+	selp.f32	%f273, %f808, %f806, %p87;
+	mul.f32 	%f810, %f809, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f811, %f810;
+	mov.f32 	%f812, 0fBF317200;
+	fma.rn.f32 	%f813, %f811, %f812, %f809;
+	mov.f32 	%f814, 0fB5BFBE8E;
+	fma.rn.f32 	%f815, %f811, %f814, %f813;
+	mul.f32 	%f816, %f815, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f817, %f816;
+	add.f32 	%f818, %f811, 0f00000000;
+	ex2.approx.f32 	%f819, %f818;
+	mul.f32 	%f820, %f817, %f819;
+	setp.lt.f32	%p88, %f809, 0fC2D20000;
+	selp.f32	%f821, 0f00000000, %f820, %p88;
+	setp.gt.f32	%p89, %f809, 0f42D20000;
+	selp.f32	%f1244, 0f7F800000, %f821, %p89;
+	setp.eq.f32	%p90, %f1244, 0f7F800000;
+	@%p90 bra 	BB0_91;
+
+	fma.rn.f32 	%f1244, %f1244, %f273, %f1244;
+
+BB0_91:
+	setp.lt.f32	%p91, %f268, 0f00000000;
+	setp.eq.f32	%p92, %f271, 0f3F800000;
+	and.pred  	%p4, %p91, %p92;
+	mov.b32 	 %r274, %f1244;
+	xor.b32  	%r275, %r274, -2147483648;
+	mov.b32 	 %f822, %r275;
+	selp.f32	%f1246, %f822, %f1244, %p4;
+	setp.eq.f32	%p93, %f268, 0f00000000;
+	@%p93 bra 	BB0_94;
+	bra.uni 	BB0_92;
+
+BB0_94:
+	add.f32 	%f825, %f268, %f268;
+	selp.f32	%f1246, %f825, 0f00000000, %p92;
+	bra.uni 	BB0_95;
+
+BB0_92:
+	setp.geu.f32	%p94, %f268, 0f00000000;
+	@%p94 bra 	BB0_95;
+
+	cvt.rzi.f32.f32	%f824, %f796;
+	setp.neu.f32	%p95, %f824, 0f3EE66666;
+	selp.f32	%f1246, 0f7FFFFFFF, %f1246, %p95;
+
+BB0_95:
+	add.f32 	%f826, %f272, 0f3EE66666;
+	mov.b32 	 %r276, %f826;
+	setp.lt.s32	%p97, %r276, 2139095040;
+	@%p97 bra 	BB0_100;
+
+	setp.gtu.f32	%p98, %f272, 0f7F800000;
+	@%p98 bra 	BB0_99;
+	bra.uni 	BB0_97;
+
+BB0_99:
+	add.f32 	%f1246, %f268, 0f3EE66666;
+	bra.uni 	BB0_100;
+
+BB0_97:
+	setp.neu.f32	%p99, %f272, 0f7F800000;
+	@%p99 bra 	BB0_100;
+
+	selp.f32	%f1246, 0fFF800000, 0f7F800000, %p4;
+
+BB0_100:
+	setp.eq.f32	%p100, %f268, 0f3F800000;
+	selp.f32	%f284, 0f3F800000, %f1246, %p100;
+	abs.f32 	%f285, %f269;
+	setp.lt.f32	%p101, %f285, 0f00800000;
+	mul.f32 	%f829, %f285, 0f4B800000;
+	selp.f32	%f830, 0fC3170000, 0fC2FE0000, %p101;
+	selp.f32	%f831, %f829, %f285, %p101;
+	mov.b32 	 %r277, %f831;
+	and.b32  	%r278, %r277, 8388607;
+	or.b32  	%r279, %r278, 1065353216;
+	mov.b32 	 %f832, %r279;
+	shr.u32 	%r280, %r277, 23;
+	cvt.rn.f32.u32	%f833, %r280;
+	add.f32 	%f834, %f830, %f833;
+	setp.gt.f32	%p102, %f832, 0f3FB504F3;
+	mul.f32 	%f835, %f832, 0f3F000000;
+	add.f32 	%f836, %f834, 0f3F800000;
+	selp.f32	%f837, %f835, %f832, %p102;
+	selp.f32	%f838, %f836, %f834, %p102;
+	add.f32 	%f839, %f837, 0fBF800000;
+	add.f32 	%f828, %f837, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f827,%f828;
+	// inline asm
+	add.f32 	%f840, %f839, %f839;
+	mul.f32 	%f841, %f827, %f840;
+	mul.f32 	%f842, %f841, %f841;
+	fma.rn.f32 	%f845, %f766, %f842, %f765;
+	fma.rn.f32 	%f847, %f845, %f842, %f768;
+	mul.rn.f32 	%f848, %f847, %f842;
+	mul.rn.f32 	%f849, %f848, %f841;
+	sub.f32 	%f850, %f839, %f841;
+	neg.f32 	%f851, %f841;
+	add.f32 	%f852, %f850, %f850;
+	fma.rn.f32 	%f853, %f851, %f839, %f852;
+	mul.rn.f32 	%f854, %f827, %f853;
+	add.f32 	%f855, %f849, %f841;
+	sub.f32 	%f856, %f841, %f855;
+	add.f32 	%f857, %f849, %f856;
+	add.f32 	%f858, %f854, %f857;
+	add.f32 	%f859, %f855, %f858;
+	sub.f32 	%f860, %f855, %f859;
+	add.f32 	%f861, %f858, %f860;
+	mul.rn.f32 	%f863, %f838, %f784;
+	mul.rn.f32 	%f865, %f838, %f786;
+	add.f32 	%f866, %f863, %f859;
+	sub.f32 	%f867, %f863, %f866;
+	add.f32 	%f868, %f859, %f867;
+	add.f32 	%f869, %f861, %f868;
+	add.f32 	%f870, %f865, %f869;
+	add.f32 	%f871, %f866, %f870;
+	sub.f32 	%f872, %f866, %f871;
+	add.f32 	%f873, %f870, %f872;
+	mul.rn.f32 	%f875, %f796, %f871;
+	neg.f32 	%f876, %f875;
+	fma.rn.f32 	%f877, %f796, %f871, %f876;
+	fma.rn.f32 	%f878, %f796, %f873, %f877;
+	fma.rn.f32 	%f880, %f801, %f871, %f878;
+	add.rn.f32 	%f881, %f875, %f880;
+	neg.f32 	%f882, %f881;
+	add.rn.f32 	%f883, %f875, %f882;
+	add.rn.f32 	%f884, %f883, %f880;
+	mov.b32 	 %r281, %f881;
+	setp.eq.s32	%p103, %r281, 1118925336;
+	add.s32 	%r282, %r281, -1;
+	mov.b32 	 %f885, %r282;
+	add.f32 	%f886, %f884, 0f37000000;
+	selp.f32	%f887, %f885, %f881, %p103;
+	selp.f32	%f286, %f886, %f884, %p103;
+	mul.f32 	%f888, %f887, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f889, %f888;
+	fma.rn.f32 	%f891, %f889, %f812, %f887;
+	fma.rn.f32 	%f893, %f889, %f814, %f891;
+	mul.f32 	%f894, %f893, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f895, %f894;
+	add.f32 	%f896, %f889, 0f00000000;
+	ex2.approx.f32 	%f897, %f896;
+	mul.f32 	%f898, %f895, %f897;
+	setp.lt.f32	%p104, %f887, 0fC2D20000;
+	selp.f32	%f899, 0f00000000, %f898, %p104;
+	setp.gt.f32	%p105, %f887, 0f42D20000;
+	selp.f32	%f1247, 0f7F800000, %f899, %p105;
+	setp.eq.f32	%p106, %f1247, 0f7F800000;
+	@%p106 bra 	BB0_102;
+
+	fma.rn.f32 	%f1247, %f1247, %f286, %f1247;
+
+BB0_102:
+	setp.lt.f32	%p107, %f269, 0f00000000;
+	and.pred  	%p5, %p107, %p92;
+	mov.b32 	 %r283, %f1247;
+	xor.b32  	%r284, %r283, -2147483648;
+	mov.b32 	 %f900, %r284;
+	selp.f32	%f1249, %f900, %f1247, %p5;
+	setp.eq.f32	%p109, %f269, 0f00000000;
+	@%p109 bra 	BB0_105;
+	bra.uni 	BB0_103;
+
+BB0_105:
+	add.f32 	%f903, %f269, %f269;
+	selp.f32	%f1249, %f903, 0f00000000, %p92;
+	bra.uni 	BB0_106;
+
+BB0_103:
+	setp.geu.f32	%p110, %f269, 0f00000000;
+	@%p110 bra 	BB0_106;
+
+	cvt.rzi.f32.f32	%f902, %f796;
+	setp.neu.f32	%p111, %f902, 0f3EE66666;
+	selp.f32	%f1249, 0f7FFFFFFF, %f1249, %p111;
+
+BB0_106:
+	add.f32 	%f904, %f285, 0f3EE66666;
+	mov.b32 	 %r285, %f904;
+	setp.lt.s32	%p113, %r285, 2139095040;
+	@%p113 bra 	BB0_111;
+
+	setp.gtu.f32	%p114, %f285, 0f7F800000;
+	@%p114 bra 	BB0_110;
+	bra.uni 	BB0_108;
+
+BB0_110:
+	add.f32 	%f1249, %f269, 0f3EE66666;
+	bra.uni 	BB0_111;
+
+BB0_108:
+	setp.neu.f32	%p115, %f285, 0f7F800000;
+	@%p115 bra 	BB0_111;
+
+	selp.f32	%f1249, 0fFF800000, 0f7F800000, %p5;
+
+BB0_111:
+	setp.eq.f32	%p116, %f269, 0f3F800000;
+	selp.f32	%f297, 0f3F800000, %f1249, %p116;
+	abs.f32 	%f298, %f270;
+	setp.lt.f32	%p117, %f298, 0f00800000;
+	mul.f32 	%f907, %f298, 0f4B800000;
+	selp.f32	%f908, 0fC3170000, 0fC2FE0000, %p117;
+	selp.f32	%f909, %f907, %f298, %p117;
+	mov.b32 	 %r286, %f909;
+	and.b32  	%r287, %r286, 8388607;
+	or.b32  	%r288, %r287, 1065353216;
+	mov.b32 	 %f910, %r288;
+	shr.u32 	%r289, %r286, 23;
+	cvt.rn.f32.u32	%f911, %r289;
+	add.f32 	%f912, %f908, %f911;
+	setp.gt.f32	%p118, %f910, 0f3FB504F3;
+	mul.f32 	%f913, %f910, 0f3F000000;
+	add.f32 	%f914, %f912, 0f3F800000;
+	selp.f32	%f915, %f913, %f910, %p118;
+	selp.f32	%f916, %f914, %f912, %p118;
+	add.f32 	%f917, %f915, 0fBF800000;
+	add.f32 	%f906, %f915, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f905,%f906;
+	// inline asm
+	add.f32 	%f918, %f917, %f917;
+	mul.f32 	%f919, %f905, %f918;
+	mul.f32 	%f920, %f919, %f919;
+	fma.rn.f32 	%f923, %f766, %f920, %f765;
+	fma.rn.f32 	%f925, %f923, %f920, %f768;
+	mul.rn.f32 	%f926, %f925, %f920;
+	mul.rn.f32 	%f927, %f926, %f919;
+	sub.f32 	%f928, %f917, %f919;
+	neg.f32 	%f929, %f919;
+	add.f32 	%f930, %f928, %f928;
+	fma.rn.f32 	%f931, %f929, %f917, %f930;
+	mul.rn.f32 	%f932, %f905, %f931;
+	add.f32 	%f933, %f927, %f919;
+	sub.f32 	%f934, %f919, %f933;
+	add.f32 	%f935, %f927, %f934;
+	add.f32 	%f936, %f932, %f935;
+	add.f32 	%f937, %f933, %f936;
+	sub.f32 	%f938, %f933, %f937;
+	add.f32 	%f939, %f936, %f938;
+	mul.rn.f32 	%f941, %f916, %f784;
+	mul.rn.f32 	%f943, %f916, %f786;
+	add.f32 	%f944, %f941, %f937;
+	sub.f32 	%f945, %f941, %f944;
+	add.f32 	%f946, %f937, %f945;
+	add.f32 	%f947, %f939, %f946;
+	add.f32 	%f948, %f943, %f947;
+	add.f32 	%f949, %f944, %f948;
+	sub.f32 	%f950, %f944, %f949;
+	add.f32 	%f951, %f948, %f950;
+	mul.rn.f32 	%f953, %f796, %f949;
+	neg.f32 	%f954, %f953;
+	fma.rn.f32 	%f955, %f796, %f949, %f954;
+	fma.rn.f32 	%f956, %f796, %f951, %f955;
+	fma.rn.f32 	%f958, %f801, %f949, %f956;
+	add.rn.f32 	%f959, %f953, %f958;
+	neg.f32 	%f960, %f959;
+	add.rn.f32 	%f961, %f953, %f960;
+	add.rn.f32 	%f962, %f961, %f958;
+	mov.b32 	 %r290, %f959;
+	setp.eq.s32	%p119, %r290, 1118925336;
+	add.s32 	%r291, %r290, -1;
+	mov.b32 	 %f963, %r291;
+	add.f32 	%f964, %f962, 0f37000000;
+	selp.f32	%f965, %f963, %f959, %p119;
+	selp.f32	%f299, %f964, %f962, %p119;
+	mul.f32 	%f966, %f965, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f967, %f966;
+	fma.rn.f32 	%f969, %f967, %f812, %f965;
+	fma.rn.f32 	%f971, %f967, %f814, %f969;
+	mul.f32 	%f972, %f971, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f973, %f972;
+	add.f32 	%f974, %f967, 0f00000000;
+	ex2.approx.f32 	%f975, %f974;
+	mul.f32 	%f976, %f973, %f975;
+	setp.lt.f32	%p120, %f965, 0fC2D20000;
+	selp.f32	%f977, 0f00000000, %f976, %p120;
+	setp.gt.f32	%p121, %f965, 0f42D20000;
+	selp.f32	%f1250, 0f7F800000, %f977, %p121;
+	setp.eq.f32	%p122, %f1250, 0f7F800000;
+	@%p122 bra 	BB0_113;
+
+	fma.rn.f32 	%f1250, %f1250, %f299, %f1250;
+
+BB0_113:
+	setp.lt.f32	%p123, %f270, 0f00000000;
+	and.pred  	%p6, %p123, %p92;
+	mov.b32 	 %r292, %f1250;
+	xor.b32  	%r293, %r292, -2147483648;
+	mov.b32 	 %f978, %r293;
+	selp.f32	%f1252, %f978, %f1250, %p6;
+	setp.eq.f32	%p125, %f270, 0f00000000;
+	@%p125 bra 	BB0_116;
+	bra.uni 	BB0_114;
+
+BB0_116:
+	add.f32 	%f981, %f270, %f270;
+	selp.f32	%f1252, %f981, 0f00000000, %p92;
+	bra.uni 	BB0_117;
+
+BB0_114:
+	setp.geu.f32	%p126, %f270, 0f00000000;
+	@%p126 bra 	BB0_117;
+
+	cvt.rzi.f32.f32	%f980, %f796;
+	setp.neu.f32	%p127, %f980, 0f3EE66666;
+	selp.f32	%f1252, 0f7FFFFFFF, %f1252, %p127;
+
+BB0_117:
+	add.f32 	%f982, %f298, 0f3EE66666;
+	mov.b32 	 %r294, %f982;
+	setp.lt.s32	%p129, %r294, 2139095040;
+	@%p129 bra 	BB0_122;
+
+	setp.gtu.f32	%p130, %f298, 0f7F800000;
+	@%p130 bra 	BB0_121;
+	bra.uni 	BB0_119;
+
+BB0_121:
+	add.f32 	%f1252, %f270, 0f3EE66666;
+	bra.uni 	BB0_122;
+
+BB0_119:
+	setp.neu.f32	%p131, %f298, 0f7F800000;
+	@%p131 bra 	BB0_122;
+
+	selp.f32	%f1252, 0fFF800000, 0f7F800000, %p6;
+
+BB0_122:
+	setp.eq.f32	%p132, %f270, 0f3F800000;
+	selp.f32	%f983, 0f3F800000, %f1252, %p132;
+	cvt.u64.u32	%rd90, %r5;
+	cvt.u64.u32	%rd89, %r4;
+	mov.u64 	%rd93, image;
+	cvta.global.u64 	%rd88, %rd93;
+	// inline asm
+	call (%rd87), _rt_buffer_get_64, (%rd88, %r98, %r99, %rd89, %rd90, %rd26, %rd26);
+	// inline asm
+	cvt.sat.f32.f32	%f984, %f983;
+	mul.f32 	%f985, %f984, 0f437FFD71;
+	cvt.rzi.u32.f32	%r297, %f985;
+	cvt.sat.f32.f32	%f986, %f297;
+	mul.f32 	%f987, %f986, 0f437FFD71;
+	cvt.rzi.u32.f32	%r298, %f987;
+	cvt.sat.f32.f32	%f988, %f284;
+	mul.f32 	%f989, %f988, 0f437FFD71;
+	cvt.rzi.u32.f32	%r299, %f989;
+	cvt.u16.u32	%rs16, %r297;
+	cvt.u16.u32	%rs17, %r299;
+	cvt.u16.u32	%rs18, %r298;
+	mov.u16 	%rs19, 255;
+	st.v4.u8 	[%rd87], {%rs16, %rs18, %rs17, %rs19};
+	ld.global.u32 	%r409, [imageEnabled];
+
+BB0_123:
+	cvt.u64.u32	%rd17, %r4;
+	cvt.u64.u32	%rd18, %r5;
+	and.b32  	%r300, %r409, 4;
+	setp.eq.s32	%p133, %r300, 0;
+	@%p133 bra 	BB0_127;
+
+	ld.global.u32 	%r301, [additive];
+	setp.eq.s32	%p134, %r301, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs20, %f537;}
+
+	// inline asm
+	@%p134 bra 	BB0_126;
+
+	mov.u64 	%rd106, image_HDR;
+	cvta.global.u64 	%rd95, %rd106;
+	mov.u32 	%r305, 8;
+	// inline asm
+	call (%rd94), _rt_buffer_get_64, (%rd95, %r98, %r305, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	ld.v4.u16 	{%rs27, %rs28, %rs29, %rs30}, [%rd94];
+	// inline asm
+	{  cvt.f32.f16 %f991, %rs27;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f992, %rs28;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f993, %rs29;}
+
+	// inline asm
+	// inline asm
+	call (%rd100), _rt_buffer_get_64, (%rd95, %r98, %r305, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	add.f32 	%f994, %f268, %f991;
+	add.f32 	%f995, %f269, %f992;
+	add.f32 	%f996, %f270, %f993;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs26, %f996;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs25, %f995;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs24, %f994;}
+
+	// inline asm
+	st.v4.u16 	[%rd100], {%rs24, %rs25, %rs26, %rs20};
+	bra.uni 	BB0_127;
+
+BB0_126:
+	mov.u64 	%rd113, image_HDR;
+	cvta.global.u64 	%rd108, %rd113;
+	mov.u32 	%r307, 8;
+	// inline asm
+	call (%rd107), _rt_buffer_get_64, (%rd108, %r98, %r307, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs33, %f270;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs32, %f269;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs31, %f268;}
+
+	// inline asm
+	st.v4.u16 	[%rd107], {%rs31, %rs32, %rs33, %rs20};
+
+BB0_127:
+	selp.f32	%f1001, 0f3F800000, 0f3E800000, %p147;
+	mul.f32 	%f1002, %f1001, %f1234;
+	mul.f32 	%f1003, %f1001, %f1235;
+	mul.f32 	%f1004, %f1001, %f1236;
+	mul.f32 	%f1005, %f1001, %f1231;
+	mul.f32 	%f1006, %f1001, %f1232;
+	mul.f32 	%f1007, %f1001, %f1233;
+	mul.f32 	%f1008, %f1001, %f1228;
+	mul.f32 	%f1009, %f1001, %f1229;
+	mul.f32 	%f1010, %f1001, %f1230;
+	mul.f32 	%f1011, %f1001, %f1225;
+	mul.f32 	%f1012, %f1001, %f1226;
+	mul.f32 	%f1013, %f1001, %f1227;
+	ld.global.f32 	%f1014, [lightColor];
+	mul.f32 	%f310, %f1002, %f1014;
+	ld.global.f32 	%f1015, [lightColor+4];
+	mul.f32 	%f311, %f1003, %f1015;
+	ld.global.f32 	%f1016, [lightColor+8];
+	mul.f32 	%f312, %f1004, %f1016;
+	mul.f32 	%f313, %f1005, %f1014;
+	mul.f32 	%f314, %f1006, %f1015;
+	mul.f32 	%f315, %f1007, %f1016;
+	mul.f32 	%f316, %f1008, %f1014;
+	mul.f32 	%f317, %f1009, %f1015;
+	mul.f32 	%f318, %f1010, %f1016;
+	mul.f32 	%f319, %f1011, %f1014;
+	mul.f32 	%f320, %f1012, %f1015;
+	mul.f32 	%f321, %f1013, %f1016;
+	ld.global.u32 	%r308, [additive];
+	setp.eq.s32	%p135, %r308, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs34, %f537;}
+
+	// inline asm
+	@%p135 bra 	BB0_129;
+
+	mov.u64 	%rd126, image_RNM0;
+	cvta.global.u64 	%rd115, %rd126;
+	mov.u32 	%r312, 8;
+	// inline asm
+	call (%rd114), _rt_buffer_get_64, (%rd115, %r98, %r312, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	ld.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd114];
+	// inline asm
+	{  cvt.f32.f16 %f1017, %rs41;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1018, %rs42;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1019, %rs43;}
+
+	// inline asm
+	// inline asm
+	call (%rd120), _rt_buffer_get_64, (%rd115, %r98, %r312, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	add.f32 	%f1020, %f310, %f1017;
+	add.f32 	%f1021, %f311, %f1018;
+	add.f32 	%f1022, %f312, %f1019;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs40, %f1022;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs39, %f1021;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs38, %f1020;}
+
+	// inline asm
+	st.v4.u16 	[%rd120], {%rs38, %rs39, %rs40, %rs34};
+	bra.uni 	BB0_130;
+
+BB0_129:
+	mov.u64 	%rd133, image_RNM0;
+	cvta.global.u64 	%rd128, %rd133;
+	mov.u32 	%r314, 8;
+	// inline asm
+	call (%rd127), _rt_buffer_get_64, (%rd128, %r98, %r314, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs47, %f312;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs46, %f311;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs45, %f310;}
+
+	// inline asm
+	st.v4.u16 	[%rd127], {%rs45, %rs46, %rs47, %rs34};
+
+BB0_130:
+	mov.f32 	%f1027, 0f34000000;
+	max.f32 	%f1028, %f310, %f1027;
+	div.rn.f32 	%f1029, %f313, %f1028;
+	max.f32 	%f1030, %f311, %f1027;
+	div.rn.f32 	%f1031, %f314, %f1030;
+	max.f32 	%f1032, %f312, %f1027;
+	div.rn.f32 	%f1033, %f315, %f1032;
+	fma.rn.f32 	%f322, %f1029, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f323, %f1031, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f324, %f1033, 0f3F000000, 0f3F000000;
+	div.rn.f32 	%f1034, %f316, %f1028;
+	div.rn.f32 	%f1035, %f317, %f1030;
+	div.rn.f32 	%f1036, %f318, %f1032;
+	fma.rn.f32 	%f325, %f1034, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f326, %f1035, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f327, %f1036, 0f3F000000, 0f3F000000;
+	div.rn.f32 	%f1037, %f319, %f1028;
+	div.rn.f32 	%f1038, %f320, %f1030;
+	div.rn.f32 	%f1039, %f321, %f1032;
+	fma.rn.f32 	%f328, %f1037, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f329, %f1038, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f330, %f1039, 0f3F000000, 0f3F000000;
+	ld.global.u32 	%r315, [additive];
+	setp.eq.s32	%p136, %r315, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs48, %f537;}
+
+	// inline asm
+	@%p136 bra 	BB0_132;
+
+	mov.u64 	%rd146, image_RNM1;
+	cvta.global.u64 	%rd135, %rd146;
+	mov.u32 	%r319, 8;
+	// inline asm
+	call (%rd134), _rt_buffer_get_64, (%rd135, %r98, %r319, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	ld.v4.u16 	{%rs55, %rs56, %rs57, %rs58}, [%rd134];
+	// inline asm
+	{  cvt.f32.f16 %f1040, %rs55;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1041, %rs56;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1042, %rs57;}
+
+	// inline asm
+	// inline asm
+	call (%rd140), _rt_buffer_get_64, (%rd135, %r98, %r319, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	add.f32 	%f1043, %f322, %f1040;
+	add.f32 	%f1044, %f323, %f1041;
+	add.f32 	%f1045, %f324, %f1042;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs54, %f1045;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs53, %f1044;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs52, %f1043;}
+
+	// inline asm
+	st.v4.u16 	[%rd140], {%rs52, %rs53, %rs54, %rs48};
+	bra.uni 	BB0_133;
+
+BB0_132:
+	mov.u64 	%rd153, image_RNM1;
+	cvta.global.u64 	%rd148, %rd153;
+	mov.u32 	%r321, 8;
+	// inline asm
+	call (%rd147), _rt_buffer_get_64, (%rd148, %r98, %r321, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs61, %f324;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs60, %f323;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs59, %f322;}
+
+	// inline asm
+	st.v4.u16 	[%rd147], {%rs59, %rs60, %rs61, %rs48};
+
+BB0_133:
+	ld.global.u32 	%r322, [additive];
+	setp.eq.s32	%p137, %r322, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs62, %f537;}
+
+	// inline asm
+	@%p137 bra 	BB0_135;
+
+	mov.u64 	%rd166, image_RNM2;
+	cvta.global.u64 	%rd155, %rd166;
+	mov.u32 	%r326, 8;
+	// inline asm
+	call (%rd154), _rt_buffer_get_64, (%rd155, %r98, %r326, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	ld.v4.u16 	{%rs69, %rs70, %rs71, %rs72}, [%rd154];
+	// inline asm
+	{  cvt.f32.f16 %f1050, %rs69;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1051, %rs70;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1052, %rs71;}
+
+	// inline asm
+	// inline asm
+	call (%rd160), _rt_buffer_get_64, (%rd155, %r98, %r326, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	add.f32 	%f1053, %f325, %f1050;
+	add.f32 	%f1054, %f326, %f1051;
+	add.f32 	%f1055, %f327, %f1052;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs68, %f1055;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs67, %f1054;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs66, %f1053;}
+
+	// inline asm
+	st.v4.u16 	[%rd160], {%rs66, %rs67, %rs68, %rs62};
+	bra.uni 	BB0_136;
+
+BB0_135:
+	mov.u64 	%rd173, image_RNM2;
+	cvta.global.u64 	%rd168, %rd173;
+	mov.u32 	%r328, 8;
+	// inline asm
+	call (%rd167), _rt_buffer_get_64, (%rd168, %r98, %r328, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs75, %f327;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs74, %f326;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs73, %f325;}
+
+	// inline asm
+	st.v4.u16 	[%rd167], {%rs73, %rs74, %rs75, %rs62};
+
+BB0_136:
+	ld.global.u32 	%r329, [additive];
+	setp.eq.s32	%p138, %r329, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs76, %f537;}
+
+	// inline asm
+	@%p138 bra 	BB0_138;
+
+	mov.u64 	%rd186, image_RNM3;
+	cvta.global.u64 	%rd175, %rd186;
+	mov.u32 	%r333, 8;
+	// inline asm
+	call (%rd174), _rt_buffer_get_64, (%rd175, %r98, %r333, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	ld.v4.u16 	{%rs83, %rs84, %rs85, %rs86}, [%rd174];
+	// inline asm
+	{  cvt.f32.f16 %f1060, %rs83;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1061, %rs84;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1062, %rs85;}
+
+	// inline asm
+	// inline asm
+	call (%rd180), _rt_buffer_get_64, (%rd175, %r98, %r333, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	add.f32 	%f1063, %f328, %f1060;
+	add.f32 	%f1064, %f329, %f1061;
+	add.f32 	%f1065, %f330, %f1062;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs82, %f1065;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs81, %f1064;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs80, %f1063;}
+
+	// inline asm
+	st.v4.u16 	[%rd180], {%rs80, %rs81, %rs82, %rs76};
+	bra.uni 	BB0_159;
+
+BB0_138:
+	mov.u64 	%rd193, image_RNM3;
+	cvta.global.u64 	%rd188, %rd193;
+	mov.u32 	%r335, 8;
+	// inline asm
+	call (%rd187), _rt_buffer_get_64, (%rd188, %r98, %r335, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs89, %f330;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs88, %f329;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs87, %f328;}
+
+	// inline asm
+	st.v4.u16 	[%rd187], {%rs87, %rs88, %rs89, %rs76};
+
+BB0_159:
+	ret;
+}
+
+