move to self host

1 files changed, 2138 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSunCloudShadowSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSunCloudShadowSH.ptx
new file mode 100644
index 00000000..1e5f2f12
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSunCloudShadowSH.ptx
@@ -0,0 +1,2138 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 image_RNM3[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 1 .b8 rnd_seeds[1];
+.global .align 4 .b8 directDir[12];
+.global .align 4 .b8 directColor[12];
+.global .align 4 .f32 shadowSpread;
+.global .align 4 .u32 samples;
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .u32 lightCookie;
+.global .align 16 .b8 lightTilingOffset[16];
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo9directDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11directColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12shadowSpreadE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightCookieE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo17lightTilingOffsetE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename9directDirE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11directColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename12shadowSpreadE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename11lightCookieE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename17lightTilingOffsetE[7] = {102, 108, 111, 97, 116, 52, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum9directDirE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11directColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12shadowSpreadE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightCookieE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum17lightTilingOffsetE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic9directDirE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11directColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12shadowSpreadE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightCookieE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic17lightTilingOffsetE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation9directDirE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11directColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12shadowSpreadE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightCookieE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation17lightTilingOffsetE[1];
+.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[32];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<124>;
+	.reg .b16 	%rs<152>;
+	.reg .f32 	%f<820>;
+	.reg .b32 	%r<390>;
+	.reg .b64 	%rd<286>;
+
+
+	mov.u64 	%rd285, __local_depot0;
+	cvta.local.u64 	%SP, %rd285;
+	ld.global.v2.u32 	{%r101, %r102}, [pixelID];
+	cvt.u64.u32	%rd22, %r101;
+	cvt.u64.u32	%rd23, %r102;
+	mov.u64 	%rd26, uvnormal;
+	cvta.global.u64 	%rd21, %rd26;
+	mov.u32 	%r99, 2;
+	mov.u32 	%r100, 4;
+	mov.u64 	%rd25, 0;
+	// inline asm
+	call (%rd20), _rt_buffer_get_64, (%rd21, %r99, %r100, %rd22, %rd23, %rd25, %rd25);
+	// inline asm
+	ld.u32 	%r1, [%rd20];
+	shr.u32 	%r105, %r1, 16;
+	cvt.u16.u32	%rs1, %r105;
+	and.b16  	%rs7, %rs1, 255;
+	cvt.u16.u32	%rs8, %r1;
+	or.b16  	%rs9, %rs8, %rs7;
+	setp.eq.s16	%p5, %rs9, 0;
+	mov.f32 	%f788, 0f00000000;
+	mov.f32 	%f789, %f788;
+	mov.f32 	%f790, %f788;
+	@%p5 bra 	BB0_2;
+
+	ld.u8 	%rs10, [%rd20+1];
+	and.b16  	%rs12, %rs8, 255;
+	cvt.rn.f32.u16	%f138, %rs12;
+	div.rn.f32 	%f139, %f138, 0f437F0000;
+	fma.rn.f32 	%f140, %f139, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f141, %rs10;
+	div.rn.f32 	%f142, %f141, 0f437F0000;
+	fma.rn.f32 	%f143, %f142, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f144, %rs7;
+	div.rn.f32 	%f145, %f144, 0f437F0000;
+	fma.rn.f32 	%f146, %f145, 0f40000000, 0fBF800000;
+	mul.f32 	%f147, %f143, %f143;
+	fma.rn.f32 	%f148, %f140, %f140, %f147;
+	fma.rn.f32 	%f149, %f146, %f146, %f148;
+	sqrt.rn.f32 	%f150, %f149;
+	rcp.rn.f32 	%f151, %f150;
+	mul.f32 	%f788, %f140, %f151;
+	mul.f32 	%f789, %f143, %f151;
+	mul.f32 	%f790, %f146, %f151;
+
+BB0_2:
+	ld.global.v2.u32 	{%r106, %r107}, [pixelID];
+	ld.global.v2.u32 	{%r109, %r110}, [tileInfo];
+	add.s32 	%r2, %r106, %r109;
+	add.s32 	%r3, %r107, %r110;
+	setp.eq.f32	%p6, %f789, 0f00000000;
+	setp.eq.f32	%p7, %f788, 0f00000000;
+	and.pred  	%p8, %p7, %p6;
+	setp.eq.f32	%p9, %f790, 0f00000000;
+	and.pred  	%p10, %p8, %p9;
+	@%p10 bra 	BB0_121;
+	bra.uni 	BB0_3;
+
+BB0_121:
+	ld.global.u32 	%r389, [imageEnabled];
+	and.b32  	%r314, %r389, 1;
+	setp.eq.b32	%p116, %r314, 1;
+	@!%p116 bra 	BB0_123;
+	bra.uni 	BB0_122;
+
+BB0_122:
+	cvt.u64.u32	%rd169, %r2;
+	cvt.u64.u32	%rd170, %r3;
+	mov.u64 	%rd173, image;
+	cvta.global.u64 	%rd168, %rd173;
+	// inline asm
+	call (%rd167), _rt_buffer_get_64, (%rd168, %r99, %r100, %rd169, %rd170, %rd25, %rd25);
+	// inline asm
+	mov.u16 	%rs84, 0;
+	st.v4.u8 	[%rd167], {%rs84, %rs84, %rs84, %rs84};
+	ld.global.u32 	%r389, [imageEnabled];
+
+BB0_123:
+	and.b32  	%r317, %r389, 8;
+	setp.eq.s32	%p117, %r317, 0;
+	@%p117 bra 	BB0_125;
+
+	cvt.u64.u32	%rd177, %r3;
+	cvt.u64.u32	%rd176, %r2;
+	mov.u64 	%rd180, image_Mask;
+	cvta.global.u64 	%rd175, %rd180;
+	// inline asm
+	call (%rd174), _rt_buffer_get_64, (%rd175, %r99, %r99, %rd176, %rd177, %rd25, %rd25);
+	// inline asm
+	mov.f32 	%f709, 0f00000000;
+	cvt.rzi.u32.f32	%r320, %f709;
+	cvt.u16.u32	%rs85, %r320;
+	mov.u16 	%rs86, 0;
+	st.v2.u8 	[%rd174], {%rs85, %rs86};
+	ld.global.u32 	%r389, [imageEnabled];
+
+BB0_125:
+	cvt.u64.u32	%rd18, %r2;
+	cvt.u64.u32	%rd19, %r3;
+	and.b32  	%r321, %r389, 4;
+	setp.eq.s32	%p118, %r321, 0;
+	@%p118 bra 	BB0_129;
+
+	ld.global.u32 	%r322, [additive];
+	setp.eq.s32	%p119, %r322, 0;
+	@%p119 bra 	BB0_128;
+
+	mov.u64 	%rd193, image_HDR;
+	cvta.global.u64 	%rd182, %rd193;
+	mov.u32 	%r326, 8;
+	// inline asm
+	call (%rd181), _rt_buffer_get_64, (%rd182, %r99, %r326, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs93, %rs94, %rs95, %rs96}, [%rd181];
+	// inline asm
+	{  cvt.f32.f16 %f710, %rs93;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f711, %rs94;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f712, %rs95;}
+
+	// inline asm
+	// inline asm
+	call (%rd187), _rt_buffer_get_64, (%rd182, %r99, %r326, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f713, %f710, 0f00000000;
+	add.f32 	%f714, %f711, 0f00000000;
+	add.f32 	%f715, %f712, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs92, %f715;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs91, %f714;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs90, %f713;}
+
+	// inline asm
+	mov.u16 	%rs97, 0;
+	st.v4.u16 	[%rd187], {%rs90, %rs91, %rs92, %rs97};
+	bra.uni 	BB0_129;
+
+BB0_3:
+	ld.global.f32 	%f9, [directDir+8];
+	ld.global.f32 	%f8, [directDir+4];
+	ld.global.f32 	%f7, [directDir];
+	mul.f32 	%f153, %f788, %f7;
+	mul.f32 	%f154, %f789, %f8;
+	neg.f32 	%f155, %f154;
+	sub.f32 	%f156, %f155, %f153;
+	mul.f32 	%f157, %f790, %f9;
+	sub.f32 	%f10, %f156, %f157;
+	ld.global.v2.u32 	{%r118, %r119}, [pixelID];
+	cvt.u64.u32	%rd29, %r118;
+	cvt.u64.u32	%rd30, %r119;
+	mov.u64 	%rd39, uvpos;
+	cvta.global.u64 	%rd28, %rd39;
+	mov.u32 	%r115, 12;
+	// inline asm
+	call (%rd27), _rt_buffer_get_64, (%rd28, %r99, %r115, %rd29, %rd30, %rd25, %rd25);
+	// inline asm
+	ld.f32 	%f13, [%rd27+8];
+	ld.f32 	%f12, [%rd27+4];
+	ld.f32 	%f11, [%rd27];
+	mul.f32 	%f158, %f11, 0f3456BF95;
+	mul.f32 	%f159, %f12, 0f3456BF95;
+	mul.f32 	%f160, %f13, 0f3456BF95;
+	abs.f32 	%f161, %f788;
+	div.rn.f32 	%f162, %f158, %f161;
+	abs.f32 	%f163, %f789;
+	div.rn.f32 	%f164, %f159, %f163;
+	abs.f32 	%f165, %f790;
+	div.rn.f32 	%f166, %f160, %f165;
+	abs.f32 	%f167, %f162;
+	abs.f32 	%f168, %f164;
+	abs.f32 	%f169, %f166;
+	mov.f32 	%f170, 0f38D1B717;
+	max.f32 	%f171, %f167, %f170;
+	max.f32 	%f172, %f168, %f170;
+	max.f32 	%f173, %f169, %f170;
+	fma.rn.f32 	%f14, %f788, %f171, %f11;
+	fma.rn.f32 	%f15, %f789, %f172, %f12;
+	fma.rn.f32 	%f16, %f790, %f173, %f13;
+	abs.f32 	%f174, %f7;
+	abs.f32 	%f175, %f9;
+	setp.gt.f32	%p11, %f174, %f175;
+	neg.f32 	%f176, %f8;
+	neg.f32 	%f177, %f9;
+	selp.f32	%f178, %f176, 0f00000000, %p11;
+	selp.f32	%f179, %f7, %f177, %p11;
+	selp.f32	%f180, 0f00000000, %f8, %p11;
+	mul.f32 	%f181, %f179, %f179;
+	fma.rn.f32 	%f182, %f178, %f178, %f181;
+	fma.rn.f32 	%f183, %f180, %f180, %f182;
+	sqrt.rn.f32 	%f184, %f183;
+	rcp.rn.f32 	%f185, %f184;
+	mul.f32 	%f17, %f178, %f185;
+	mul.f32 	%f18, %f179, %f185;
+	mul.f32 	%f19, %f180, %f185;
+	mul.f32 	%f186, %f9, %f18;
+	mul.f32 	%f187, %f8, %f19;
+	sub.f32 	%f20, %f186, %f187;
+	mul.f32 	%f188, %f7, %f19;
+	mul.f32 	%f189, %f9, %f17;
+	sub.f32 	%f21, %f188, %f189;
+	mul.f32 	%f190, %f8, %f17;
+	mul.f32 	%f191, %f7, %f18;
+	sub.f32 	%f22, %f190, %f191;
+	ld.global.v2.u32 	{%r122, %r123}, [pixelID];
+	cvt.u64.u32	%rd35, %r122;
+	cvt.u64.u32	%rd36, %r123;
+	mov.u64 	%rd40, rnd_seeds;
+	cvta.global.u64 	%rd34, %rd40;
+	// inline asm
+	call (%rd33), _rt_buffer_get_64, (%rd34, %r99, %r100, %rd35, %rd36, %rd25, %rd25);
+	// inline asm
+	ld.global.u32 	%r358, [samples];
+	mov.f32 	%f805, 0f00000000;
+	setp.lt.s32	%p12, %r358, 1;
+	@%p12 bra 	BB0_55;
+
+	cvt.rn.f32.s32	%f193, %r358;
+	rcp.rn.f32 	%f23, %f193;
+	ld.u32 	%r384, [%rd33];
+	mul.f32 	%f24, %f14, 0f3456BF95;
+	mul.f32 	%f25, %f15, 0f3456BF95;
+	mul.f32 	%f26, %f16, 0f3456BF95;
+	mov.f32 	%f805, 0f00000000;
+	mov.u32 	%r359, 0;
+	abs.f32 	%f194, %f25;
+	abs.f32 	%f195, %f24;
+	max.f32 	%f196, %f195, %f194;
+	abs.f32 	%f197, %f26;
+	max.f32 	%f198, %f196, %f197;
+
+BB0_5:
+	setp.lt.s32	%p13, %r358, 1;
+	@%p13 bra 	BB0_54;
+
+	cvt.rn.f32.s32	%f28, %r359;
+	max.f32 	%f29, %f198, %f170;
+	mov.u32 	%r361, 0;
+
+BB0_7:
+	mad.lo.s32 	%r128, %r384, 1664525, 1013904223;
+	and.b32  	%r129, %r128, 16777215;
+	cvt.rn.f32.u32	%f200, %r129;
+	fma.rn.f32 	%f201, %f200, 0f33800000, %f28;
+	mul.f32 	%f202, %f23, %f201;
+	mad.lo.s32 	%r384, %r128, 1664525, 1013904223;
+	and.b32  	%r130, %r384, 16777215;
+	cvt.rn.f32.u32	%f203, %r130;
+	cvt.rn.f32.s32	%f204, %r361;
+	fma.rn.f32 	%f205, %f203, 0f33800000, %f204;
+	mul.f32 	%f206, %f23, %f205;
+	sqrt.rn.f32 	%f31, %f202;
+	mul.f32 	%f799, %f206, 0f40C90FDB;
+	abs.f32 	%f33, %f799;
+	setp.neu.f32	%p14, %f33, 0f7F800000;
+	mov.f32 	%f793, %f799;
+	@%p14 bra 	BB0_9;
+
+	mov.f32 	%f207, 0f00000000;
+	mul.rn.f32 	%f793, %f799, %f207;
+
+BB0_9:
+	mul.f32 	%f208, %f793, 0f3F22F983;
+	cvt.rni.s32.f32	%r372, %f208;
+	cvt.rn.f32.s32	%f209, %r372;
+	neg.f32 	%f210, %f209;
+	mov.f32 	%f211, 0f3FC90FDA;
+	fma.rn.f32 	%f212, %f210, %f211, %f793;
+	mov.f32 	%f213, 0f33A22168;
+	fma.rn.f32 	%f214, %f210, %f213, %f212;
+	mov.f32 	%f215, 0f27C234C5;
+	fma.rn.f32 	%f794, %f210, %f215, %f214;
+	abs.f32 	%f216, %f793;
+	setp.leu.f32	%p15, %f216, 0f47CE4780;
+	@%p15 bra 	BB0_20;
+
+	mov.b32 	 %r13, %f793;
+	shr.u32 	%r14, %r13, 23;
+	shl.b32 	%r133, %r13, 8;
+	or.b32  	%r15, %r133, -2147483648;
+	add.u64 	%rd42, %SP, 4;
+	cvta.to.local.u64 	%rd282, %rd42;
+	mov.u32 	%r364, 0;
+	mov.u64 	%rd281, __cudart_i2opi_f;
+	mov.u32 	%r363, -6;
+
+BB0_11:
+	.pragma "nounroll";
+	ld.const.u32 	%r136, [%rd281];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r134, %r136, %r15, %r364;
+	madc.hi.u32     %r364, %r136, %r15,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd282], %r134;
+	add.s64 	%rd282, %rd282, 4;
+	add.s64 	%rd281, %rd281, 4;
+	add.s32 	%r363, %r363, 1;
+	setp.ne.s32	%p16, %r363, 0;
+	@%p16 bra 	BB0_11;
+
+	and.b32  	%r139, %r14, 255;
+	add.s32 	%r140, %r139, -128;
+	shr.u32 	%r141, %r140, 5;
+	and.b32  	%r20, %r13, -2147483648;
+	cvta.to.local.u64 	%rd44, %rd42;
+	st.local.u32 	[%rd44+24], %r364;
+	mov.u32 	%r142, 6;
+	sub.s32 	%r143, %r142, %r141;
+	mul.wide.s32 	%rd45, %r143, 4;
+	add.s64 	%rd8, %rd44, %rd45;
+	ld.local.u32 	%r365, [%rd8];
+	ld.local.u32 	%r366, [%rd8+-4];
+	and.b32  	%r23, %r14, 31;
+	setp.eq.s32	%p17, %r23, 0;
+	@%p17 bra 	BB0_14;
+
+	mov.u32 	%r144, 32;
+	sub.s32 	%r145, %r144, %r23;
+	shr.u32 	%r146, %r366, %r145;
+	shl.b32 	%r147, %r365, %r23;
+	add.s32 	%r365, %r146, %r147;
+	ld.local.u32 	%r148, [%rd8+-8];
+	shr.u32 	%r149, %r148, %r145;
+	shl.b32 	%r150, %r366, %r23;
+	add.s32 	%r366, %r149, %r150;
+
+BB0_14:
+	shr.u32 	%r151, %r366, 30;
+	shl.b32 	%r152, %r365, 2;
+	add.s32 	%r367, %r151, %r152;
+	shl.b32 	%r29, %r366, 2;
+	shr.u32 	%r153, %r367, 31;
+	shr.u32 	%r154, %r365, 30;
+	add.s32 	%r30, %r153, %r154;
+	setp.eq.s32	%p18, %r153, 0;
+	@%p18 bra 	BB0_15;
+	bra.uni 	BB0_16;
+
+BB0_15:
+	mov.u32 	%r368, %r20;
+	mov.u32 	%r369, %r29;
+	bra.uni 	BB0_17;
+
+BB0_16:
+	not.b32 	%r155, %r367;
+	neg.s32 	%r369, %r29;
+	setp.eq.s32	%p19, %r29, 0;
+	selp.u32	%r156, 1, 0, %p19;
+	add.s32 	%r367, %r156, %r155;
+	xor.b32  	%r368, %r20, -2147483648;
+
+BB0_17:
+	clz.b32 	%r371, %r367;
+	setp.eq.s32	%p20, %r371, 0;
+	shl.b32 	%r157, %r367, %r371;
+	mov.u32 	%r158, 32;
+	sub.s32 	%r159, %r158, %r371;
+	shr.u32 	%r160, %r369, %r159;
+	add.s32 	%r161, %r160, %r157;
+	selp.b32	%r38, %r367, %r161, %p20;
+	mov.u32 	%r162, -921707870;
+	mul.hi.u32 	%r370, %r38, %r162;
+	setp.eq.s32	%p21, %r20, 0;
+	neg.s32 	%r163, %r30;
+	selp.b32	%r372, %r30, %r163, %p21;
+	setp.lt.s32	%p22, %r370, 1;
+	@%p22 bra 	BB0_19;
+
+	mul.lo.s32 	%r164, %r38, -921707870;
+	shr.u32 	%r165, %r164, 31;
+	shl.b32 	%r166, %r370, 1;
+	add.s32 	%r370, %r165, %r166;
+	add.s32 	%r371, %r371, 1;
+
+BB0_19:
+	mov.u32 	%r167, 126;
+	sub.s32 	%r168, %r167, %r371;
+	shl.b32 	%r169, %r168, 23;
+	add.s32 	%r170, %r370, 1;
+	shr.u32 	%r171, %r170, 7;
+	add.s32 	%r172, %r171, 1;
+	shr.u32 	%r173, %r172, 1;
+	add.s32 	%r174, %r173, %r169;
+	or.b32  	%r175, %r174, %r368;
+	mov.b32 	 %f794, %r175;
+
+BB0_20:
+	mul.rn.f32 	%f39, %f794, %f794;
+	add.s32 	%r46, %r372, 1;
+	and.b32  	%r47, %r46, 1;
+	setp.eq.s32	%p23, %r47, 0;
+	@%p23 bra 	BB0_22;
+	bra.uni 	BB0_21;
+
+BB0_22:
+	mov.f32 	%f219, 0f3C08839E;
+	mov.f32 	%f220, 0fB94CA1F9;
+	fma.rn.f32 	%f795, %f220, %f39, %f219;
+	bra.uni 	BB0_23;
+
+BB0_21:
+	mov.f32 	%f217, 0fBAB6061A;
+	mov.f32 	%f218, 0f37CCF5CE;
+	fma.rn.f32 	%f795, %f218, %f39, %f217;
+
+BB0_23:
+	@%p23 bra 	BB0_25;
+	bra.uni 	BB0_24;
+
+BB0_25:
+	mov.f32 	%f224, 0fBE2AAAA3;
+	fma.rn.f32 	%f225, %f795, %f39, %f224;
+	mov.f32 	%f226, 0f00000000;
+	fma.rn.f32 	%f796, %f225, %f39, %f226;
+	bra.uni 	BB0_26;
+
+BB0_24:
+	mov.f32 	%f221, 0f3D2AAAA5;
+	fma.rn.f32 	%f222, %f795, %f39, %f221;
+	mov.f32 	%f223, 0fBF000000;
+	fma.rn.f32 	%f796, %f222, %f39, %f223;
+
+BB0_26:
+	fma.rn.f32 	%f797, %f796, %f794, %f794;
+	@%p23 bra 	BB0_28;
+
+	mov.f32 	%f227, 0f3F800000;
+	fma.rn.f32 	%f797, %f796, %f39, %f227;
+
+BB0_28:
+	and.b32  	%r176, %r46, 2;
+	setp.eq.s32	%p26, %r176, 0;
+	@%p26 bra 	BB0_30;
+
+	mov.f32 	%f228, 0f00000000;
+	mov.f32 	%f229, 0fBF800000;
+	fma.rn.f32 	%f797, %f797, %f229, %f228;
+
+BB0_30:
+	@%p14 bra 	BB0_32;
+
+	mov.f32 	%f230, 0f00000000;
+	mul.rn.f32 	%f799, %f799, %f230;
+
+BB0_32:
+	mul.f32 	%f231, %f799, 0f3F22F983;
+	cvt.rni.s32.f32	%r382, %f231;
+	cvt.rn.f32.s32	%f232, %r382;
+	neg.f32 	%f233, %f232;
+	fma.rn.f32 	%f235, %f233, %f211, %f799;
+	fma.rn.f32 	%f237, %f233, %f213, %f235;
+	fma.rn.f32 	%f800, %f233, %f215, %f237;
+	abs.f32 	%f239, %f799;
+	setp.leu.f32	%p28, %f239, 0f47CE4780;
+	@%p28 bra 	BB0_43;
+
+	mov.b32 	 %r49, %f799;
+	shr.u32 	%r50, %r49, 23;
+	shl.b32 	%r179, %r49, 8;
+	or.b32  	%r51, %r179, -2147483648;
+	add.u64 	%rd47, %SP, 4;
+	cvta.to.local.u64 	%rd284, %rd47;
+	mov.u32 	%r374, 0;
+	mov.u64 	%rd283, __cudart_i2opi_f;
+	mov.u32 	%r373, -6;
+
+BB0_34:
+	.pragma "nounroll";
+	ld.const.u32 	%r182, [%rd283];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r180, %r182, %r51, %r374;
+	madc.hi.u32     %r374, %r182, %r51,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd284], %r180;
+	add.s64 	%rd284, %rd284, 4;
+	add.s64 	%rd283, %rd283, 4;
+	add.s32 	%r373, %r373, 1;
+	setp.ne.s32	%p29, %r373, 0;
+	@%p29 bra 	BB0_34;
+
+	and.b32  	%r185, %r50, 255;
+	add.s32 	%r186, %r185, -128;
+	shr.u32 	%r187, %r186, 5;
+	and.b32  	%r56, %r49, -2147483648;
+	cvta.to.local.u64 	%rd49, %rd47;
+	st.local.u32 	[%rd49+24], %r374;
+	mov.u32 	%r188, 6;
+	sub.s32 	%r189, %r188, %r187;
+	mul.wide.s32 	%rd50, %r189, 4;
+	add.s64 	%rd14, %rd49, %rd50;
+	ld.local.u32 	%r375, [%rd14];
+	ld.local.u32 	%r376, [%rd14+-4];
+	and.b32  	%r59, %r50, 31;
+	setp.eq.s32	%p30, %r59, 0;
+	@%p30 bra 	BB0_37;
+
+	mov.u32 	%r190, 32;
+	sub.s32 	%r191, %r190, %r59;
+	shr.u32 	%r192, %r376, %r191;
+	shl.b32 	%r193, %r375, %r59;
+	add.s32 	%r375, %r192, %r193;
+	ld.local.u32 	%r194, [%rd14+-8];
+	shr.u32 	%r195, %r194, %r191;
+	shl.b32 	%r196, %r376, %r59;
+	add.s32 	%r376, %r195, %r196;
+
+BB0_37:
+	shr.u32 	%r197, %r376, 30;
+	shl.b32 	%r198, %r375, 2;
+	add.s32 	%r377, %r197, %r198;
+	shl.b32 	%r65, %r376, 2;
+	shr.u32 	%r199, %r377, 31;
+	shr.u32 	%r200, %r375, 30;
+	add.s32 	%r66, %r199, %r200;
+	setp.eq.s32	%p31, %r199, 0;
+	@%p31 bra 	BB0_38;
+	bra.uni 	BB0_39;
+
+BB0_38:
+	mov.u32 	%r378, %r56;
+	mov.u32 	%r379, %r65;
+	bra.uni 	BB0_40;
+
+BB0_39:
+	not.b32 	%r201, %r377;
+	neg.s32 	%r379, %r65;
+	setp.eq.s32	%p32, %r65, 0;
+	selp.u32	%r202, 1, 0, %p32;
+	add.s32 	%r377, %r202, %r201;
+	xor.b32  	%r378, %r56, -2147483648;
+
+BB0_40:
+	clz.b32 	%r381, %r377;
+	setp.eq.s32	%p33, %r381, 0;
+	shl.b32 	%r203, %r377, %r381;
+	mov.u32 	%r204, 32;
+	sub.s32 	%r205, %r204, %r381;
+	shr.u32 	%r206, %r379, %r205;
+	add.s32 	%r207, %r206, %r203;
+	selp.b32	%r74, %r377, %r207, %p33;
+	mov.u32 	%r208, -921707870;
+	mul.hi.u32 	%r380, %r74, %r208;
+	setp.eq.s32	%p34, %r56, 0;
+	neg.s32 	%r209, %r66;
+	selp.b32	%r382, %r66, %r209, %p34;
+	setp.lt.s32	%p35, %r380, 1;
+	@%p35 bra 	BB0_42;
+
+	mul.lo.s32 	%r210, %r74, -921707870;
+	shr.u32 	%r211, %r210, 31;
+	shl.b32 	%r212, %r380, 1;
+	add.s32 	%r380, %r211, %r212;
+	add.s32 	%r381, %r381, 1;
+
+BB0_42:
+	mov.u32 	%r213, 126;
+	sub.s32 	%r214, %r213, %r381;
+	shl.b32 	%r215, %r214, 23;
+	add.s32 	%r216, %r380, 1;
+	shr.u32 	%r217, %r216, 7;
+	add.s32 	%r218, %r217, 1;
+	shr.u32 	%r219, %r218, 1;
+	add.s32 	%r220, %r219, %r215;
+	or.b32  	%r221, %r220, %r378;
+	mov.b32 	 %f800, %r221;
+
+BB0_43:
+	mul.rn.f32 	%f56, %f800, %f800;
+	and.b32  	%r82, %r382, 1;
+	setp.eq.s32	%p36, %r82, 0;
+	@%p36 bra 	BB0_45;
+	bra.uni 	BB0_44;
+
+BB0_45:
+	mov.f32 	%f242, 0f3C08839E;
+	mov.f32 	%f243, 0fB94CA1F9;
+	fma.rn.f32 	%f801, %f243, %f56, %f242;
+	bra.uni 	BB0_46;
+
+BB0_44:
+	mov.f32 	%f240, 0fBAB6061A;
+	mov.f32 	%f241, 0f37CCF5CE;
+	fma.rn.f32 	%f801, %f241, %f56, %f240;
+
+BB0_46:
+	@%p36 bra 	BB0_48;
+	bra.uni 	BB0_47;
+
+BB0_48:
+	mov.f32 	%f247, 0fBE2AAAA3;
+	fma.rn.f32 	%f248, %f801, %f56, %f247;
+	mov.f32 	%f249, 0f00000000;
+	fma.rn.f32 	%f802, %f248, %f56, %f249;
+	bra.uni 	BB0_49;
+
+BB0_47:
+	mov.f32 	%f244, 0f3D2AAAA5;
+	fma.rn.f32 	%f245, %f801, %f56, %f244;
+	mov.f32 	%f246, 0fBF000000;
+	fma.rn.f32 	%f802, %f245, %f56, %f246;
+
+BB0_49:
+	fma.rn.f32 	%f803, %f802, %f800, %f800;
+	@%p36 bra 	BB0_51;
+
+	mov.f32 	%f250, 0f3F800000;
+	fma.rn.f32 	%f803, %f802, %f56, %f250;
+
+BB0_51:
+	and.b32  	%r222, %r382, 2;
+	setp.eq.s32	%p39, %r222, 0;
+	@%p39 bra 	BB0_53;
+
+	mov.f32 	%f251, 0f00000000;
+	mov.f32 	%f252, 0fBF800000;
+	fma.rn.f32 	%f803, %f803, %f252, %f251;
+
+BB0_53:
+	mul.f32 	%f261, %f31, %f797;
+	add.u64 	%rd51, %SP, 0;
+	cvta.to.local.u64 	%rd52, %rd51;
+	mul.f32 	%f262, %f261, %f261;
+	mov.f32 	%f263, 0f3F800000;
+	sub.f32 	%f264, %f263, %f262;
+	mul.f32 	%f265, %f31, %f803;
+	mul.f32 	%f266, %f265, %f265;
+	sub.f32 	%f267, %f264, %f266;
+	mov.f32 	%f268, 0f00000000;
+	max.f32 	%f269, %f268, %f267;
+	sqrt.rn.f32 	%f270, %f269;
+	mul.f32 	%f271, %f17, %f265;
+	mul.f32 	%f272, %f18, %f265;
+	mul.f32 	%f273, %f19, %f265;
+	fma.rn.f32 	%f274, %f20, %f261, %f271;
+	fma.rn.f32 	%f275, %f21, %f261, %f272;
+	fma.rn.f32 	%f276, %f22, %f261, %f273;
+	fma.rn.f32 	%f277, %f7, %f270, %f274;
+	fma.rn.f32 	%f278, %f8, %f270, %f275;
+	fma.rn.f32 	%f279, %f9, %f270, %f276;
+	add.f32 	%f280, %f7, %f277;
+	add.f32 	%f281, %f8, %f278;
+	add.f32 	%f282, %f9, %f279;
+	ld.global.f32 	%f283, [shadowSpread];
+	mul.f32 	%f284, %f283, %f280;
+	mul.f32 	%f285, %f283, %f281;
+	mul.f32 	%f286, %f283, %f282;
+	sub.f32 	%f287, %f284, %f7;
+	sub.f32 	%f288, %f285, %f8;
+	sub.f32 	%f289, %f286, %f9;
+	mul.f32 	%f290, %f288, %f288;
+	fma.rn.f32 	%f291, %f287, %f287, %f290;
+	fma.rn.f32 	%f292, %f289, %f289, %f291;
+	sqrt.rn.f32 	%f293, %f292;
+	rcp.rn.f32 	%f294, %f293;
+	mul.f32 	%f256, %f294, %f287;
+	mul.f32 	%f257, %f294, %f288;
+	mul.f32 	%f258, %f294, %f289;
+	ld.global.u32 	%r226, [imageEnabled];
+	and.b32  	%r227, %r226, 32;
+	setp.eq.s32	%p40, %r227, 0;
+	selp.f32	%f295, 0f3F800000, 0f41200000, %p40;
+	mul.f32 	%f259, %f295, %f29;
+	mov.u32 	%r228, 1065353216;
+	st.local.u32 	[%rd52], %r228;
+	ld.global.u32 	%r223, [root];
+	mov.u32 	%r224, 1;
+	mov.f32 	%f260, 0f6C4ECB8F;
+	// inline asm
+	call _rt_trace_64, (%r223, %f14, %f15, %f16, %f256, %f257, %f258, %r224, %f259, %f260, %rd51, %r100);
+	// inline asm
+	ld.local.f32 	%f296, [%rd52];
+	add.f32 	%f805, %f805, %f296;
+	ld.global.u32 	%r358, [samples];
+	add.s32 	%r361, %r361, 1;
+	setp.lt.s32	%p41, %r361, %r358;
+	@%p41 bra 	BB0_7;
+
+BB0_54:
+	add.s32 	%r359, %r359, 1;
+	setp.lt.s32	%p42, %r359, %r358;
+	@%p42 bra 	BB0_5;
+
+BB0_55:
+	setp.eq.s32	%p43, %r358, 0;
+	mov.f32 	%f807, 0f3F800000;
+	@%p43 bra 	BB0_57;
+
+	mul.lo.s32 	%r229, %r358, %r358;
+	cvt.rn.f32.s32	%f298, %r229;
+	div.rn.f32 	%f807, %f805, %f298;
+
+BB0_57:
+	mul.f32 	%f307, %f12, %f21;
+	fma.rn.f32 	%f308, %f11, %f20, %f307;
+	fma.rn.f32 	%f309, %f13, %f22, %f308;
+	ld.global.v4.f32 	{%f310, %f311, %f312, %f313}, [lightTilingOffset];
+	fma.rn.f32 	%f303, %f309, %f310, %f312;
+	mul.f32 	%f316, %f12, %f18;
+	fma.rn.f32 	%f317, %f11, %f17, %f316;
+	fma.rn.f32 	%f318, %f13, %f19, %f317;
+	fma.rn.f32 	%f304, %f318, %f311, %f313;
+	ld.global.u32 	%r230, [lightCookie];
+	mov.f32 	%f306, 0f00000000;
+	// inline asm
+	call (%f299, %f300, %f301, %f302), _rt_texture_get_f_id, (%r230, %r99, %f303, %f304, %f306, %f306);
+	// inline asm
+	mul.f32 	%f73, %f807, %f299;
+	ld.global.f32 	%f321, [directColor];
+	mul.f32 	%f322, %f321, %f73;
+	ld.global.f32 	%f323, [directColor+4];
+	mul.f32 	%f324, %f323, %f73;
+	ld.global.f32 	%f325, [directColor+8];
+	mul.f32 	%f326, %f73, %f325;
+	cvt.sat.f32.f32	%f327, %f10;
+	mul.f32 	%f74, %f322, %f327;
+	mul.f32 	%f75, %f324, %f327;
+	mul.f32 	%f76, %f326, %f327;
+	mul.f32 	%f328, %f10, 0f40800000;
+	cvt.sat.f32.f32	%f329, %f328;
+	mul.f32 	%f330, %f322, %f329;
+	mul.f32 	%f331, %f324, %f329;
+	mul.f32 	%f332, %f326, %f329;
+	mul.f32 	%f77, %f330, 0f3E800000;
+	mul.f32 	%f78, %f331, 0f3E800000;
+	mul.f32 	%f79, %f332, 0f3E800000;
+	ld.global.u32 	%r387, [imageEnabled];
+	and.b32  	%r232, %r387, 8;
+	setp.eq.s32	%p44, %r232, 0;
+	@%p44 bra 	BB0_70;
+
+	cvt.u64.u32	%rd55, %r2;
+	cvt.u64.u32	%rd56, %r3;
+	mov.u64 	%rd59, image_Mask;
+	cvta.global.u64 	%rd54, %rd59;
+	// inline asm
+	call (%rd53), _rt_buffer_get_64, (%rd54, %r99, %r99, %rd55, %rd56, %rd25, %rd25);
+	// inline asm
+	abs.f32 	%f81, %f73;
+	setp.lt.f32	%p45, %f81, 0f00800000;
+	mul.f32 	%f338, %f81, 0f4B800000;
+	selp.f32	%f339, 0fC3170000, 0fC2FE0000, %p45;
+	selp.f32	%f340, %f338, %f81, %p45;
+	mov.b32 	 %r235, %f340;
+	and.b32  	%r236, %r235, 8388607;
+	or.b32  	%r237, %r236, 1065353216;
+	mov.b32 	 %f341, %r237;
+	shr.u32 	%r238, %r235, 23;
+	cvt.rn.f32.u32	%f342, %r238;
+	add.f32 	%f343, %f339, %f342;
+	setp.gt.f32	%p46, %f341, 0f3FB504F3;
+	mul.f32 	%f344, %f341, 0f3F000000;
+	add.f32 	%f345, %f343, 0f3F800000;
+	selp.f32	%f346, %f344, %f341, %p46;
+	selp.f32	%f347, %f345, %f343, %p46;
+	add.f32 	%f348, %f346, 0fBF800000;
+	add.f32 	%f334, %f346, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f333,%f334;
+	// inline asm
+	add.f32 	%f349, %f348, %f348;
+	mul.f32 	%f350, %f333, %f349;
+	mul.f32 	%f351, %f350, %f350;
+	mov.f32 	%f352, 0f3C4CAF63;
+	mov.f32 	%f353, 0f3B18F0FE;
+	fma.rn.f32 	%f354, %f353, %f351, %f352;
+	mov.f32 	%f355, 0f3DAAAABD;
+	fma.rn.f32 	%f356, %f354, %f351, %f355;
+	mul.rn.f32 	%f357, %f356, %f351;
+	mul.rn.f32 	%f358, %f357, %f350;
+	sub.f32 	%f359, %f348, %f350;
+	neg.f32 	%f360, %f350;
+	add.f32 	%f361, %f359, %f359;
+	fma.rn.f32 	%f362, %f360, %f348, %f361;
+	mul.rn.f32 	%f363, %f333, %f362;
+	add.f32 	%f364, %f358, %f350;
+	sub.f32 	%f365, %f350, %f364;
+	add.f32 	%f366, %f358, %f365;
+	add.f32 	%f367, %f363, %f366;
+	add.f32 	%f368, %f364, %f367;
+	sub.f32 	%f369, %f364, %f368;
+	add.f32 	%f370, %f367, %f369;
+	mov.f32 	%f371, 0f3F317200;
+	mul.rn.f32 	%f372, %f347, %f371;
+	mov.f32 	%f373, 0f35BFBE8E;
+	mul.rn.f32 	%f374, %f347, %f373;
+	add.f32 	%f375, %f372, %f368;
+	sub.f32 	%f376, %f372, %f375;
+	add.f32 	%f377, %f368, %f376;
+	add.f32 	%f378, %f370, %f377;
+	add.f32 	%f379, %f374, %f378;
+	add.f32 	%f380, %f375, %f379;
+	sub.f32 	%f381, %f375, %f380;
+	add.f32 	%f382, %f379, %f381;
+	mov.f32 	%f383, 0f3EE8BA2E;
+	mul.rn.f32 	%f384, %f383, %f380;
+	neg.f32 	%f385, %f384;
+	fma.rn.f32 	%f386, %f383, %f380, %f385;
+	fma.rn.f32 	%f387, %f383, %f382, %f386;
+	fma.rn.f32 	%f389, %f306, %f380, %f387;
+	add.rn.f32 	%f390, %f384, %f389;
+	neg.f32 	%f391, %f390;
+	add.rn.f32 	%f392, %f384, %f391;
+	add.rn.f32 	%f393, %f392, %f389;
+	mov.b32 	 %r239, %f390;
+	setp.eq.s32	%p47, %r239, 1118925336;
+	add.s32 	%r240, %r239, -1;
+	mov.b32 	 %f394, %r240;
+	add.f32 	%f395, %f393, 0f37000000;
+	selp.f32	%f396, %f394, %f390, %p47;
+	selp.f32	%f82, %f395, %f393, %p47;
+	mul.f32 	%f397, %f396, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f398, %f397;
+	mov.f32 	%f399, 0fBF317200;
+	fma.rn.f32 	%f400, %f398, %f399, %f396;
+	mov.f32 	%f401, 0fB5BFBE8E;
+	fma.rn.f32 	%f402, %f398, %f401, %f400;
+	mul.f32 	%f403, %f402, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f404, %f403;
+	add.f32 	%f405, %f398, 0f00000000;
+	ex2.approx.f32 	%f406, %f405;
+	mul.f32 	%f407, %f404, %f406;
+	setp.lt.f32	%p48, %f396, 0fC2D20000;
+	selp.f32	%f408, 0f00000000, %f407, %p48;
+	setp.gt.f32	%p49, %f396, 0f42D20000;
+	selp.f32	%f808, 0f7F800000, %f408, %p49;
+	setp.eq.f32	%p50, %f808, 0f7F800000;
+	@%p50 bra 	BB0_60;
+
+	fma.rn.f32 	%f808, %f808, %f82, %f808;
+
+BB0_60:
+	mov.f32 	%f779, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f778, %f779;
+	fma.rn.f32 	%f777, %f778, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f776, %f777;
+	setp.lt.f32	%p51, %f73, 0f00000000;
+	setp.eq.f32	%p52, %f776, 0f3F800000;
+	and.pred  	%p1, %p51, %p52;
+	mov.b32 	 %r241, %f808;
+	xor.b32  	%r242, %r241, -2147483648;
+	mov.b32 	 %f409, %r242;
+	selp.f32	%f810, %f409, %f808, %p1;
+	setp.eq.f32	%p53, %f73, 0f00000000;
+	@%p53 bra 	BB0_63;
+	bra.uni 	BB0_61;
+
+BB0_63:
+	add.f32 	%f412, %f73, %f73;
+	selp.f32	%f810, %f412, 0f00000000, %p52;
+	bra.uni 	BB0_64;
+
+BB0_128:
+	mov.u64 	%rd200, image_HDR;
+	cvta.global.u64 	%rd195, %rd200;
+	mov.u32 	%r328, 8;
+	// inline asm
+	call (%rd194), _rt_buffer_get_64, (%rd195, %r99, %r328, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	mov.f32 	%f716, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs98, %f716;}
+
+	// inline asm
+	mov.u16 	%rs99, 0;
+	st.v4.u16 	[%rd194], {%rs98, %rs98, %rs98, %rs99};
+
+BB0_129:
+	ld.global.u32 	%r329, [additive];
+	setp.eq.s32	%p120, %r329, 0;
+	@%p120 bra 	BB0_131;
+
+	mov.u64 	%rd213, image_RNM0;
+	cvta.global.u64 	%rd202, %rd213;
+	mov.u32 	%r333, 8;
+	// inline asm
+	call (%rd201), _rt_buffer_get_64, (%rd202, %r99, %r333, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs106, %rs107, %rs108, %rs109}, [%rd201];
+	// inline asm
+	{  cvt.f32.f16 %f717, %rs106;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f718, %rs107;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f719, %rs108;}
+
+	// inline asm
+	// inline asm
+	call (%rd207), _rt_buffer_get_64, (%rd202, %r99, %r333, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f720, %f717, 0f00000000;
+	add.f32 	%f721, %f718, 0f00000000;
+	add.f32 	%f722, %f719, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs105, %f722;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs104, %f721;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs103, %f720;}
+
+	// inline asm
+	mov.u16 	%rs110, 0;
+	st.v4.u16 	[%rd207], {%rs103, %rs104, %rs105, %rs110};
+	bra.uni 	BB0_132;
+
+BB0_131:
+	mov.u64 	%rd220, image_RNM0;
+	cvta.global.u64 	%rd215, %rd220;
+	mov.u32 	%r335, 8;
+	// inline asm
+	call (%rd214), _rt_buffer_get_64, (%rd215, %r99, %r335, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	mov.f32 	%f723, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs111, %f723;}
+
+	// inline asm
+	mov.u16 	%rs112, 0;
+	st.v4.u16 	[%rd214], {%rs111, %rs111, %rs111, %rs112};
+
+BB0_132:
+	ld.global.u32 	%r336, [additive];
+	setp.eq.s32	%p121, %r336, 0;
+	@%p121 bra 	BB0_134;
+
+	mov.u64 	%rd233, image_RNM1;
+	cvta.global.u64 	%rd222, %rd233;
+	mov.u32 	%r340, 8;
+	// inline asm
+	call (%rd221), _rt_buffer_get_64, (%rd222, %r99, %r340, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs119, %rs120, %rs121, %rs122}, [%rd221];
+	// inline asm
+	{  cvt.f32.f16 %f724, %rs119;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f725, %rs120;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f726, %rs121;}
+
+	// inline asm
+	// inline asm
+	call (%rd227), _rt_buffer_get_64, (%rd222, %r99, %r340, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f727, %f724, 0f00000000;
+	add.f32 	%f728, %f725, 0f00000000;
+	add.f32 	%f729, %f726, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs118, %f729;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs117, %f728;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs116, %f727;}
+
+	// inline asm
+	mov.u16 	%rs123, 0;
+	st.v4.u16 	[%rd227], {%rs116, %rs117, %rs118, %rs123};
+	bra.uni 	BB0_135;
+
+BB0_134:
+	mov.u64 	%rd240, image_RNM1;
+	cvta.global.u64 	%rd235, %rd240;
+	mov.u32 	%r342, 8;
+	// inline asm
+	call (%rd234), _rt_buffer_get_64, (%rd235, %r99, %r342, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	mov.f32 	%f730, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs124, %f730;}
+
+	// inline asm
+	mov.u16 	%rs125, 0;
+	st.v4.u16 	[%rd234], {%rs124, %rs124, %rs124, %rs125};
+
+BB0_135:
+	ld.global.u32 	%r343, [additive];
+	setp.eq.s32	%p122, %r343, 0;
+	@%p122 bra 	BB0_137;
+
+	mov.u64 	%rd253, image_RNM2;
+	cvta.global.u64 	%rd242, %rd253;
+	mov.u32 	%r347, 8;
+	// inline asm
+	call (%rd241), _rt_buffer_get_64, (%rd242, %r99, %r347, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs132, %rs133, %rs134, %rs135}, [%rd241];
+	// inline asm
+	{  cvt.f32.f16 %f731, %rs132;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f732, %rs133;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f733, %rs134;}
+
+	// inline asm
+	// inline asm
+	call (%rd247), _rt_buffer_get_64, (%rd242, %r99, %r347, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f734, %f731, 0f00000000;
+	add.f32 	%f735, %f732, 0f00000000;
+	add.f32 	%f736, %f733, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs131, %f736;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs130, %f735;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs129, %f734;}
+
+	// inline asm
+	mov.u16 	%rs136, 0;
+	st.v4.u16 	[%rd247], {%rs129, %rs130, %rs131, %rs136};
+	bra.uni 	BB0_138;
+
+BB0_137:
+	mov.u64 	%rd260, image_RNM2;
+	cvta.global.u64 	%rd255, %rd260;
+	mov.u32 	%r349, 8;
+	// inline asm
+	call (%rd254), _rt_buffer_get_64, (%rd255, %r99, %r349, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	mov.f32 	%f737, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs137, %f737;}
+
+	// inline asm
+	mov.u16 	%rs138, 0;
+	st.v4.u16 	[%rd254], {%rs137, %rs137, %rs137, %rs138};
+
+BB0_138:
+	ld.global.u32 	%r350, [additive];
+	setp.eq.s32	%p123, %r350, 0;
+	@%p123 bra 	BB0_140;
+
+	mov.u64 	%rd273, image_RNM3;
+	cvta.global.u64 	%rd262, %rd273;
+	mov.u32 	%r354, 8;
+	// inline asm
+	call (%rd261), _rt_buffer_get_64, (%rd262, %r99, %r354, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs145, %rs146, %rs147, %rs148}, [%rd261];
+	// inline asm
+	{  cvt.f32.f16 %f738, %rs145;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f739, %rs146;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f740, %rs147;}
+
+	// inline asm
+	// inline asm
+	call (%rd267), _rt_buffer_get_64, (%rd262, %r99, %r354, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f741, %f738, 0f00000000;
+	add.f32 	%f742, %f739, 0f00000000;
+	add.f32 	%f743, %f740, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs144, %f743;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs143, %f742;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs142, %f741;}
+
+	// inline asm
+	mov.u16 	%rs149, 0;
+	st.v4.u16 	[%rd267], {%rs142, %rs143, %rs144, %rs149};
+	bra.uni 	BB0_141;
+
+BB0_140:
+	mov.u64 	%rd280, image_RNM3;
+	cvta.global.u64 	%rd275, %rd280;
+	mov.u32 	%r356, 8;
+	// inline asm
+	call (%rd274), _rt_buffer_get_64, (%rd275, %r99, %r356, %rd18, %rd19, %rd25, %rd25);
+	// inline asm
+	mov.f32 	%f744, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs150, %f744;}
+
+	// inline asm
+	mov.u16 	%rs151, 0;
+	st.v4.u16 	[%rd274], {%rs150, %rs150, %rs150, %rs151};
+	bra.uni 	BB0_141;
+
+BB0_61:
+	setp.geu.f32	%p54, %f73, 0f00000000;
+	@%p54 bra 	BB0_64;
+
+	mov.f32 	%f784, 0f3EE8BA2E;
+	cvt.rzi.f32.f32	%f411, %f784;
+	setp.neu.f32	%p55, %f411, 0f3EE8BA2E;
+	selp.f32	%f810, 0f7FFFFFFF, %f810, %p55;
+
+BB0_64:
+	abs.f32 	%f780, %f73;
+	add.f32 	%f413, %f780, 0f3EE8BA2E;
+	mov.b32 	 %r243, %f413;
+	setp.lt.s32	%p57, %r243, 2139095040;
+	@%p57 bra 	BB0_69;
+
+	abs.f32 	%f782, %f73;
+	setp.gtu.f32	%p58, %f782, 0f7F800000;
+	@%p58 bra 	BB0_68;
+	bra.uni 	BB0_66;
+
+BB0_68:
+	add.f32 	%f810, %f73, 0f3EE8BA2E;
+	bra.uni 	BB0_69;
+
+BB0_66:
+	abs.f32 	%f783, %f73;
+	setp.neu.f32	%p59, %f783, 0f7F800000;
+	@%p59 bra 	BB0_69;
+
+	selp.f32	%f810, 0fFF800000, 0f7F800000, %p1;
+
+BB0_69:
+	mul.f32 	%f414, %f810, 0f437F0000;
+	setp.eq.f32	%p60, %f73, 0f3F800000;
+	selp.f32	%f415, 0f437F0000, %f414, %p60;
+	cvt.rzi.u32.f32	%r244, %f415;
+	cvt.u16.u32	%rs14, %r244;
+	mov.u16 	%rs15, 255;
+	st.v2.u8 	[%rd53], {%rs14, %rs15};
+	ld.global.u32 	%r387, [imageEnabled];
+
+BB0_70:
+	and.b32  	%r245, %r387, 1;
+	setp.eq.b32	%p61, %r245, 1;
+	@!%p61 bra 	BB0_105;
+	bra.uni 	BB0_71;
+
+BB0_71:
+	mov.f32 	%f781, 0f00000000;
+	abs.f32 	%f94, %f74;
+	setp.lt.f32	%p62, %f94, 0f00800000;
+	mul.f32 	%f421, %f94, 0f4B800000;
+	selp.f32	%f422, 0fC3170000, 0fC2FE0000, %p62;
+	selp.f32	%f423, %f421, %f94, %p62;
+	mov.b32 	 %r246, %f423;
+	and.b32  	%r247, %r246, 8388607;
+	or.b32  	%r248, %r247, 1065353216;
+	mov.b32 	 %f424, %r248;
+	shr.u32 	%r249, %r246, 23;
+	cvt.rn.f32.u32	%f425, %r249;
+	add.f32 	%f426, %f422, %f425;
+	setp.gt.f32	%p63, %f424, 0f3FB504F3;
+	mul.f32 	%f427, %f424, 0f3F000000;
+	add.f32 	%f428, %f426, 0f3F800000;
+	selp.f32	%f429, %f427, %f424, %p63;
+	selp.f32	%f430, %f428, %f426, %p63;
+	add.f32 	%f431, %f429, 0fBF800000;
+	add.f32 	%f417, %f429, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f416,%f417;
+	// inline asm
+	add.f32 	%f432, %f431, %f431;
+	mul.f32 	%f433, %f416, %f432;
+	mul.f32 	%f434, %f433, %f433;
+	mov.f32 	%f435, 0f3C4CAF63;
+	mov.f32 	%f436, 0f3B18F0FE;
+	fma.rn.f32 	%f437, %f436, %f434, %f435;
+	mov.f32 	%f438, 0f3DAAAABD;
+	fma.rn.f32 	%f439, %f437, %f434, %f438;
+	mul.rn.f32 	%f440, %f439, %f434;
+	mul.rn.f32 	%f441, %f440, %f433;
+	sub.f32 	%f442, %f431, %f433;
+	neg.f32 	%f443, %f433;
+	add.f32 	%f444, %f442, %f442;
+	fma.rn.f32 	%f445, %f443, %f431, %f444;
+	mul.rn.f32 	%f446, %f416, %f445;
+	add.f32 	%f447, %f441, %f433;
+	sub.f32 	%f448, %f433, %f447;
+	add.f32 	%f449, %f441, %f448;
+	add.f32 	%f450, %f446, %f449;
+	add.f32 	%f451, %f447, %f450;
+	sub.f32 	%f452, %f447, %f451;
+	add.f32 	%f453, %f450, %f452;
+	mov.f32 	%f454, 0f3F317200;
+	mul.rn.f32 	%f455, %f430, %f454;
+	mov.f32 	%f456, 0f35BFBE8E;
+	mul.rn.f32 	%f457, %f430, %f456;
+	add.f32 	%f458, %f455, %f451;
+	sub.f32 	%f459, %f455, %f458;
+	add.f32 	%f460, %f451, %f459;
+	add.f32 	%f461, %f453, %f460;
+	add.f32 	%f462, %f457, %f461;
+	add.f32 	%f463, %f458, %f462;
+	sub.f32 	%f464, %f458, %f463;
+	add.f32 	%f465, %f462, %f464;
+	mov.f32 	%f466, 0f3EE66666;
+	mul.rn.f32 	%f467, %f466, %f463;
+	neg.f32 	%f468, %f467;
+	fma.rn.f32 	%f469, %f466, %f463, %f468;
+	fma.rn.f32 	%f470, %f466, %f465, %f469;
+	fma.rn.f32 	%f472, %f781, %f463, %f470;
+	add.rn.f32 	%f473, %f467, %f472;
+	neg.f32 	%f474, %f473;
+	add.rn.f32 	%f475, %f467, %f474;
+	add.rn.f32 	%f476, %f475, %f472;
+	mov.b32 	 %r250, %f473;
+	setp.eq.s32	%p64, %r250, 1118925336;
+	add.s32 	%r251, %r250, -1;
+	mov.b32 	 %f477, %r251;
+	add.f32 	%f478, %f476, 0f37000000;
+	selp.f32	%f479, %f477, %f473, %p64;
+	selp.f32	%f95, %f478, %f476, %p64;
+	mul.f32 	%f480, %f479, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f481, %f480;
+	mov.f32 	%f482, 0fBF317200;
+	fma.rn.f32 	%f483, %f481, %f482, %f479;
+	mov.f32 	%f484, 0fB5BFBE8E;
+	fma.rn.f32 	%f485, %f481, %f484, %f483;
+	mul.f32 	%f486, %f485, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f487, %f486;
+	add.f32 	%f488, %f481, 0f00000000;
+	ex2.approx.f32 	%f489, %f488;
+	mul.f32 	%f490, %f487, %f489;
+	setp.lt.f32	%p65, %f479, 0fC2D20000;
+	selp.f32	%f491, 0f00000000, %f490, %p65;
+	setp.gt.f32	%p66, %f479, 0f42D20000;
+	selp.f32	%f811, 0f7F800000, %f491, %p66;
+	setp.eq.f32	%p67, %f811, 0f7F800000;
+	@%p67 bra 	BB0_73;
+
+	fma.rn.f32 	%f811, %f811, %f95, %f811;
+
+BB0_73:
+	mov.f32 	%f748, 0f3E666666;
+	cvt.rzi.f32.f32	%f747, %f748;
+	fma.rn.f32 	%f746, %f747, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f745, %f746;
+	setp.lt.f32	%p68, %f74, 0f00000000;
+	setp.eq.f32	%p69, %f745, 0f3F800000;
+	and.pred  	%p2, %p68, %p69;
+	mov.b32 	 %r252, %f811;
+	xor.b32  	%r253, %r252, -2147483648;
+	mov.b32 	 %f492, %r253;
+	selp.f32	%f813, %f492, %f811, %p2;
+	setp.eq.f32	%p70, %f74, 0f00000000;
+	@%p70 bra 	BB0_76;
+	bra.uni 	BB0_74;
+
+BB0_76:
+	add.f32 	%f495, %f74, %f74;
+	selp.f32	%f813, %f495, 0f00000000, %p69;
+	bra.uni 	BB0_77;
+
+BB0_74:
+	setp.geu.f32	%p71, %f74, 0f00000000;
+	@%p71 bra 	BB0_77;
+
+	mov.f32 	%f772, 0f3EE66666;
+	cvt.rzi.f32.f32	%f494, %f772;
+	setp.neu.f32	%p72, %f494, 0f3EE66666;
+	selp.f32	%f813, 0f7FFFFFFF, %f813, %p72;
+
+BB0_77:
+	abs.f32 	%f749, %f74;
+	add.f32 	%f496, %f749, 0f3EE66666;
+	mov.b32 	 %r254, %f496;
+	setp.lt.s32	%p74, %r254, 2139095040;
+	@%p74 bra 	BB0_82;
+
+	abs.f32 	%f770, %f74;
+	setp.gtu.f32	%p75, %f770, 0f7F800000;
+	@%p75 bra 	BB0_81;
+	bra.uni 	BB0_79;
+
+BB0_81:
+	add.f32 	%f813, %f74, 0f3EE66666;
+	bra.uni 	BB0_82;
+
+BB0_79:
+	abs.f32 	%f771, %f74;
+	setp.neu.f32	%p76, %f771, 0f7F800000;
+	@%p76 bra 	BB0_82;
+
+	selp.f32	%f813, 0fFF800000, 0f7F800000, %p2;
+
+BB0_82:
+	mov.f32 	%f758, 0fB5BFBE8E;
+	mov.f32 	%f757, 0fBF317200;
+	mov.f32 	%f756, 0f35BFBE8E;
+	mov.f32 	%f755, 0f3F317200;
+	mov.f32 	%f754, 0f3DAAAABD;
+	mov.f32 	%f753, 0f3C4CAF63;
+	mov.f32 	%f752, 0f3B18F0FE;
+	mov.f32 	%f751, 0f3EE66666;
+	mov.f32 	%f750, 0f00000000;
+	setp.eq.f32	%p77, %f74, 0f3F800000;
+	selp.f32	%f106, 0f3F800000, %f813, %p77;
+	abs.f32 	%f107, %f75;
+	setp.lt.f32	%p78, %f107, 0f00800000;
+	mul.f32 	%f499, %f107, 0f4B800000;
+	selp.f32	%f500, 0fC3170000, 0fC2FE0000, %p78;
+	selp.f32	%f501, %f499, %f107, %p78;
+	mov.b32 	 %r255, %f501;
+	and.b32  	%r256, %r255, 8388607;
+	or.b32  	%r257, %r256, 1065353216;
+	mov.b32 	 %f502, %r257;
+	shr.u32 	%r258, %r255, 23;
+	cvt.rn.f32.u32	%f503, %r258;
+	add.f32 	%f504, %f500, %f503;
+	setp.gt.f32	%p79, %f502, 0f3FB504F3;
+	mul.f32 	%f505, %f502, 0f3F000000;
+	add.f32 	%f506, %f504, 0f3F800000;
+	selp.f32	%f507, %f505, %f502, %p79;
+	selp.f32	%f508, %f506, %f504, %p79;
+	add.f32 	%f509, %f507, 0fBF800000;
+	add.f32 	%f498, %f507, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f497,%f498;
+	// inline asm
+	add.f32 	%f510, %f509, %f509;
+	mul.f32 	%f511, %f497, %f510;
+	mul.f32 	%f512, %f511, %f511;
+	fma.rn.f32 	%f515, %f752, %f512, %f753;
+	fma.rn.f32 	%f517, %f515, %f512, %f754;
+	mul.rn.f32 	%f518, %f517, %f512;
+	mul.rn.f32 	%f519, %f518, %f511;
+	sub.f32 	%f520, %f509, %f511;
+	neg.f32 	%f521, %f511;
+	add.f32 	%f522, %f520, %f520;
+	fma.rn.f32 	%f523, %f521, %f509, %f522;
+	mul.rn.f32 	%f524, %f497, %f523;
+	add.f32 	%f525, %f519, %f511;
+	sub.f32 	%f526, %f511, %f525;
+	add.f32 	%f527, %f519, %f526;
+	add.f32 	%f528, %f524, %f527;
+	add.f32 	%f529, %f525, %f528;
+	sub.f32 	%f530, %f525, %f529;
+	add.f32 	%f531, %f528, %f530;
+	mul.rn.f32 	%f533, %f508, %f755;
+	mul.rn.f32 	%f535, %f508, %f756;
+	add.f32 	%f536, %f533, %f529;
+	sub.f32 	%f537, %f533, %f536;
+	add.f32 	%f538, %f529, %f537;
+	add.f32 	%f539, %f531, %f538;
+	add.f32 	%f540, %f535, %f539;
+	add.f32 	%f541, %f536, %f540;
+	sub.f32 	%f542, %f536, %f541;
+	add.f32 	%f543, %f540, %f542;
+	mul.rn.f32 	%f545, %f751, %f541;
+	neg.f32 	%f546, %f545;
+	fma.rn.f32 	%f547, %f751, %f541, %f546;
+	fma.rn.f32 	%f548, %f751, %f543, %f547;
+	fma.rn.f32 	%f550, %f750, %f541, %f548;
+	add.rn.f32 	%f551, %f545, %f550;
+	neg.f32 	%f552, %f551;
+	add.rn.f32 	%f553, %f545, %f552;
+	add.rn.f32 	%f554, %f553, %f550;
+	mov.b32 	 %r259, %f551;
+	setp.eq.s32	%p80, %r259, 1118925336;
+	add.s32 	%r260, %r259, -1;
+	mov.b32 	 %f555, %r260;
+	add.f32 	%f556, %f554, 0f37000000;
+	selp.f32	%f557, %f555, %f551, %p80;
+	selp.f32	%f108, %f556, %f554, %p80;
+	mul.f32 	%f558, %f557, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f559, %f558;
+	fma.rn.f32 	%f561, %f559, %f757, %f557;
+	fma.rn.f32 	%f563, %f559, %f758, %f561;
+	mul.f32 	%f564, %f563, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f565, %f564;
+	add.f32 	%f566, %f559, 0f00000000;
+	ex2.approx.f32 	%f567, %f566;
+	mul.f32 	%f568, %f565, %f567;
+	setp.lt.f32	%p81, %f557, 0fC2D20000;
+	selp.f32	%f569, 0f00000000, %f568, %p81;
+	setp.gt.f32	%p82, %f557, 0f42D20000;
+	selp.f32	%f814, 0f7F800000, %f569, %p82;
+	setp.eq.f32	%p83, %f814, 0f7F800000;
+	@%p83 bra 	BB0_84;
+
+	fma.rn.f32 	%f814, %f814, %f108, %f814;
+
+BB0_84:
+	setp.lt.f32	%p84, %f75, 0f00000000;
+	and.pred  	%p3, %p84, %p69;
+	mov.b32 	 %r261, %f814;
+	xor.b32  	%r262, %r261, -2147483648;
+	mov.b32 	 %f570, %r262;
+	selp.f32	%f816, %f570, %f814, %p3;
+	setp.eq.f32	%p86, %f75, 0f00000000;
+	@%p86 bra 	BB0_87;
+	bra.uni 	BB0_85;
+
+BB0_87:
+	add.f32 	%f573, %f75, %f75;
+	selp.f32	%f816, %f573, 0f00000000, %p69;
+	bra.uni 	BB0_88;
+
+BB0_85:
+	setp.geu.f32	%p87, %f75, 0f00000000;
+	@%p87 bra 	BB0_88;
+
+	mov.f32 	%f769, 0f3EE66666;
+	cvt.rzi.f32.f32	%f572, %f769;
+	setp.neu.f32	%p88, %f572, 0f3EE66666;
+	selp.f32	%f816, 0f7FFFFFFF, %f816, %p88;
+
+BB0_88:
+	abs.f32 	%f773, %f75;
+	add.f32 	%f574, %f773, 0f3EE66666;
+	mov.b32 	 %r263, %f574;
+	setp.lt.s32	%p90, %r263, 2139095040;
+	@%p90 bra 	BB0_93;
+
+	abs.f32 	%f774, %f75;
+	setp.gtu.f32	%p91, %f774, 0f7F800000;
+	@%p91 bra 	BB0_92;
+	bra.uni 	BB0_90;
+
+BB0_92:
+	add.f32 	%f816, %f75, 0f3EE66666;
+	bra.uni 	BB0_93;
+
+BB0_90:
+	abs.f32 	%f775, %f75;
+	setp.neu.f32	%p92, %f775, 0f7F800000;
+	@%p92 bra 	BB0_93;
+
+	selp.f32	%f816, 0fFF800000, 0f7F800000, %p3;
+
+BB0_93:
+	mov.f32 	%f767, 0fB5BFBE8E;
+	mov.f32 	%f766, 0fBF317200;
+	mov.f32 	%f765, 0f35BFBE8E;
+	mov.f32 	%f764, 0f3F317200;
+	mov.f32 	%f763, 0f3DAAAABD;
+	mov.f32 	%f762, 0f3C4CAF63;
+	mov.f32 	%f761, 0f3B18F0FE;
+	mov.f32 	%f760, 0f3EE66666;
+	mov.f32 	%f759, 0f00000000;
+	setp.eq.f32	%p93, %f75, 0f3F800000;
+	selp.f32	%f119, 0f3F800000, %f816, %p93;
+	abs.f32 	%f120, %f76;
+	setp.lt.f32	%p94, %f120, 0f00800000;
+	mul.f32 	%f577, %f120, 0f4B800000;
+	selp.f32	%f578, 0fC3170000, 0fC2FE0000, %p94;
+	selp.f32	%f579, %f577, %f120, %p94;
+	mov.b32 	 %r264, %f579;
+	and.b32  	%r265, %r264, 8388607;
+	or.b32  	%r266, %r265, 1065353216;
+	mov.b32 	 %f580, %r266;
+	shr.u32 	%r267, %r264, 23;
+	cvt.rn.f32.u32	%f581, %r267;
+	add.f32 	%f582, %f578, %f581;
+	setp.gt.f32	%p95, %f580, 0f3FB504F3;
+	mul.f32 	%f583, %f580, 0f3F000000;
+	add.f32 	%f584, %f582, 0f3F800000;
+	selp.f32	%f585, %f583, %f580, %p95;
+	selp.f32	%f586, %f584, %f582, %p95;
+	add.f32 	%f587, %f585, 0fBF800000;
+	add.f32 	%f576, %f585, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f575,%f576;
+	// inline asm
+	add.f32 	%f588, %f587, %f587;
+	mul.f32 	%f589, %f575, %f588;
+	mul.f32 	%f590, %f589, %f589;
+	fma.rn.f32 	%f593, %f761, %f590, %f762;
+	fma.rn.f32 	%f595, %f593, %f590, %f763;
+	mul.rn.f32 	%f596, %f595, %f590;
+	mul.rn.f32 	%f597, %f596, %f589;
+	sub.f32 	%f598, %f587, %f589;
+	neg.f32 	%f599, %f589;
+	add.f32 	%f600, %f598, %f598;
+	fma.rn.f32 	%f601, %f599, %f587, %f600;
+	mul.rn.f32 	%f602, %f575, %f601;
+	add.f32 	%f603, %f597, %f589;
+	sub.f32 	%f604, %f589, %f603;
+	add.f32 	%f605, %f597, %f604;
+	add.f32 	%f606, %f602, %f605;
+	add.f32 	%f607, %f603, %f606;
+	sub.f32 	%f608, %f603, %f607;
+	add.f32 	%f609, %f606, %f608;
+	mul.rn.f32 	%f611, %f586, %f764;
+	mul.rn.f32 	%f613, %f586, %f765;
+	add.f32 	%f614, %f611, %f607;
+	sub.f32 	%f615, %f611, %f614;
+	add.f32 	%f616, %f607, %f615;
+	add.f32 	%f617, %f609, %f616;
+	add.f32 	%f618, %f613, %f617;
+	add.f32 	%f619, %f614, %f618;
+	sub.f32 	%f620, %f614, %f619;
+	add.f32 	%f621, %f618, %f620;
+	mul.rn.f32 	%f623, %f760, %f619;
+	neg.f32 	%f624, %f623;
+	fma.rn.f32 	%f625, %f760, %f619, %f624;
+	fma.rn.f32 	%f626, %f760, %f621, %f625;
+	fma.rn.f32 	%f628, %f759, %f619, %f626;
+	add.rn.f32 	%f629, %f623, %f628;
+	neg.f32 	%f630, %f629;
+	add.rn.f32 	%f631, %f623, %f630;
+	add.rn.f32 	%f632, %f631, %f628;
+	mov.b32 	 %r268, %f629;
+	setp.eq.s32	%p96, %r268, 1118925336;
+	add.s32 	%r269, %r268, -1;
+	mov.b32 	 %f633, %r269;
+	add.f32 	%f634, %f632, 0f37000000;
+	selp.f32	%f635, %f633, %f629, %p96;
+	selp.f32	%f121, %f634, %f632, %p96;
+	mul.f32 	%f636, %f635, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f637, %f636;
+	fma.rn.f32 	%f639, %f637, %f766, %f635;
+	fma.rn.f32 	%f641, %f637, %f767, %f639;
+	mul.f32 	%f642, %f641, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f643, %f642;
+	add.f32 	%f644, %f637, 0f00000000;
+	ex2.approx.f32 	%f645, %f644;
+	mul.f32 	%f646, %f643, %f645;
+	setp.lt.f32	%p97, %f635, 0fC2D20000;
+	selp.f32	%f647, 0f00000000, %f646, %p97;
+	setp.gt.f32	%p98, %f635, 0f42D20000;
+	selp.f32	%f817, 0f7F800000, %f647, %p98;
+	setp.eq.f32	%p99, %f817, 0f7F800000;
+	@%p99 bra 	BB0_95;
+
+	fma.rn.f32 	%f817, %f817, %f121, %f817;
+
+BB0_95:
+	setp.lt.f32	%p100, %f76, 0f00000000;
+	and.pred  	%p4, %p100, %p69;
+	mov.b32 	 %r270, %f817;
+	xor.b32  	%r271, %r270, -2147483648;
+	mov.b32 	 %f648, %r271;
+	selp.f32	%f819, %f648, %f817, %p4;
+	setp.eq.f32	%p102, %f76, 0f00000000;
+	@%p102 bra 	BB0_98;
+	bra.uni 	BB0_96;
+
+BB0_98:
+	add.f32 	%f651, %f76, %f76;
+	selp.f32	%f819, %f651, 0f00000000, %p69;
+	bra.uni 	BB0_99;
+
+BB0_96:
+	setp.geu.f32	%p103, %f76, 0f00000000;
+	@%p103 bra 	BB0_99;
+
+	mov.f32 	%f768, 0f3EE66666;
+	cvt.rzi.f32.f32	%f650, %f768;
+	setp.neu.f32	%p104, %f650, 0f3EE66666;
+	selp.f32	%f819, 0f7FFFFFFF, %f819, %p104;
+
+BB0_99:
+	abs.f32 	%f785, %f76;
+	add.f32 	%f652, %f785, 0f3EE66666;
+	mov.b32 	 %r272, %f652;
+	setp.lt.s32	%p106, %r272, 2139095040;
+	@%p106 bra 	BB0_104;
+
+	abs.f32 	%f786, %f76;
+	setp.gtu.f32	%p107, %f786, 0f7F800000;
+	@%p107 bra 	BB0_103;
+	bra.uni 	BB0_101;
+
+BB0_103:
+	add.f32 	%f819, %f76, 0f3EE66666;
+	bra.uni 	BB0_104;
+
+BB0_101:
+	abs.f32 	%f787, %f76;
+	setp.neu.f32	%p108, %f787, 0f7F800000;
+	@%p108 bra 	BB0_104;
+
+	selp.f32	%f819, 0fFF800000, 0f7F800000, %p4;
+
+BB0_104:
+	mov.u32 	%r357, 4;
+	setp.eq.f32	%p109, %f76, 0f3F800000;
+	selp.f32	%f653, 0f3F800000, %f819, %p109;
+	cvt.u64.u32	%rd63, %r3;
+	cvt.u64.u32	%rd62, %r2;
+	mov.u64 	%rd66, image;
+	cvta.global.u64 	%rd61, %rd66;
+	// inline asm
+	call (%rd60), _rt_buffer_get_64, (%rd61, %r99, %r357, %rd62, %rd63, %rd25, %rd25);
+	// inline asm
+	cvt.sat.f32.f32	%f654, %f653;
+	mul.f32 	%f655, %f654, 0f437FFD71;
+	cvt.rzi.u32.f32	%r275, %f655;
+	cvt.sat.f32.f32	%f656, %f119;
+	mul.f32 	%f657, %f656, 0f437FFD71;
+	cvt.rzi.u32.f32	%r276, %f657;
+	cvt.sat.f32.f32	%f658, %f106;
+	mul.f32 	%f659, %f658, 0f437FFD71;
+	cvt.rzi.u32.f32	%r277, %f659;
+	cvt.u16.u32	%rs16, %r275;
+	cvt.u16.u32	%rs17, %r277;
+	cvt.u16.u32	%rs18, %r276;
+	mov.u16 	%rs19, 255;
+	st.v4.u8 	[%rd60], {%rs16, %rs18, %rs17, %rs19};
+	ld.global.u32 	%r387, [imageEnabled];
+
+BB0_105:
+	cvt.u64.u32	%rd16, %r2;
+	cvt.u64.u32	%rd17, %r3;
+	and.b32  	%r278, %r387, 4;
+	setp.eq.s32	%p110, %r278, 0;
+	@%p110 bra 	BB0_109;
+
+	ld.global.u32 	%r279, [additive];
+	setp.eq.s32	%p111, %r279, 0;
+	mov.f32 	%f660, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs20, %f660;}
+
+	// inline asm
+	@%p111 bra 	BB0_108;
+
+	mov.u64 	%rd79, image_HDR;
+	cvta.global.u64 	%rd68, %rd79;
+	mov.u32 	%r283, 8;
+	// inline asm
+	call (%rd67), _rt_buffer_get_64, (%rd68, %r99, %r283, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs27, %rs28, %rs29, %rs30}, [%rd67];
+	// inline asm
+	{  cvt.f32.f16 %f661, %rs27;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f662, %rs28;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f663, %rs29;}
+
+	// inline asm
+	// inline asm
+	call (%rd73), _rt_buffer_get_64, (%rd68, %r99, %r283, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f664, %f74, %f661;
+	add.f32 	%f665, %f75, %f662;
+	add.f32 	%f666, %f76, %f663;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs26, %f666;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs25, %f665;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs24, %f664;}
+
+	// inline asm
+	st.v4.u16 	[%rd73], {%rs24, %rs25, %rs26, %rs20};
+	bra.uni 	BB0_109;
+
+BB0_108:
+	mov.u64 	%rd86, image_HDR;
+	cvta.global.u64 	%rd81, %rd86;
+	mov.u32 	%r285, 8;
+	// inline asm
+	call (%rd80), _rt_buffer_get_64, (%rd81, %r99, %r285, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs33, %f76;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs32, %f75;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs31, %f74;}
+
+	// inline asm
+	st.v4.u16 	[%rd80], {%rs31, %rs32, %rs33, %rs20};
+
+BB0_109:
+	ld.global.u32 	%r286, [additive];
+	setp.eq.s32	%p112, %r286, 0;
+	mov.f32 	%f670, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs34, %f670;}
+
+	// inline asm
+	@%p112 bra 	BB0_111;
+
+	mov.u64 	%rd99, image_RNM0;
+	cvta.global.u64 	%rd88, %rd99;
+	mov.u32 	%r290, 8;
+	// inline asm
+	call (%rd87), _rt_buffer_get_64, (%rd88, %r99, %r290, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd87];
+	// inline asm
+	{  cvt.f32.f16 %f671, %rs41;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f672, %rs42;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f673, %rs43;}
+
+	// inline asm
+	// inline asm
+	call (%rd93), _rt_buffer_get_64, (%rd88, %r99, %r290, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f674, %f77, %f671;
+	add.f32 	%f675, %f78, %f672;
+	add.f32 	%f676, %f79, %f673;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs40, %f676;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs39, %f675;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs38, %f674;}
+
+	// inline asm
+	st.v4.u16 	[%rd93], {%rs38, %rs39, %rs40, %rs34};
+	bra.uni 	BB0_112;
+
+BB0_111:
+	mov.u64 	%rd106, image_RNM0;
+	cvta.global.u64 	%rd101, %rd106;
+	mov.u32 	%r292, 8;
+	// inline asm
+	call (%rd100), _rt_buffer_get_64, (%rd101, %r99, %r292, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs47, %f79;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs46, %f78;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs45, %f77;}
+
+	// inline asm
+	st.v4.u16 	[%rd100], {%rs45, %rs46, %rs47, %rs34};
+
+BB0_112:
+	ld.global.f32 	%f681, [directDir];
+	fma.rn.f32 	%f132, %f681, 0fBF000000, 0f3F000000;
+	ld.global.f32 	%f682, [directDir+4];
+	fma.rn.f32 	%f133, %f682, 0fBF000000, 0f3F000000;
+	ld.global.f32 	%f683, [directDir+8];
+	fma.rn.f32 	%f134, %f683, 0fBF000000, 0f3F000000;
+	ld.global.u32 	%r293, [additive];
+	setp.eq.s32	%p113, %r293, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs48, %f670;}
+
+	// inline asm
+	@%p113 bra 	BB0_114;
+
+	mov.u64 	%rd119, image_RNM1;
+	cvta.global.u64 	%rd108, %rd119;
+	mov.u32 	%r297, 8;
+	// inline asm
+	call (%rd107), _rt_buffer_get_64, (%rd108, %r99, %r297, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs55, %rs56, %rs57, %rs58}, [%rd107];
+	// inline asm
+	{  cvt.f32.f16 %f684, %rs55;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f685, %rs56;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f686, %rs57;}
+
+	// inline asm
+	// inline asm
+	call (%rd113), _rt_buffer_get_64, (%rd108, %r99, %r297, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f687, %f132, %f684;
+	add.f32 	%f688, %f132, %f685;
+	add.f32 	%f689, %f132, %f686;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs54, %f689;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs53, %f688;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs52, %f687;}
+
+	// inline asm
+	st.v4.u16 	[%rd113], {%rs52, %rs53, %rs54, %rs48};
+	bra.uni 	BB0_115;
+
+BB0_114:
+	mov.u64 	%rd126, image_RNM1;
+	cvta.global.u64 	%rd121, %rd126;
+	mov.u32 	%r299, 8;
+	// inline asm
+	call (%rd120), _rt_buffer_get_64, (%rd121, %r99, %r299, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs59, %f132;}
+
+	// inline asm
+	st.v4.u16 	[%rd120], {%rs59, %rs59, %rs59, %rs48};
+
+BB0_115:
+	ld.global.u32 	%r300, [additive];
+	setp.eq.s32	%p114, %r300, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs60, %f670;}
+
+	// inline asm
+	@%p114 bra 	BB0_117;
+
+	mov.u64 	%rd139, image_RNM2;
+	cvta.global.u64 	%rd128, %rd139;
+	mov.u32 	%r304, 8;
+	// inline asm
+	call (%rd127), _rt_buffer_get_64, (%rd128, %r99, %r304, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs67, %rs68, %rs69, %rs70}, [%rd127];
+	// inline asm
+	{  cvt.f32.f16 %f692, %rs67;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f693, %rs68;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f694, %rs69;}
+
+	// inline asm
+	// inline asm
+	call (%rd133), _rt_buffer_get_64, (%rd128, %r99, %r304, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f695, %f133, %f692;
+	add.f32 	%f696, %f133, %f693;
+	add.f32 	%f697, %f133, %f694;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs66, %f697;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs65, %f696;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f695;}
+
+	// inline asm
+	st.v4.u16 	[%rd133], {%rs64, %rs65, %rs66, %rs60};
+	bra.uni 	BB0_118;
+
+BB0_117:
+	mov.u64 	%rd146, image_RNM2;
+	cvta.global.u64 	%rd141, %rd146;
+	mov.u32 	%r306, 8;
+	// inline asm
+	call (%rd140), _rt_buffer_get_64, (%rd141, %r99, %r306, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs71, %f133;}
+
+	// inline asm
+	st.v4.u16 	[%rd140], {%rs71, %rs71, %rs71, %rs60};
+
+BB0_118:
+	ld.global.u32 	%r307, [additive];
+	setp.eq.s32	%p115, %r307, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs72, %f670;}
+
+	// inline asm
+	@%p115 bra 	BB0_120;
+
+	mov.u64 	%rd159, image_RNM3;
+	cvta.global.u64 	%rd148, %rd159;
+	mov.u32 	%r311, 8;
+	// inline asm
+	call (%rd147), _rt_buffer_get_64, (%rd148, %r99, %r311, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs79, %rs80, %rs81, %rs82}, [%rd147];
+	// inline asm
+	{  cvt.f32.f16 %f700, %rs79;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f701, %rs80;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f702, %rs81;}
+
+	// inline asm
+	// inline asm
+	call (%rd153), _rt_buffer_get_64, (%rd148, %r99, %r311, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f703, %f134, %f700;
+	add.f32 	%f704, %f134, %f701;
+	add.f32 	%f705, %f134, %f702;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs78, %f705;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs77, %f704;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs76, %f703;}
+
+	// inline asm
+	st.v4.u16 	[%rd153], {%rs76, %rs77, %rs78, %rs72};
+	bra.uni 	BB0_141;
+
+BB0_120:
+	mov.u64 	%rd166, image_RNM3;
+	cvta.global.u64 	%rd161, %rd166;
+	mov.u32 	%r313, 8;
+	// inline asm
+	call (%rd160), _rt_buffer_get_64, (%rd161, %r99, %r313, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs83, %f134;}
+
+	// inline asm
+	st.v4.u16 	[%rd160], {%rs83, %rs83, %rs83, %rs72};
+
+BB0_141:
+	ret;
+}
+
+