move to self host

1 files changed, 2449 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSunCloudShadowRNM.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSunCloudShadowRNM.ptx
new file mode 100644
index 00000000..5b672018
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSunCloudShadowRNM.ptx
@@ -0,0 +1,2449 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 uvtangent[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 1 .b8 rnd_seeds[1];
+.global .align 4 .b8 directDir[12];
+.global .align 4 .b8 directColor[12];
+.global .align 4 .f32 shadowSpread;
+.global .align 4 .u32 samples;
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .u32 lightCookie;
+.global .align 16 .b8 lightTilingOffset[16];
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo9directDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11directColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12shadowSpreadE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightCookieE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo17lightTilingOffsetE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename9directDirE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11directColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename12shadowSpreadE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename11lightCookieE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename17lightTilingOffsetE[7] = {102, 108, 111, 97, 116, 52, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum9directDirE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11directColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12shadowSpreadE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightCookieE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum17lightTilingOffsetE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic9directDirE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11directColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12shadowSpreadE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightCookieE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic17lightTilingOffsetE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation9directDirE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11directColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12shadowSpreadE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightCookieE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation17lightTilingOffsetE[1];
+.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[32];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<148>;
+	.reg .b16 	%rs<157>;
+	.reg .f32 	%f<1129>;
+	.reg .b32 	%r<412>;
+	.reg .b64 	%rd<283>;
+
+
+	mov.u64 	%rd282, __local_depot0;
+	cvta.local.u64 	%SP, %rd282;
+	ld.global.v2.u32 	{%r107, %r108}, [pixelID];
+	cvt.u64.u32	%rd28, %r107;
+	cvt.u64.u32	%rd29, %r108;
+	mov.u64 	%rd32, uvnormal;
+	cvta.global.u64 	%rd27, %rd32;
+	mov.u32 	%r105, 2;
+	mov.u32 	%r106, 4;
+	mov.u64 	%rd31, 0;
+	// inline asm
+	call (%rd26), _rt_buffer_get_64, (%rd27, %r105, %r106, %rd28, %rd29, %rd31, %rd31);
+	// inline asm
+	ld.u32 	%r1, [%rd26];
+	shr.u32 	%r111, %r1, 16;
+	cvt.u16.u32	%rs1, %r111;
+	and.b16  	%rs6, %rs1, 255;
+	cvt.u16.u32	%rs7, %r1;
+	or.b16  	%rs8, %rs7, %rs6;
+	setp.eq.s16	%p6, %rs8, 0;
+	mov.f32 	%f1085, 0f00000000;
+	mov.f32 	%f1086, %f1085;
+	mov.f32 	%f1087, %f1085;
+	@%p6 bra 	BB0_2;
+
+	ld.u8 	%rs9, [%rd26+1];
+	and.b16  	%rs11, %rs7, 255;
+	cvt.rn.f32.u16	%f188, %rs11;
+	div.rn.f32 	%f189, %f188, 0f437F0000;
+	fma.rn.f32 	%f190, %f189, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f191, %rs9;
+	div.rn.f32 	%f192, %f191, 0f437F0000;
+	fma.rn.f32 	%f193, %f192, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f194, %rs6;
+	div.rn.f32 	%f195, %f194, 0f437F0000;
+	fma.rn.f32 	%f196, %f195, 0f40000000, 0fBF800000;
+	mul.f32 	%f197, %f193, %f193;
+	fma.rn.f32 	%f198, %f190, %f190, %f197;
+	fma.rn.f32 	%f199, %f196, %f196, %f198;
+	sqrt.rn.f32 	%f200, %f199;
+	rcp.rn.f32 	%f201, %f200;
+	mul.f32 	%f1085, %f190, %f201;
+	mul.f32 	%f1086, %f193, %f201;
+	mul.f32 	%f1087, %f196, %f201;
+
+BB0_2:
+	ld.global.v2.u32 	{%r112, %r113}, [pixelID];
+	ld.global.v2.u32 	{%r115, %r116}, [tileInfo];
+	add.s32 	%r2, %r112, %r115;
+	add.s32 	%r3, %r113, %r116;
+	setp.eq.f32	%p7, %f1086, 0f00000000;
+	setp.eq.f32	%p8, %f1085, 0f00000000;
+	and.pred  	%p9, %p8, %p7;
+	setp.eq.f32	%p10, %f1087, 0f00000000;
+	and.pred  	%p11, %p9, %p10;
+	@%p11 bra 	BB0_135;
+	bra.uni 	BB0_3;
+
+BB0_135:
+	ld.global.u32 	%r411, [imageEnabled];
+	and.b32  	%r340, %r411, 1;
+	setp.eq.b32	%p141, %r340, 1;
+	@!%p141 bra 	BB0_137;
+	bra.uni 	BB0_136;
+
+BB0_136:
+	cvt.u64.u32	%rd186, %r2;
+	cvt.u64.u32	%rd187, %r3;
+	mov.u64 	%rd190, image;
+	cvta.global.u64 	%rd185, %rd190;
+	mov.u64 	%rd189, 0;
+	// inline asm
+	call (%rd184), _rt_buffer_get_64, (%rd185, %r105, %r106, %rd186, %rd187, %rd189, %rd189);
+	// inline asm
+	mov.u16 	%rs102, 0;
+	st.v4.u8 	[%rd184], {%rs102, %rs102, %rs102, %rs102};
+	ld.global.u32 	%r411, [imageEnabled];
+
+BB0_137:
+	and.b32  	%r343, %r411, 8;
+	setp.eq.s32	%p142, %r343, 0;
+	@%p142 bra 	BB0_139;
+
+	cvt.u64.u32	%rd194, %r3;
+	cvt.u64.u32	%rd193, %r2;
+	mov.u64 	%rd197, image_Mask;
+	cvta.global.u64 	%rd192, %rd197;
+	mov.u64 	%rd196, 0;
+	// inline asm
+	call (%rd191), _rt_buffer_get_64, (%rd192, %r105, %r105, %rd193, %rd194, %rd196, %rd196);
+	// inline asm
+	mov.f32 	%f988, 0f00000000;
+	cvt.rzi.u32.f32	%r346, %f988;
+	cvt.u16.u32	%rs103, %r346;
+	mov.u16 	%rs104, 0;
+	st.v2.u8 	[%rd191], {%rs103, %rs104};
+	ld.global.u32 	%r411, [imageEnabled];
+
+BB0_139:
+	cvt.u64.u32	%rd24, %r2;
+	cvt.u64.u32	%rd25, %r3;
+	and.b32  	%r347, %r411, 4;
+	setp.eq.s32	%p143, %r347, 0;
+	@%p143 bra 	BB0_143;
+
+	ld.global.u32 	%r348, [additive];
+	setp.eq.s32	%p144, %r348, 0;
+	@%p144 bra 	BB0_142;
+
+	mov.u64 	%rd210, image_HDR;
+	cvta.global.u64 	%rd199, %rd210;
+	mov.u32 	%r352, 8;
+	mov.u64 	%rd209, 0;
+	// inline asm
+	call (%rd198), _rt_buffer_get_64, (%rd199, %r105, %r352, %rd24, %rd25, %rd209, %rd209);
+	// inline asm
+	ld.v4.u16 	{%rs111, %rs112, %rs113, %rs114}, [%rd198];
+	// inline asm
+	{  cvt.f32.f16 %f989, %rs111;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f990, %rs112;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f991, %rs113;}
+
+	// inline asm
+	// inline asm
+	call (%rd204), _rt_buffer_get_64, (%rd199, %r105, %r352, %rd24, %rd25, %rd209, %rd209);
+	// inline asm
+	add.f32 	%f992, %f989, 0f00000000;
+	add.f32 	%f993, %f990, 0f00000000;
+	add.f32 	%f994, %f991, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs110, %f994;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs109, %f993;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs108, %f992;}
+
+	// inline asm
+	mov.u16 	%rs115, 0;
+	st.v4.u16 	[%rd204], {%rs108, %rs109, %rs110, %rs115};
+	bra.uni 	BB0_143;
+
+BB0_3:
+	ld.global.f32 	%f8, [directDir+4];
+	ld.global.f32 	%f9, [directDir+8];
+	ld.global.f32 	%f7, [directDir];
+	ld.global.v2.u32 	{%r124, %r125}, [pixelID];
+	cvt.u64.u32	%rd35, %r124;
+	cvt.u64.u32	%rd36, %r125;
+	mov.u64 	%rd45, uvpos;
+	cvta.global.u64 	%rd34, %rd45;
+	mov.u32 	%r121, 12;
+	// inline asm
+	call (%rd33), _rt_buffer_get_64, (%rd34, %r105, %r121, %rd35, %rd36, %rd31, %rd31);
+	// inline asm
+	ld.f32 	%f12, [%rd33+8];
+	ld.f32 	%f11, [%rd33+4];
+	ld.f32 	%f10, [%rd33];
+	mul.f32 	%f203, %f10, 0f3456BF95;
+	mul.f32 	%f204, %f11, 0f3456BF95;
+	mul.f32 	%f205, %f12, 0f3456BF95;
+	abs.f32 	%f206, %f1085;
+	div.rn.f32 	%f207, %f203, %f206;
+	abs.f32 	%f208, %f1086;
+	div.rn.f32 	%f209, %f204, %f208;
+	abs.f32 	%f210, %f1087;
+	div.rn.f32 	%f211, %f205, %f210;
+	abs.f32 	%f212, %f207;
+	abs.f32 	%f213, %f209;
+	abs.f32 	%f214, %f211;
+	mov.f32 	%f215, 0f38D1B717;
+	max.f32 	%f216, %f212, %f215;
+	max.f32 	%f217, %f213, %f215;
+	max.f32 	%f218, %f214, %f215;
+	fma.rn.f32 	%f13, %f1085, %f216, %f10;
+	fma.rn.f32 	%f14, %f1086, %f217, %f11;
+	fma.rn.f32 	%f15, %f1087, %f218, %f12;
+	abs.f32 	%f219, %f7;
+	abs.f32 	%f220, %f9;
+	setp.gt.f32	%p12, %f219, %f220;
+	neg.f32 	%f221, %f8;
+	neg.f32 	%f222, %f9;
+	selp.f32	%f223, %f221, 0f00000000, %p12;
+	selp.f32	%f224, %f7, %f222, %p12;
+	selp.f32	%f225, 0f00000000, %f8, %p12;
+	mul.f32 	%f226, %f224, %f224;
+	fma.rn.f32 	%f227, %f223, %f223, %f226;
+	fma.rn.f32 	%f228, %f225, %f225, %f227;
+	sqrt.rn.f32 	%f229, %f228;
+	rcp.rn.f32 	%f230, %f229;
+	mul.f32 	%f16, %f223, %f230;
+	mul.f32 	%f17, %f224, %f230;
+	mul.f32 	%f18, %f225, %f230;
+	mul.f32 	%f231, %f9, %f17;
+	mul.f32 	%f232, %f8, %f18;
+	sub.f32 	%f19, %f231, %f232;
+	mul.f32 	%f233, %f7, %f18;
+	mul.f32 	%f234, %f9, %f16;
+	sub.f32 	%f20, %f233, %f234;
+	mul.f32 	%f235, %f8, %f16;
+	mul.f32 	%f236, %f7, %f17;
+	sub.f32 	%f21, %f235, %f236;
+	ld.global.v2.u32 	{%r128, %r129}, [pixelID];
+	cvt.u64.u32	%rd41, %r128;
+	cvt.u64.u32	%rd42, %r129;
+	mov.u64 	%rd46, rnd_seeds;
+	cvta.global.u64 	%rd40, %rd46;
+	// inline asm
+	call (%rd39), _rt_buffer_get_64, (%rd40, %r105, %r106, %rd41, %rd42, %rd31, %rd31);
+	// inline asm
+	ld.global.u32 	%r380, [samples];
+	mov.f32 	%f1102, 0f00000000;
+	setp.lt.s32	%p13, %r380, 1;
+	@%p13 bra 	BB0_55;
+
+	cvt.rn.f32.s32	%f238, %r380;
+	rcp.rn.f32 	%f22, %f238;
+	ld.u32 	%r406, [%rd39];
+	mul.f32 	%f23, %f13, 0f3456BF95;
+	mul.f32 	%f24, %f14, 0f3456BF95;
+	mul.f32 	%f25, %f15, 0f3456BF95;
+	mov.f32 	%f1102, 0f00000000;
+	mov.u32 	%r381, 0;
+	abs.f32 	%f239, %f24;
+	abs.f32 	%f240, %f23;
+	max.f32 	%f241, %f240, %f239;
+	abs.f32 	%f242, %f25;
+	max.f32 	%f243, %f241, %f242;
+
+BB0_5:
+	setp.lt.s32	%p14, %r380, 1;
+	@%p14 bra 	BB0_54;
+
+	cvt.rn.f32.s32	%f27, %r381;
+	max.f32 	%f28, %f243, %f215;
+	mov.u32 	%r383, 0;
+
+BB0_7:
+	mad.lo.s32 	%r134, %r406, 1664525, 1013904223;
+	and.b32  	%r135, %r134, 16777215;
+	cvt.rn.f32.u32	%f245, %r135;
+	fma.rn.f32 	%f246, %f245, 0f33800000, %f27;
+	mul.f32 	%f247, %f22, %f246;
+	mad.lo.s32 	%r406, %r134, 1664525, 1013904223;
+	and.b32  	%r136, %r406, 16777215;
+	cvt.rn.f32.u32	%f248, %r136;
+	cvt.rn.f32.s32	%f249, %r383;
+	fma.rn.f32 	%f250, %f248, 0f33800000, %f249;
+	mul.f32 	%f251, %f22, %f250;
+	sqrt.rn.f32 	%f30, %f247;
+	mul.f32 	%f1096, %f251, 0f40C90FDB;
+	abs.f32 	%f32, %f1096;
+	setp.neu.f32	%p15, %f32, 0f7F800000;
+	mov.f32 	%f1090, %f1096;
+	@%p15 bra 	BB0_9;
+
+	mov.f32 	%f252, 0f00000000;
+	mul.rn.f32 	%f1090, %f1096, %f252;
+
+BB0_9:
+	mul.f32 	%f253, %f1090, 0f3F22F983;
+	cvt.rni.s32.f32	%r394, %f253;
+	cvt.rn.f32.s32	%f254, %r394;
+	neg.f32 	%f255, %f254;
+	mov.f32 	%f256, 0f3FC90FDA;
+	fma.rn.f32 	%f257, %f255, %f256, %f1090;
+	mov.f32 	%f258, 0f33A22168;
+	fma.rn.f32 	%f259, %f255, %f258, %f257;
+	mov.f32 	%f260, 0f27C234C5;
+	fma.rn.f32 	%f1091, %f255, %f260, %f259;
+	abs.f32 	%f261, %f1090;
+	setp.leu.f32	%p16, %f261, 0f47CE4780;
+	@%p16 bra 	BB0_20;
+
+	add.u64 	%rd48, %SP, 4;
+	cvta.to.local.u64 	%rd3, %rd48;
+	mov.b32 	 %r13, %f1090;
+	shr.u32 	%r14, %r13, 23;
+	shl.b32 	%r139, %r13, 8;
+	or.b32  	%r15, %r139, -2147483648;
+	mov.u32 	%r385, 0;
+	mov.u64 	%rd279, 0;
+	mov.u64 	%rd278, %rd3;
+	mov.u32 	%r386, %r385;
+
+BB0_11:
+	.pragma "nounroll";
+	shl.b64 	%rd49, %rd279, 2;
+	mov.u64 	%rd50, __cudart_i2opi_f;
+	add.s64 	%rd51, %rd50, %rd49;
+	ld.const.u32 	%r142, [%rd51];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r140, %r142, %r15, %r386;
+	madc.hi.u32     %r386, %r142, %r15,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd278], %r140;
+	add.s32 	%r385, %r385, 1;
+	cvt.s64.s32	%rd279, %r385;
+	mul.wide.s32 	%rd54, %r385, 4;
+	add.s64 	%rd278, %rd3, %rd54;
+	setp.ne.s32	%p17, %r385, 6;
+	@%p17 bra 	BB0_11;
+
+	and.b32  	%r145, %r14, 255;
+	add.s32 	%r146, %r145, -128;
+	shr.u32 	%r147, %r146, 5;
+	and.b32  	%r20, %r13, -2147483648;
+	cvta.to.local.u64 	%rd56, %rd48;
+	st.local.u32 	[%rd56+24], %r386;
+	mov.u32 	%r148, 6;
+	sub.s32 	%r149, %r148, %r147;
+	mul.wide.s32 	%rd57, %r149, 4;
+	add.s64 	%rd8, %rd56, %rd57;
+	ld.local.u32 	%r387, [%rd8];
+	ld.local.u32 	%r388, [%rd8+-4];
+	and.b32  	%r23, %r14, 31;
+	setp.eq.s32	%p18, %r23, 0;
+	@%p18 bra 	BB0_14;
+
+	mov.u32 	%r150, 32;
+	sub.s32 	%r151, %r150, %r23;
+	shr.u32 	%r152, %r388, %r151;
+	shl.b32 	%r153, %r387, %r23;
+	add.s32 	%r387, %r152, %r153;
+	ld.local.u32 	%r154, [%rd8+-8];
+	shr.u32 	%r155, %r154, %r151;
+	shl.b32 	%r156, %r388, %r23;
+	add.s32 	%r388, %r155, %r156;
+
+BB0_14:
+	shr.u32 	%r157, %r388, 30;
+	shl.b32 	%r158, %r387, 2;
+	add.s32 	%r389, %r157, %r158;
+	shl.b32 	%r29, %r388, 2;
+	shr.u32 	%r159, %r389, 31;
+	shr.u32 	%r160, %r387, 30;
+	add.s32 	%r30, %r159, %r160;
+	setp.eq.s32	%p19, %r159, 0;
+	@%p19 bra 	BB0_15;
+	bra.uni 	BB0_16;
+
+BB0_15:
+	mov.u32 	%r390, %r20;
+	mov.u32 	%r391, %r29;
+	bra.uni 	BB0_17;
+
+BB0_16:
+	not.b32 	%r161, %r389;
+	neg.s32 	%r391, %r29;
+	setp.eq.s32	%p20, %r29, 0;
+	selp.u32	%r162, 1, 0, %p20;
+	add.s32 	%r389, %r162, %r161;
+	xor.b32  	%r390, %r20, -2147483648;
+
+BB0_17:
+	clz.b32 	%r393, %r389;
+	setp.eq.s32	%p21, %r393, 0;
+	shl.b32 	%r163, %r389, %r393;
+	mov.u32 	%r164, 32;
+	sub.s32 	%r165, %r164, %r393;
+	shr.u32 	%r166, %r391, %r165;
+	add.s32 	%r167, %r166, %r163;
+	selp.b32	%r38, %r389, %r167, %p21;
+	mov.u32 	%r168, -921707870;
+	mul.hi.u32 	%r392, %r38, %r168;
+	setp.eq.s32	%p22, %r20, 0;
+	neg.s32 	%r169, %r30;
+	selp.b32	%r394, %r30, %r169, %p22;
+	setp.lt.s32	%p23, %r392, 1;
+	@%p23 bra 	BB0_19;
+
+	mul.lo.s32 	%r170, %r38, -921707870;
+	shr.u32 	%r171, %r170, 31;
+	shl.b32 	%r172, %r392, 1;
+	add.s32 	%r392, %r171, %r172;
+	add.s32 	%r393, %r393, 1;
+
+BB0_19:
+	mov.u32 	%r173, 126;
+	sub.s32 	%r174, %r173, %r393;
+	shl.b32 	%r175, %r174, 23;
+	add.s32 	%r176, %r392, 1;
+	shr.u32 	%r177, %r176, 7;
+	add.s32 	%r178, %r177, 1;
+	shr.u32 	%r179, %r178, 1;
+	add.s32 	%r180, %r179, %r175;
+	or.b32  	%r181, %r180, %r390;
+	mov.b32 	 %f1091, %r181;
+
+BB0_20:
+	mul.rn.f32 	%f38, %f1091, %f1091;
+	add.s32 	%r46, %r394, 1;
+	and.b32  	%r47, %r46, 1;
+	setp.eq.s32	%p24, %r47, 0;
+	@%p24 bra 	BB0_22;
+	bra.uni 	BB0_21;
+
+BB0_22:
+	mov.f32 	%f264, 0f3C08839E;
+	mov.f32 	%f265, 0fB94CA1F9;
+	fma.rn.f32 	%f1092, %f265, %f38, %f264;
+	bra.uni 	BB0_23;
+
+BB0_21:
+	mov.f32 	%f262, 0fBAB6061A;
+	mov.f32 	%f263, 0f37CCF5CE;
+	fma.rn.f32 	%f1092, %f263, %f38, %f262;
+
+BB0_23:
+	@%p24 bra 	BB0_25;
+	bra.uni 	BB0_24;
+
+BB0_25:
+	mov.f32 	%f269, 0fBE2AAAA3;
+	fma.rn.f32 	%f270, %f1092, %f38, %f269;
+	mov.f32 	%f271, 0f00000000;
+	fma.rn.f32 	%f1093, %f270, %f38, %f271;
+	bra.uni 	BB0_26;
+
+BB0_24:
+	mov.f32 	%f266, 0f3D2AAAA5;
+	fma.rn.f32 	%f267, %f1092, %f38, %f266;
+	mov.f32 	%f268, 0fBF000000;
+	fma.rn.f32 	%f1093, %f267, %f38, %f268;
+
+BB0_26:
+	fma.rn.f32 	%f1094, %f1093, %f1091, %f1091;
+	@%p24 bra 	BB0_28;
+
+	mov.f32 	%f272, 0f3F800000;
+	fma.rn.f32 	%f1094, %f1093, %f38, %f272;
+
+BB0_28:
+	and.b32  	%r182, %r46, 2;
+	setp.eq.s32	%p27, %r182, 0;
+	@%p27 bra 	BB0_30;
+
+	mov.f32 	%f273, 0f00000000;
+	mov.f32 	%f274, 0fBF800000;
+	fma.rn.f32 	%f1094, %f1094, %f274, %f273;
+
+BB0_30:
+	@%p15 bra 	BB0_32;
+
+	mov.f32 	%f275, 0f00000000;
+	mul.rn.f32 	%f1096, %f1096, %f275;
+
+BB0_32:
+	mul.f32 	%f276, %f1096, 0f3F22F983;
+	cvt.rni.s32.f32	%r404, %f276;
+	cvt.rn.f32.s32	%f277, %r404;
+	neg.f32 	%f278, %f277;
+	fma.rn.f32 	%f280, %f278, %f256, %f1096;
+	fma.rn.f32 	%f282, %f278, %f258, %f280;
+	fma.rn.f32 	%f1097, %f278, %f260, %f282;
+	abs.f32 	%f284, %f1096;
+	setp.leu.f32	%p29, %f284, 0f47CE4780;
+	@%p29 bra 	BB0_43;
+
+	add.u64 	%rd59, %SP, 4;
+	cvta.to.local.u64 	%rd9, %rd59;
+	mov.b32 	 %r49, %f1096;
+	shr.u32 	%r50, %r49, 23;
+	shl.b32 	%r185, %r49, 8;
+	or.b32  	%r51, %r185, -2147483648;
+	mov.u32 	%r395, 0;
+	mov.u64 	%rd280, %rd9;
+	mov.u64 	%rd281, %rd31;
+	mov.u32 	%r396, %r395;
+
+BB0_34:
+	.pragma "nounroll";
+	shl.b64 	%rd60, %rd281, 2;
+	mov.u64 	%rd61, __cudart_i2opi_f;
+	add.s64 	%rd62, %rd61, %rd60;
+	ld.const.u32 	%r188, [%rd62];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r186, %r188, %r51, %r396;
+	madc.hi.u32     %r396, %r188, %r51,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd280], %r186;
+	add.s32 	%r395, %r395, 1;
+	cvt.s64.s32	%rd281, %r395;
+	mul.wide.s32 	%rd63, %r395, 4;
+	add.s64 	%rd280, %rd9, %rd63;
+	setp.ne.s32	%p30, %r395, 6;
+	@%p30 bra 	BB0_34;
+
+	and.b32  	%r191, %r50, 255;
+	add.s32 	%r192, %r191, -128;
+	shr.u32 	%r193, %r192, 5;
+	and.b32  	%r56, %r49, -2147483648;
+	cvta.to.local.u64 	%rd65, %rd59;
+	st.local.u32 	[%rd65+24], %r396;
+	mov.u32 	%r194, 6;
+	sub.s32 	%r195, %r194, %r193;
+	mul.wide.s32 	%rd66, %r195, 4;
+	add.s64 	%rd15, %rd65, %rd66;
+	ld.local.u32 	%r397, [%rd15];
+	ld.local.u32 	%r398, [%rd15+-4];
+	and.b32  	%r59, %r50, 31;
+	setp.eq.s32	%p31, %r59, 0;
+	@%p31 bra 	BB0_37;
+
+	mov.u32 	%r196, 32;
+	sub.s32 	%r197, %r196, %r59;
+	shr.u32 	%r198, %r398, %r197;
+	shl.b32 	%r199, %r397, %r59;
+	add.s32 	%r397, %r198, %r199;
+	ld.local.u32 	%r200, [%rd15+-8];
+	shr.u32 	%r201, %r200, %r197;
+	shl.b32 	%r202, %r398, %r59;
+	add.s32 	%r398, %r201, %r202;
+
+BB0_37:
+	shr.u32 	%r203, %r398, 30;
+	shl.b32 	%r204, %r397, 2;
+	add.s32 	%r399, %r203, %r204;
+	shl.b32 	%r65, %r398, 2;
+	shr.u32 	%r205, %r399, 31;
+	shr.u32 	%r206, %r397, 30;
+	add.s32 	%r66, %r205, %r206;
+	setp.eq.s32	%p32, %r205, 0;
+	@%p32 bra 	BB0_38;
+	bra.uni 	BB0_39;
+
+BB0_38:
+	mov.u32 	%r400, %r56;
+	mov.u32 	%r401, %r65;
+	bra.uni 	BB0_40;
+
+BB0_39:
+	not.b32 	%r207, %r399;
+	neg.s32 	%r401, %r65;
+	setp.eq.s32	%p33, %r65, 0;
+	selp.u32	%r208, 1, 0, %p33;
+	add.s32 	%r399, %r208, %r207;
+	xor.b32  	%r400, %r56, -2147483648;
+
+BB0_40:
+	clz.b32 	%r403, %r399;
+	setp.eq.s32	%p34, %r403, 0;
+	shl.b32 	%r209, %r399, %r403;
+	mov.u32 	%r210, 32;
+	sub.s32 	%r211, %r210, %r403;
+	shr.u32 	%r212, %r401, %r211;
+	add.s32 	%r213, %r212, %r209;
+	selp.b32	%r74, %r399, %r213, %p34;
+	mov.u32 	%r214, -921707870;
+	mul.hi.u32 	%r402, %r74, %r214;
+	setp.eq.s32	%p35, %r56, 0;
+	neg.s32 	%r215, %r66;
+	selp.b32	%r404, %r66, %r215, %p35;
+	setp.lt.s32	%p36, %r402, 1;
+	@%p36 bra 	BB0_42;
+
+	mul.lo.s32 	%r216, %r74, -921707870;
+	shr.u32 	%r217, %r216, 31;
+	shl.b32 	%r218, %r402, 1;
+	add.s32 	%r402, %r217, %r218;
+	add.s32 	%r403, %r403, 1;
+
+BB0_42:
+	mov.u32 	%r219, 126;
+	sub.s32 	%r220, %r219, %r403;
+	shl.b32 	%r221, %r220, 23;
+	add.s32 	%r222, %r402, 1;
+	shr.u32 	%r223, %r222, 7;
+	add.s32 	%r224, %r223, 1;
+	shr.u32 	%r225, %r224, 1;
+	add.s32 	%r226, %r225, %r221;
+	or.b32  	%r227, %r226, %r400;
+	mov.b32 	 %f1097, %r227;
+
+BB0_43:
+	mul.rn.f32 	%f55, %f1097, %f1097;
+	and.b32  	%r82, %r404, 1;
+	setp.eq.s32	%p37, %r82, 0;
+	@%p37 bra 	BB0_45;
+	bra.uni 	BB0_44;
+
+BB0_45:
+	mov.f32 	%f287, 0f3C08839E;
+	mov.f32 	%f288, 0fB94CA1F9;
+	fma.rn.f32 	%f1098, %f288, %f55, %f287;
+	bra.uni 	BB0_46;
+
+BB0_44:
+	mov.f32 	%f285, 0fBAB6061A;
+	mov.f32 	%f286, 0f37CCF5CE;
+	fma.rn.f32 	%f1098, %f286, %f55, %f285;
+
+BB0_46:
+	@%p37 bra 	BB0_48;
+	bra.uni 	BB0_47;
+
+BB0_48:
+	mov.f32 	%f292, 0fBE2AAAA3;
+	fma.rn.f32 	%f293, %f1098, %f55, %f292;
+	mov.f32 	%f294, 0f00000000;
+	fma.rn.f32 	%f1099, %f293, %f55, %f294;
+	bra.uni 	BB0_49;
+
+BB0_47:
+	mov.f32 	%f289, 0f3D2AAAA5;
+	fma.rn.f32 	%f290, %f1098, %f55, %f289;
+	mov.f32 	%f291, 0fBF000000;
+	fma.rn.f32 	%f1099, %f290, %f55, %f291;
+
+BB0_49:
+	fma.rn.f32 	%f1100, %f1099, %f1097, %f1097;
+	@%p37 bra 	BB0_51;
+
+	mov.f32 	%f295, 0f3F800000;
+	fma.rn.f32 	%f1100, %f1099, %f55, %f295;
+
+BB0_51:
+	and.b32  	%r228, %r404, 2;
+	setp.eq.s32	%p40, %r228, 0;
+	@%p40 bra 	BB0_53;
+
+	mov.f32 	%f296, 0f00000000;
+	mov.f32 	%f297, 0fBF800000;
+	fma.rn.f32 	%f1100, %f1100, %f297, %f296;
+
+BB0_53:
+	mul.f32 	%f306, %f30, %f1094;
+	add.u64 	%rd67, %SP, 0;
+	cvta.to.local.u64 	%rd68, %rd67;
+	mul.f32 	%f307, %f306, %f306;
+	mov.f32 	%f308, 0f3F800000;
+	sub.f32 	%f309, %f308, %f307;
+	mul.f32 	%f310, %f30, %f1100;
+	mul.f32 	%f311, %f310, %f310;
+	sub.f32 	%f312, %f309, %f311;
+	mov.f32 	%f313, 0f00000000;
+	max.f32 	%f314, %f313, %f312;
+	sqrt.rn.f32 	%f315, %f314;
+	mul.f32 	%f316, %f16, %f310;
+	mul.f32 	%f317, %f17, %f310;
+	mul.f32 	%f318, %f18, %f310;
+	fma.rn.f32 	%f319, %f19, %f306, %f316;
+	fma.rn.f32 	%f320, %f20, %f306, %f317;
+	fma.rn.f32 	%f321, %f21, %f306, %f318;
+	fma.rn.f32 	%f322, %f7, %f315, %f319;
+	fma.rn.f32 	%f323, %f8, %f315, %f320;
+	fma.rn.f32 	%f324, %f9, %f315, %f321;
+	add.f32 	%f325, %f7, %f322;
+	add.f32 	%f326, %f8, %f323;
+	add.f32 	%f327, %f9, %f324;
+	ld.global.f32 	%f328, [shadowSpread];
+	mul.f32 	%f329, %f328, %f325;
+	mul.f32 	%f330, %f328, %f326;
+	mul.f32 	%f331, %f328, %f327;
+	sub.f32 	%f332, %f329, %f7;
+	sub.f32 	%f333, %f330, %f8;
+	sub.f32 	%f334, %f331, %f9;
+	mul.f32 	%f335, %f333, %f333;
+	fma.rn.f32 	%f336, %f332, %f332, %f335;
+	fma.rn.f32 	%f337, %f334, %f334, %f336;
+	sqrt.rn.f32 	%f338, %f337;
+	rcp.rn.f32 	%f339, %f338;
+	mul.f32 	%f301, %f339, %f332;
+	mul.f32 	%f302, %f339, %f333;
+	mul.f32 	%f303, %f339, %f334;
+	ld.global.u32 	%r232, [imageEnabled];
+	and.b32  	%r233, %r232, 32;
+	setp.eq.s32	%p41, %r233, 0;
+	selp.f32	%f340, 0f3F800000, 0f41200000, %p41;
+	mul.f32 	%f304, %f340, %f28;
+	mov.u32 	%r234, 1065353216;
+	st.local.u32 	[%rd68], %r234;
+	ld.global.u32 	%r229, [root];
+	mov.u32 	%r230, 1;
+	mov.f32 	%f305, 0f6C4ECB8F;
+	// inline asm
+	call _rt_trace_64, (%r229, %f13, %f14, %f15, %f301, %f302, %f303, %r230, %f304, %f305, %rd67, %r106);
+	// inline asm
+	ld.local.f32 	%f341, [%rd68];
+	add.f32 	%f1102, %f1102, %f341;
+	ld.global.u32 	%r380, [samples];
+	add.s32 	%r383, %r383, 1;
+	setp.lt.s32	%p42, %r383, %r380;
+	@%p42 bra 	BB0_7;
+
+BB0_54:
+	add.s32 	%r381, %r381, 1;
+	setp.lt.s32	%p43, %r381, %r380;
+	@%p43 bra 	BB0_5;
+
+BB0_55:
+	mul.f32 	%f343, %f1087, %f9;
+	mul.f32 	%f344, %f1086, %f8;
+	neg.f32 	%f345, %f344;
+	mul.f32 	%f346, %f1085, %f7;
+	sub.f32 	%f347, %f345, %f346;
+	sub.f32 	%f70, %f347, %f343;
+	setp.eq.s32	%p44, %r380, 0;
+	mov.f32 	%f1104, 0f3F800000;
+	@%p44 bra 	BB0_57;
+
+	mul.lo.s32 	%r235, %r380, %r380;
+	cvt.rn.f32.s32	%f348, %r235;
+	div.rn.f32 	%f1104, %f1102, %f348;
+
+BB0_57:
+	mul.f32 	%f359, %f11, %f20;
+	fma.rn.f32 	%f360, %f10, %f19, %f359;
+	fma.rn.f32 	%f361, %f12, %f21, %f360;
+	ld.global.v4.f32 	{%f362, %f363, %f364, %f365}, [lightTilingOffset];
+	fma.rn.f32 	%f353, %f361, %f362, %f364;
+	mul.f32 	%f368, %f11, %f17;
+	fma.rn.f32 	%f369, %f10, %f16, %f368;
+	fma.rn.f32 	%f370, %f12, %f18, %f369;
+	fma.rn.f32 	%f354, %f370, %f363, %f365;
+	ld.global.u32 	%r236, [lightCookie];
+	mov.f32 	%f356, 0f00000000;
+	// inline asm
+	call (%f349, %f350, %f351, %f352), _rt_texture_get_f_id, (%r236, %r105, %f353, %f354, %f356, %f356);
+	// inline asm
+	mul.f32 	%f73, %f1104, %f349;
+	ld.global.f32 	%f373, [directColor];
+	mul.f32 	%f74, %f373, %f73;
+	ld.global.f32 	%f374, [directColor+4];
+	mul.f32 	%f75, %f374, %f73;
+	ld.global.f32 	%f375, [directColor+8];
+	mul.f32 	%f76, %f73, %f375;
+	cvt.sat.f32.f32	%f376, %f70;
+	mul.f32 	%f77, %f74, %f376;
+	mul.f32 	%f78, %f75, %f376;
+	mul.f32 	%f79, %f76, %f376;
+	fma.rn.f32 	%f377, %f70, 0f3F000000, 0f3F000000;
+	cvt.sat.f32.f32	%f378, %f377;
+	add.f32 	%f80, %f378, %f378;
+	mov.f32 	%f382, 0f41A00000;
+	abs.f32 	%f82, %f80;
+	setp.lt.f32	%p45, %f82, 0f00800000;
+	mul.f32 	%f384, %f82, 0f4B800000;
+	selp.f32	%f385, 0fC3170000, 0fC2FE0000, %p45;
+	selp.f32	%f386, %f384, %f82, %p45;
+	mov.b32 	 %r238, %f386;
+	and.b32  	%r239, %r238, 8388607;
+	or.b32  	%r240, %r239, 1065353216;
+	mov.b32 	 %f387, %r240;
+	shr.u32 	%r241, %r238, 23;
+	cvt.rn.f32.u32	%f388, %r241;
+	add.f32 	%f389, %f385, %f388;
+	setp.gt.f32	%p46, %f387, 0f3FB504F3;
+	mul.f32 	%f390, %f387, 0f3F000000;
+	add.f32 	%f391, %f389, 0f3F800000;
+	selp.f32	%f392, %f390, %f387, %p46;
+	selp.f32	%f393, %f391, %f389, %p46;
+	add.f32 	%f394, %f392, 0fBF800000;
+	add.f32 	%f358, %f392, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f357,%f358;
+	// inline asm
+	add.f32 	%f395, %f394, %f394;
+	mul.f32 	%f396, %f357, %f395;
+	mul.f32 	%f397, %f396, %f396;
+	mov.f32 	%f398, 0f3C4CAF63;
+	mov.f32 	%f399, 0f3B18F0FE;
+	fma.rn.f32 	%f400, %f399, %f397, %f398;
+	mov.f32 	%f401, 0f3DAAAABD;
+	fma.rn.f32 	%f402, %f400, %f397, %f401;
+	mul.rn.f32 	%f403, %f402, %f397;
+	mul.rn.f32 	%f404, %f403, %f396;
+	sub.f32 	%f405, %f394, %f396;
+	neg.f32 	%f406, %f396;
+	add.f32 	%f407, %f405, %f405;
+	fma.rn.f32 	%f408, %f406, %f394, %f407;
+	mul.rn.f32 	%f409, %f357, %f408;
+	add.f32 	%f410, %f404, %f396;
+	sub.f32 	%f411, %f396, %f410;
+	add.f32 	%f412, %f404, %f411;
+	add.f32 	%f413, %f409, %f412;
+	add.f32 	%f414, %f410, %f413;
+	sub.f32 	%f415, %f410, %f414;
+	add.f32 	%f416, %f413, %f415;
+	mov.f32 	%f417, 0f3F317200;
+	mul.rn.f32 	%f418, %f393, %f417;
+	mov.f32 	%f419, 0f35BFBE8E;
+	mul.rn.f32 	%f420, %f393, %f419;
+	add.f32 	%f421, %f418, %f414;
+	sub.f32 	%f422, %f418, %f421;
+	add.f32 	%f423, %f414, %f422;
+	add.f32 	%f424, %f416, %f423;
+	add.f32 	%f425, %f420, %f424;
+	add.f32 	%f426, %f421, %f425;
+	sub.f32 	%f427, %f421, %f426;
+	add.f32 	%f428, %f425, %f427;
+	mul.rn.f32 	%f429, %f382, %f426;
+	neg.f32 	%f430, %f429;
+	fma.rn.f32 	%f431, %f382, %f426, %f430;
+	fma.rn.f32 	%f432, %f382, %f428, %f431;
+	fma.rn.f32 	%f433, %f356, %f426, %f432;
+	add.rn.f32 	%f434, %f429, %f433;
+	neg.f32 	%f435, %f434;
+	add.rn.f32 	%f436, %f429, %f435;
+	add.rn.f32 	%f437, %f436, %f433;
+	mov.b32 	 %r242, %f434;
+	setp.eq.s32	%p47, %r242, 1118925336;
+	add.s32 	%r243, %r242, -1;
+	mov.b32 	 %f438, %r243;
+	add.f32 	%f439, %f437, 0f37000000;
+	selp.f32	%f440, %f438, %f434, %p47;
+	selp.f32	%f83, %f439, %f437, %p47;
+	mul.f32 	%f441, %f440, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f442, %f441;
+	mov.f32 	%f443, 0fBF317200;
+	fma.rn.f32 	%f444, %f442, %f443, %f440;
+	mov.f32 	%f445, 0fB5BFBE8E;
+	fma.rn.f32 	%f446, %f442, %f445, %f444;
+	mul.f32 	%f447, %f446, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f448, %f447;
+	add.f32 	%f449, %f442, 0f00000000;
+	ex2.approx.f32 	%f450, %f449;
+	mul.f32 	%f451, %f448, %f450;
+	setp.lt.f32	%p48, %f440, 0fC2D20000;
+	selp.f32	%f452, 0f00000000, %f451, %p48;
+	setp.gt.f32	%p49, %f440, 0f42D20000;
+	selp.f32	%f1105, 0f7F800000, %f452, %p49;
+	setp.eq.f32	%p50, %f1105, 0f7F800000;
+	@%p50 bra 	BB0_59;
+
+	fma.rn.f32 	%f1105, %f1105, %f83, %f1105;
+
+BB0_59:
+	mov.f32 	%f1022, 0f41200000;
+	cvt.rzi.f32.f32	%f1021, %f1022;
+	add.f32 	%f1020, %f1021, %f1021;
+	mov.f32 	%f1019, 0f41A00000;
+	sub.f32 	%f1018, %f1019, %f1020;
+	abs.f32 	%f1017, %f1018;
+	setp.lt.f32	%p51, %f80, 0f00000000;
+	setp.eq.f32	%p52, %f1017, 0f3F800000;
+	and.pred  	%p1, %p51, %p52;
+	mov.b32 	 %r244, %f1105;
+	xor.b32  	%r245, %r244, -2147483648;
+	mov.b32 	 %f453, %r245;
+	selp.f32	%f1107, %f453, %f1105, %p1;
+	setp.eq.f32	%p53, %f80, 0f00000000;
+	@%p53 bra 	BB0_62;
+	bra.uni 	BB0_60;
+
+BB0_62:
+	add.f32 	%f456, %f80, %f80;
+	selp.f32	%f1107, %f456, 0f00000000, %p52;
+	bra.uni 	BB0_63;
+
+BB0_60:
+	setp.geu.f32	%p54, %f80, 0f00000000;
+	@%p54 bra 	BB0_63;
+
+	mov.f32 	%f1058, 0f41A00000;
+	cvt.rzi.f32.f32	%f455, %f1058;
+	setp.neu.f32	%p55, %f455, 0f41A00000;
+	selp.f32	%f1107, 0f7FFFFFFF, %f1107, %p55;
+
+BB0_63:
+	add.f32 	%f457, %f82, 0f41A00000;
+	mov.b32 	 %r246, %f457;
+	setp.lt.s32	%p57, %r246, 2139095040;
+	@%p57 bra 	BB0_68;
+
+	setp.gtu.f32	%p58, %f82, 0f7F800000;
+	@%p58 bra 	BB0_67;
+	bra.uni 	BB0_65;
+
+BB0_67:
+	add.f32 	%f1107, %f80, 0f41A00000;
+	bra.uni 	BB0_68;
+
+BB0_65:
+	setp.neu.f32	%p59, %f82, 0f7F800000;
+	@%p59 bra 	BB0_68;
+
+	selp.f32	%f1107, 0fFF800000, 0f7F800000, %p1;
+
+BB0_68:
+	setp.eq.f32	%p60, %f80, 0f3F800000;
+	selp.f32	%f458, 0f3F800000, %f1107, %p60;
+	cvt.sat.f32.f32	%f459, %f458;
+	mul.f32 	%f94, %f74, %f459;
+	mul.f32 	%f95, %f75, %f459;
+	mul.f32 	%f96, %f76, %f459;
+	ld.global.u32 	%r409, [imageEnabled];
+	and.b32  	%r247, %r409, 8;
+	setp.eq.s32	%p61, %r247, 0;
+	@%p61 bra 	BB0_81;
+
+	mov.f32 	%f1030, 0fB5BFBE8E;
+	mov.f32 	%f1029, 0fBF317200;
+	mov.f32 	%f1028, 0f00000000;
+	mov.f32 	%f1027, 0f35BFBE8E;
+	mov.f32 	%f1026, 0f3F317200;
+	mov.f32 	%f1025, 0f3DAAAABD;
+	mov.f32 	%f1024, 0f3C4CAF63;
+	mov.f32 	%f1023, 0f3B18F0FE;
+	cvt.u64.u32	%rd71, %r2;
+	cvt.u64.u32	%rd72, %r3;
+	mov.u64 	%rd75, image_Mask;
+	cvta.global.u64 	%rd70, %rd75;
+	// inline asm
+	call (%rd69), _rt_buffer_get_64, (%rd70, %r105, %r105, %rd71, %rd72, %rd31, %rd31);
+	// inline asm
+	abs.f32 	%f98, %f73;
+	setp.lt.f32	%p62, %f98, 0f00800000;
+	mul.f32 	%f465, %f98, 0f4B800000;
+	selp.f32	%f466, 0fC3170000, 0fC2FE0000, %p62;
+	selp.f32	%f467, %f465, %f98, %p62;
+	mov.b32 	 %r250, %f467;
+	and.b32  	%r251, %r250, 8388607;
+	or.b32  	%r252, %r251, 1065353216;
+	mov.b32 	 %f468, %r252;
+	shr.u32 	%r253, %r250, 23;
+	cvt.rn.f32.u32	%f469, %r253;
+	add.f32 	%f470, %f466, %f469;
+	setp.gt.f32	%p63, %f468, 0f3FB504F3;
+	mul.f32 	%f471, %f468, 0f3F000000;
+	add.f32 	%f472, %f470, 0f3F800000;
+	selp.f32	%f473, %f471, %f468, %p63;
+	selp.f32	%f474, %f472, %f470, %p63;
+	add.f32 	%f475, %f473, 0fBF800000;
+	add.f32 	%f461, %f473, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f460,%f461;
+	// inline asm
+	add.f32 	%f476, %f475, %f475;
+	mul.f32 	%f477, %f460, %f476;
+	mul.f32 	%f478, %f477, %f477;
+	fma.rn.f32 	%f481, %f1023, %f478, %f1024;
+	fma.rn.f32 	%f483, %f481, %f478, %f1025;
+	mul.rn.f32 	%f484, %f483, %f478;
+	mul.rn.f32 	%f485, %f484, %f477;
+	sub.f32 	%f486, %f475, %f477;
+	neg.f32 	%f487, %f477;
+	add.f32 	%f488, %f486, %f486;
+	fma.rn.f32 	%f489, %f487, %f475, %f488;
+	mul.rn.f32 	%f490, %f460, %f489;
+	add.f32 	%f491, %f485, %f477;
+	sub.f32 	%f492, %f477, %f491;
+	add.f32 	%f493, %f485, %f492;
+	add.f32 	%f494, %f490, %f493;
+	add.f32 	%f495, %f491, %f494;
+	sub.f32 	%f496, %f491, %f495;
+	add.f32 	%f497, %f494, %f496;
+	mul.rn.f32 	%f499, %f474, %f1026;
+	mul.rn.f32 	%f501, %f474, %f1027;
+	add.f32 	%f502, %f499, %f495;
+	sub.f32 	%f503, %f499, %f502;
+	add.f32 	%f504, %f495, %f503;
+	add.f32 	%f505, %f497, %f504;
+	add.f32 	%f506, %f501, %f505;
+	add.f32 	%f507, %f502, %f506;
+	sub.f32 	%f508, %f502, %f507;
+	add.f32 	%f509, %f506, %f508;
+	mov.f32 	%f510, 0f3EE8BA2E;
+	mul.rn.f32 	%f511, %f510, %f507;
+	neg.f32 	%f512, %f511;
+	fma.rn.f32 	%f513, %f510, %f507, %f512;
+	fma.rn.f32 	%f514, %f510, %f509, %f513;
+	fma.rn.f32 	%f516, %f1028, %f507, %f514;
+	add.rn.f32 	%f517, %f511, %f516;
+	neg.f32 	%f518, %f517;
+	add.rn.f32 	%f519, %f511, %f518;
+	add.rn.f32 	%f520, %f519, %f516;
+	mov.b32 	 %r254, %f517;
+	setp.eq.s32	%p64, %r254, 1118925336;
+	add.s32 	%r255, %r254, -1;
+	mov.b32 	 %f521, %r255;
+	add.f32 	%f522, %f520, 0f37000000;
+	selp.f32	%f523, %f521, %f517, %p64;
+	selp.f32	%f99, %f522, %f520, %p64;
+	mul.f32 	%f524, %f523, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f525, %f524;
+	fma.rn.f32 	%f527, %f525, %f1029, %f523;
+	fma.rn.f32 	%f529, %f525, %f1030, %f527;
+	mul.f32 	%f530, %f529, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f531, %f530;
+	add.f32 	%f532, %f525, 0f00000000;
+	ex2.approx.f32 	%f533, %f532;
+	mul.f32 	%f534, %f531, %f533;
+	setp.lt.f32	%p65, %f523, 0fC2D20000;
+	selp.f32	%f535, 0f00000000, %f534, %p65;
+	setp.gt.f32	%p66, %f523, 0f42D20000;
+	selp.f32	%f1108, 0f7F800000, %f535, %p66;
+	setp.eq.f32	%p67, %f1108, 0f7F800000;
+	@%p67 bra 	BB0_71;
+
+	fma.rn.f32 	%f1108, %f1108, %f99, %f1108;
+
+BB0_71:
+	mov.f32 	%f1062, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f1061, %f1062;
+	fma.rn.f32 	%f1060, %f1061, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f1059, %f1060;
+	setp.lt.f32	%p68, %f73, 0f00000000;
+	setp.eq.f32	%p69, %f1059, 0f3F800000;
+	and.pred  	%p2, %p68, %p69;
+	mov.b32 	 %r256, %f1108;
+	xor.b32  	%r257, %r256, -2147483648;
+	mov.b32 	 %f536, %r257;
+	selp.f32	%f1110, %f536, %f1108, %p2;
+	setp.eq.f32	%p70, %f73, 0f00000000;
+	@%p70 bra 	BB0_74;
+	bra.uni 	BB0_72;
+
+BB0_74:
+	add.f32 	%f539, %f73, %f73;
+	selp.f32	%f1110, %f539, 0f00000000, %p69;
+	bra.uni 	BB0_75;
+
+BB0_142:
+	mov.u64 	%rd217, image_HDR;
+	cvta.global.u64 	%rd212, %rd217;
+	mov.u32 	%r354, 8;
+	mov.u64 	%rd216, 0;
+	// inline asm
+	call (%rd211), _rt_buffer_get_64, (%rd212, %r105, %r354, %rd24, %rd25, %rd216, %rd216);
+	// inline asm
+	mov.f32 	%f995, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs116, %f995;}
+
+	// inline asm
+	mov.u16 	%rs117, 0;
+	st.v4.u16 	[%rd211], {%rs116, %rs116, %rs116, %rs117};
+
+BB0_143:
+	ld.global.u32 	%r355, [additive];
+	setp.eq.s32	%p145, %r355, 0;
+	@%p145 bra 	BB0_145;
+
+	mov.u64 	%rd230, image_RNM0;
+	cvta.global.u64 	%rd219, %rd230;
+	mov.u32 	%r359, 8;
+	mov.u64 	%rd229, 0;
+	// inline asm
+	call (%rd218), _rt_buffer_get_64, (%rd219, %r105, %r359, %rd24, %rd25, %rd229, %rd229);
+	// inline asm
+	ld.v4.u16 	{%rs124, %rs125, %rs126, %rs127}, [%rd218];
+	// inline asm
+	{  cvt.f32.f16 %f996, %rs124;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f997, %rs125;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f998, %rs126;}
+
+	// inline asm
+	// inline asm
+	call (%rd224), _rt_buffer_get_64, (%rd219, %r105, %r359, %rd24, %rd25, %rd229, %rd229);
+	// inline asm
+	add.f32 	%f999, %f996, 0f00000000;
+	add.f32 	%f1000, %f997, 0f00000000;
+	add.f32 	%f1001, %f998, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs123, %f1001;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs122, %f1000;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs121, %f999;}
+
+	// inline asm
+	mov.u16 	%rs128, 0;
+	st.v4.u16 	[%rd224], {%rs121, %rs122, %rs123, %rs128};
+	bra.uni 	BB0_146;
+
+BB0_145:
+	mov.u64 	%rd237, image_RNM0;
+	cvta.global.u64 	%rd232, %rd237;
+	mov.u32 	%r361, 8;
+	mov.u64 	%rd236, 0;
+	// inline asm
+	call (%rd231), _rt_buffer_get_64, (%rd232, %r105, %r361, %rd24, %rd25, %rd236, %rd236);
+	// inline asm
+	mov.f32 	%f1002, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs129, %f1002;}
+
+	// inline asm
+	mov.u16 	%rs130, 0;
+	st.v4.u16 	[%rd231], {%rs129, %rs129, %rs129, %rs130};
+
+BB0_146:
+	ld.global.u32 	%r362, [additive];
+	setp.eq.s32	%p146, %r362, 0;
+	@%p146 bra 	BB0_148;
+
+	mov.u64 	%rd250, image_RNM1;
+	cvta.global.u64 	%rd239, %rd250;
+	mov.u32 	%r366, 8;
+	mov.u64 	%rd249, 0;
+	// inline asm
+	call (%rd238), _rt_buffer_get_64, (%rd239, %r105, %r366, %rd24, %rd25, %rd249, %rd249);
+	// inline asm
+	ld.v4.u16 	{%rs137, %rs138, %rs139, %rs140}, [%rd238];
+	// inline asm
+	{  cvt.f32.f16 %f1003, %rs137;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1004, %rs138;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1005, %rs139;}
+
+	// inline asm
+	// inline asm
+	call (%rd244), _rt_buffer_get_64, (%rd239, %r105, %r366, %rd24, %rd25, %rd249, %rd249);
+	// inline asm
+	add.f32 	%f1006, %f1003, 0f00000000;
+	add.f32 	%f1007, %f1004, 0f00000000;
+	add.f32 	%f1008, %f1005, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs136, %f1008;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs135, %f1007;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs134, %f1006;}
+
+	// inline asm
+	mov.u16 	%rs141, 0;
+	st.v4.u16 	[%rd244], {%rs134, %rs135, %rs136, %rs141};
+	bra.uni 	BB0_149;
+
+BB0_148:
+	mov.u64 	%rd257, image_RNM1;
+	cvta.global.u64 	%rd252, %rd257;
+	mov.u32 	%r368, 8;
+	mov.u64 	%rd256, 0;
+	// inline asm
+	call (%rd251), _rt_buffer_get_64, (%rd252, %r105, %r368, %rd24, %rd25, %rd256, %rd256);
+	// inline asm
+	mov.f32 	%f1009, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs142, %f1009;}
+
+	// inline asm
+	mov.u16 	%rs143, 0;
+	st.v4.u16 	[%rd251], {%rs142, %rs142, %rs142, %rs143};
+
+BB0_149:
+	ld.global.u32 	%r369, [additive];
+	setp.eq.s32	%p147, %r369, 0;
+	@%p147 bra 	BB0_151;
+
+	mov.u64 	%rd270, image_RNM2;
+	cvta.global.u64 	%rd259, %rd270;
+	mov.u32 	%r373, 8;
+	mov.u64 	%rd269, 0;
+	// inline asm
+	call (%rd258), _rt_buffer_get_64, (%rd259, %r105, %r373, %rd24, %rd25, %rd269, %rd269);
+	// inline asm
+	ld.v4.u16 	{%rs150, %rs151, %rs152, %rs153}, [%rd258];
+	// inline asm
+	{  cvt.f32.f16 %f1010, %rs150;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1011, %rs151;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1012, %rs152;}
+
+	// inline asm
+	// inline asm
+	call (%rd264), _rt_buffer_get_64, (%rd259, %r105, %r373, %rd24, %rd25, %rd269, %rd269);
+	// inline asm
+	add.f32 	%f1013, %f1010, 0f00000000;
+	add.f32 	%f1014, %f1011, 0f00000000;
+	add.f32 	%f1015, %f1012, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs149, %f1015;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs148, %f1014;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs147, %f1013;}
+
+	// inline asm
+	mov.u16 	%rs154, 0;
+	st.v4.u16 	[%rd264], {%rs147, %rs148, %rs149, %rs154};
+	bra.uni 	BB0_152;
+
+BB0_151:
+	mov.u64 	%rd277, image_RNM2;
+	cvta.global.u64 	%rd272, %rd277;
+	mov.u32 	%r375, 8;
+	mov.u64 	%rd276, 0;
+	// inline asm
+	call (%rd271), _rt_buffer_get_64, (%rd272, %r105, %r375, %rd24, %rd25, %rd276, %rd276);
+	// inline asm
+	mov.f32 	%f1016, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs155, %f1016;}
+
+	// inline asm
+	mov.u16 	%rs156, 0;
+	st.v4.u16 	[%rd271], {%rs155, %rs155, %rs155, %rs156};
+	bra.uni 	BB0_152;
+
+BB0_72:
+	setp.geu.f32	%p71, %f73, 0f00000000;
+	@%p71 bra 	BB0_75;
+
+	mov.f32 	%f1066, 0f3EE8BA2E;
+	cvt.rzi.f32.f32	%f538, %f1066;
+	setp.neu.f32	%p72, %f538, 0f3EE8BA2E;
+	selp.f32	%f1110, 0f7FFFFFFF, %f1110, %p72;
+
+BB0_75:
+	abs.f32 	%f1063, %f73;
+	add.f32 	%f540, %f1063, 0f3EE8BA2E;
+	mov.b32 	 %r258, %f540;
+	setp.lt.s32	%p74, %r258, 2139095040;
+	@%p74 bra 	BB0_80;
+
+	abs.f32 	%f1064, %f73;
+	setp.gtu.f32	%p75, %f1064, 0f7F800000;
+	@%p75 bra 	BB0_79;
+	bra.uni 	BB0_77;
+
+BB0_79:
+	add.f32 	%f1110, %f73, 0f3EE8BA2E;
+	bra.uni 	BB0_80;
+
+BB0_77:
+	abs.f32 	%f1065, %f73;
+	setp.neu.f32	%p76, %f1065, 0f7F800000;
+	@%p76 bra 	BB0_80;
+
+	selp.f32	%f1110, 0fFF800000, 0f7F800000, %p2;
+
+BB0_80:
+	mul.f32 	%f541, %f1110, 0f437F0000;
+	setp.eq.f32	%p77, %f73, 0f3F800000;
+	selp.f32	%f542, 0f437F0000, %f541, %p77;
+	cvt.rzi.u32.f32	%r259, %f542;
+	cvt.u16.u32	%rs13, %r259;
+	mov.u16 	%rs14, 255;
+	st.v2.u8 	[%rd69], {%rs13, %rs14};
+	ld.global.u32 	%r409, [imageEnabled];
+
+BB0_81:
+	and.b32  	%r260, %r409, 1;
+	setp.eq.b32	%p78, %r260, 1;
+	@!%p78 bra 	BB0_116;
+	bra.uni 	BB0_82;
+
+BB0_82:
+	mov.f32 	%f1038, 0fB5BFBE8E;
+	mov.f32 	%f1037, 0fBF317200;
+	mov.f32 	%f1036, 0f00000000;
+	mov.f32 	%f1035, 0f35BFBE8E;
+	mov.f32 	%f1034, 0f3F317200;
+	mov.f32 	%f1033, 0f3DAAAABD;
+	mov.f32 	%f1032, 0f3C4CAF63;
+	mov.f32 	%f1031, 0f3B18F0FE;
+	abs.f32 	%f111, %f77;
+	setp.lt.f32	%p79, %f111, 0f00800000;
+	mul.f32 	%f548, %f111, 0f4B800000;
+	selp.f32	%f549, 0fC3170000, 0fC2FE0000, %p79;
+	selp.f32	%f550, %f548, %f111, %p79;
+	mov.b32 	 %r261, %f550;
+	and.b32  	%r262, %r261, 8388607;
+	or.b32  	%r263, %r262, 1065353216;
+	mov.b32 	 %f551, %r263;
+	shr.u32 	%r264, %r261, 23;
+	cvt.rn.f32.u32	%f552, %r264;
+	add.f32 	%f553, %f549, %f552;
+	setp.gt.f32	%p80, %f551, 0f3FB504F3;
+	mul.f32 	%f554, %f551, 0f3F000000;
+	add.f32 	%f555, %f553, 0f3F800000;
+	selp.f32	%f556, %f554, %f551, %p80;
+	selp.f32	%f557, %f555, %f553, %p80;
+	add.f32 	%f558, %f556, 0fBF800000;
+	add.f32 	%f544, %f556, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f543,%f544;
+	// inline asm
+	add.f32 	%f559, %f558, %f558;
+	mul.f32 	%f560, %f543, %f559;
+	mul.f32 	%f561, %f560, %f560;
+	fma.rn.f32 	%f564, %f1031, %f561, %f1032;
+	fma.rn.f32 	%f566, %f564, %f561, %f1033;
+	mul.rn.f32 	%f567, %f566, %f561;
+	mul.rn.f32 	%f568, %f567, %f560;
+	sub.f32 	%f569, %f558, %f560;
+	neg.f32 	%f570, %f560;
+	add.f32 	%f571, %f569, %f569;
+	fma.rn.f32 	%f572, %f570, %f558, %f571;
+	mul.rn.f32 	%f573, %f543, %f572;
+	add.f32 	%f574, %f568, %f560;
+	sub.f32 	%f575, %f560, %f574;
+	add.f32 	%f576, %f568, %f575;
+	add.f32 	%f577, %f573, %f576;
+	add.f32 	%f578, %f574, %f577;
+	sub.f32 	%f579, %f574, %f578;
+	add.f32 	%f580, %f577, %f579;
+	mul.rn.f32 	%f582, %f557, %f1034;
+	mul.rn.f32 	%f584, %f557, %f1035;
+	add.f32 	%f585, %f582, %f578;
+	sub.f32 	%f586, %f582, %f585;
+	add.f32 	%f587, %f578, %f586;
+	add.f32 	%f588, %f580, %f587;
+	add.f32 	%f589, %f584, %f588;
+	add.f32 	%f590, %f585, %f589;
+	sub.f32 	%f591, %f585, %f590;
+	add.f32 	%f592, %f589, %f591;
+	mov.f32 	%f593, 0f3EE66666;
+	mul.rn.f32 	%f594, %f593, %f590;
+	neg.f32 	%f595, %f594;
+	fma.rn.f32 	%f596, %f593, %f590, %f595;
+	fma.rn.f32 	%f597, %f593, %f592, %f596;
+	fma.rn.f32 	%f599, %f1036, %f590, %f597;
+	add.rn.f32 	%f600, %f594, %f599;
+	neg.f32 	%f601, %f600;
+	add.rn.f32 	%f602, %f594, %f601;
+	add.rn.f32 	%f603, %f602, %f599;
+	mov.b32 	 %r265, %f600;
+	setp.eq.s32	%p81, %r265, 1118925336;
+	add.s32 	%r266, %r265, -1;
+	mov.b32 	 %f604, %r266;
+	add.f32 	%f605, %f603, 0f37000000;
+	selp.f32	%f606, %f604, %f600, %p81;
+	selp.f32	%f112, %f605, %f603, %p81;
+	mul.f32 	%f607, %f606, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f608, %f607;
+	fma.rn.f32 	%f610, %f608, %f1037, %f606;
+	fma.rn.f32 	%f612, %f608, %f1038, %f610;
+	mul.f32 	%f613, %f612, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f614, %f613;
+	add.f32 	%f615, %f608, 0f00000000;
+	ex2.approx.f32 	%f616, %f615;
+	mul.f32 	%f617, %f614, %f616;
+	setp.lt.f32	%p82, %f606, 0fC2D20000;
+	selp.f32	%f618, 0f00000000, %f617, %p82;
+	setp.gt.f32	%p83, %f606, 0f42D20000;
+	selp.f32	%f1111, 0f7F800000, %f618, %p83;
+	setp.eq.f32	%p84, %f1111, 0f7F800000;
+	@%p84 bra 	BB0_84;
+
+	fma.rn.f32 	%f1111, %f1111, %f112, %f1111;
+
+BB0_84:
+	mov.f32 	%f1070, 0f3E666666;
+	cvt.rzi.f32.f32	%f1069, %f1070;
+	fma.rn.f32 	%f1068, %f1069, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f1067, %f1068;
+	setp.lt.f32	%p85, %f77, 0f00000000;
+	setp.eq.f32	%p86, %f1067, 0f3F800000;
+	and.pred  	%p3, %p85, %p86;
+	mov.b32 	 %r267, %f1111;
+	xor.b32  	%r268, %r267, -2147483648;
+	mov.b32 	 %f619, %r268;
+	selp.f32	%f1113, %f619, %f1111, %p3;
+	setp.eq.f32	%p87, %f77, 0f00000000;
+	@%p87 bra 	BB0_87;
+	bra.uni 	BB0_85;
+
+BB0_87:
+	add.f32 	%f622, %f77, %f77;
+	selp.f32	%f1113, %f622, 0f00000000, %p86;
+	bra.uni 	BB0_88;
+
+BB0_85:
+	setp.geu.f32	%p88, %f77, 0f00000000;
+	@%p88 bra 	BB0_88;
+
+	mov.f32 	%f1078, 0f3EE66666;
+	cvt.rzi.f32.f32	%f621, %f1078;
+	setp.neu.f32	%p89, %f621, 0f3EE66666;
+	selp.f32	%f1113, 0f7FFFFFFF, %f1113, %p89;
+
+BB0_88:
+	abs.f32 	%f1071, %f77;
+	add.f32 	%f623, %f1071, 0f3EE66666;
+	mov.b32 	 %r269, %f623;
+	setp.lt.s32	%p91, %r269, 2139095040;
+	@%p91 bra 	BB0_93;
+
+	abs.f32 	%f1076, %f77;
+	setp.gtu.f32	%p92, %f1076, 0f7F800000;
+	@%p92 bra 	BB0_92;
+	bra.uni 	BB0_90;
+
+BB0_92:
+	add.f32 	%f1113, %f77, 0f3EE66666;
+	bra.uni 	BB0_93;
+
+BB0_90:
+	abs.f32 	%f1077, %f77;
+	setp.neu.f32	%p93, %f1077, 0f7F800000;
+	@%p93 bra 	BB0_93;
+
+	selp.f32	%f1113, 0fFF800000, 0f7F800000, %p3;
+
+BB0_93:
+	mov.f32 	%f1072, 0f3EE66666;
+	mov.f32 	%f1046, 0fB5BFBE8E;
+	mov.f32 	%f1045, 0fBF317200;
+	mov.f32 	%f1044, 0f00000000;
+	mov.f32 	%f1043, 0f35BFBE8E;
+	mov.f32 	%f1042, 0f3F317200;
+	mov.f32 	%f1041, 0f3DAAAABD;
+	mov.f32 	%f1040, 0f3C4CAF63;
+	mov.f32 	%f1039, 0f3B18F0FE;
+	setp.eq.f32	%p94, %f77, 0f3F800000;
+	selp.f32	%f123, 0f3F800000, %f1113, %p94;
+	abs.f32 	%f124, %f78;
+	setp.lt.f32	%p95, %f124, 0f00800000;
+	mul.f32 	%f626, %f124, 0f4B800000;
+	selp.f32	%f627, 0fC3170000, 0fC2FE0000, %p95;
+	selp.f32	%f628, %f626, %f124, %p95;
+	mov.b32 	 %r270, %f628;
+	and.b32  	%r271, %r270, 8388607;
+	or.b32  	%r272, %r271, 1065353216;
+	mov.b32 	 %f629, %r272;
+	shr.u32 	%r273, %r270, 23;
+	cvt.rn.f32.u32	%f630, %r273;
+	add.f32 	%f631, %f627, %f630;
+	setp.gt.f32	%p96, %f629, 0f3FB504F3;
+	mul.f32 	%f632, %f629, 0f3F000000;
+	add.f32 	%f633, %f631, 0f3F800000;
+	selp.f32	%f634, %f632, %f629, %p96;
+	selp.f32	%f635, %f633, %f631, %p96;
+	add.f32 	%f636, %f634, 0fBF800000;
+	add.f32 	%f625, %f634, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f624,%f625;
+	// inline asm
+	add.f32 	%f637, %f636, %f636;
+	mul.f32 	%f638, %f624, %f637;
+	mul.f32 	%f639, %f638, %f638;
+	fma.rn.f32 	%f642, %f1039, %f639, %f1040;
+	fma.rn.f32 	%f644, %f642, %f639, %f1041;
+	mul.rn.f32 	%f645, %f644, %f639;
+	mul.rn.f32 	%f646, %f645, %f638;
+	sub.f32 	%f647, %f636, %f638;
+	neg.f32 	%f648, %f638;
+	add.f32 	%f649, %f647, %f647;
+	fma.rn.f32 	%f650, %f648, %f636, %f649;
+	mul.rn.f32 	%f651, %f624, %f650;
+	add.f32 	%f652, %f646, %f638;
+	sub.f32 	%f653, %f638, %f652;
+	add.f32 	%f654, %f646, %f653;
+	add.f32 	%f655, %f651, %f654;
+	add.f32 	%f656, %f652, %f655;
+	sub.f32 	%f657, %f652, %f656;
+	add.f32 	%f658, %f655, %f657;
+	mul.rn.f32 	%f660, %f635, %f1042;
+	mul.rn.f32 	%f662, %f635, %f1043;
+	add.f32 	%f663, %f660, %f656;
+	sub.f32 	%f664, %f660, %f663;
+	add.f32 	%f665, %f656, %f664;
+	add.f32 	%f666, %f658, %f665;
+	add.f32 	%f667, %f662, %f666;
+	add.f32 	%f668, %f663, %f667;
+	sub.f32 	%f669, %f663, %f668;
+	add.f32 	%f670, %f667, %f669;
+	mul.rn.f32 	%f672, %f1072, %f668;
+	neg.f32 	%f673, %f672;
+	fma.rn.f32 	%f674, %f1072, %f668, %f673;
+	fma.rn.f32 	%f675, %f1072, %f670, %f674;
+	fma.rn.f32 	%f677, %f1044, %f668, %f675;
+	add.rn.f32 	%f678, %f672, %f677;
+	neg.f32 	%f679, %f678;
+	add.rn.f32 	%f680, %f672, %f679;
+	add.rn.f32 	%f681, %f680, %f677;
+	mov.b32 	 %r274, %f678;
+	setp.eq.s32	%p97, %r274, 1118925336;
+	add.s32 	%r275, %r274, -1;
+	mov.b32 	 %f682, %r275;
+	add.f32 	%f683, %f681, 0f37000000;
+	selp.f32	%f684, %f682, %f678, %p97;
+	selp.f32	%f125, %f683, %f681, %p97;
+	mul.f32 	%f685, %f684, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f686, %f685;
+	fma.rn.f32 	%f688, %f686, %f1045, %f684;
+	fma.rn.f32 	%f690, %f686, %f1046, %f688;
+	mul.f32 	%f691, %f690, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f692, %f691;
+	add.f32 	%f693, %f686, 0f00000000;
+	ex2.approx.f32 	%f694, %f693;
+	mul.f32 	%f695, %f692, %f694;
+	setp.lt.f32	%p98, %f684, 0fC2D20000;
+	selp.f32	%f696, 0f00000000, %f695, %p98;
+	setp.gt.f32	%p99, %f684, 0f42D20000;
+	selp.f32	%f1114, 0f7F800000, %f696, %p99;
+	setp.eq.f32	%p100, %f1114, 0f7F800000;
+	@%p100 bra 	BB0_95;
+
+	fma.rn.f32 	%f1114, %f1114, %f125, %f1114;
+
+BB0_95:
+	setp.lt.f32	%p101, %f78, 0f00000000;
+	and.pred  	%p4, %p101, %p86;
+	mov.b32 	 %r276, %f1114;
+	xor.b32  	%r277, %r276, -2147483648;
+	mov.b32 	 %f697, %r277;
+	selp.f32	%f1116, %f697, %f1114, %p4;
+	setp.eq.f32	%p103, %f78, 0f00000000;
+	@%p103 bra 	BB0_98;
+	bra.uni 	BB0_96;
+
+BB0_98:
+	add.f32 	%f700, %f78, %f78;
+	selp.f32	%f1116, %f700, 0f00000000, %p86;
+	bra.uni 	BB0_99;
+
+BB0_96:
+	setp.geu.f32	%p104, %f78, 0f00000000;
+	@%p104 bra 	BB0_99;
+
+	mov.f32 	%f1075, 0f3EE66666;
+	cvt.rzi.f32.f32	%f699, %f1075;
+	setp.neu.f32	%p105, %f699, 0f3EE66666;
+	selp.f32	%f1116, 0f7FFFFFFF, %f1116, %p105;
+
+BB0_99:
+	abs.f32 	%f1079, %f78;
+	add.f32 	%f701, %f1079, 0f3EE66666;
+	mov.b32 	 %r278, %f701;
+	setp.lt.s32	%p107, %r278, 2139095040;
+	@%p107 bra 	BB0_104;
+
+	abs.f32 	%f1080, %f78;
+	setp.gtu.f32	%p108, %f1080, 0f7F800000;
+	@%p108 bra 	BB0_103;
+	bra.uni 	BB0_101;
+
+BB0_103:
+	add.f32 	%f1116, %f78, 0f3EE66666;
+	bra.uni 	BB0_104;
+
+BB0_101:
+	abs.f32 	%f1081, %f78;
+	setp.neu.f32	%p109, %f1081, 0f7F800000;
+	@%p109 bra 	BB0_104;
+
+	selp.f32	%f1116, 0fFF800000, 0f7F800000, %p4;
+
+BB0_104:
+	mov.f32 	%f1073, 0f3EE66666;
+	mov.f32 	%f1054, 0fB5BFBE8E;
+	mov.f32 	%f1053, 0fBF317200;
+	mov.f32 	%f1052, 0f00000000;
+	mov.f32 	%f1051, 0f35BFBE8E;
+	mov.f32 	%f1050, 0f3F317200;
+	mov.f32 	%f1049, 0f3DAAAABD;
+	mov.f32 	%f1048, 0f3C4CAF63;
+	mov.f32 	%f1047, 0f3B18F0FE;
+	setp.eq.f32	%p110, %f78, 0f3F800000;
+	selp.f32	%f136, 0f3F800000, %f1116, %p110;
+	abs.f32 	%f137, %f79;
+	setp.lt.f32	%p111, %f137, 0f00800000;
+	mul.f32 	%f704, %f137, 0f4B800000;
+	selp.f32	%f705, 0fC3170000, 0fC2FE0000, %p111;
+	selp.f32	%f706, %f704, %f137, %p111;
+	mov.b32 	 %r279, %f706;
+	and.b32  	%r280, %r279, 8388607;
+	or.b32  	%r281, %r280, 1065353216;
+	mov.b32 	 %f707, %r281;
+	shr.u32 	%r282, %r279, 23;
+	cvt.rn.f32.u32	%f708, %r282;
+	add.f32 	%f709, %f705, %f708;
+	setp.gt.f32	%p112, %f707, 0f3FB504F3;
+	mul.f32 	%f710, %f707, 0f3F000000;
+	add.f32 	%f711, %f709, 0f3F800000;
+	selp.f32	%f712, %f710, %f707, %p112;
+	selp.f32	%f713, %f711, %f709, %p112;
+	add.f32 	%f714, %f712, 0fBF800000;
+	add.f32 	%f703, %f712, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f702,%f703;
+	// inline asm
+	add.f32 	%f715, %f714, %f714;
+	mul.f32 	%f716, %f702, %f715;
+	mul.f32 	%f717, %f716, %f716;
+	fma.rn.f32 	%f720, %f1047, %f717, %f1048;
+	fma.rn.f32 	%f722, %f720, %f717, %f1049;
+	mul.rn.f32 	%f723, %f722, %f717;
+	mul.rn.f32 	%f724, %f723, %f716;
+	sub.f32 	%f725, %f714, %f716;
+	neg.f32 	%f726, %f716;
+	add.f32 	%f727, %f725, %f725;
+	fma.rn.f32 	%f728, %f726, %f714, %f727;
+	mul.rn.f32 	%f729, %f702, %f728;
+	add.f32 	%f730, %f724, %f716;
+	sub.f32 	%f731, %f716, %f730;
+	add.f32 	%f732, %f724, %f731;
+	add.f32 	%f733, %f729, %f732;
+	add.f32 	%f734, %f730, %f733;
+	sub.f32 	%f735, %f730, %f734;
+	add.f32 	%f736, %f733, %f735;
+	mul.rn.f32 	%f738, %f713, %f1050;
+	mul.rn.f32 	%f740, %f713, %f1051;
+	add.f32 	%f741, %f738, %f734;
+	sub.f32 	%f742, %f738, %f741;
+	add.f32 	%f743, %f734, %f742;
+	add.f32 	%f744, %f736, %f743;
+	add.f32 	%f745, %f740, %f744;
+	add.f32 	%f746, %f741, %f745;
+	sub.f32 	%f747, %f741, %f746;
+	add.f32 	%f748, %f745, %f747;
+	mul.rn.f32 	%f750, %f1073, %f746;
+	neg.f32 	%f751, %f750;
+	fma.rn.f32 	%f752, %f1073, %f746, %f751;
+	fma.rn.f32 	%f753, %f1073, %f748, %f752;
+	fma.rn.f32 	%f755, %f1052, %f746, %f753;
+	add.rn.f32 	%f756, %f750, %f755;
+	neg.f32 	%f757, %f756;
+	add.rn.f32 	%f758, %f750, %f757;
+	add.rn.f32 	%f759, %f758, %f755;
+	mov.b32 	 %r283, %f756;
+	setp.eq.s32	%p113, %r283, 1118925336;
+	add.s32 	%r284, %r283, -1;
+	mov.b32 	 %f760, %r284;
+	add.f32 	%f761, %f759, 0f37000000;
+	selp.f32	%f762, %f760, %f756, %p113;
+	selp.f32	%f138, %f761, %f759, %p113;
+	mul.f32 	%f763, %f762, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f764, %f763;
+	fma.rn.f32 	%f766, %f764, %f1053, %f762;
+	fma.rn.f32 	%f768, %f764, %f1054, %f766;
+	mul.f32 	%f769, %f768, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f770, %f769;
+	add.f32 	%f771, %f764, 0f00000000;
+	ex2.approx.f32 	%f772, %f771;
+	mul.f32 	%f773, %f770, %f772;
+	setp.lt.f32	%p114, %f762, 0fC2D20000;
+	selp.f32	%f774, 0f00000000, %f773, %p114;
+	setp.gt.f32	%p115, %f762, 0f42D20000;
+	selp.f32	%f1117, 0f7F800000, %f774, %p115;
+	setp.eq.f32	%p116, %f1117, 0f7F800000;
+	@%p116 bra 	BB0_106;
+
+	fma.rn.f32 	%f1117, %f1117, %f138, %f1117;
+
+BB0_106:
+	setp.lt.f32	%p117, %f79, 0f00000000;
+	and.pred  	%p5, %p117, %p86;
+	mov.b32 	 %r285, %f1117;
+	xor.b32  	%r286, %r285, -2147483648;
+	mov.b32 	 %f775, %r286;
+	selp.f32	%f1119, %f775, %f1117, %p5;
+	setp.eq.f32	%p119, %f79, 0f00000000;
+	@%p119 bra 	BB0_109;
+	bra.uni 	BB0_107;
+
+BB0_109:
+	add.f32 	%f778, %f79, %f79;
+	selp.f32	%f1119, %f778, 0f00000000, %p86;
+	bra.uni 	BB0_110;
+
+BB0_107:
+	setp.geu.f32	%p120, %f79, 0f00000000;
+	@%p120 bra 	BB0_110;
+
+	mov.f32 	%f1074, 0f3EE66666;
+	cvt.rzi.f32.f32	%f777, %f1074;
+	setp.neu.f32	%p121, %f777, 0f3EE66666;
+	selp.f32	%f1119, 0f7FFFFFFF, %f1119, %p121;
+
+BB0_110:
+	abs.f32 	%f1082, %f79;
+	add.f32 	%f779, %f1082, 0f3EE66666;
+	mov.b32 	 %r287, %f779;
+	setp.lt.s32	%p123, %r287, 2139095040;
+	@%p123 bra 	BB0_115;
+
+	abs.f32 	%f1083, %f79;
+	setp.gtu.f32	%p124, %f1083, 0f7F800000;
+	@%p124 bra 	BB0_114;
+	bra.uni 	BB0_112;
+
+BB0_114:
+	add.f32 	%f1119, %f79, 0f3EE66666;
+	bra.uni 	BB0_115;
+
+BB0_112:
+	abs.f32 	%f1084, %f79;
+	setp.neu.f32	%p125, %f1084, 0f7F800000;
+	@%p125 bra 	BB0_115;
+
+	selp.f32	%f1119, 0fFF800000, 0f7F800000, %p5;
+
+BB0_115:
+	mov.u32 	%r376, 4;
+	setp.eq.f32	%p126, %f79, 0f3F800000;
+	selp.f32	%f780, 0f3F800000, %f1119, %p126;
+	cvt.u64.u32	%rd79, %r3;
+	cvt.u64.u32	%rd78, %r2;
+	mov.u64 	%rd82, image;
+	cvta.global.u64 	%rd77, %rd82;
+	// inline asm
+	call (%rd76), _rt_buffer_get_64, (%rd77, %r105, %r376, %rd78, %rd79, %rd31, %rd31);
+	// inline asm
+	cvt.sat.f32.f32	%f781, %f780;
+	mul.f32 	%f782, %f781, 0f437FFD71;
+	cvt.rzi.u32.f32	%r290, %f782;
+	cvt.sat.f32.f32	%f783, %f136;
+	mul.f32 	%f784, %f783, 0f437FFD71;
+	cvt.rzi.u32.f32	%r291, %f784;
+	cvt.sat.f32.f32	%f785, %f123;
+	mul.f32 	%f786, %f785, 0f437FFD71;
+	cvt.rzi.u32.f32	%r292, %f786;
+	cvt.u16.u32	%rs15, %r290;
+	cvt.u16.u32	%rs16, %r292;
+	cvt.u16.u32	%rs17, %r291;
+	mov.u16 	%rs18, 255;
+	st.v4.u8 	[%rd76], {%rs15, %rs17, %rs16, %rs18};
+	ld.global.u32 	%r409, [imageEnabled];
+
+BB0_116:
+	and.b32  	%r293, %r409, 4;
+	setp.eq.s32	%p127, %r293, 0;
+	@%p127 bra 	BB0_120;
+
+	ld.global.u32 	%r294, [additive];
+	setp.eq.s32	%p128, %r294, 0;
+	cvt.u64.u32	%rd17, %r2;
+	cvt.u64.u32	%rd18, %r3;
+	mov.f32 	%f787, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs19, %f787;}
+
+	// inline asm
+	@%p128 bra 	BB0_119;
+
+	mov.u64 	%rd95, image_HDR;
+	cvta.global.u64 	%rd84, %rd95;
+	mov.u32 	%r298, 8;
+	// inline asm
+	call (%rd83), _rt_buffer_get_64, (%rd84, %r105, %r298, %rd17, %rd18, %rd31, %rd31);
+	// inline asm
+	ld.v4.u16 	{%rs26, %rs27, %rs28, %rs29}, [%rd83];
+	// inline asm
+	{  cvt.f32.f16 %f788, %rs26;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f789, %rs27;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f790, %rs28;}
+
+	// inline asm
+	// inline asm
+	call (%rd89), _rt_buffer_get_64, (%rd84, %r105, %r298, %rd17, %rd18, %rd31, %rd31);
+	// inline asm
+	add.f32 	%f791, %f77, %f788;
+	add.f32 	%f792, %f78, %f789;
+	add.f32 	%f793, %f79, %f790;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs25, %f793;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs24, %f792;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs23, %f791;}
+
+	// inline asm
+	st.v4.u16 	[%rd89], {%rs23, %rs24, %rs25, %rs19};
+	bra.uni 	BB0_120;
+
+BB0_119:
+	mov.u64 	%rd102, image_HDR;
+	cvta.global.u64 	%rd97, %rd102;
+	mov.u32 	%r300, 8;
+	// inline asm
+	call (%rd96), _rt_buffer_get_64, (%rd97, %r105, %r300, %rd17, %rd18, %rd31, %rd31);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs32, %f79;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs31, %f78;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs30, %f77;}
+
+	// inline asm
+	st.v4.u16 	[%rd96], {%rs30, %rs31, %rs32, %rs19};
+
+BB0_120:
+	mov.f32 	%f1120, 0f00000000;
+	mov.u32 	%r377, 4;
+	ld.global.v2.u32 	{%r303, %r304}, [pixelID];
+	cvt.u64.u32	%rd105, %r303;
+	cvt.u64.u32	%rd106, %r304;
+	mov.u64 	%rd109, uvtangent;
+	cvta.global.u64 	%rd104, %rd109;
+	// inline asm
+	call (%rd103), _rt_buffer_get_64, (%rd104, %r105, %r377, %rd105, %rd106, %rd31, %rd31);
+	// inline asm
+	ld.u32 	%r94, [%rd103];
+	shr.u32 	%r95, %r94, 16;
+	cvt.u16.u32	%rs33, %r95;
+	and.b16  	%rs34, %rs33, 255;
+	cvt.u16.u32	%rs35, %r94;
+	or.b16  	%rs36, %rs35, %rs34;
+	setp.eq.s16	%p129, %rs36, 0;
+	mov.f32 	%f1121, %f1120;
+	mov.f32 	%f1122, %f1120;
+	@%p129 bra 	BB0_122;
+
+	ld.u8 	%rs37, [%rd103+1];
+	and.b16  	%rs39, %rs35, 255;
+	cvt.rn.f32.u16	%f800, %rs39;
+	div.rn.f32 	%f801, %f800, 0f437F0000;
+	fma.rn.f32 	%f802, %f801, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f803, %rs37;
+	div.rn.f32 	%f804, %f803, 0f437F0000;
+	fma.rn.f32 	%f805, %f804, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f806, %rs34;
+	div.rn.f32 	%f807, %f806, 0f437F0000;
+	fma.rn.f32 	%f808, %f807, 0f40000000, 0fBF800000;
+	mul.f32 	%f809, %f805, %f805;
+	fma.rn.f32 	%f810, %f802, %f802, %f809;
+	fma.rn.f32 	%f811, %f808, %f808, %f810;
+	sqrt.rn.f32 	%f812, %f811;
+	rcp.rn.f32 	%f813, %f812;
+	mul.f32 	%f1120, %f802, %f813;
+	mul.f32 	%f1121, %f805, %f813;
+	mul.f32 	%f1122, %f808, %f813;
+
+BB0_122:
+	mov.f32 	%f1123, 0f00000000;
+	mov.u32 	%r378, 4;
+	mul.f32 	%f817, %f1087, %f1121;
+	mul.f32 	%f818, %f1086, %f1122;
+	sub.f32 	%f819, %f818, %f817;
+	mul.f32 	%f820, %f1085, %f1122;
+	mul.f32 	%f821, %f1087, %f1120;
+	sub.f32 	%f822, %f821, %f820;
+	mul.f32 	%f823, %f1086, %f1120;
+	mul.f32 	%f824, %f1085, %f1121;
+	sub.f32 	%f825, %f824, %f823;
+	setp.lt.u32	%p130, %r94, 16777216;
+	selp.f32	%f826, 0fBF800000, 0f3F800000, %p130;
+	mul.f32 	%f827, %f819, %f826;
+	mul.f32 	%f828, %f822, %f826;
+	mul.f32 	%f829, %f825, %f826;
+	mul.f32 	%f830, %f827, 0f00000000;
+	mul.f32 	%f831, %f828, 0f00000000;
+	mul.f32 	%f832, %f829, 0f00000000;
+	fma.rn.f32 	%f833, %f1120, 0f3F5105EC, %f830;
+	fma.rn.f32 	%f834, %f1121, 0f3F5105EC, %f831;
+	fma.rn.f32 	%f835, %f1122, 0f3F5105EC, %f832;
+	mul.f32 	%f155, %f1085, 0f3F13CD3A;
+	add.f32 	%f156, %f155, %f833;
+	mul.f32 	%f157, %f1086, 0f3F13CD3A;
+	add.f32 	%f158, %f157, %f834;
+	mul.f32 	%f159, %f1087, 0f3F13CD3A;
+	add.f32 	%f160, %f159, %f835;
+	ld.global.v2.u32 	{%r309, %r310}, [pixelID];
+	cvt.u64.u32	%rd112, %r309;
+	cvt.u64.u32	%rd113, %r310;
+	// inline asm
+	call (%rd110), _rt_buffer_get_64, (%rd104, %r105, %r378, %rd112, %rd113, %rd31, %rd31);
+	// inline asm
+	ld.u32 	%r96, [%rd110];
+	shr.u32 	%r97, %r96, 16;
+	cvt.u16.u32	%rs42, %r97;
+	and.b16  	%rs43, %rs42, 255;
+	cvt.u16.u32	%rs44, %r96;
+	or.b16  	%rs45, %rs44, %rs43;
+	setp.eq.s16	%p131, %rs45, 0;
+	mov.f32 	%f1124, %f1123;
+	mov.f32 	%f1125, %f1123;
+	@%p131 bra 	BB0_124;
+
+	ld.u8 	%rs46, [%rd110+1];
+	and.b16  	%rs48, %rs44, 255;
+	cvt.rn.f32.u16	%f836, %rs48;
+	div.rn.f32 	%f837, %f836, 0f437F0000;
+	fma.rn.f32 	%f838, %f837, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f839, %rs46;
+	div.rn.f32 	%f840, %f839, 0f437F0000;
+	fma.rn.f32 	%f841, %f840, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f842, %rs43;
+	div.rn.f32 	%f843, %f842, 0f437F0000;
+	fma.rn.f32 	%f844, %f843, 0f40000000, 0fBF800000;
+	mul.f32 	%f845, %f841, %f841;
+	fma.rn.f32 	%f846, %f838, %f838, %f845;
+	fma.rn.f32 	%f847, %f844, %f844, %f846;
+	sqrt.rn.f32 	%f848, %f847;
+	rcp.rn.f32 	%f849, %f848;
+	mul.f32 	%f1123, %f838, %f849;
+	mul.f32 	%f1124, %f841, %f849;
+	mul.f32 	%f1125, %f844, %f849;
+
+BB0_124:
+	mov.f32 	%f1126, 0f00000000;
+	mov.u32 	%r379, 4;
+	mul.f32 	%f853, %f1087, %f1124;
+	mul.f32 	%f854, %f1086, %f1125;
+	sub.f32 	%f855, %f854, %f853;
+	mul.f32 	%f856, %f1085, %f1125;
+	mul.f32 	%f857, %f1087, %f1123;
+	sub.f32 	%f858, %f857, %f856;
+	mul.f32 	%f859, %f1086, %f1123;
+	mul.f32 	%f860, %f1085, %f1124;
+	sub.f32 	%f861, %f860, %f859;
+	setp.lt.u32	%p132, %r96, 16777216;
+	selp.f32	%f862, 0fBF800000, 0f3F800000, %p132;
+	mul.f32 	%f863, %f855, %f862;
+	mul.f32 	%f864, %f858, %f862;
+	mul.f32 	%f865, %f861, %f862;
+	mul.f32 	%f866, %f863, 0f3F3504F3;
+	mul.f32 	%f867, %f864, 0f3F3504F3;
+	mul.f32 	%f868, %f865, 0f3F3504F3;
+	fma.rn.f32 	%f869, %f1123, 0fBED105EC, %f866;
+	fma.rn.f32 	%f870, %f1124, 0fBED105EC, %f867;
+	fma.rn.f32 	%f871, %f1125, 0fBED105EC, %f868;
+	add.f32 	%f167, %f155, %f869;
+	add.f32 	%f168, %f157, %f870;
+	add.f32 	%f169, %f159, %f871;
+	ld.global.v2.u32 	{%r315, %r316}, [pixelID];
+	cvt.u64.u32	%rd119, %r315;
+	cvt.u64.u32	%rd120, %r316;
+	// inline asm
+	call (%rd117), _rt_buffer_get_64, (%rd104, %r105, %r379, %rd119, %rd120, %rd31, %rd31);
+	// inline asm
+	ld.u32 	%r98, [%rd117];
+	shr.u32 	%r99, %r98, 16;
+	cvt.u16.u32	%rs51, %r99;
+	and.b16  	%rs52, %rs51, 255;
+	cvt.u16.u32	%rs53, %r98;
+	or.b16  	%rs54, %rs53, %rs52;
+	setp.eq.s16	%p133, %rs54, 0;
+	mov.f32 	%f1127, %f1126;
+	mov.f32 	%f1128, %f1126;
+	@%p133 bra 	BB0_126;
+
+	ld.u8 	%rs55, [%rd117+1];
+	and.b16  	%rs57, %rs53, 255;
+	cvt.rn.f32.u16	%f872, %rs57;
+	div.rn.f32 	%f873, %f872, 0f437F0000;
+	fma.rn.f32 	%f874, %f873, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f875, %rs55;
+	div.rn.f32 	%f876, %f875, 0f437F0000;
+	fma.rn.f32 	%f877, %f876, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f878, %rs52;
+	div.rn.f32 	%f879, %f878, 0f437F0000;
+	fma.rn.f32 	%f880, %f879, 0f40000000, 0fBF800000;
+	mul.f32 	%f881, %f877, %f877;
+	fma.rn.f32 	%f882, %f874, %f874, %f881;
+	fma.rn.f32 	%f883, %f880, %f880, %f882;
+	sqrt.rn.f32 	%f884, %f883;
+	rcp.rn.f32 	%f885, %f884;
+	mul.f32 	%f1126, %f874, %f885;
+	mul.f32 	%f1127, %f877, %f885;
+	mul.f32 	%f1128, %f880, %f885;
+
+BB0_126:
+	mul.f32 	%f887, %f1087, %f1127;
+	mul.f32 	%f888, %f1086, %f1128;
+	sub.f32 	%f889, %f888, %f887;
+	mul.f32 	%f890, %f1085, %f1128;
+	mul.f32 	%f891, %f1087, %f1126;
+	sub.f32 	%f892, %f891, %f890;
+	mul.f32 	%f893, %f1086, %f1126;
+	mul.f32 	%f894, %f1085, %f1127;
+	sub.f32 	%f895, %f894, %f893;
+	setp.lt.u32	%p134, %r98, 16777216;
+	selp.f32	%f896, 0fBF800000, 0f3F800000, %p134;
+	mul.f32 	%f897, %f889, %f896;
+	mul.f32 	%f898, %f892, %f896;
+	mul.f32 	%f899, %f895, %f896;
+	mul.f32 	%f900, %f897, 0fBF3504F3;
+	mul.f32 	%f901, %f898, 0fBF3504F3;
+	mul.f32 	%f902, %f899, 0fBF3504F3;
+	fma.rn.f32 	%f903, %f1126, 0fBED105EC, %f900;
+	fma.rn.f32 	%f904, %f1127, 0fBED105EC, %f901;
+	fma.rn.f32 	%f905, %f1128, 0fBED105EC, %f902;
+	add.f32 	%f906, %f155, %f903;
+	add.f32 	%f907, %f157, %f904;
+	add.f32 	%f908, %f159, %f905;
+	ld.global.f32 	%f909, [directDir];
+	mul.f32 	%f910, %f156, %f909;
+	ld.global.f32 	%f911, [directDir+4];
+	mul.f32 	%f912, %f158, %f911;
+	neg.f32 	%f913, %f912;
+	sub.f32 	%f914, %f913, %f910;
+	ld.global.f32 	%f915, [directDir+8];
+	mul.f32 	%f916, %f160, %f915;
+	sub.f32 	%f917, %f914, %f916;
+	cvt.sat.f32.f32	%f918, %f917;
+	mul.f32 	%f919, %f94, %f918;
+	mul.f32 	%f920, %f95, %f918;
+	mul.f32 	%f921, %f96, %f918;
+	mul.f32 	%f922, %f167, %f909;
+	mul.f32 	%f923, %f168, %f911;
+	neg.f32 	%f924, %f923;
+	sub.f32 	%f925, %f924, %f922;
+	mul.f32 	%f926, %f169, %f915;
+	sub.f32 	%f927, %f925, %f926;
+	cvt.sat.f32.f32	%f928, %f927;
+	mul.f32 	%f929, %f94, %f928;
+	mul.f32 	%f930, %f95, %f928;
+	mul.f32 	%f931, %f96, %f928;
+	mul.f32 	%f932, %f906, %f909;
+	mul.f32 	%f933, %f907, %f911;
+	neg.f32 	%f934, %f933;
+	sub.f32 	%f935, %f934, %f932;
+	mul.f32 	%f936, %f908, %f915;
+	sub.f32 	%f937, %f935, %f936;
+	cvt.sat.f32.f32	%f938, %f937;
+	mul.f32 	%f939, %f94, %f938;
+	mul.f32 	%f940, %f95, %f938;
+	mul.f32 	%f941, %f96, %f938;
+	add.f32 	%f942, %f919, %f929;
+	add.f32 	%f943, %f920, %f930;
+	add.f32 	%f944, %f921, %f931;
+	add.f32 	%f945, %f942, %f939;
+	add.f32 	%f946, %f943, %f940;
+	add.f32 	%f947, %f944, %f941;
+	mul.f32 	%f948, %f945, 0f3F13CD3A;
+	mul.f32 	%f949, %f946, 0f3F13CD3A;
+	mul.f32 	%f950, %f947, 0f3F13CD3A;
+	div.rn.f32 	%f951, %f77, %f948;
+	div.rn.f32 	%f952, %f78, %f949;
+	div.rn.f32 	%f953, %f79, %f950;
+	setp.eq.f32	%p135, %f77, 0f00000000;
+	selp.f32	%f954, 0f00000000, %f951, %p135;
+	setp.eq.f32	%p136, %f78, 0f00000000;
+	selp.f32	%f955, 0f00000000, %f952, %p136;
+	setp.eq.f32	%p137, %f79, 0f00000000;
+	selp.f32	%f956, 0f00000000, %f953, %p137;
+	mul.f32 	%f176, %f919, %f954;
+	mul.f32 	%f177, %f920, %f955;
+	mul.f32 	%f178, %f921, %f956;
+	mul.f32 	%f179, %f929, %f954;
+	mul.f32 	%f180, %f930, %f955;
+	mul.f32 	%f181, %f931, %f956;
+	mul.f32 	%f182, %f939, %f954;
+	mul.f32 	%f183, %f940, %f955;
+	mul.f32 	%f184, %f941, %f956;
+	ld.global.u32 	%r319, [additive];
+	setp.eq.s32	%p138, %r319, 0;
+	cvt.u64.u32	%rd22, %r2;
+	cvt.u64.u32	%rd23, %r3;
+	mov.f32 	%f886, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs60, %f886;}
+
+	// inline asm
+	@%p138 bra 	BB0_128;
+
+	mov.u64 	%rd136, image_RNM0;
+	cvta.global.u64 	%rd125, %rd136;
+	mov.u32 	%r323, 8;
+	// inline asm
+	call (%rd124), _rt_buffer_get_64, (%rd125, %r105, %r323, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	ld.v4.u16 	{%rs67, %rs68, %rs69, %rs70}, [%rd124];
+	// inline asm
+	{  cvt.f32.f16 %f957, %rs67;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f958, %rs68;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f959, %rs69;}
+
+	// inline asm
+	// inline asm
+	call (%rd130), _rt_buffer_get_64, (%rd125, %r105, %r323, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	add.f32 	%f960, %f176, %f957;
+	add.f32 	%f961, %f177, %f958;
+	add.f32 	%f962, %f178, %f959;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs66, %f962;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs65, %f961;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f960;}
+
+	// inline asm
+	st.v4.u16 	[%rd130], {%rs64, %rs65, %rs66, %rs60};
+	bra.uni 	BB0_129;
+
+BB0_128:
+	mov.u64 	%rd143, image_RNM0;
+	cvta.global.u64 	%rd138, %rd143;
+	mov.u32 	%r325, 8;
+	// inline asm
+	call (%rd137), _rt_buffer_get_64, (%rd138, %r105, %r325, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs73, %f178;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs72, %f177;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs71, %f176;}
+
+	// inline asm
+	st.v4.u16 	[%rd137], {%rs71, %rs72, %rs73, %rs60};
+
+BB0_129:
+	ld.global.u32 	%r326, [additive];
+	setp.eq.s32	%p139, %r326, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs74, %f886;}
+
+	// inline asm
+	@%p139 bra 	BB0_131;
+
+	mov.u64 	%rd156, image_RNM1;
+	cvta.global.u64 	%rd145, %rd156;
+	mov.u32 	%r330, 8;
+	// inline asm
+	call (%rd144), _rt_buffer_get_64, (%rd145, %r105, %r330, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	ld.v4.u16 	{%rs81, %rs82, %rs83, %rs84}, [%rd144];
+	// inline asm
+	{  cvt.f32.f16 %f967, %rs81;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f968, %rs82;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f969, %rs83;}
+
+	// inline asm
+	// inline asm
+	call (%rd150), _rt_buffer_get_64, (%rd145, %r105, %r330, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	add.f32 	%f970, %f179, %f967;
+	add.f32 	%f971, %f180, %f968;
+	add.f32 	%f972, %f181, %f969;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs80, %f972;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs79, %f971;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs78, %f970;}
+
+	// inline asm
+	st.v4.u16 	[%rd150], {%rs78, %rs79, %rs80, %rs74};
+	bra.uni 	BB0_132;
+
+BB0_131:
+	mov.u64 	%rd163, image_RNM1;
+	cvta.global.u64 	%rd158, %rd163;
+	mov.u32 	%r332, 8;
+	// inline asm
+	call (%rd157), _rt_buffer_get_64, (%rd158, %r105, %r332, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs87, %f181;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs86, %f180;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs85, %f179;}
+
+	// inline asm
+	st.v4.u16 	[%rd157], {%rs85, %rs86, %rs87, %rs74};
+
+BB0_132:
+	ld.global.u32 	%r333, [additive];
+	setp.eq.s32	%p140, %r333, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs88, %f886;}
+
+	// inline asm
+	@%p140 bra 	BB0_134;
+
+	mov.u64 	%rd176, image_RNM2;
+	cvta.global.u64 	%rd165, %rd176;
+	mov.u32 	%r337, 8;
+	// inline asm
+	call (%rd164), _rt_buffer_get_64, (%rd165, %r105, %r337, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	ld.v4.u16 	{%rs95, %rs96, %rs97, %rs98}, [%rd164];
+	// inline asm
+	{  cvt.f32.f16 %f977, %rs95;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f978, %rs96;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f979, %rs97;}
+
+	// inline asm
+	// inline asm
+	call (%rd170), _rt_buffer_get_64, (%rd165, %r105, %r337, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	add.f32 	%f980, %f182, %f977;
+	add.f32 	%f981, %f183, %f978;
+	add.f32 	%f982, %f184, %f979;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs94, %f982;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs93, %f981;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs92, %f980;}
+
+	// inline asm
+	st.v4.u16 	[%rd170], {%rs92, %rs93, %rs94, %rs88};
+	bra.uni 	BB0_152;
+
+BB0_134:
+	mov.u64 	%rd183, image_RNM2;
+	cvta.global.u64 	%rd178, %rd183;
+	mov.u32 	%r339, 8;
+	// inline asm
+	call (%rd177), _rt_buffer_get_64, (%rd178, %r105, %r339, %rd22, %rd23, %rd31, %rd31);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs101, %f184;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs100, %f183;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs99, %f182;}
+
+	// inline asm
+	st.v4.u16 	[%rd177], {%rs99, %rs100, %rs101, %rs88};
+
+BB0_152:
+	ret;
+}
+
+