move to self host

1 files changed, 2069 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSkyCubemapSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSkyCubemapSH.ptx
new file mode 100644
index 00000000..e71ceeb1
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmSkyCubemapSH.ptx
@@ -0,0 +1,2069 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 image_RNM3[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 1 .b8 rnd_seeds[1];
+.global .align 4 .u32 sky;
+.global .align 4 .b8 skyColor[12];
+.global .align 4 .u32 samples;
+.global .align 4 .u32 hemispherical;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo3skyE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename3skyE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum3skyE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic3skyE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation3skyE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
+.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[40];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<106>;
+	.reg .b16 	%rs<154>;
+	.reg .f32 	%f<901>;
+	.reg .b32 	%r<383>;
+	.reg .b64 	%rd<288>;
+
+
+	mov.u64 	%rd287, __local_depot0;
+	cvta.local.u64 	%SP, %rd287;
+	ld.global.u32 	%r1, [samples];
+	ld.global.v2.u32 	{%r93, %r94}, [pixelID];
+	cvt.u64.u32	%rd22, %r93;
+	cvt.u64.u32	%rd23, %r94;
+	mov.u64 	%rd26, uvnormal;
+	cvta.global.u64 	%rd21, %rd26;
+	mov.u32 	%r91, 2;
+	mov.u32 	%r92, 4;
+	mov.u64 	%rd25, 0;
+	// inline asm
+	call (%rd20), _rt_buffer_get_64, (%rd21, %r91, %r92, %rd22, %rd23, %rd25, %rd25);
+	// inline asm
+	ld.u32 	%r2, [%rd20];
+	shr.u32 	%r97, %r2, 16;
+	cvt.u16.u32	%rs1, %r97;
+	and.b16  	%rs7, %rs1, 255;
+	cvt.u16.u32	%rs8, %r2;
+	or.b16  	%rs9, %rs8, %rs7;
+	setp.eq.s16	%p4, %rs9, 0;
+	mov.f32 	%f817, 0f00000000;
+	mov.f32 	%f818, %f817;
+	mov.f32 	%f819, %f817;
+	@%p4 bra 	BB0_2;
+
+	ld.u8 	%rs10, [%rd20+1];
+	and.b16  	%rs12, %rs8, 255;
+	cvt.rn.f32.u16	%f215, %rs12;
+	div.rn.f32 	%f216, %f215, 0f437F0000;
+	fma.rn.f32 	%f217, %f216, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f218, %rs10;
+	div.rn.f32 	%f219, %f218, 0f437F0000;
+	fma.rn.f32 	%f220, %f219, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f221, %rs7;
+	div.rn.f32 	%f222, %f221, 0f437F0000;
+	fma.rn.f32 	%f223, %f222, 0f40000000, 0fBF800000;
+	mul.f32 	%f224, %f220, %f220;
+	fma.rn.f32 	%f225, %f217, %f217, %f224;
+	fma.rn.f32 	%f226, %f223, %f223, %f225;
+	sqrt.rn.f32 	%f227, %f226;
+	rcp.rn.f32 	%f228, %f227;
+	mul.f32 	%f817, %f217, %f228;
+	mul.f32 	%f818, %f220, %f228;
+	mul.f32 	%f819, %f223, %f228;
+
+BB0_2:
+	ld.global.v2.u32 	{%r98, %r99}, [pixelID];
+	ld.global.v2.u32 	{%r101, %r102}, [tileInfo];
+	add.s32 	%r3, %r98, %r101;
+	add.s32 	%r4, %r99, %r102;
+	setp.eq.f32	%p5, %f818, 0f00000000;
+	setp.eq.f32	%p6, %f817, 0f00000000;
+	and.pred  	%p7, %p6, %p5;
+	setp.eq.f32	%p8, %f819, 0f00000000;
+	and.pred  	%p9, %p7, %p8;
+	@%p9 bra 	BB0_107;
+	bra.uni 	BB0_3;
+
+BB0_107:
+	ld.global.u32 	%r382, [imageEnabled];
+	and.b32  	%r291, %r382, 1;
+	setp.eq.b32	%p98, %r291, 1;
+	@!%p98 bra 	BB0_109;
+	bra.uni 	BB0_108;
+
+BB0_108:
+	cvt.u64.u32	%rd173, %r4;
+	cvt.u64.u32	%rd172, %r3;
+	mov.u64 	%rd176, image;
+	cvta.global.u64 	%rd171, %rd176;
+	mov.u64 	%rd175, 0;
+	// inline asm
+	call (%rd170), _rt_buffer_get_64, (%rd171, %r91, %r92, %rd172, %rd173, %rd175, %rd175);
+	// inline asm
+	mov.u16 	%rs88, 0;
+	st.v4.u8 	[%rd170], {%rs88, %rs88, %rs88, %rs88};
+	ld.global.u32 	%r382, [imageEnabled];
+
+BB0_109:
+	cvt.u64.u32	%rd18, %r3;
+	cvt.u64.u32	%rd19, %r4;
+	and.b32  	%r294, %r382, 4;
+	setp.eq.s32	%p99, %r294, 0;
+	@%p99 bra 	BB0_113;
+
+	ld.global.u32 	%r295, [additive];
+	setp.eq.s32	%p100, %r295, 0;
+	@%p100 bra 	BB0_112;
+
+	mov.u64 	%rd189, image_HDR;
+	cvta.global.u64 	%rd178, %rd189;
+	mov.u32 	%r299, 8;
+	mov.u64 	%rd188, 0;
+	// inline asm
+	call (%rd177), _rt_buffer_get_64, (%rd178, %r91, %r299, %rd18, %rd19, %rd188, %rd188);
+	// inline asm
+	ld.v4.u16 	{%rs95, %rs96, %rs97, %rs98}, [%rd177];
+	// inline asm
+	{  cvt.f32.f16 %f726, %rs95;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f727, %rs96;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f728, %rs97;}
+
+	// inline asm
+	// inline asm
+	call (%rd183), _rt_buffer_get_64, (%rd178, %r91, %r299, %rd18, %rd19, %rd188, %rd188);
+	// inline asm
+	add.f32 	%f729, %f726, 0f00000000;
+	add.f32 	%f730, %f727, 0f00000000;
+	add.f32 	%f731, %f728, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs94, %f731;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs93, %f730;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs92, %f729;}
+
+	// inline asm
+	mov.u16 	%rs99, 0;
+	st.v4.u16 	[%rd183], {%rs92, %rs93, %rs94, %rs99};
+	bra.uni 	BB0_113;
+
+BB0_3:
+	ld.global.v2.u32 	{%r110, %r111}, [pixelID];
+	cvt.u64.u32	%rd29, %r110;
+	cvt.u64.u32	%rd30, %r111;
+	mov.u64 	%rd39, uvpos;
+	cvta.global.u64 	%rd28, %rd39;
+	mov.u32 	%r107, 12;
+	// inline asm
+	call (%rd27), _rt_buffer_get_64, (%rd28, %r91, %r107, %rd29, %rd30, %rd25, %rd25);
+	// inline asm
+	ld.f32 	%f244, [%rd27+8];
+	ld.f32 	%f245, [%rd27+4];
+	ld.f32 	%f246, [%rd27];
+	mul.f32 	%f247, %f246, 0f3456BF95;
+	mul.f32 	%f248, %f245, 0f3456BF95;
+	mul.f32 	%f249, %f244, 0f3456BF95;
+	abs.f32 	%f250, %f817;
+	div.rn.f32 	%f251, %f247, %f250;
+	abs.f32 	%f252, %f818;
+	div.rn.f32 	%f253, %f248, %f252;
+	abs.f32 	%f254, %f819;
+	div.rn.f32 	%f255, %f249, %f254;
+	abs.f32 	%f256, %f251;
+	abs.f32 	%f257, %f253;
+	abs.f32 	%f258, %f255;
+	mov.f32 	%f259, 0f38D1B717;
+	max.f32 	%f260, %f256, %f259;
+	max.f32 	%f261, %f257, %f259;
+	max.f32 	%f262, %f258, %f259;
+	fma.rn.f32 	%f7, %f817, %f260, %f246;
+	fma.rn.f32 	%f8, %f818, %f261, %f245;
+	fma.rn.f32 	%f9, %f819, %f262, %f244;
+	ld.global.u32 	%r5, [hemispherical];
+	setp.gt.f32	%p10, %f250, %f254;
+	neg.f32 	%f263, %f818;
+	selp.f32	%f264, %f263, 0f00000000, %p10;
+	neg.f32 	%f265, %f819;
+	selp.f32	%f266, %f817, %f265, %p10;
+	selp.f32	%f267, 0f00000000, %f818, %p10;
+	mul.f32 	%f268, %f266, %f266;
+	fma.rn.f32 	%f269, %f264, %f264, %f268;
+	fma.rn.f32 	%f270, %f267, %f267, %f269;
+	sqrt.rn.f32 	%f271, %f270;
+	rcp.rn.f32 	%f272, %f271;
+	mul.f32 	%f10, %f264, %f272;
+	mul.f32 	%f11, %f266, %f272;
+	mul.f32 	%f12, %f267, %f272;
+	ld.global.v2.u32 	{%r114, %r115}, [pixelID];
+	cvt.u64.u32	%rd35, %r114;
+	cvt.u64.u32	%rd36, %r115;
+	mov.u64 	%rd40, rnd_seeds;
+	cvta.global.u64 	%rd34, %rd40;
+	// inline asm
+	call (%rd33), _rt_buffer_get_64, (%rd34, %r91, %r92, %rd35, %rd36, %rd25, %rd25);
+	// inline asm
+	mov.f32 	%f876, 0f00000000;
+	setp.lt.s32	%p11, %r1, 1;
+	mov.f32 	%f875, %f876;
+	mov.f32 	%f874, %f876;
+	mov.f32 	%f873, %f876;
+	mov.f32 	%f872, %f876;
+	mov.f32 	%f871, %f876;
+	mov.f32 	%f870, %f876;
+	mov.f32 	%f869, %f876;
+	mov.f32 	%f868, %f876;
+	mov.f32 	%f867, %f876;
+	mov.f32 	%f866, %f876;
+	mov.f32 	%f865, %f876;
+	mov.f32 	%f864, %f876;
+	mov.f32 	%f863, %f876;
+	mov.f32 	%f862, %f876;
+	@%p11 bra 	BB0_56;
+
+	cvt.rn.f32.s32	%f288, %r1;
+	rcp.rn.f32 	%f13, %f288;
+	ld.u32 	%r360, [%rd33];
+	mul.f32 	%f14, %f7, 0f3456BF95;
+	mul.f32 	%f15, %f8, 0f3456BF95;
+	mul.f32 	%f16, %f9, 0f3456BF95;
+	mul.f32 	%f289, %f817, %f11;
+	mul.f32 	%f290, %f818, %f10;
+	sub.f32 	%f17, %f290, %f289;
+	mul.f32 	%f291, %f819, %f10;
+	mul.f32 	%f292, %f817, %f12;
+	sub.f32 	%f18, %f292, %f291;
+	mul.f32 	%f293, %f818, %f12;
+	mul.f32 	%f294, %f819, %f11;
+	sub.f32 	%f19, %f294, %f293;
+	mov.f32 	%f876, 0f00000000;
+	mov.u32 	%r118, 0;
+	abs.f32 	%f375, %f15;
+	abs.f32 	%f376, %f14;
+	max.f32 	%f377, %f376, %f375;
+	abs.f32 	%f378, %f16;
+	max.f32 	%f379, %f377, %f378;
+	mov.u32 	%r357, %r118;
+	mov.f32 	%f875, %f876;
+	mov.f32 	%f874, %f876;
+	mov.f32 	%f873, %f876;
+	mov.f32 	%f872, %f876;
+	mov.f32 	%f871, %f876;
+	mov.f32 	%f870, %f876;
+	mov.f32 	%f869, %f876;
+	mov.f32 	%f868, %f876;
+	mov.f32 	%f867, %f876;
+	mov.f32 	%f866, %f876;
+	mov.f32 	%f865, %f876;
+	mov.f32 	%f864, %f876;
+	mov.f32 	%f863, %f876;
+	mov.f32 	%f862, %f876;
+
+BB0_5:
+	mov.u32 	%r359, %r118;
+
+BB0_6:
+	mov.u32 	%r10, %r360;
+	cvt.rn.f32.s32	%f767, %r357;
+	mad.lo.s32 	%r120, %r10, 1664525, 1013904223;
+	and.b32  	%r121, %r120, 16777215;
+	cvt.rn.f32.u32	%f295, %r121;
+	fma.rn.f32 	%f296, %f295, 0f33800000, %f767;
+	mul.f32 	%f51, %f13, %f296;
+	mad.lo.s32 	%r11, %r120, 1664525, 1013904223;
+	and.b32  	%r122, %r11, 16777215;
+	cvt.rn.f32.u32	%f297, %r122;
+	cvt.rn.f32.s32	%f298, %r359;
+	fma.rn.f32 	%f299, %f297, 0f33800000, %f298;
+	mul.f32 	%f300, %f13, %f299;
+	mul.f32 	%f301, %f51, %f51;
+	mov.f32 	%f302, 0f3F800000;
+	sub.f32 	%f303, %f302, %f301;
+	mov.f32 	%f304, 0f00000000;
+	max.f32 	%f305, %f304, %f303;
+	sqrt.rn.f32 	%f52, %f305;
+	mul.f32 	%f856, %f300, 0f40C90FDB;
+	abs.f32 	%f54, %f856;
+	setp.neu.f32	%p12, %f54, 0f7F800000;
+	mov.f32 	%f850, %f856;
+	@%p12 bra 	BB0_8;
+
+	mul.rn.f32 	%f850, %f856, %f304;
+
+BB0_8:
+	mul.f32 	%f307, %f850, 0f3F22F983;
+	cvt.rni.s32.f32	%r370, %f307;
+	cvt.rn.f32.s32	%f308, %r370;
+	neg.f32 	%f309, %f308;
+	mov.f32 	%f310, 0f3FC90FDA;
+	fma.rn.f32 	%f311, %f309, %f310, %f850;
+	mov.f32 	%f312, 0f33A22168;
+	fma.rn.f32 	%f313, %f309, %f312, %f311;
+	mov.f32 	%f314, 0f27C234C5;
+	fma.rn.f32 	%f851, %f309, %f314, %f313;
+	abs.f32 	%f315, %f850;
+	setp.leu.f32	%p13, %f315, 0f47CE4780;
+	@%p13 bra 	BB0_19;
+
+	add.u64 	%rd42, %SP, 12;
+	cvta.to.local.u64 	%rd283, %rd42;
+	mov.u32 	%r361, 0;
+	mov.u64 	%rd284, 0;
+	mov.u32 	%r362, %r361;
+
+BB0_10:
+	.pragma "nounroll";
+	mov.b32 	 %r332, %f850;
+	shl.b32 	%r331, %r332, 8;
+	or.b32  	%r330, %r331, -2147483648;
+	add.u64 	%rd278, %SP, 12;
+	cvta.to.local.u64 	%rd277, %rd278;
+	shl.b64 	%rd43, %rd284, 2;
+	mov.u64 	%rd44, __cudart_i2opi_f;
+	add.s64 	%rd45, %rd44, %rd43;
+	ld.const.u32 	%r128, [%rd45];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r126, %r128, %r330, %r362;
+	madc.hi.u32     %r362, %r128, %r330,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd283], %r126;
+	add.s32 	%r361, %r361, 1;
+	cvt.s64.s32	%rd284, %r361;
+	mul.wide.s32 	%rd48, %r361, 4;
+	add.s64 	%rd283, %rd277, %rd48;
+	setp.ne.s32	%p14, %r361, 6;
+	@%p14 bra 	BB0_10;
+
+	mov.b32 	 %r334, %f850;
+	shr.u32 	%r333, %r334, 23;
+	add.u64 	%rd279, %SP, 12;
+	and.b32  	%r131, %r333, 255;
+	add.s32 	%r132, %r131, -128;
+	shr.u32 	%r133, %r132, 5;
+	cvta.to.local.u64 	%rd50, %rd279;
+	st.local.u32 	[%rd50+24], %r362;
+	mov.u32 	%r134, 6;
+	sub.s32 	%r135, %r134, %r133;
+	mul.wide.s32 	%rd51, %r135, 4;
+	add.s64 	%rd8, %rd50, %rd51;
+	ld.local.u32 	%r363, [%rd8];
+	ld.local.u32 	%r364, [%rd8+-4];
+	and.b32  	%r23, %r333, 31;
+	setp.eq.s32	%p15, %r23, 0;
+	@%p15 bra 	BB0_13;
+
+	mov.u32 	%r136, 32;
+	sub.s32 	%r137, %r136, %r23;
+	shr.u32 	%r138, %r364, %r137;
+	shl.b32 	%r139, %r363, %r23;
+	add.s32 	%r363, %r138, %r139;
+	ld.local.u32 	%r140, [%rd8+-8];
+	shr.u32 	%r141, %r140, %r137;
+	shl.b32 	%r142, %r364, %r23;
+	add.s32 	%r364, %r141, %r142;
+
+BB0_13:
+	mov.b32 	 %r342, %f850;
+	and.b32  	%r366, %r342, -2147483648;
+	shr.u32 	%r143, %r364, 30;
+	shl.b32 	%r144, %r363, 2;
+	add.s32 	%r365, %r143, %r144;
+	shl.b32 	%r29, %r364, 2;
+	shr.u32 	%r145, %r365, 31;
+	shr.u32 	%r146, %r363, 30;
+	add.s32 	%r30, %r145, %r146;
+	setp.eq.s32	%p16, %r145, 0;
+	@%p16 bra 	BB0_14;
+	bra.uni 	BB0_15;
+
+BB0_14:
+	mov.u32 	%r367, %r29;
+	bra.uni 	BB0_16;
+
+BB0_15:
+	mov.b32 	 %r344, %f850;
+	and.b32  	%r343, %r344, -2147483648;
+	not.b32 	%r147, %r365;
+	neg.s32 	%r367, %r29;
+	setp.eq.s32	%p17, %r29, 0;
+	selp.u32	%r148, 1, 0, %p17;
+	add.s32 	%r365, %r148, %r147;
+	xor.b32  	%r366, %r343, -2147483648;
+
+BB0_16:
+	mov.b32 	 %r346, %f850;
+	and.b32  	%r345, %r346, -2147483648;
+	clz.b32 	%r369, %r365;
+	setp.eq.s32	%p18, %r369, 0;
+	shl.b32 	%r149, %r365, %r369;
+	mov.u32 	%r150, 32;
+	sub.s32 	%r151, %r150, %r369;
+	shr.u32 	%r152, %r367, %r151;
+	add.s32 	%r153, %r152, %r149;
+	selp.b32	%r38, %r365, %r153, %p18;
+	mov.u32 	%r154, -921707870;
+	mul.hi.u32 	%r368, %r38, %r154;
+	setp.eq.s32	%p19, %r345, 0;
+	neg.s32 	%r155, %r30;
+	selp.b32	%r370, %r30, %r155, %p19;
+	setp.lt.s32	%p20, %r368, 1;
+	@%p20 bra 	BB0_18;
+
+	mul.lo.s32 	%r156, %r38, -921707870;
+	shr.u32 	%r157, %r156, 31;
+	shl.b32 	%r158, %r368, 1;
+	add.s32 	%r368, %r157, %r158;
+	add.s32 	%r369, %r369, 1;
+
+BB0_18:
+	mov.u32 	%r159, 126;
+	sub.s32 	%r160, %r159, %r369;
+	shl.b32 	%r161, %r160, 23;
+	add.s32 	%r162, %r368, 1;
+	shr.u32 	%r163, %r162, 7;
+	add.s32 	%r164, %r163, 1;
+	shr.u32 	%r165, %r164, 1;
+	add.s32 	%r166, %r165, %r161;
+	or.b32  	%r167, %r166, %r366;
+	mov.b32 	 %f851, %r167;
+
+BB0_19:
+	add.s32 	%r46, %r370, 1;
+	and.b32  	%r47, %r46, 1;
+	setp.eq.s32	%p21, %r47, 0;
+	@%p21 bra 	BB0_21;
+	bra.uni 	BB0_20;
+
+BB0_21:
+	mul.rn.f32 	%f777, %f851, %f851;
+	mov.f32 	%f318, 0f3C08839E;
+	mov.f32 	%f319, 0fB94CA1F9;
+	fma.rn.f32 	%f852, %f319, %f777, %f318;
+	bra.uni 	BB0_22;
+
+BB0_20:
+	mul.rn.f32 	%f773, %f851, %f851;
+	mov.f32 	%f316, 0fBAB6061A;
+	mov.f32 	%f317, 0f37CCF5CE;
+	fma.rn.f32 	%f852, %f317, %f773, %f316;
+
+BB0_22:
+	@%p21 bra 	BB0_24;
+	bra.uni 	BB0_23;
+
+BB0_24:
+	mul.rn.f32 	%f776, %f851, %f851;
+	mov.f32 	%f772, 0f00000000;
+	mov.f32 	%f323, 0fBE2AAAA3;
+	fma.rn.f32 	%f324, %f852, %f776, %f323;
+	fma.rn.f32 	%f853, %f324, %f776, %f772;
+	bra.uni 	BB0_25;
+
+BB0_23:
+	mul.rn.f32 	%f774, %f851, %f851;
+	mov.f32 	%f320, 0f3D2AAAA5;
+	fma.rn.f32 	%f321, %f852, %f774, %f320;
+	mov.f32 	%f322, 0fBF000000;
+	fma.rn.f32 	%f853, %f321, %f774, %f322;
+
+BB0_25:
+	fma.rn.f32 	%f854, %f853, %f851, %f851;
+	@%p21 bra 	BB0_27;
+
+	mul.rn.f32 	%f775, %f851, %f851;
+	mov.f32 	%f761, 0f3F800000;
+	fma.rn.f32 	%f854, %f853, %f775, %f761;
+
+BB0_27:
+	add.s32 	%r347, %r370, 1;
+	and.b32  	%r168, %r347, 2;
+	setp.eq.s32	%p24, %r168, 0;
+	@%p24 bra 	BB0_29;
+
+	mov.f32 	%f768, 0f00000000;
+	mov.f32 	%f328, 0fBF800000;
+	fma.rn.f32 	%f854, %f854, %f328, %f768;
+
+BB0_29:
+	abs.f32 	%f762, %f856;
+	setp.neu.f32	%p105, %f762, 0f7F800000;
+	@%p105 bra 	BB0_31;
+
+	mov.f32 	%f771, 0f00000000;
+	mul.rn.f32 	%f856, %f856, %f771;
+
+BB0_31:
+	mov.f32 	%f765, 0f27C234C5;
+	mov.f32 	%f764, 0f33A22168;
+	mov.f32 	%f763, 0f3FC90FDA;
+	mul.f32 	%f330, %f856, 0f3F22F983;
+	cvt.rni.s32.f32	%r380, %f330;
+	cvt.rn.f32.s32	%f331, %r380;
+	neg.f32 	%f332, %f331;
+	fma.rn.f32 	%f334, %f332, %f763, %f856;
+	fma.rn.f32 	%f336, %f332, %f764, %f334;
+	fma.rn.f32 	%f857, %f332, %f765, %f336;
+	abs.f32 	%f338, %f856;
+	setp.leu.f32	%p26, %f338, 0f47CE4780;
+	@%p26 bra 	BB0_42;
+
+	add.u64 	%rd53, %SP, 12;
+	cvta.to.local.u64 	%rd285, %rd53;
+	mov.b32 	 %r49, %f856;
+	shl.b32 	%r171, %r49, 8;
+	or.b32  	%r51, %r171, -2147483648;
+	mov.u32 	%r371, 0;
+	mov.u64 	%rd286, %rd25;
+	mov.u32 	%r372, %r371;
+
+BB0_33:
+	.pragma "nounroll";
+	add.u64 	%rd281, %SP, 12;
+	cvta.to.local.u64 	%rd280, %rd281;
+	shl.b64 	%rd54, %rd286, 2;
+	mov.u64 	%rd55, __cudart_i2opi_f;
+	add.s64 	%rd56, %rd55, %rd54;
+	ld.const.u32 	%r174, [%rd56];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r172, %r174, %r51, %r372;
+	madc.hi.u32     %r372, %r174, %r51,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd285], %r172;
+	add.s32 	%r371, %r371, 1;
+	cvt.s64.s32	%rd286, %r371;
+	mul.wide.s32 	%rd57, %r371, 4;
+	add.s64 	%rd285, %rd280, %rd57;
+	setp.ne.s32	%p27, %r371, 6;
+	@%p27 bra 	BB0_33;
+
+	mov.b32 	 %r349, %f856;
+	shr.u32 	%r348, %r349, 23;
+	add.u64 	%rd282, %SP, 12;
+	and.b32  	%r177, %r348, 255;
+	add.s32 	%r178, %r177, -128;
+	shr.u32 	%r179, %r178, 5;
+	cvta.to.local.u64 	%rd59, %rd282;
+	st.local.u32 	[%rd59+24], %r372;
+	mov.u32 	%r180, 6;
+	sub.s32 	%r181, %r180, %r179;
+	mul.wide.s32 	%rd60, %r181, 4;
+	add.s64 	%rd15, %rd59, %rd60;
+	ld.local.u32 	%r373, [%rd15];
+	ld.local.u32 	%r374, [%rd15+-4];
+	and.b32  	%r59, %r348, 31;
+	setp.eq.s32	%p28, %r59, 0;
+	@%p28 bra 	BB0_36;
+
+	mov.u32 	%r182, 32;
+	sub.s32 	%r183, %r182, %r59;
+	shr.u32 	%r184, %r374, %r183;
+	shl.b32 	%r185, %r373, %r59;
+	add.s32 	%r373, %r184, %r185;
+	ld.local.u32 	%r186, [%rd15+-8];
+	shr.u32 	%r187, %r186, %r183;
+	shl.b32 	%r188, %r374, %r59;
+	add.s32 	%r374, %r187, %r188;
+
+BB0_36:
+	mov.b32 	 %r352, %f856;
+	and.b32  	%r376, %r352, -2147483648;
+	shr.u32 	%r189, %r374, 30;
+	shl.b32 	%r190, %r373, 2;
+	add.s32 	%r375, %r189, %r190;
+	shl.b32 	%r65, %r374, 2;
+	shr.u32 	%r191, %r375, 31;
+	shr.u32 	%r192, %r373, 30;
+	add.s32 	%r66, %r191, %r192;
+	setp.eq.s32	%p29, %r191, 0;
+	@%p29 bra 	BB0_37;
+	bra.uni 	BB0_38;
+
+BB0_37:
+	mov.u32 	%r377, %r65;
+	bra.uni 	BB0_39;
+
+BB0_38:
+	mov.b32 	 %r354, %f856;
+	and.b32  	%r353, %r354, -2147483648;
+	not.b32 	%r193, %r375;
+	neg.s32 	%r377, %r65;
+	setp.eq.s32	%p30, %r65, 0;
+	selp.u32	%r194, 1, 0, %p30;
+	add.s32 	%r375, %r194, %r193;
+	xor.b32  	%r376, %r353, -2147483648;
+
+BB0_39:
+	mov.b32 	 %r356, %f856;
+	and.b32  	%r355, %r356, -2147483648;
+	clz.b32 	%r379, %r375;
+	setp.eq.s32	%p31, %r379, 0;
+	shl.b32 	%r195, %r375, %r379;
+	mov.u32 	%r196, 32;
+	sub.s32 	%r197, %r196, %r379;
+	shr.u32 	%r198, %r377, %r197;
+	add.s32 	%r199, %r198, %r195;
+	selp.b32	%r74, %r375, %r199, %p31;
+	mov.u32 	%r200, -921707870;
+	mul.hi.u32 	%r378, %r74, %r200;
+	setp.eq.s32	%p32, %r355, 0;
+	neg.s32 	%r201, %r66;
+	selp.b32	%r380, %r66, %r201, %p32;
+	setp.lt.s32	%p33, %r378, 1;
+	@%p33 bra 	BB0_41;
+
+	mul.lo.s32 	%r202, %r74, -921707870;
+	shr.u32 	%r203, %r202, 31;
+	shl.b32 	%r204, %r378, 1;
+	add.s32 	%r378, %r203, %r204;
+	add.s32 	%r379, %r379, 1;
+
+BB0_41:
+	mov.u32 	%r205, 126;
+	sub.s32 	%r206, %r205, %r379;
+	shl.b32 	%r207, %r206, 23;
+	add.s32 	%r208, %r378, 1;
+	shr.u32 	%r209, %r208, 7;
+	add.s32 	%r210, %r209, 1;
+	shr.u32 	%r211, %r210, 1;
+	add.s32 	%r212, %r211, %r207;
+	or.b32  	%r213, %r212, %r376;
+	mov.b32 	 %f857, %r213;
+
+BB0_42:
+	and.b32  	%r82, %r380, 1;
+	setp.eq.s32	%p34, %r82, 0;
+	@%p34 bra 	BB0_44;
+	bra.uni 	BB0_43;
+
+BB0_44:
+	mul.rn.f32 	%f782, %f857, %f857;
+	mov.f32 	%f341, 0f3C08839E;
+	mov.f32 	%f342, 0fB94CA1F9;
+	fma.rn.f32 	%f858, %f342, %f782, %f341;
+	bra.uni 	BB0_45;
+
+BB0_43:
+	mul.rn.f32 	%f778, %f857, %f857;
+	mov.f32 	%f339, 0fBAB6061A;
+	mov.f32 	%f340, 0f37CCF5CE;
+	fma.rn.f32 	%f858, %f340, %f778, %f339;
+
+BB0_45:
+	@%p34 bra 	BB0_47;
+	bra.uni 	BB0_46;
+
+BB0_47:
+	mul.rn.f32 	%f781, %f857, %f857;
+	mov.f32 	%f770, 0f00000000;
+	mov.f32 	%f346, 0fBE2AAAA3;
+	fma.rn.f32 	%f347, %f858, %f781, %f346;
+	fma.rn.f32 	%f859, %f347, %f781, %f770;
+	bra.uni 	BB0_48;
+
+BB0_46:
+	mul.rn.f32 	%f779, %f857, %f857;
+	mov.f32 	%f343, 0f3D2AAAA5;
+	fma.rn.f32 	%f344, %f858, %f779, %f343;
+	mov.f32 	%f345, 0fBF000000;
+	fma.rn.f32 	%f859, %f344, %f779, %f345;
+
+BB0_48:
+	fma.rn.f32 	%f860, %f859, %f857, %f857;
+	@%p34 bra 	BB0_50;
+
+	mul.rn.f32 	%f780, %f857, %f857;
+	mov.f32 	%f766, 0f3F800000;
+	fma.rn.f32 	%f860, %f859, %f780, %f766;
+
+BB0_50:
+	and.b32  	%r214, %r380, 2;
+	setp.eq.s32	%p37, %r214, 0;
+	@%p37 bra 	BB0_52;
+
+	mov.f32 	%f769, 0f00000000;
+	mov.f32 	%f351, 0fBF800000;
+	fma.rn.f32 	%f860, %f860, %f351, %f769;
+
+BB0_52:
+	mul.f32 	%f352, %f52, %f854;
+	mul.f32 	%f353, %f52, %f860;
+	mul.f32 	%f354, %f10, %f353;
+	mul.f32 	%f355, %f11, %f353;
+	mul.f32 	%f356, %f12, %f353;
+	fma.rn.f32 	%f357, %f19, %f352, %f354;
+	fma.rn.f32 	%f358, %f18, %f352, %f355;
+	fma.rn.f32 	%f359, %f17, %f352, %f356;
+	fma.rn.f32 	%f89, %f817, %f51, %f357;
+	fma.rn.f32 	%f90, %f818, %f51, %f358;
+	fma.rn.f32 	%f91, %f819, %f51, %f359;
+	setp.gt.f32	%p38, %f90, 0f00000000;
+	setp.eq.s32	%p39, %r5, 0;
+	or.pred  	%p40, %p39, %p38;
+	@!%p40 bra 	BB0_54;
+	bra.uni 	BB0_53;
+
+BB0_53:
+	add.u64 	%rd61, %SP, 0;
+	cvta.to.local.u64 	%rd62, %rd61;
+	max.f32 	%f373, %f379, %f259;
+	ld.global.u32 	%r215, [sky];
+	neg.f32 	%f366, %f89;
+	neg.f32 	%f365, %f90;
+	neg.f32 	%f364, %f91;
+	mov.u32 	%r216, 6;
+	mov.u32 	%r217, 0;
+	// inline asm
+	call (%f360, %f361, %f362, %f363), _rt_texture_get_base_id, (%r215, %r216, %f364, %f365, %f366, %r217);
+	// inline asm
+	st.local.f32 	[%rd62], %f360;
+	st.local.f32 	[%rd62+4], %f361;
+	st.local.f32 	[%rd62+8], %f362;
+	ld.global.u32 	%r218, [root];
+	mov.u32 	%r219, 1;
+	mov.f32 	%f374, 0f6C4ECB8F;
+	// inline asm
+	call _rt_trace_64, (%r218, %f7, %f8, %f9, %f89, %f90, %f91, %r219, %f373, %f374, %rd61, %r107);
+	// inline asm
+	mul.f32 	%f381, %f818, %f90;
+	fma.rn.f32 	%f382, %f817, %f89, %f381;
+	fma.rn.f32 	%f383, %f819, %f91, %f382;
+	mul.f32 	%f384, %f383, 0f40800000;
+	cvt.sat.f32.f32	%f385, %f384;
+	ld.local.f32 	%f386, [%rd62];
+	mul.f32 	%f387, %f385, %f386;
+	ld.local.f32 	%f388, [%rd62+4];
+	mul.f32 	%f389, %f385, %f388;
+	ld.local.f32 	%f390, [%rd62+8];
+	mul.f32 	%f391, %f385, %f390;
+	fma.rn.f32 	%f868, %f89, %f387, %f868;
+	fma.rn.f32 	%f869, %f89, %f389, %f869;
+	fma.rn.f32 	%f870, %f89, %f391, %f870;
+	fma.rn.f32 	%f865, %f90, %f387, %f865;
+	fma.rn.f32 	%f866, %f90, %f389, %f866;
+	fma.rn.f32 	%f867, %f90, %f391, %f867;
+	fma.rn.f32 	%f862, %f91, %f387, %f862;
+	fma.rn.f32 	%f863, %f91, %f389, %f863;
+	fma.rn.f32 	%f864, %f91, %f391, %f864;
+	add.f32 	%f871, %f871, %f387;
+	add.f32 	%f872, %f872, %f389;
+	add.f32 	%f873, %f873, %f391;
+	cvt.sat.f32.f32	%f392, %f383;
+	fma.rn.f32 	%f874, %f392, %f386, %f874;
+	fma.rn.f32 	%f875, %f392, %f388, %f875;
+	fma.rn.f32 	%f876, %f392, %f390, %f876;
+
+BB0_54:
+	mad.lo.s32 	%r337, %r10, 1664525, 1013904223;
+	mad.lo.s32 	%r360, %r337, 1664525, 1013904223;
+	add.s32 	%r359, %r359, 1;
+	setp.lt.s32	%p41, %r359, %r1;
+	@%p41 bra 	BB0_6;
+
+	mad.lo.s32 	%r339, %r10, 1664525, 1013904223;
+	mad.lo.s32 	%r360, %r339, 1664525, 1013904223;
+	add.s32 	%r357, %r357, 1;
+	setp.lt.s32	%p42, %r357, %r1;
+	@%p42 bra 	BB0_5;
+
+BB0_56:
+	mul.lo.s32 	%r221, %r1, %r1;
+	cvt.rn.f32.s32	%f393, %r221;
+	rcp.rn.f32 	%f394, %f393;
+	mul.f32 	%f395, %f874, %f394;
+	mul.f32 	%f396, %f875, %f394;
+	mul.f32 	%f397, %f876, %f394;
+	mul.f32 	%f137, %f871, %f394;
+	mul.f32 	%f138, %f872, %f394;
+	mul.f32 	%f139, %f873, %f394;
+	mul.f32 	%f140, %f868, %f394;
+	mul.f32 	%f141, %f869, %f394;
+	mul.f32 	%f142, %f870, %f394;
+	mul.f32 	%f143, %f865, %f394;
+	mul.f32 	%f144, %f866, %f394;
+	mul.f32 	%f145, %f867, %f394;
+	mul.f32 	%f146, %f862, %f394;
+	mul.f32 	%f147, %f863, %f394;
+	mul.f32 	%f148, %f864, %f394;
+	fma.rn.f32 	%f398, %f874, %f394, %f395;
+	fma.rn.f32 	%f399, %f875, %f394, %f396;
+	fma.rn.f32 	%f400, %f876, %f394, %f397;
+	ld.global.f32 	%f401, [skyColor];
+	mul.f32 	%f149, %f401, %f398;
+	ld.global.f32 	%f402, [skyColor+4];
+	mul.f32 	%f150, %f399, %f402;
+	ld.global.f32 	%f403, [skyColor+8];
+	mul.f32 	%f151, %f400, %f403;
+	ld.global.u32 	%r381, [imageEnabled];
+	and.b32  	%r222, %r381, 1;
+	setp.eq.b32	%p43, %r222, 1;
+	@!%p43 bra 	BB0_91;
+	bra.uni 	BB0_57;
+
+BB0_57:
+	abs.f32 	%f153, %f149;
+	setp.lt.f32	%p44, %f153, 0f00800000;
+	mul.f32 	%f409, %f153, 0f4B800000;
+	selp.f32	%f410, 0fC3170000, 0fC2FE0000, %p44;
+	selp.f32	%f411, %f409, %f153, %p44;
+	mov.b32 	 %r223, %f411;
+	and.b32  	%r224, %r223, 8388607;
+	or.b32  	%r225, %r224, 1065353216;
+	mov.b32 	 %f412, %r225;
+	shr.u32 	%r226, %r223, 23;
+	cvt.rn.f32.u32	%f413, %r226;
+	add.f32 	%f414, %f410, %f413;
+	setp.gt.f32	%p45, %f412, 0f3FB504F3;
+	mul.f32 	%f415, %f412, 0f3F000000;
+	add.f32 	%f416, %f414, 0f3F800000;
+	selp.f32	%f417, %f415, %f412, %p45;
+	selp.f32	%f418, %f416, %f414, %p45;
+	add.f32 	%f419, %f417, 0fBF800000;
+	add.f32 	%f405, %f417, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f404,%f405;
+	// inline asm
+	add.f32 	%f420, %f419, %f419;
+	mul.f32 	%f421, %f404, %f420;
+	mul.f32 	%f422, %f421, %f421;
+	mov.f32 	%f423, 0f3C4CAF63;
+	mov.f32 	%f424, 0f3B18F0FE;
+	fma.rn.f32 	%f425, %f424, %f422, %f423;
+	mov.f32 	%f426, 0f3DAAAABD;
+	fma.rn.f32 	%f427, %f425, %f422, %f426;
+	mul.rn.f32 	%f428, %f427, %f422;
+	mul.rn.f32 	%f429, %f428, %f421;
+	sub.f32 	%f430, %f419, %f421;
+	neg.f32 	%f431, %f421;
+	add.f32 	%f432, %f430, %f430;
+	fma.rn.f32 	%f433, %f431, %f419, %f432;
+	mul.rn.f32 	%f434, %f404, %f433;
+	add.f32 	%f435, %f429, %f421;
+	sub.f32 	%f436, %f421, %f435;
+	add.f32 	%f437, %f429, %f436;
+	add.f32 	%f438, %f434, %f437;
+	add.f32 	%f439, %f435, %f438;
+	sub.f32 	%f440, %f435, %f439;
+	add.f32 	%f441, %f438, %f440;
+	mov.f32 	%f442, 0f3F317200;
+	mul.rn.f32 	%f443, %f418, %f442;
+	mov.f32 	%f444, 0f35BFBE8E;
+	mul.rn.f32 	%f445, %f418, %f444;
+	add.f32 	%f446, %f443, %f439;
+	sub.f32 	%f447, %f443, %f446;
+	add.f32 	%f448, %f439, %f447;
+	add.f32 	%f449, %f441, %f448;
+	add.f32 	%f450, %f445, %f449;
+	add.f32 	%f451, %f446, %f450;
+	sub.f32 	%f452, %f446, %f451;
+	add.f32 	%f453, %f450, %f452;
+	mov.f32 	%f454, 0f3EE66666;
+	mul.rn.f32 	%f455, %f454, %f451;
+	neg.f32 	%f456, %f455;
+	fma.rn.f32 	%f457, %f454, %f451, %f456;
+	fma.rn.f32 	%f458, %f454, %f453, %f457;
+	mov.f32 	%f459, 0f00000000;
+	fma.rn.f32 	%f460, %f459, %f451, %f458;
+	add.rn.f32 	%f461, %f455, %f460;
+	neg.f32 	%f462, %f461;
+	add.rn.f32 	%f463, %f455, %f462;
+	add.rn.f32 	%f464, %f463, %f460;
+	mov.b32 	 %r227, %f461;
+	setp.eq.s32	%p46, %r227, 1118925336;
+	add.s32 	%r228, %r227, -1;
+	mov.b32 	 %f465, %r228;
+	add.f32 	%f466, %f464, 0f37000000;
+	selp.f32	%f467, %f465, %f461, %p46;
+	selp.f32	%f154, %f466, %f464, %p46;
+	mul.f32 	%f468, %f467, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f469, %f468;
+	mov.f32 	%f470, 0fBF317200;
+	fma.rn.f32 	%f471, %f469, %f470, %f467;
+	mov.f32 	%f472, 0fB5BFBE8E;
+	fma.rn.f32 	%f473, %f469, %f472, %f471;
+	mul.f32 	%f474, %f473, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f475, %f474;
+	add.f32 	%f476, %f469, 0f00000000;
+	ex2.approx.f32 	%f477, %f476;
+	mul.f32 	%f478, %f475, %f477;
+	setp.lt.f32	%p47, %f467, 0fC2D20000;
+	selp.f32	%f479, 0f00000000, %f478, %p47;
+	setp.gt.f32	%p48, %f467, 0f42D20000;
+	selp.f32	%f892, 0f7F800000, %f479, %p48;
+	setp.eq.f32	%p49, %f892, 0f7F800000;
+	@%p49 bra 	BB0_59;
+
+	fma.rn.f32 	%f892, %f892, %f154, %f892;
+
+BB0_59:
+	mov.f32 	%f786, 0f3E666666;
+	cvt.rzi.f32.f32	%f785, %f786;
+	fma.rn.f32 	%f784, %f785, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f783, %f784;
+	setp.lt.f32	%p50, %f149, 0f00000000;
+	setp.eq.f32	%p51, %f783, 0f3F800000;
+	and.pred  	%p1, %p50, %p51;
+	mov.b32 	 %r229, %f892;
+	xor.b32  	%r230, %r229, -2147483648;
+	mov.b32 	 %f480, %r230;
+	selp.f32	%f894, %f480, %f892, %p1;
+	setp.eq.f32	%p52, %f149, 0f00000000;
+	@%p52 bra 	BB0_62;
+	bra.uni 	BB0_60;
+
+BB0_62:
+	add.f32 	%f483, %f149, %f149;
+	selp.f32	%f894, %f483, 0f00000000, %p51;
+	bra.uni 	BB0_63;
+
+BB0_112:
+	mov.u64 	%rd196, image_HDR;
+	cvta.global.u64 	%rd191, %rd196;
+	mov.u32 	%r301, 8;
+	mov.u64 	%rd195, 0;
+	// inline asm
+	call (%rd190), _rt_buffer_get_64, (%rd191, %r91, %r301, %rd18, %rd19, %rd195, %rd195);
+	// inline asm
+	mov.f32 	%f732, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs100, %f732;}
+
+	// inline asm
+	mov.u16 	%rs101, 0;
+	st.v4.u16 	[%rd190], {%rs100, %rs100, %rs100, %rs101};
+
+BB0_113:
+	ld.global.u32 	%r302, [additive];
+	setp.eq.s32	%p101, %r302, 0;
+	@%p101 bra 	BB0_115;
+
+	mov.u64 	%rd209, image_RNM0;
+	cvta.global.u64 	%rd198, %rd209;
+	mov.u32 	%r306, 8;
+	mov.u64 	%rd208, 0;
+	// inline asm
+	call (%rd197), _rt_buffer_get_64, (%rd198, %r91, %r306, %rd18, %rd19, %rd208, %rd208);
+	// inline asm
+	ld.v4.u16 	{%rs108, %rs109, %rs110, %rs111}, [%rd197];
+	// inline asm
+	{  cvt.f32.f16 %f733, %rs108;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f734, %rs109;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f735, %rs110;}
+
+	// inline asm
+	// inline asm
+	call (%rd203), _rt_buffer_get_64, (%rd198, %r91, %r306, %rd18, %rd19, %rd208, %rd208);
+	// inline asm
+	add.f32 	%f736, %f733, 0f00000000;
+	add.f32 	%f737, %f734, 0f00000000;
+	add.f32 	%f738, %f735, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs107, %f738;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs106, %f737;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs105, %f736;}
+
+	// inline asm
+	mov.u16 	%rs112, 0;
+	st.v4.u16 	[%rd203], {%rs105, %rs106, %rs107, %rs112};
+	bra.uni 	BB0_116;
+
+BB0_115:
+	mov.u64 	%rd216, image_RNM0;
+	cvta.global.u64 	%rd211, %rd216;
+	mov.u32 	%r308, 8;
+	mov.u64 	%rd215, 0;
+	// inline asm
+	call (%rd210), _rt_buffer_get_64, (%rd211, %r91, %r308, %rd18, %rd19, %rd215, %rd215);
+	// inline asm
+	mov.f32 	%f739, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs113, %f739;}
+
+	// inline asm
+	mov.u16 	%rs114, 0;
+	st.v4.u16 	[%rd210], {%rs113, %rs113, %rs113, %rs114};
+
+BB0_116:
+	ld.global.u32 	%r309, [additive];
+	setp.eq.s32	%p102, %r309, 0;
+	@%p102 bra 	BB0_118;
+
+	mov.u64 	%rd229, image_RNM1;
+	cvta.global.u64 	%rd218, %rd229;
+	mov.u32 	%r313, 8;
+	mov.u64 	%rd228, 0;
+	// inline asm
+	call (%rd217), _rt_buffer_get_64, (%rd218, %r91, %r313, %rd18, %rd19, %rd228, %rd228);
+	// inline asm
+	ld.v4.u16 	{%rs121, %rs122, %rs123, %rs124}, [%rd217];
+	// inline asm
+	{  cvt.f32.f16 %f740, %rs121;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f741, %rs122;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f742, %rs123;}
+
+	// inline asm
+	// inline asm
+	call (%rd223), _rt_buffer_get_64, (%rd218, %r91, %r313, %rd18, %rd19, %rd228, %rd228);
+	// inline asm
+	add.f32 	%f743, %f740, 0f00000000;
+	add.f32 	%f744, %f741, 0f00000000;
+	add.f32 	%f745, %f742, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs120, %f745;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs119, %f744;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs118, %f743;}
+
+	// inline asm
+	mov.u16 	%rs125, 0;
+	st.v4.u16 	[%rd223], {%rs118, %rs119, %rs120, %rs125};
+	bra.uni 	BB0_119;
+
+BB0_118:
+	mov.u64 	%rd236, image_RNM1;
+	cvta.global.u64 	%rd231, %rd236;
+	mov.u32 	%r315, 8;
+	mov.u64 	%rd235, 0;
+	// inline asm
+	call (%rd230), _rt_buffer_get_64, (%rd231, %r91, %r315, %rd18, %rd19, %rd235, %rd235);
+	// inline asm
+	mov.f32 	%f746, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs126, %f746;}
+
+	// inline asm
+	mov.u16 	%rs127, 0;
+	st.v4.u16 	[%rd230], {%rs126, %rs126, %rs126, %rs127};
+
+BB0_119:
+	ld.global.u32 	%r316, [additive];
+	setp.eq.s32	%p103, %r316, 0;
+	@%p103 bra 	BB0_121;
+
+	mov.u64 	%rd249, image_RNM2;
+	cvta.global.u64 	%rd238, %rd249;
+	mov.u32 	%r320, 8;
+	mov.u64 	%rd248, 0;
+	// inline asm
+	call (%rd237), _rt_buffer_get_64, (%rd238, %r91, %r320, %rd18, %rd19, %rd248, %rd248);
+	// inline asm
+	ld.v4.u16 	{%rs134, %rs135, %rs136, %rs137}, [%rd237];
+	// inline asm
+	{  cvt.f32.f16 %f747, %rs134;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f748, %rs135;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f749, %rs136;}
+
+	// inline asm
+	// inline asm
+	call (%rd243), _rt_buffer_get_64, (%rd238, %r91, %r320, %rd18, %rd19, %rd248, %rd248);
+	// inline asm
+	add.f32 	%f750, %f747, 0f00000000;
+	add.f32 	%f751, %f748, 0f00000000;
+	add.f32 	%f752, %f749, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs133, %f752;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs132, %f751;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs131, %f750;}
+
+	// inline asm
+	mov.u16 	%rs138, 0;
+	st.v4.u16 	[%rd243], {%rs131, %rs132, %rs133, %rs138};
+	bra.uni 	BB0_122;
+
+BB0_121:
+	mov.u64 	%rd256, image_RNM2;
+	cvta.global.u64 	%rd251, %rd256;
+	mov.u32 	%r322, 8;
+	mov.u64 	%rd255, 0;
+	// inline asm
+	call (%rd250), _rt_buffer_get_64, (%rd251, %r91, %r322, %rd18, %rd19, %rd255, %rd255);
+	// inline asm
+	mov.f32 	%f753, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs139, %f753;}
+
+	// inline asm
+	mov.u16 	%rs140, 0;
+	st.v4.u16 	[%rd250], {%rs139, %rs139, %rs139, %rs140};
+
+BB0_122:
+	ld.global.u32 	%r323, [additive];
+	setp.eq.s32	%p104, %r323, 0;
+	@%p104 bra 	BB0_124;
+
+	mov.u64 	%rd269, image_RNM3;
+	cvta.global.u64 	%rd258, %rd269;
+	mov.u32 	%r327, 8;
+	mov.u64 	%rd268, 0;
+	// inline asm
+	call (%rd257), _rt_buffer_get_64, (%rd258, %r91, %r327, %rd18, %rd19, %rd268, %rd268);
+	// inline asm
+	ld.v4.u16 	{%rs147, %rs148, %rs149, %rs150}, [%rd257];
+	// inline asm
+	{  cvt.f32.f16 %f754, %rs147;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f755, %rs148;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f756, %rs149;}
+
+	// inline asm
+	// inline asm
+	call (%rd263), _rt_buffer_get_64, (%rd258, %r91, %r327, %rd18, %rd19, %rd268, %rd268);
+	// inline asm
+	add.f32 	%f757, %f754, 0f00000000;
+	add.f32 	%f758, %f755, 0f00000000;
+	add.f32 	%f759, %f756, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs146, %f759;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs145, %f758;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs144, %f757;}
+
+	// inline asm
+	mov.u16 	%rs151, 0;
+	st.v4.u16 	[%rd263], {%rs144, %rs145, %rs146, %rs151};
+	bra.uni 	BB0_125;
+
+BB0_124:
+	mov.u64 	%rd276, image_RNM3;
+	cvta.global.u64 	%rd271, %rd276;
+	mov.u32 	%r329, 8;
+	mov.u64 	%rd275, 0;
+	// inline asm
+	call (%rd270), _rt_buffer_get_64, (%rd271, %r91, %r329, %rd18, %rd19, %rd275, %rd275);
+	// inline asm
+	mov.f32 	%f760, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs152, %f760;}
+
+	// inline asm
+	mov.u16 	%rs153, 0;
+	st.v4.u16 	[%rd270], {%rs152, %rs152, %rs152, %rs153};
+	bra.uni 	BB0_125;
+
+BB0_60:
+	setp.geu.f32	%p53, %f149, 0f00000000;
+	@%p53 bra 	BB0_63;
+
+	mov.f32 	%f810, 0f3EE66666;
+	cvt.rzi.f32.f32	%f482, %f810;
+	setp.neu.f32	%p54, %f482, 0f3EE66666;
+	selp.f32	%f894, 0f7FFFFFFF, %f894, %p54;
+
+BB0_63:
+	abs.f32 	%f787, %f149;
+	add.f32 	%f484, %f787, 0f3EE66666;
+	mov.b32 	 %r231, %f484;
+	setp.lt.s32	%p56, %r231, 2139095040;
+	@%p56 bra 	BB0_68;
+
+	abs.f32 	%f808, %f149;
+	setp.gtu.f32	%p57, %f808, 0f7F800000;
+	@%p57 bra 	BB0_67;
+	bra.uni 	BB0_65;
+
+BB0_67:
+	add.f32 	%f894, %f149, 0f3EE66666;
+	bra.uni 	BB0_68;
+
+BB0_65:
+	abs.f32 	%f809, %f149;
+	setp.neu.f32	%p58, %f809, 0f7F800000;
+	@%p58 bra 	BB0_68;
+
+	selp.f32	%f894, 0fFF800000, 0f7F800000, %p1;
+
+BB0_68:
+	mov.f32 	%f796, 0fB5BFBE8E;
+	mov.f32 	%f795, 0fBF317200;
+	mov.f32 	%f794, 0f00000000;
+	mov.f32 	%f793, 0f35BFBE8E;
+	mov.f32 	%f792, 0f3F317200;
+	mov.f32 	%f791, 0f3DAAAABD;
+	mov.f32 	%f790, 0f3C4CAF63;
+	mov.f32 	%f789, 0f3B18F0FE;
+	mov.f32 	%f788, 0f3EE66666;
+	setp.eq.f32	%p59, %f149, 0f3F800000;
+	selp.f32	%f165, 0f3F800000, %f894, %p59;
+	abs.f32 	%f166, %f150;
+	setp.lt.f32	%p60, %f166, 0f00800000;
+	mul.f32 	%f487, %f166, 0f4B800000;
+	selp.f32	%f488, 0fC3170000, 0fC2FE0000, %p60;
+	selp.f32	%f489, %f487, %f166, %p60;
+	mov.b32 	 %r232, %f489;
+	and.b32  	%r233, %r232, 8388607;
+	or.b32  	%r234, %r233, 1065353216;
+	mov.b32 	 %f490, %r234;
+	shr.u32 	%r235, %r232, 23;
+	cvt.rn.f32.u32	%f491, %r235;
+	add.f32 	%f492, %f488, %f491;
+	setp.gt.f32	%p61, %f490, 0f3FB504F3;
+	mul.f32 	%f493, %f490, 0f3F000000;
+	add.f32 	%f494, %f492, 0f3F800000;
+	selp.f32	%f495, %f493, %f490, %p61;
+	selp.f32	%f496, %f494, %f492, %p61;
+	add.f32 	%f497, %f495, 0fBF800000;
+	add.f32 	%f486, %f495, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f485,%f486;
+	// inline asm
+	add.f32 	%f498, %f497, %f497;
+	mul.f32 	%f499, %f485, %f498;
+	mul.f32 	%f500, %f499, %f499;
+	fma.rn.f32 	%f503, %f789, %f500, %f790;
+	fma.rn.f32 	%f505, %f503, %f500, %f791;
+	mul.rn.f32 	%f506, %f505, %f500;
+	mul.rn.f32 	%f507, %f506, %f499;
+	sub.f32 	%f508, %f497, %f499;
+	neg.f32 	%f509, %f499;
+	add.f32 	%f510, %f508, %f508;
+	fma.rn.f32 	%f511, %f509, %f497, %f510;
+	mul.rn.f32 	%f512, %f485, %f511;
+	add.f32 	%f513, %f507, %f499;
+	sub.f32 	%f514, %f499, %f513;
+	add.f32 	%f515, %f507, %f514;
+	add.f32 	%f516, %f512, %f515;
+	add.f32 	%f517, %f513, %f516;
+	sub.f32 	%f518, %f513, %f517;
+	add.f32 	%f519, %f516, %f518;
+	mul.rn.f32 	%f521, %f496, %f792;
+	mul.rn.f32 	%f523, %f496, %f793;
+	add.f32 	%f524, %f521, %f517;
+	sub.f32 	%f525, %f521, %f524;
+	add.f32 	%f526, %f517, %f525;
+	add.f32 	%f527, %f519, %f526;
+	add.f32 	%f528, %f523, %f527;
+	add.f32 	%f529, %f524, %f528;
+	sub.f32 	%f530, %f524, %f529;
+	add.f32 	%f531, %f528, %f530;
+	mul.rn.f32 	%f533, %f788, %f529;
+	neg.f32 	%f534, %f533;
+	fma.rn.f32 	%f535, %f788, %f529, %f534;
+	fma.rn.f32 	%f536, %f788, %f531, %f535;
+	fma.rn.f32 	%f538, %f794, %f529, %f536;
+	add.rn.f32 	%f539, %f533, %f538;
+	neg.f32 	%f540, %f539;
+	add.rn.f32 	%f541, %f533, %f540;
+	add.rn.f32 	%f542, %f541, %f538;
+	mov.b32 	 %r236, %f539;
+	setp.eq.s32	%p62, %r236, 1118925336;
+	add.s32 	%r237, %r236, -1;
+	mov.b32 	 %f543, %r237;
+	add.f32 	%f544, %f542, 0f37000000;
+	selp.f32	%f545, %f543, %f539, %p62;
+	selp.f32	%f167, %f544, %f542, %p62;
+	mul.f32 	%f546, %f545, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f547, %f546;
+	fma.rn.f32 	%f549, %f547, %f795, %f545;
+	fma.rn.f32 	%f551, %f547, %f796, %f549;
+	mul.f32 	%f552, %f551, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f553, %f552;
+	add.f32 	%f554, %f547, 0f00000000;
+	ex2.approx.f32 	%f555, %f554;
+	mul.f32 	%f556, %f553, %f555;
+	setp.lt.f32	%p63, %f545, 0fC2D20000;
+	selp.f32	%f557, 0f00000000, %f556, %p63;
+	setp.gt.f32	%p64, %f545, 0f42D20000;
+	selp.f32	%f895, 0f7F800000, %f557, %p64;
+	setp.eq.f32	%p65, %f895, 0f7F800000;
+	@%p65 bra 	BB0_70;
+
+	fma.rn.f32 	%f895, %f895, %f167, %f895;
+
+BB0_70:
+	setp.lt.f32	%p66, %f150, 0f00000000;
+	and.pred  	%p2, %p66, %p51;
+	mov.b32 	 %r238, %f895;
+	xor.b32  	%r239, %r238, -2147483648;
+	mov.b32 	 %f558, %r239;
+	selp.f32	%f897, %f558, %f895, %p2;
+	setp.eq.f32	%p68, %f150, 0f00000000;
+	@%p68 bra 	BB0_73;
+	bra.uni 	BB0_71;
+
+BB0_73:
+	add.f32 	%f561, %f150, %f150;
+	selp.f32	%f897, %f561, 0f00000000, %p51;
+	bra.uni 	BB0_74;
+
+BB0_71:
+	setp.geu.f32	%p69, %f150, 0f00000000;
+	@%p69 bra 	BB0_74;
+
+	mov.f32 	%f807, 0f3EE66666;
+	cvt.rzi.f32.f32	%f560, %f807;
+	setp.neu.f32	%p70, %f560, 0f3EE66666;
+	selp.f32	%f897, 0f7FFFFFFF, %f897, %p70;
+
+BB0_74:
+	abs.f32 	%f811, %f150;
+	add.f32 	%f562, %f811, 0f3EE66666;
+	mov.b32 	 %r240, %f562;
+	setp.lt.s32	%p72, %r240, 2139095040;
+	@%p72 bra 	BB0_79;
+
+	abs.f32 	%f812, %f150;
+	setp.gtu.f32	%p73, %f812, 0f7F800000;
+	@%p73 bra 	BB0_78;
+	bra.uni 	BB0_76;
+
+BB0_78:
+	add.f32 	%f897, %f150, 0f3EE66666;
+	bra.uni 	BB0_79;
+
+BB0_76:
+	abs.f32 	%f813, %f150;
+	setp.neu.f32	%p74, %f813, 0f7F800000;
+	@%p74 bra 	BB0_79;
+
+	selp.f32	%f897, 0fFF800000, 0f7F800000, %p2;
+
+BB0_79:
+	mov.f32 	%f805, 0fB5BFBE8E;
+	mov.f32 	%f804, 0fBF317200;
+	mov.f32 	%f803, 0f00000000;
+	mov.f32 	%f802, 0f35BFBE8E;
+	mov.f32 	%f801, 0f3F317200;
+	mov.f32 	%f800, 0f3DAAAABD;
+	mov.f32 	%f799, 0f3C4CAF63;
+	mov.f32 	%f798, 0f3B18F0FE;
+	mov.f32 	%f797, 0f3EE66666;
+	setp.eq.f32	%p75, %f150, 0f3F800000;
+	selp.f32	%f178, 0f3F800000, %f897, %p75;
+	abs.f32 	%f179, %f151;
+	setp.lt.f32	%p76, %f179, 0f00800000;
+	mul.f32 	%f565, %f179, 0f4B800000;
+	selp.f32	%f566, 0fC3170000, 0fC2FE0000, %p76;
+	selp.f32	%f567, %f565, %f179, %p76;
+	mov.b32 	 %r241, %f567;
+	and.b32  	%r242, %r241, 8388607;
+	or.b32  	%r243, %r242, 1065353216;
+	mov.b32 	 %f568, %r243;
+	shr.u32 	%r244, %r241, 23;
+	cvt.rn.f32.u32	%f569, %r244;
+	add.f32 	%f570, %f566, %f569;
+	setp.gt.f32	%p77, %f568, 0f3FB504F3;
+	mul.f32 	%f571, %f568, 0f3F000000;
+	add.f32 	%f572, %f570, 0f3F800000;
+	selp.f32	%f573, %f571, %f568, %p77;
+	selp.f32	%f574, %f572, %f570, %p77;
+	add.f32 	%f575, %f573, 0fBF800000;
+	add.f32 	%f564, %f573, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f563,%f564;
+	// inline asm
+	add.f32 	%f576, %f575, %f575;
+	mul.f32 	%f577, %f563, %f576;
+	mul.f32 	%f578, %f577, %f577;
+	fma.rn.f32 	%f581, %f798, %f578, %f799;
+	fma.rn.f32 	%f583, %f581, %f578, %f800;
+	mul.rn.f32 	%f584, %f583, %f578;
+	mul.rn.f32 	%f585, %f584, %f577;
+	sub.f32 	%f586, %f575, %f577;
+	neg.f32 	%f587, %f577;
+	add.f32 	%f588, %f586, %f586;
+	fma.rn.f32 	%f589, %f587, %f575, %f588;
+	mul.rn.f32 	%f590, %f563, %f589;
+	add.f32 	%f591, %f585, %f577;
+	sub.f32 	%f592, %f577, %f591;
+	add.f32 	%f593, %f585, %f592;
+	add.f32 	%f594, %f590, %f593;
+	add.f32 	%f595, %f591, %f594;
+	sub.f32 	%f596, %f591, %f595;
+	add.f32 	%f597, %f594, %f596;
+	mul.rn.f32 	%f599, %f574, %f801;
+	mul.rn.f32 	%f601, %f574, %f802;
+	add.f32 	%f602, %f599, %f595;
+	sub.f32 	%f603, %f599, %f602;
+	add.f32 	%f604, %f595, %f603;
+	add.f32 	%f605, %f597, %f604;
+	add.f32 	%f606, %f601, %f605;
+	add.f32 	%f607, %f602, %f606;
+	sub.f32 	%f608, %f602, %f607;
+	add.f32 	%f609, %f606, %f608;
+	mul.rn.f32 	%f611, %f797, %f607;
+	neg.f32 	%f612, %f611;
+	fma.rn.f32 	%f613, %f797, %f607, %f612;
+	fma.rn.f32 	%f614, %f797, %f609, %f613;
+	fma.rn.f32 	%f616, %f803, %f607, %f614;
+	add.rn.f32 	%f617, %f611, %f616;
+	neg.f32 	%f618, %f617;
+	add.rn.f32 	%f619, %f611, %f618;
+	add.rn.f32 	%f620, %f619, %f616;
+	mov.b32 	 %r245, %f617;
+	setp.eq.s32	%p78, %r245, 1118925336;
+	add.s32 	%r246, %r245, -1;
+	mov.b32 	 %f621, %r246;
+	add.f32 	%f622, %f620, 0f37000000;
+	selp.f32	%f623, %f621, %f617, %p78;
+	selp.f32	%f180, %f622, %f620, %p78;
+	mul.f32 	%f624, %f623, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f625, %f624;
+	fma.rn.f32 	%f627, %f625, %f804, %f623;
+	fma.rn.f32 	%f629, %f625, %f805, %f627;
+	mul.f32 	%f630, %f629, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f631, %f630;
+	add.f32 	%f632, %f625, 0f00000000;
+	ex2.approx.f32 	%f633, %f632;
+	mul.f32 	%f634, %f631, %f633;
+	setp.lt.f32	%p79, %f623, 0fC2D20000;
+	selp.f32	%f635, 0f00000000, %f634, %p79;
+	setp.gt.f32	%p80, %f623, 0f42D20000;
+	selp.f32	%f898, 0f7F800000, %f635, %p80;
+	setp.eq.f32	%p81, %f898, 0f7F800000;
+	@%p81 bra 	BB0_81;
+
+	fma.rn.f32 	%f898, %f898, %f180, %f898;
+
+BB0_81:
+	setp.lt.f32	%p82, %f151, 0f00000000;
+	and.pred  	%p3, %p82, %p51;
+	mov.b32 	 %r247, %f898;
+	xor.b32  	%r248, %r247, -2147483648;
+	mov.b32 	 %f636, %r248;
+	selp.f32	%f900, %f636, %f898, %p3;
+	setp.eq.f32	%p84, %f151, 0f00000000;
+	@%p84 bra 	BB0_84;
+	bra.uni 	BB0_82;
+
+BB0_84:
+	add.f32 	%f639, %f151, %f151;
+	selp.f32	%f900, %f639, 0f00000000, %p51;
+	bra.uni 	BB0_85;
+
+BB0_82:
+	setp.geu.f32	%p85, %f151, 0f00000000;
+	@%p85 bra 	BB0_85;
+
+	mov.f32 	%f806, 0f3EE66666;
+	cvt.rzi.f32.f32	%f638, %f806;
+	setp.neu.f32	%p86, %f638, 0f3EE66666;
+	selp.f32	%f900, 0f7FFFFFFF, %f900, %p86;
+
+BB0_85:
+	abs.f32 	%f814, %f151;
+	add.f32 	%f640, %f814, 0f3EE66666;
+	mov.b32 	 %r249, %f640;
+	setp.lt.s32	%p88, %r249, 2139095040;
+	@%p88 bra 	BB0_90;
+
+	abs.f32 	%f815, %f151;
+	setp.gtu.f32	%p89, %f815, 0f7F800000;
+	@%p89 bra 	BB0_89;
+	bra.uni 	BB0_87;
+
+BB0_89:
+	add.f32 	%f900, %f151, 0f3EE66666;
+	bra.uni 	BB0_90;
+
+BB0_87:
+	abs.f32 	%f816, %f151;
+	setp.neu.f32	%p90, %f816, 0f7F800000;
+	@%p90 bra 	BB0_90;
+
+	selp.f32	%f900, 0fFF800000, 0f7F800000, %p3;
+
+BB0_90:
+	mov.u32 	%r340, 4;
+	setp.eq.f32	%p91, %f151, 0f3F800000;
+	selp.f32	%f641, 0f3F800000, %f900, %p91;
+	cvt.u64.u32	%rd66, %r4;
+	cvt.u64.u32	%rd65, %r3;
+	mov.u64 	%rd69, image;
+	cvta.global.u64 	%rd64, %rd69;
+	// inline asm
+	call (%rd63), _rt_buffer_get_64, (%rd64, %r91, %r340, %rd65, %rd66, %rd25, %rd25);
+	// inline asm
+	cvt.sat.f32.f32	%f642, %f641;
+	mul.f32 	%f643, %f642, 0f437FFD71;
+	cvt.rzi.u32.f32	%r252, %f643;
+	cvt.sat.f32.f32	%f644, %f178;
+	mul.f32 	%f645, %f644, 0f437FFD71;
+	cvt.rzi.u32.f32	%r253, %f645;
+	cvt.sat.f32.f32	%f646, %f165;
+	mul.f32 	%f647, %f646, 0f437FFD71;
+	cvt.rzi.u32.f32	%r254, %f647;
+	cvt.u16.u32	%rs14, %r252;
+	cvt.u16.u32	%rs15, %r254;
+	cvt.u16.u32	%rs16, %r253;
+	mov.u16 	%rs17, 255;
+	st.v4.u8 	[%rd63], {%rs14, %rs16, %rs15, %rs17};
+	ld.global.u32 	%r381, [imageEnabled];
+
+BB0_91:
+	cvt.u64.u32	%rd16, %r3;
+	cvt.u64.u32	%rd17, %r4;
+	and.b32  	%r255, %r381, 4;
+	setp.eq.s32	%p92, %r255, 0;
+	@%p92 bra 	BB0_95;
+
+	ld.global.u32 	%r256, [additive];
+	setp.eq.s32	%p93, %r256, 0;
+	mov.f32 	%f648, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs18, %f648;}
+
+	// inline asm
+	@%p93 bra 	BB0_94;
+
+	mov.u64 	%rd82, image_HDR;
+	cvta.global.u64 	%rd71, %rd82;
+	mov.u32 	%r260, 8;
+	// inline asm
+	call (%rd70), _rt_buffer_get_64, (%rd71, %r91, %r260, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs25, %rs26, %rs27, %rs28}, [%rd70];
+	// inline asm
+	{  cvt.f32.f16 %f649, %rs25;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f650, %rs26;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f651, %rs27;}
+
+	// inline asm
+	// inline asm
+	call (%rd76), _rt_buffer_get_64, (%rd71, %r91, %r260, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f652, %f149, %f649;
+	add.f32 	%f653, %f150, %f650;
+	add.f32 	%f654, %f151, %f651;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs24, %f654;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs23, %f653;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs22, %f652;}
+
+	// inline asm
+	st.v4.u16 	[%rd76], {%rs22, %rs23, %rs24, %rs18};
+	bra.uni 	BB0_95;
+
+BB0_94:
+	mov.u64 	%rd89, image_HDR;
+	cvta.global.u64 	%rd84, %rd89;
+	mov.u32 	%r262, 8;
+	// inline asm
+	call (%rd83), _rt_buffer_get_64, (%rd84, %r91, %r262, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs31, %f151;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs30, %f150;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs29, %f149;}
+
+	// inline asm
+	st.v4.u16 	[%rd83], {%rs29, %rs30, %rs31, %rs18};
+
+BB0_95:
+	ld.global.f32 	%f659, [skyColor];
+	mul.f32 	%f660, %f137, %f659;
+	ld.global.f32 	%f661, [skyColor+4];
+	mul.f32 	%f662, %f138, %f661;
+	ld.global.f32 	%f663, [skyColor+8];
+	mul.f32 	%f664, %f139, %f663;
+	mul.f32 	%f191, %f140, %f659;
+	mul.f32 	%f192, %f141, %f661;
+	mul.f32 	%f193, %f142, %f663;
+	mul.f32 	%f194, %f143, %f659;
+	mul.f32 	%f195, %f144, %f661;
+	mul.f32 	%f196, %f145, %f663;
+	mul.f32 	%f197, %f146, %f659;
+	mul.f32 	%f198, %f147, %f661;
+	mul.f32 	%f199, %f148, %f663;
+	mul.f32 	%f200, %f660, 0f3F000000;
+	mul.f32 	%f201, %f662, 0f3F000000;
+	mul.f32 	%f202, %f664, 0f3F000000;
+	ld.global.u32 	%r263, [additive];
+	setp.eq.s32	%p94, %r263, 0;
+	mov.f32 	%f658, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs32, %f658;}
+
+	// inline asm
+	@%p94 bra 	BB0_97;
+
+	mov.u64 	%rd102, image_RNM0;
+	cvta.global.u64 	%rd91, %rd102;
+	mov.u32 	%r267, 8;
+	// inline asm
+	call (%rd90), _rt_buffer_get_64, (%rd91, %r91, %r267, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs39, %rs40, %rs41, %rs42}, [%rd90];
+	// inline asm
+	{  cvt.f32.f16 %f665, %rs39;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f666, %rs40;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f667, %rs41;}
+
+	// inline asm
+	// inline asm
+	call (%rd96), _rt_buffer_get_64, (%rd91, %r91, %r267, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f668, %f200, %f665;
+	add.f32 	%f669, %f201, %f666;
+	add.f32 	%f670, %f202, %f667;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs38, %f670;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs37, %f669;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs36, %f668;}
+
+	// inline asm
+	st.v4.u16 	[%rd96], {%rs36, %rs37, %rs38, %rs32};
+	bra.uni 	BB0_98;
+
+BB0_97:
+	mov.u64 	%rd109, image_RNM0;
+	cvta.global.u64 	%rd104, %rd109;
+	mov.u32 	%r269, 8;
+	// inline asm
+	call (%rd103), _rt_buffer_get_64, (%rd104, %r91, %r269, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs45, %f202;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs44, %f201;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs43, %f200;}
+
+	// inline asm
+	st.v4.u16 	[%rd103], {%rs43, %rs44, %rs45, %rs32};
+
+BB0_98:
+	mov.f32 	%f675, 0f34000000;
+	max.f32 	%f676, %f200, %f675;
+	mul.f32 	%f677, %f191, 0f3F000000;
+	div.rn.f32 	%f678, %f677, %f676;
+	max.f32 	%f679, %f201, %f675;
+	mul.f32 	%f680, %f192, 0f3F000000;
+	div.rn.f32 	%f681, %f680, %f679;
+	max.f32 	%f682, %f202, %f675;
+	mul.f32 	%f683, %f193, 0f3F000000;
+	div.rn.f32 	%f684, %f683, %f682;
+	fma.rn.f32 	%f203, %f678, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f204, %f681, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f205, %f684, 0f3F000000, 0f3F000000;
+	mul.f32 	%f685, %f194, 0f3F000000;
+	div.rn.f32 	%f686, %f685, %f676;
+	mul.f32 	%f687, %f195, 0f3F000000;
+	div.rn.f32 	%f688, %f687, %f679;
+	mul.f32 	%f689, %f196, 0f3F000000;
+	div.rn.f32 	%f690, %f689, %f682;
+	fma.rn.f32 	%f206, %f686, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f207, %f688, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f208, %f690, 0f3F000000, 0f3F000000;
+	mul.f32 	%f691, %f197, 0f3F000000;
+	div.rn.f32 	%f692, %f691, %f676;
+	mul.f32 	%f693, %f198, 0f3F000000;
+	div.rn.f32 	%f694, %f693, %f679;
+	mul.f32 	%f695, %f199, 0f3F000000;
+	div.rn.f32 	%f696, %f695, %f682;
+	fma.rn.f32 	%f209, %f692, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f210, %f694, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f211, %f696, 0f3F000000, 0f3F000000;
+	ld.global.u32 	%r270, [additive];
+	setp.eq.s32	%p95, %r270, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs46, %f658;}
+
+	// inline asm
+	@%p95 bra 	BB0_100;
+
+	mov.u64 	%rd122, image_RNM1;
+	cvta.global.u64 	%rd111, %rd122;
+	mov.u32 	%r274, 8;
+	// inline asm
+	call (%rd110), _rt_buffer_get_64, (%rd111, %r91, %r274, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs53, %rs54, %rs55, %rs56}, [%rd110];
+	// inline asm
+	{  cvt.f32.f16 %f697, %rs53;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f698, %rs54;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f699, %rs55;}
+
+	// inline asm
+	// inline asm
+	call (%rd116), _rt_buffer_get_64, (%rd111, %r91, %r274, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f700, %f203, %f697;
+	add.f32 	%f701, %f204, %f698;
+	add.f32 	%f702, %f205, %f699;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs52, %f702;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs51, %f701;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs50, %f700;}
+
+	// inline asm
+	st.v4.u16 	[%rd116], {%rs50, %rs51, %rs52, %rs46};
+	bra.uni 	BB0_101;
+
+BB0_100:
+	mov.u64 	%rd129, image_RNM1;
+	cvta.global.u64 	%rd124, %rd129;
+	mov.u32 	%r276, 8;
+	// inline asm
+	call (%rd123), _rt_buffer_get_64, (%rd124, %r91, %r276, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs59, %f205;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs58, %f204;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs57, %f203;}
+
+	// inline asm
+	st.v4.u16 	[%rd123], {%rs57, %rs58, %rs59, %rs46};
+
+BB0_101:
+	ld.global.u32 	%r277, [additive];
+	setp.eq.s32	%p96, %r277, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs60, %f658;}
+
+	// inline asm
+	@%p96 bra 	BB0_103;
+
+	mov.u64 	%rd142, image_RNM2;
+	cvta.global.u64 	%rd131, %rd142;
+	mov.u32 	%r281, 8;
+	// inline asm
+	call (%rd130), _rt_buffer_get_64, (%rd131, %r91, %r281, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs67, %rs68, %rs69, %rs70}, [%rd130];
+	// inline asm
+	{  cvt.f32.f16 %f707, %rs67;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f708, %rs68;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f709, %rs69;}
+
+	// inline asm
+	// inline asm
+	call (%rd136), _rt_buffer_get_64, (%rd131, %r91, %r281, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f710, %f206, %f707;
+	add.f32 	%f711, %f207, %f708;
+	add.f32 	%f712, %f208, %f709;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs66, %f712;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs65, %f711;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f710;}
+
+	// inline asm
+	st.v4.u16 	[%rd136], {%rs64, %rs65, %rs66, %rs60};
+	bra.uni 	BB0_104;
+
+BB0_103:
+	mov.u64 	%rd149, image_RNM2;
+	cvta.global.u64 	%rd144, %rd149;
+	mov.u32 	%r283, 8;
+	// inline asm
+	call (%rd143), _rt_buffer_get_64, (%rd144, %r91, %r283, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs73, %f208;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs72, %f207;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs71, %f206;}
+
+	// inline asm
+	st.v4.u16 	[%rd143], {%rs71, %rs72, %rs73, %rs60};
+
+BB0_104:
+	ld.global.u32 	%r284, [additive];
+	setp.eq.s32	%p97, %r284, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs74, %f658;}
+
+	// inline asm
+	@%p97 bra 	BB0_106;
+
+	mov.u64 	%rd162, image_RNM3;
+	cvta.global.u64 	%rd151, %rd162;
+	mov.u32 	%r288, 8;
+	// inline asm
+	call (%rd150), _rt_buffer_get_64, (%rd151, %r91, %r288, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	ld.v4.u16 	{%rs81, %rs82, %rs83, %rs84}, [%rd150];
+	// inline asm
+	{  cvt.f32.f16 %f717, %rs81;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f718, %rs82;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f719, %rs83;}
+
+	// inline asm
+	// inline asm
+	call (%rd156), _rt_buffer_get_64, (%rd151, %r91, %r288, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	add.f32 	%f720, %f209, %f717;
+	add.f32 	%f721, %f210, %f718;
+	add.f32 	%f722, %f211, %f719;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs80, %f722;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs79, %f721;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs78, %f720;}
+
+	// inline asm
+	st.v4.u16 	[%rd156], {%rs78, %rs79, %rs80, %rs74};
+	bra.uni 	BB0_125;
+
+BB0_106:
+	mov.u64 	%rd169, image_RNM3;
+	cvta.global.u64 	%rd164, %rd169;
+	mov.u32 	%r290, 8;
+	// inline asm
+	call (%rd163), _rt_buffer_get_64, (%rd164, %r91, %r290, %rd16, %rd17, %rd25, %rd25);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs87, %f211;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs86, %f210;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs85, %f209;}
+
+	// inline asm
+	st.v4.u16 	[%rd163], {%rs85, %rs86, %rs87, %rs74};
+
+BB0_125:
+	ret;
+}
+
+