move to self host

1 files changed, 2374 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightRNM.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightRNM.ptx
new file mode 100644
index 00000000..cde3bc7e
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLightRNM.ptx
@@ -0,0 +1,2374 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 uvtangent[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 4 .u32 samples;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightRadius;
+.global .align 4 .b8 lightPos[12];
+.global .align 4 .b8 lightColor[12];
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .u32 lightCubemap;
+.global .align 4 .b8 lightMatrix[36];
+.global .align 4 .f32 lightFalloffFakeDistanceMult;
+.global .align 4 .f32 lightFalloffMinRadiusSq;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12lightCubemapE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightMatrixE[8] = {82, 97, 121, 0, 36, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12lightCubemapE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename11lightMatrixE[10] = {77, 97, 116, 114, 105, 120, 51, 120, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12lightCubemapE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightMatrixE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12lightCubemapE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightMatrixE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12lightCubemapE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightMatrixE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[4];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<128>;
+	.reg .b16 	%rs<213>;
+	.reg .f32 	%f<1072>;
+	.reg .b32 	%r<251>;
+	.reg .b64 	%rd<334>;
+
+
+	mov.u64 	%rd333, __local_depot0;
+	cvta.local.u64 	%SP, %rd333;
+	ld.global.v2.u32 	{%r33, %r34}, [pixelID];
+	cvt.u64.u32	%rd16, %r33;
+	cvt.u64.u32	%rd17, %r34;
+	mov.u64 	%rd20, uvnormal;
+	cvta.global.u64 	%rd15, %rd20;
+	mov.u32 	%r31, 2;
+	mov.u32 	%r32, 4;
+	mov.u64 	%rd19, 0;
+	// inline asm
+	call (%rd14), _rt_buffer_get_64, (%rd15, %r31, %r32, %rd16, %rd17, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r1, [%rd14];
+	shr.u32 	%r37, %r1, 16;
+	cvt.u16.u32	%rs1, %r37;
+	and.b16  	%rs10, %rs1, 255;
+	cvt.u16.u32	%rs11, %r1;
+	or.b16  	%rs12, %rs11, %rs10;
+	setp.eq.s16	%p6, %rs12, 0;
+	mov.f32 	%f1042, 0f00000000;
+	mov.f32 	%f1043, %f1042;
+	mov.f32 	%f1044, %f1042;
+	@%p6 bra 	BB0_2;
+
+	ld.u8 	%rs13, [%rd14+1];
+	and.b16  	%rs15, %rs11, 255;
+	cvt.rn.f32.u16	%f139, %rs15;
+	div.rn.f32 	%f140, %f139, 0f437F0000;
+	fma.rn.f32 	%f141, %f140, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f142, %rs13;
+	div.rn.f32 	%f143, %f142, 0f437F0000;
+	fma.rn.f32 	%f144, %f143, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f145, %rs10;
+	div.rn.f32 	%f146, %f145, 0f437F0000;
+	fma.rn.f32 	%f147, %f146, 0f40000000, 0fBF800000;
+	mul.f32 	%f148, %f144, %f144;
+	fma.rn.f32 	%f149, %f141, %f141, %f148;
+	fma.rn.f32 	%f150, %f147, %f147, %f149;
+	sqrt.rn.f32 	%f151, %f150;
+	rcp.rn.f32 	%f152, %f151;
+	mul.f32 	%f1042, %f141, %f152;
+	mul.f32 	%f1043, %f144, %f152;
+	mul.f32 	%f1044, %f147, %f152;
+
+BB0_2:
+	ld.global.v2.u32 	{%r38, %r39}, [pixelID];
+	ld.global.v2.u32 	{%r41, %r42}, [tileInfo];
+	add.s32 	%r2, %r38, %r41;
+	add.s32 	%r3, %r39, %r42;
+	setp.eq.f32	%p7, %f1043, 0f00000000;
+	setp.eq.f32	%p8, %f1042, 0f00000000;
+	and.pred  	%p9, %p8, %p7;
+	setp.eq.f32	%p10, %f1044, 0f00000000;
+	and.pred  	%p11, %p9, %p10;
+	@%p11 bra 	BB0_104;
+	bra.uni 	BB0_3;
+
+BB0_104:
+	ld.global.u32 	%r250, [imageEnabled];
+	and.b32  	%r203, %r250, 1;
+	setp.eq.b32	%p121, %r203, 1;
+	@!%p121 bra 	BB0_106;
+	bra.uni 	BB0_105;
+
+BB0_105:
+	cvt.u64.u32	%rd241, %r2;
+	cvt.u64.u32	%rd242, %r3;
+	mov.u64 	%rd245, image;
+	cvta.global.u64 	%rd240, %rd245;
+	// inline asm
+	call (%rd239), _rt_buffer_get_64, (%rd240, %r31, %r32, %rd241, %rd242, %rd19, %rd19);
+	// inline asm
+	mov.u16 	%rs158, 0;
+	st.v4.u8 	[%rd239], {%rs158, %rs158, %rs158, %rs158};
+	ld.global.u32 	%r250, [imageEnabled];
+
+BB0_106:
+	and.b32  	%r206, %r250, 8;
+	setp.eq.s32	%p122, %r206, 0;
+	@%p122 bra 	BB0_108;
+
+	cvt.u64.u32	%rd249, %r3;
+	cvt.u64.u32	%rd248, %r2;
+	mov.u64 	%rd252, image_Mask;
+	cvta.global.u64 	%rd247, %rd252;
+	// inline asm
+	call (%rd246), _rt_buffer_get_64, (%rd247, %r31, %r31, %rd248, %rd249, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f946, 0f00000000;
+	cvt.rzi.u32.f32	%r209, %f946;
+	cvt.u16.u32	%rs159, %r209;
+	mov.u16 	%rs160, 0;
+	st.v2.u8 	[%rd246], {%rs159, %rs160};
+	ld.global.u32 	%r250, [imageEnabled];
+
+BB0_108:
+	cvt.u64.u32	%rd12, %r2;
+	cvt.u64.u32	%rd13, %r3;
+	and.b32  	%r210, %r250, 4;
+	setp.eq.s32	%p123, %r210, 0;
+	@%p123 bra 	BB0_112;
+
+	ld.global.u32 	%r211, [additive];
+	setp.eq.s32	%p124, %r211, 0;
+	@%p124 bra 	BB0_111;
+
+	mov.u64 	%rd265, image_HDR;
+	cvta.global.u64 	%rd254, %rd265;
+	mov.u32 	%r215, 8;
+	// inline asm
+	call (%rd253), _rt_buffer_get_64, (%rd254, %r31, %r215, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs167, %rs168, %rs169, %rs170}, [%rd253];
+	// inline asm
+	{  cvt.f32.f16 %f947, %rs167;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f948, %rs168;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f949, %rs169;}
+
+	// inline asm
+	// inline asm
+	call (%rd259), _rt_buffer_get_64, (%rd254, %r31, %r215, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f950, %f947, 0f00000000;
+	add.f32 	%f951, %f948, 0f00000000;
+	add.f32 	%f952, %f949, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs166, %f952;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs165, %f951;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs164, %f950;}
+
+	// inline asm
+	mov.u16 	%rs171, 0;
+	st.v4.u16 	[%rd259], {%rs164, %rs165, %rs166, %rs171};
+	bra.uni 	BB0_112;
+
+BB0_3:
+	ld.global.v2.u32 	{%r48, %r49}, [pixelID];
+	cvt.u64.u32	%rd23, %r48;
+	cvt.u64.u32	%rd24, %r49;
+	mov.u64 	%rd27, uvpos;
+	cvta.global.u64 	%rd22, %rd27;
+	mov.u32 	%r47, 12;
+	// inline asm
+	call (%rd21), _rt_buffer_get_64, (%rd22, %r31, %r47, %rd23, %rd24, %rd19, %rd19);
+	// inline asm
+	ld.global.f32 	%f155, [lightPos];
+	ld.f32 	%f9, [%rd21+8];
+	ld.f32 	%f8, [%rd21+4];
+	ld.f32 	%f7, [%rd21];
+	sub.f32 	%f156, %f155, %f7;
+	ld.global.f32 	%f157, [lightPos+4];
+	sub.f32 	%f158, %f157, %f8;
+	ld.global.f32 	%f159, [lightPos+8];
+	sub.f32 	%f160, %f159, %f9;
+	mul.f32 	%f161, %f158, %f158;
+	fma.rn.f32 	%f162, %f156, %f156, %f161;
+	fma.rn.f32 	%f163, %f160, %f160, %f162;
+	sqrt.rn.f32 	%f164, %f163;
+	rcp.rn.f32 	%f165, %f164;
+	mul.f32 	%f10, %f156, %f165;
+	mul.f32 	%f11, %f158, %f165;
+	mul.f32 	%f12, %f160, %f165;
+	ld.global.f32 	%f166, [lightFalloffFakeDistanceMult];
+	mul.f32 	%f13, %f164, %f166;
+	ld.global.f32 	%f167, [lightInvCutoff];
+	mul.f32 	%f14, %f164, %f167;
+	mov.f32 	%f171, 0f40800000;
+	abs.f32 	%f16, %f14;
+	setp.lt.f32	%p12, %f16, 0f00800000;
+	mul.f32 	%f173, %f16, 0f4B800000;
+	selp.f32	%f174, 0fC3170000, 0fC2FE0000, %p12;
+	selp.f32	%f175, %f173, %f16, %p12;
+	mov.b32 	 %r52, %f175;
+	and.b32  	%r53, %r52, 8388607;
+	or.b32  	%r54, %r53, 1065353216;
+	mov.b32 	 %f176, %r54;
+	shr.u32 	%r55, %r52, 23;
+	cvt.rn.f32.u32	%f177, %r55;
+	add.f32 	%f178, %f174, %f177;
+	setp.gt.f32	%p13, %f176, 0f3FB504F3;
+	mul.f32 	%f179, %f176, 0f3F000000;
+	add.f32 	%f180, %f178, 0f3F800000;
+	selp.f32	%f181, %f179, %f176, %p13;
+	selp.f32	%f182, %f180, %f178, %p13;
+	add.f32 	%f183, %f181, 0fBF800000;
+	add.f32 	%f154, %f181, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f153,%f154;
+	// inline asm
+	add.f32 	%f184, %f183, %f183;
+	mul.f32 	%f185, %f153, %f184;
+	mul.f32 	%f186, %f185, %f185;
+	mov.f32 	%f187, 0f3C4CAF63;
+	mov.f32 	%f188, 0f3B18F0FE;
+	fma.rn.f32 	%f189, %f188, %f186, %f187;
+	mov.f32 	%f190, 0f3DAAAABD;
+	fma.rn.f32 	%f191, %f189, %f186, %f190;
+	mul.rn.f32 	%f192, %f191, %f186;
+	mul.rn.f32 	%f193, %f192, %f185;
+	sub.f32 	%f194, %f183, %f185;
+	neg.f32 	%f195, %f185;
+	add.f32 	%f196, %f194, %f194;
+	fma.rn.f32 	%f197, %f195, %f183, %f196;
+	mul.rn.f32 	%f198, %f153, %f197;
+	add.f32 	%f199, %f193, %f185;
+	sub.f32 	%f200, %f185, %f199;
+	add.f32 	%f201, %f193, %f200;
+	add.f32 	%f202, %f198, %f201;
+	add.f32 	%f203, %f199, %f202;
+	sub.f32 	%f204, %f199, %f203;
+	add.f32 	%f205, %f202, %f204;
+	mov.f32 	%f206, 0f3F317200;
+	mul.rn.f32 	%f207, %f182, %f206;
+	mov.f32 	%f208, 0f35BFBE8E;
+	mul.rn.f32 	%f209, %f182, %f208;
+	add.f32 	%f210, %f207, %f203;
+	sub.f32 	%f211, %f207, %f210;
+	add.f32 	%f212, %f203, %f211;
+	add.f32 	%f213, %f205, %f212;
+	add.f32 	%f214, %f209, %f213;
+	add.f32 	%f215, %f210, %f214;
+	sub.f32 	%f216, %f210, %f215;
+	add.f32 	%f217, %f214, %f216;
+	mul.rn.f32 	%f218, %f171, %f215;
+	neg.f32 	%f219, %f218;
+	fma.rn.f32 	%f220, %f171, %f215, %f219;
+	fma.rn.f32 	%f221, %f171, %f217, %f220;
+	mov.f32 	%f222, 0f00000000;
+	fma.rn.f32 	%f223, %f222, %f215, %f221;
+	add.rn.f32 	%f224, %f218, %f223;
+	neg.f32 	%f225, %f224;
+	add.rn.f32 	%f226, %f218, %f225;
+	add.rn.f32 	%f227, %f226, %f223;
+	mov.b32 	 %r56, %f224;
+	setp.eq.s32	%p14, %r56, 1118925336;
+	add.s32 	%r57, %r56, -1;
+	mov.b32 	 %f228, %r57;
+	add.f32 	%f229, %f227, 0f37000000;
+	selp.f32	%f230, %f228, %f224, %p14;
+	selp.f32	%f17, %f229, %f227, %p14;
+	mul.f32 	%f231, %f230, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f232, %f231;
+	mov.f32 	%f233, 0fBF317200;
+	fma.rn.f32 	%f234, %f232, %f233, %f230;
+	mov.f32 	%f235, 0fB5BFBE8E;
+	fma.rn.f32 	%f236, %f232, %f235, %f234;
+	mul.f32 	%f237, %f236, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f238, %f237;
+	add.f32 	%f239, %f232, 0f00000000;
+	ex2.approx.f32 	%f240, %f239;
+	mul.f32 	%f241, %f238, %f240;
+	setp.lt.f32	%p15, %f230, 0fC2D20000;
+	selp.f32	%f242, 0f00000000, %f241, %p15;
+	setp.gt.f32	%p16, %f230, 0f42D20000;
+	selp.f32	%f1045, 0f7F800000, %f242, %p16;
+	setp.eq.f32	%p17, %f1045, 0f7F800000;
+	@%p17 bra 	BB0_5;
+
+	fma.rn.f32 	%f1045, %f1045, %f17, %f1045;
+
+BB0_5:
+	mov.f32 	%f980, 0f40000000;
+	cvt.rzi.f32.f32	%f979, %f980;
+	add.f32 	%f978, %f979, %f979;
+	mov.f32 	%f977, 0f40800000;
+	sub.f32 	%f976, %f977, %f978;
+	abs.f32 	%f975, %f976;
+	setp.lt.f32	%p18, %f14, 0f00000000;
+	setp.eq.f32	%p19, %f975, 0f3F800000;
+	and.pred  	%p1, %p18, %p19;
+	mov.b32 	 %r58, %f1045;
+	xor.b32  	%r59, %r58, -2147483648;
+	mov.b32 	 %f243, %r59;
+	selp.f32	%f1047, %f243, %f1045, %p1;
+	setp.eq.f32	%p20, %f14, 0f00000000;
+	@%p20 bra 	BB0_8;
+	bra.uni 	BB0_6;
+
+BB0_8:
+	add.f32 	%f246, %f14, %f14;
+	selp.f32	%f1047, %f246, 0f00000000, %p19;
+	bra.uni 	BB0_9;
+
+BB0_6:
+	setp.geu.f32	%p21, %f14, 0f00000000;
+	@%p21 bra 	BB0_9;
+
+	mov.f32 	%f1013, 0f40800000;
+	cvt.rzi.f32.f32	%f245, %f1013;
+	setp.neu.f32	%p22, %f245, 0f40800000;
+	selp.f32	%f1047, 0f7FFFFFFF, %f1047, %p22;
+
+BB0_9:
+	abs.f32 	%f981, %f14;
+	add.f32 	%f247, %f981, 0f40800000;
+	mov.b32 	 %r60, %f247;
+	setp.lt.s32	%p24, %r60, 2139095040;
+	@%p24 bra 	BB0_14;
+
+	abs.f32 	%f1011, %f14;
+	setp.gtu.f32	%p25, %f1011, 0f7F800000;
+	@%p25 bra 	BB0_13;
+	bra.uni 	BB0_11;
+
+BB0_13:
+	add.f32 	%f1047, %f14, 0f40800000;
+	bra.uni 	BB0_14;
+
+BB0_11:
+	abs.f32 	%f1012, %f14;
+	setp.neu.f32	%p26, %f1012, 0f7F800000;
+	@%p26 bra 	BB0_14;
+
+	selp.f32	%f1047, 0fFF800000, 0f7F800000, %p1;
+
+BB0_14:
+	mov.f32 	%f1050, 0f3F800000;
+	sub.f32 	%f256, %f1050, %f1047;
+	setp.eq.f32	%p27, %f14, 0f3F800000;
+	selp.f32	%f257, 0f00000000, %f256, %p27;
+	cvt.sat.f32.f32	%f258, %f257;
+	ld.global.f32 	%f259, [lightFalloffMinRadiusSq];
+	fma.rn.f32 	%f260, %f13, %f13, %f259;
+	div.rn.f32 	%f28, %f258, %f260;
+	mul.f32 	%f261, %f1043, %f11;
+	fma.rn.f32 	%f262, %f1042, %f10, %f261;
+	fma.rn.f32 	%f29, %f1044, %f12, %f262;
+	ld.global.u32 	%r64, [imageEnabled];
+	and.b32  	%r65, %r64, 32;
+	ld.global.u32 	%r66, [ignoreNormal];
+	or.b32  	%r4, %r65, %r66;
+	ld.global.f32 	%f263, [lightMatrix];
+	fma.rn.f32 	%f264, %f263, %f10, 0f00000000;
+	ld.global.f32 	%f265, [lightMatrix+4];
+	fma.rn.f32 	%f266, %f265, %f11, %f264;
+	ld.global.f32 	%f267, [lightMatrix+8];
+	fma.rn.f32 	%f254, %f267, %f12, %f266;
+	ld.global.f32 	%f268, [lightMatrix+12];
+	fma.rn.f32 	%f269, %f268, %f10, 0f00000000;
+	ld.global.f32 	%f270, [lightMatrix+16];
+	fma.rn.f32 	%f271, %f270, %f11, %f269;
+	ld.global.f32 	%f272, [lightMatrix+20];
+	fma.rn.f32 	%f253, %f272, %f12, %f271;
+	ld.global.f32 	%f273, [lightMatrix+24];
+	fma.rn.f32 	%f274, %f273, %f10, 0f00000000;
+	ld.global.f32 	%f275, [lightMatrix+28];
+	fma.rn.f32 	%f276, %f275, %f11, %f274;
+	ld.global.f32 	%f277, [lightMatrix+32];
+	fma.rn.f32 	%f252, %f277, %f12, %f276;
+	ld.global.u32 	%r61, [lightCubemap];
+	mov.u32 	%r62, 6;
+	mov.u32 	%r243, 0;
+	// inline asm
+	call (%f248, %f249, %f250, %f251), _rt_texture_get_base_id, (%r61, %r62, %f252, %f253, %f254, %r243);
+	// inline asm
+	max.f32 	%f278, %f248, %f249;
+	max.f32 	%f279, %f278, %f250;
+	mul.f32 	%f280, %f28, %f279;
+	ld.global.f32 	%f281, [lightColor+4];
+	ld.global.f32 	%f282, [lightColor];
+	max.f32 	%f283, %f282, %f281;
+	ld.global.f32 	%f284, [lightColor+8];
+	max.f32 	%f285, %f283, %f284;
+	mul.f32 	%f286, %f280, %f285;
+	setp.lt.f32	%p28, %f286, 0f3727C5AC;
+	@%p28 bra 	BB0_87;
+	bra.uni 	BB0_15;
+
+BB0_87:
+	ld.global.u32 	%r248, [imageEnabled];
+	and.b32  	%r167, %r248, 1;
+	setp.eq.b32	%p114, %r167, 1;
+	@!%p114 bra 	BB0_89;
+	bra.uni 	BB0_88;
+
+BB0_88:
+	cvt.u64.u32	%rd147, %r2;
+	cvt.u64.u32	%rd148, %r3;
+	mov.u64 	%rd151, image;
+	cvta.global.u64 	%rd146, %rd151;
+	// inline asm
+	call (%rd145), _rt_buffer_get_64, (%rd146, %r31, %r32, %rd147, %rd148, %rd19, %rd19);
+	// inline asm
+	mov.u16 	%rs106, 1;
+	mov.u16 	%rs107, 0;
+	st.v4.u8 	[%rd145], {%rs107, %rs107, %rs107, %rs106};
+	ld.global.u32 	%r248, [imageEnabled];
+
+BB0_89:
+	and.b32  	%r170, %r248, 8;
+	setp.eq.s32	%p115, %r170, 0;
+	@%p115 bra 	BB0_91;
+
+	cvt.u64.u32	%rd155, %r3;
+	cvt.u64.u32	%rd154, %r2;
+	mov.u64 	%rd158, image_Mask;
+	cvta.global.u64 	%rd153, %rd158;
+	// inline asm
+	call (%rd152), _rt_buffer_get_64, (%rd153, %r31, %r31, %rd154, %rd155, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f911, 0f00000000;
+	cvt.rzi.u32.f32	%r173, %f911;
+	cvt.u16.u32	%rs108, %r173;
+	mov.u16 	%rs109, 255;
+	st.v2.u8 	[%rd152], {%rs108, %rs109};
+	ld.global.u32 	%r248, [imageEnabled];
+
+BB0_91:
+	cvt.u64.u32	%rd10, %r2;
+	cvt.u64.u32	%rd11, %r3;
+	and.b32  	%r174, %r248, 4;
+	setp.eq.s32	%p116, %r174, 0;
+	@%p116 bra 	BB0_95;
+
+	ld.global.u32 	%r175, [additive];
+	setp.eq.s32	%p117, %r175, 0;
+	mov.f32 	%f912, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs110, %f912;}
+
+	// inline asm
+	@%p117 bra 	BB0_94;
+
+	mov.u64 	%rd171, image_HDR;
+	cvta.global.u64 	%rd160, %rd171;
+	mov.u32 	%r179, 8;
+	// inline asm
+	call (%rd159), _rt_buffer_get_64, (%rd160, %r31, %r179, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs117, %rs118, %rs119, %rs120}, [%rd159];
+	// inline asm
+	{  cvt.f32.f16 %f913, %rs117;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f914, %rs118;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f915, %rs119;}
+
+	// inline asm
+	// inline asm
+	call (%rd165), _rt_buffer_get_64, (%rd160, %r31, %r179, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f916, %f913, 0f00000000;
+	add.f32 	%f917, %f914, 0f00000000;
+	add.f32 	%f918, %f915, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs116, %f918;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs115, %f917;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs114, %f916;}
+
+	// inline asm
+	st.v4.u16 	[%rd165], {%rs114, %rs115, %rs116, %rs110};
+	bra.uni 	BB0_95;
+
+BB0_15:
+	mov.f32 	%f1049, 0f00000000;
+	mul.f32 	%f288, %f7, 0f3456BF95;
+	abs.f32 	%f289, %f1042;
+	div.rn.f32 	%f290, %f288, %f289;
+	abs.f32 	%f291, %f1043;
+	mul.f32 	%f292, %f8, 0f3456BF95;
+	div.rn.f32 	%f293, %f292, %f291;
+	abs.f32 	%f294, %f1044;
+	mul.f32 	%f295, %f9, 0f3456BF95;
+	div.rn.f32 	%f296, %f295, %f294;
+	abs.f32 	%f297, %f290;
+	abs.f32 	%f298, %f293;
+	abs.f32 	%f299, %f296;
+	mov.f32 	%f300, 0f38D1B717;
+	max.f32 	%f301, %f297, %f300;
+	max.f32 	%f302, %f298, %f300;
+	max.f32 	%f303, %f299, %f300;
+	fma.rn.f32 	%f33, %f1042, %f301, %f7;
+	fma.rn.f32 	%f34, %f1043, %f302, %f8;
+	fma.rn.f32 	%f35, %f1044, %f303, %f9;
+	ld.global.u32 	%r244, [samples];
+	setp.lt.s32	%p29, %r244, 1;
+	@%p29 bra 	BB0_18;
+
+	mul.f32 	%f305, %f33, 0f3456BF95;
+	abs.f32 	%f306, %f305;
+	mul.f32 	%f307, %f34, 0f3456BF95;
+	abs.f32 	%f308, %f307;
+	mul.f32 	%f309, %f35, 0f3456BF95;
+	abs.f32 	%f310, %f309;
+	max.f32 	%f311, %f306, %f308;
+	max.f32 	%f312, %f311, %f310;
+	max.f32 	%f36, %f312, %f300;
+	mov.f32 	%f1049, 0f00000000;
+
+BB0_17:
+	add.u64 	%rd28, %SP, 0;
+	cvta.to.local.u64 	%rd29, %rd28;
+	cvt.rn.f32.s32	%f322, %r243;
+	mul.f32 	%f323, %f322, 0f3DD32618;
+	cvt.rmi.f32.f32	%f324, %f323;
+	sub.f32 	%f325, %f323, %f324;
+	mul.f32 	%f326, %f322, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f327, %f326;
+	sub.f32 	%f328, %f326, %f327;
+	mul.f32 	%f329, %f322, 0f3DC74539;
+	cvt.rmi.f32.f32	%f330, %f329;
+	sub.f32 	%f331, %f329, %f330;
+	add.f32 	%f332, %f328, 0f4199851F;
+	add.f32 	%f333, %f331, 0f4199851F;
+	add.f32 	%f334, %f325, 0f4199851F;
+	mul.f32 	%f335, %f328, %f333;
+	fma.rn.f32 	%f336, %f325, %f332, %f335;
+	fma.rn.f32 	%f337, %f334, %f331, %f336;
+	add.f32 	%f338, %f325, %f337;
+	add.f32 	%f339, %f328, %f337;
+	add.f32 	%f340, %f331, %f337;
+	add.f32 	%f341, %f338, %f339;
+	mul.f32 	%f342, %f340, %f341;
+	cvt.rmi.f32.f32	%f343, %f342;
+	sub.f32 	%f344, %f342, %f343;
+	add.f32 	%f345, %f338, %f340;
+	mul.f32 	%f346, %f339, %f345;
+	cvt.rmi.f32.f32	%f347, %f346;
+	sub.f32 	%f348, %f346, %f347;
+	add.f32 	%f349, %f339, %f340;
+	mul.f32 	%f350, %f338, %f349;
+	cvt.rmi.f32.f32	%f351, %f350;
+	sub.f32 	%f352, %f350, %f351;
+	fma.rn.f32 	%f353, %f344, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f354, %f348, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f355, %f352, 0f40000000, 0fBF800000;
+	ld.global.f32 	%f356, [lightRadius];
+	ld.global.f32 	%f357, [lightPos];
+	fma.rn.f32 	%f358, %f356, %f353, %f357;
+	ld.global.f32 	%f359, [lightPos+4];
+	fma.rn.f32 	%f360, %f356, %f354, %f359;
+	ld.global.f32 	%f361, [lightPos+8];
+	fma.rn.f32 	%f362, %f356, %f355, %f361;
+	sub.f32 	%f363, %f358, %f7;
+	sub.f32 	%f364, %f360, %f8;
+	sub.f32 	%f365, %f362, %f9;
+	mul.f32 	%f366, %f364, %f364;
+	fma.rn.f32 	%f367, %f363, %f363, %f366;
+	fma.rn.f32 	%f368, %f365, %f365, %f367;
+	sqrt.rn.f32 	%f321, %f368;
+	rcp.rn.f32 	%f369, %f321;
+	mul.f32 	%f317, %f369, %f363;
+	mul.f32 	%f318, %f369, %f364;
+	mul.f32 	%f319, %f369, %f365;
+	ld.global.u32 	%r71, [imageEnabled];
+	and.b32  	%r72, %r71, 32;
+	setp.eq.s32	%p30, %r72, 0;
+	selp.f32	%f370, 0f3F800000, 0f41200000, %p30;
+	mul.f32 	%f320, %f370, %f36;
+	mov.u32 	%r73, 1065353216;
+	st.local.u32 	[%rd29], %r73;
+	ld.global.u32 	%r68, [root];
+	mov.u32 	%r69, 1;
+	// inline asm
+	call _rt_trace_64, (%r68, %f33, %f34, %f35, %f317, %f318, %f319, %r69, %f320, %f321, %rd28, %r32);
+	// inline asm
+	ld.local.f32 	%f371, [%rd29];
+	add.f32 	%f1049, %f1049, %f371;
+	ld.global.u32 	%r244, [samples];
+	add.s32 	%r243, %r243, 1;
+	setp.lt.s32	%p31, %r243, %r244;
+	@%p31 bra 	BB0_17;
+
+BB0_18:
+	setp.eq.s32	%p32, %r244, 0;
+	@%p32 bra 	BB0_20;
+
+	cvt.rn.f32.s32	%f373, %r244;
+	div.rn.f32 	%f1050, %f1049, %f373;
+
+BB0_20:
+	setp.eq.s32	%p33, %r4, 0;
+	selp.f32	%f374, %f29, 0f3F800000, %p33;
+	cvt.sat.f32.f32	%f375, %f374;
+	mul.f32 	%f376, %f28, %f375;
+	mul.f32 	%f377, %f1050, %f376;
+	ld.global.f32 	%f378, [lightColor];
+	mul.f32 	%f379, %f378, %f377;
+	ld.global.f32 	%f380, [lightColor+4];
+	mul.f32 	%f381, %f380, %f377;
+	ld.global.f32 	%f382, [lightColor+8];
+	mul.f32 	%f383, %f377, %f382;
+	mul.f32 	%f42, %f248, %f379;
+	mul.f32 	%f43, %f249, %f381;
+	mul.f32 	%f44, %f250, %f383;
+	ld.global.u32 	%r246, [imageEnabled];
+	and.b32  	%r74, %r246, 8;
+	setp.eq.s32	%p34, %r74, 0;
+	@%p34 bra 	BB0_33;
+
+	mov.f32 	%f989, 0fB5BFBE8E;
+	mov.f32 	%f988, 0fBF317200;
+	mov.f32 	%f987, 0f35BFBE8E;
+	mov.f32 	%f986, 0f3F317200;
+	mov.f32 	%f985, 0f3DAAAABD;
+	mov.f32 	%f984, 0f3C4CAF63;
+	mov.f32 	%f983, 0f3B18F0FE;
+	cvt.u64.u32	%rd32, %r2;
+	cvt.u64.u32	%rd33, %r3;
+	mov.u64 	%rd36, image_Mask;
+	cvta.global.u64 	%rd31, %rd36;
+	// inline asm
+	call (%rd30), _rt_buffer_get_64, (%rd31, %r31, %r31, %rd32, %rd33, %rd19, %rd19);
+	// inline asm
+	abs.f32 	%f46, %f1050;
+	setp.lt.f32	%p35, %f46, 0f00800000;
+	mul.f32 	%f389, %f46, 0f4B800000;
+	selp.f32	%f390, 0fC3170000, 0fC2FE0000, %p35;
+	selp.f32	%f391, %f389, %f46, %p35;
+	mov.b32 	 %r77, %f391;
+	and.b32  	%r78, %r77, 8388607;
+	or.b32  	%r79, %r78, 1065353216;
+	mov.b32 	 %f392, %r79;
+	shr.u32 	%r80, %r77, 23;
+	cvt.rn.f32.u32	%f393, %r80;
+	add.f32 	%f394, %f390, %f393;
+	setp.gt.f32	%p36, %f392, 0f3FB504F3;
+	mul.f32 	%f395, %f392, 0f3F000000;
+	add.f32 	%f396, %f394, 0f3F800000;
+	selp.f32	%f397, %f395, %f392, %p36;
+	selp.f32	%f398, %f396, %f394, %p36;
+	add.f32 	%f399, %f397, 0fBF800000;
+	add.f32 	%f385, %f397, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f384,%f385;
+	// inline asm
+	add.f32 	%f400, %f399, %f399;
+	mul.f32 	%f401, %f384, %f400;
+	mul.f32 	%f402, %f401, %f401;
+	fma.rn.f32 	%f405, %f983, %f402, %f984;
+	fma.rn.f32 	%f407, %f405, %f402, %f985;
+	mul.rn.f32 	%f408, %f407, %f402;
+	mul.rn.f32 	%f409, %f408, %f401;
+	sub.f32 	%f410, %f399, %f401;
+	neg.f32 	%f411, %f401;
+	add.f32 	%f412, %f410, %f410;
+	fma.rn.f32 	%f413, %f411, %f399, %f412;
+	mul.rn.f32 	%f414, %f384, %f413;
+	add.f32 	%f415, %f409, %f401;
+	sub.f32 	%f416, %f401, %f415;
+	add.f32 	%f417, %f409, %f416;
+	add.f32 	%f418, %f414, %f417;
+	add.f32 	%f419, %f415, %f418;
+	sub.f32 	%f420, %f415, %f419;
+	add.f32 	%f421, %f418, %f420;
+	mul.rn.f32 	%f423, %f398, %f986;
+	mul.rn.f32 	%f425, %f398, %f987;
+	add.f32 	%f426, %f423, %f419;
+	sub.f32 	%f427, %f423, %f426;
+	add.f32 	%f428, %f419, %f427;
+	add.f32 	%f429, %f421, %f428;
+	add.f32 	%f430, %f425, %f429;
+	add.f32 	%f431, %f426, %f430;
+	sub.f32 	%f432, %f426, %f431;
+	add.f32 	%f433, %f430, %f432;
+	mov.f32 	%f434, 0f3EE8BA2E;
+	mul.rn.f32 	%f435, %f434, %f431;
+	neg.f32 	%f436, %f435;
+	fma.rn.f32 	%f437, %f434, %f431, %f436;
+	fma.rn.f32 	%f438, %f434, %f433, %f437;
+	mov.f32 	%f439, 0f00000000;
+	fma.rn.f32 	%f440, %f439, %f431, %f438;
+	add.rn.f32 	%f441, %f435, %f440;
+	neg.f32 	%f442, %f441;
+	add.rn.f32 	%f443, %f435, %f442;
+	add.rn.f32 	%f444, %f443, %f440;
+	mov.b32 	 %r81, %f441;
+	setp.eq.s32	%p37, %r81, 1118925336;
+	add.s32 	%r82, %r81, -1;
+	mov.b32 	 %f445, %r82;
+	add.f32 	%f446, %f444, 0f37000000;
+	selp.f32	%f447, %f445, %f441, %p37;
+	selp.f32	%f47, %f446, %f444, %p37;
+	mul.f32 	%f448, %f447, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f449, %f448;
+	fma.rn.f32 	%f451, %f449, %f988, %f447;
+	fma.rn.f32 	%f453, %f449, %f989, %f451;
+	mul.f32 	%f454, %f453, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f455, %f454;
+	add.f32 	%f456, %f449, 0f00000000;
+	ex2.approx.f32 	%f457, %f456;
+	mul.f32 	%f458, %f455, %f457;
+	setp.lt.f32	%p38, %f447, 0fC2D20000;
+	selp.f32	%f459, 0f00000000, %f458, %p38;
+	setp.gt.f32	%p39, %f447, 0f42D20000;
+	selp.f32	%f1051, 0f7F800000, %f459, %p39;
+	setp.eq.f32	%p40, %f1051, 0f7F800000;
+	@%p40 bra 	BB0_23;
+
+	fma.rn.f32 	%f1051, %f1051, %f47, %f1051;
+
+BB0_23:
+	mov.f32 	%f1017, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f1016, %f1017;
+	fma.rn.f32 	%f1015, %f1016, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f1014, %f1015;
+	setp.lt.f32	%p41, %f1050, 0f00000000;
+	setp.eq.f32	%p42, %f1014, 0f3F800000;
+	and.pred  	%p2, %p41, %p42;
+	mov.b32 	 %r83, %f1051;
+	xor.b32  	%r84, %r83, -2147483648;
+	mov.b32 	 %f460, %r84;
+	selp.f32	%f1053, %f460, %f1051, %p2;
+	setp.eq.f32	%p43, %f1050, 0f00000000;
+	@%p43 bra 	BB0_26;
+	bra.uni 	BB0_24;
+
+BB0_26:
+	add.f32 	%f463, %f1050, %f1050;
+	selp.f32	%f1053, %f463, 0f00000000, %p42;
+	bra.uni 	BB0_27;
+
+BB0_111:
+	mov.u64 	%rd272, image_HDR;
+	cvta.global.u64 	%rd267, %rd272;
+	mov.u32 	%r217, 8;
+	// inline asm
+	call (%rd266), _rt_buffer_get_64, (%rd267, %r31, %r217, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f953, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs172, %f953;}
+
+	// inline asm
+	mov.u16 	%rs173, 0;
+	st.v4.u16 	[%rd266], {%rs172, %rs172, %rs172, %rs173};
+
+BB0_112:
+	ld.global.u32 	%r218, [additive];
+	setp.eq.s32	%p125, %r218, 0;
+	@%p125 bra 	BB0_114;
+
+	mov.u64 	%rd285, image_RNM0;
+	cvta.global.u64 	%rd274, %rd285;
+	mov.u32 	%r222, 8;
+	// inline asm
+	call (%rd273), _rt_buffer_get_64, (%rd274, %r31, %r222, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs180, %rs181, %rs182, %rs183}, [%rd273];
+	// inline asm
+	{  cvt.f32.f16 %f954, %rs180;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f955, %rs181;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f956, %rs182;}
+
+	// inline asm
+	// inline asm
+	call (%rd279), _rt_buffer_get_64, (%rd274, %r31, %r222, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f957, %f954, 0f00000000;
+	add.f32 	%f958, %f955, 0f00000000;
+	add.f32 	%f959, %f956, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs179, %f959;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs178, %f958;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs177, %f957;}
+
+	// inline asm
+	mov.u16 	%rs184, 0;
+	st.v4.u16 	[%rd279], {%rs177, %rs178, %rs179, %rs184};
+	bra.uni 	BB0_115;
+
+BB0_114:
+	mov.u64 	%rd292, image_RNM0;
+	cvta.global.u64 	%rd287, %rd292;
+	mov.u32 	%r224, 8;
+	// inline asm
+	call (%rd286), _rt_buffer_get_64, (%rd287, %r31, %r224, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f960, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs185, %f960;}
+
+	// inline asm
+	mov.u16 	%rs186, 0;
+	st.v4.u16 	[%rd286], {%rs185, %rs185, %rs185, %rs186};
+
+BB0_115:
+	ld.global.u32 	%r225, [additive];
+	setp.eq.s32	%p126, %r225, 0;
+	@%p126 bra 	BB0_117;
+
+	mov.u64 	%rd305, image_RNM1;
+	cvta.global.u64 	%rd294, %rd305;
+	mov.u32 	%r229, 8;
+	// inline asm
+	call (%rd293), _rt_buffer_get_64, (%rd294, %r31, %r229, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs193, %rs194, %rs195, %rs196}, [%rd293];
+	// inline asm
+	{  cvt.f32.f16 %f961, %rs193;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f962, %rs194;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f963, %rs195;}
+
+	// inline asm
+	// inline asm
+	call (%rd299), _rt_buffer_get_64, (%rd294, %r31, %r229, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f964, %f961, 0f00000000;
+	add.f32 	%f965, %f962, 0f00000000;
+	add.f32 	%f966, %f963, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs192, %f966;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs191, %f965;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs190, %f964;}
+
+	// inline asm
+	mov.u16 	%rs197, 0;
+	st.v4.u16 	[%rd299], {%rs190, %rs191, %rs192, %rs197};
+	bra.uni 	BB0_118;
+
+BB0_117:
+	mov.u64 	%rd312, image_RNM1;
+	cvta.global.u64 	%rd307, %rd312;
+	mov.u32 	%r231, 8;
+	// inline asm
+	call (%rd306), _rt_buffer_get_64, (%rd307, %r31, %r231, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f967, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs198, %f967;}
+
+	// inline asm
+	mov.u16 	%rs199, 0;
+	st.v4.u16 	[%rd306], {%rs198, %rs198, %rs198, %rs199};
+
+BB0_118:
+	ld.global.u32 	%r232, [additive];
+	setp.eq.s32	%p127, %r232, 0;
+	@%p127 bra 	BB0_120;
+
+	mov.u64 	%rd325, image_RNM2;
+	cvta.global.u64 	%rd314, %rd325;
+	mov.u32 	%r236, 8;
+	// inline asm
+	call (%rd313), _rt_buffer_get_64, (%rd314, %r31, %r236, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs206, %rs207, %rs208, %rs209}, [%rd313];
+	// inline asm
+	{  cvt.f32.f16 %f968, %rs206;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f969, %rs207;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f970, %rs208;}
+
+	// inline asm
+	// inline asm
+	call (%rd319), _rt_buffer_get_64, (%rd314, %r31, %r236, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f971, %f968, 0f00000000;
+	add.f32 	%f972, %f969, 0f00000000;
+	add.f32 	%f973, %f970, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs205, %f973;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs204, %f972;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs203, %f971;}
+
+	// inline asm
+	mov.u16 	%rs210, 0;
+	st.v4.u16 	[%rd319], {%rs203, %rs204, %rs205, %rs210};
+	bra.uni 	BB0_121;
+
+BB0_120:
+	mov.u64 	%rd332, image_RNM2;
+	cvta.global.u64 	%rd327, %rd332;
+	mov.u32 	%r238, 8;
+	// inline asm
+	call (%rd326), _rt_buffer_get_64, (%rd327, %r31, %r238, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f974, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs211, %f974;}
+
+	// inline asm
+	mov.u16 	%rs212, 0;
+	st.v4.u16 	[%rd326], {%rs211, %rs211, %rs211, %rs212};
+	bra.uni 	BB0_121;
+
+BB0_94:
+	mov.u64 	%rd178, image_HDR;
+	cvta.global.u64 	%rd173, %rd178;
+	mov.u32 	%r181, 8;
+	// inline asm
+	call (%rd172), _rt_buffer_get_64, (%rd173, %r31, %r181, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f919, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs121, %f919;}
+
+	// inline asm
+	st.v4.u16 	[%rd172], {%rs121, %rs121, %rs121, %rs110};
+
+BB0_95:
+	ld.global.u32 	%r182, [additive];
+	setp.eq.s32	%p118, %r182, 0;
+	mov.f32 	%f920, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs122, %f920;}
+
+	// inline asm
+	@%p118 bra 	BB0_97;
+
+	mov.u64 	%rd191, image_RNM0;
+	cvta.global.u64 	%rd180, %rd191;
+	mov.u32 	%r186, 8;
+	// inline asm
+	call (%rd179), _rt_buffer_get_64, (%rd180, %r31, %r186, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs129, %rs130, %rs131, %rs132}, [%rd179];
+	// inline asm
+	{  cvt.f32.f16 %f921, %rs129;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f922, %rs130;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f923, %rs131;}
+
+	// inline asm
+	// inline asm
+	call (%rd185), _rt_buffer_get_64, (%rd180, %r31, %r186, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f924, %f921, 0f00000000;
+	add.f32 	%f925, %f922, 0f00000000;
+	add.f32 	%f926, %f923, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs128, %f926;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs127, %f925;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs126, %f924;}
+
+	// inline asm
+	st.v4.u16 	[%rd185], {%rs126, %rs127, %rs128, %rs122};
+	bra.uni 	BB0_98;
+
+BB0_97:
+	mov.u64 	%rd198, image_RNM0;
+	cvta.global.u64 	%rd193, %rd198;
+	mov.u32 	%r188, 8;
+	// inline asm
+	call (%rd192), _rt_buffer_get_64, (%rd193, %r31, %r188, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f927, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs133, %f927;}
+
+	// inline asm
+	st.v4.u16 	[%rd192], {%rs133, %rs133, %rs133, %rs122};
+
+BB0_98:
+	ld.global.u32 	%r189, [additive];
+	setp.eq.s32	%p119, %r189, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs134, %f920;}
+
+	// inline asm
+	@%p119 bra 	BB0_100;
+
+	mov.u64 	%rd211, image_RNM1;
+	cvta.global.u64 	%rd200, %rd211;
+	mov.u32 	%r193, 8;
+	// inline asm
+	call (%rd199), _rt_buffer_get_64, (%rd200, %r31, %r193, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs141, %rs142, %rs143, %rs144}, [%rd199];
+	// inline asm
+	{  cvt.f32.f16 %f929, %rs141;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f930, %rs142;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f931, %rs143;}
+
+	// inline asm
+	// inline asm
+	call (%rd205), _rt_buffer_get_64, (%rd200, %r31, %r193, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f932, %f929, 0f00000000;
+	add.f32 	%f933, %f930, 0f00000000;
+	add.f32 	%f934, %f931, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs140, %f934;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs139, %f933;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs138, %f932;}
+
+	// inline asm
+	st.v4.u16 	[%rd205], {%rs138, %rs139, %rs140, %rs134};
+	bra.uni 	BB0_101;
+
+BB0_100:
+	mov.u64 	%rd218, image_RNM1;
+	cvta.global.u64 	%rd213, %rd218;
+	mov.u32 	%r195, 8;
+	// inline asm
+	call (%rd212), _rt_buffer_get_64, (%rd213, %r31, %r195, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f935, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs145, %f935;}
+
+	// inline asm
+	st.v4.u16 	[%rd212], {%rs145, %rs145, %rs145, %rs134};
+
+BB0_101:
+	ld.global.u32 	%r196, [additive];
+	setp.eq.s32	%p120, %r196, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs146, %f920;}
+
+	// inline asm
+	@%p120 bra 	BB0_103;
+
+	mov.u64 	%rd231, image_RNM2;
+	cvta.global.u64 	%rd220, %rd231;
+	mov.u32 	%r200, 8;
+	// inline asm
+	call (%rd219), _rt_buffer_get_64, (%rd220, %r31, %r200, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs153, %rs154, %rs155, %rs156}, [%rd219];
+	// inline asm
+	{  cvt.f32.f16 %f937, %rs153;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f938, %rs154;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f939, %rs155;}
+
+	// inline asm
+	// inline asm
+	call (%rd225), _rt_buffer_get_64, (%rd220, %r31, %r200, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f940, %f937, 0f00000000;
+	add.f32 	%f941, %f938, 0f00000000;
+	add.f32 	%f942, %f939, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs152, %f942;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs151, %f941;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs150, %f940;}
+
+	// inline asm
+	st.v4.u16 	[%rd225], {%rs150, %rs151, %rs152, %rs146};
+	bra.uni 	BB0_121;
+
+BB0_103:
+	mov.u64 	%rd238, image_RNM2;
+	cvta.global.u64 	%rd233, %rd238;
+	mov.u32 	%r202, 8;
+	// inline asm
+	call (%rd232), _rt_buffer_get_64, (%rd233, %r31, %r202, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f943, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs157, %f943;}
+
+	// inline asm
+	st.v4.u16 	[%rd232], {%rs157, %rs157, %rs157, %rs146};
+	bra.uni 	BB0_121;
+
+BB0_24:
+	setp.geu.f32	%p44, %f1050, 0f00000000;
+	@%p44 bra 	BB0_27;
+
+	mov.f32 	%f1021, 0f3EE8BA2E;
+	cvt.rzi.f32.f32	%f462, %f1021;
+	setp.neu.f32	%p45, %f462, 0f3EE8BA2E;
+	selp.f32	%f1053, 0f7FFFFFFF, %f1053, %p45;
+
+BB0_27:
+	abs.f32 	%f1018, %f1050;
+	add.f32 	%f464, %f1018, 0f3EE8BA2E;
+	mov.b32 	 %r85, %f464;
+	setp.lt.s32	%p47, %r85, 2139095040;
+	@%p47 bra 	BB0_32;
+
+	abs.f32 	%f1019, %f1050;
+	setp.gtu.f32	%p48, %f1019, 0f7F800000;
+	@%p48 bra 	BB0_31;
+	bra.uni 	BB0_29;
+
+BB0_31:
+	add.f32 	%f1053, %f1050, 0f3EE8BA2E;
+	bra.uni 	BB0_32;
+
+BB0_29:
+	abs.f32 	%f1020, %f1050;
+	setp.neu.f32	%p49, %f1020, 0f7F800000;
+	@%p49 bra 	BB0_32;
+
+	selp.f32	%f1053, 0fFF800000, 0f7F800000, %p2;
+
+BB0_32:
+	mul.f32 	%f465, %f1053, 0f437F0000;
+	setp.eq.f32	%p50, %f1050, 0f3F800000;
+	selp.f32	%f466, 0f437F0000, %f465, %p50;
+	cvt.rzi.u32.f32	%r86, %f466;
+	cvt.u16.u32	%rs17, %r86;
+	mov.u16 	%rs18, 255;
+	st.v2.u8 	[%rd30], {%rs17, %rs18};
+	ld.global.u32 	%r246, [imageEnabled];
+
+BB0_33:
+	and.b32  	%r87, %r246, 1;
+	setp.eq.b32	%p51, %r87, 1;
+	@!%p51 bra 	BB0_68;
+	bra.uni 	BB0_34;
+
+BB0_34:
+	mov.f32 	%f996, 0fB5BFBE8E;
+	mov.f32 	%f995, 0fBF317200;
+	mov.f32 	%f994, 0f35BFBE8E;
+	mov.f32 	%f993, 0f3F317200;
+	mov.f32 	%f992, 0f3DAAAABD;
+	mov.f32 	%f991, 0f3C4CAF63;
+	mov.f32 	%f990, 0f3B18F0FE;
+	abs.f32 	%f59, %f42;
+	setp.lt.f32	%p52, %f59, 0f00800000;
+	mul.f32 	%f472, %f59, 0f4B800000;
+	selp.f32	%f473, 0fC3170000, 0fC2FE0000, %p52;
+	selp.f32	%f474, %f472, %f59, %p52;
+	mov.b32 	 %r88, %f474;
+	and.b32  	%r89, %r88, 8388607;
+	or.b32  	%r90, %r89, 1065353216;
+	mov.b32 	 %f475, %r90;
+	shr.u32 	%r91, %r88, 23;
+	cvt.rn.f32.u32	%f476, %r91;
+	add.f32 	%f477, %f473, %f476;
+	setp.gt.f32	%p53, %f475, 0f3FB504F3;
+	mul.f32 	%f478, %f475, 0f3F000000;
+	add.f32 	%f479, %f477, 0f3F800000;
+	selp.f32	%f480, %f478, %f475, %p53;
+	selp.f32	%f481, %f479, %f477, %p53;
+	add.f32 	%f482, %f480, 0fBF800000;
+	add.f32 	%f468, %f480, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f467,%f468;
+	// inline asm
+	add.f32 	%f483, %f482, %f482;
+	mul.f32 	%f484, %f467, %f483;
+	mul.f32 	%f485, %f484, %f484;
+	fma.rn.f32 	%f488, %f990, %f485, %f991;
+	fma.rn.f32 	%f490, %f488, %f485, %f992;
+	mul.rn.f32 	%f491, %f490, %f485;
+	mul.rn.f32 	%f492, %f491, %f484;
+	sub.f32 	%f493, %f482, %f484;
+	neg.f32 	%f494, %f484;
+	add.f32 	%f495, %f493, %f493;
+	fma.rn.f32 	%f496, %f494, %f482, %f495;
+	mul.rn.f32 	%f497, %f467, %f496;
+	add.f32 	%f498, %f492, %f484;
+	sub.f32 	%f499, %f484, %f498;
+	add.f32 	%f500, %f492, %f499;
+	add.f32 	%f501, %f497, %f500;
+	add.f32 	%f502, %f498, %f501;
+	sub.f32 	%f503, %f498, %f502;
+	add.f32 	%f504, %f501, %f503;
+	mul.rn.f32 	%f506, %f481, %f993;
+	mul.rn.f32 	%f508, %f481, %f994;
+	add.f32 	%f509, %f506, %f502;
+	sub.f32 	%f510, %f506, %f509;
+	add.f32 	%f511, %f502, %f510;
+	add.f32 	%f512, %f504, %f511;
+	add.f32 	%f513, %f508, %f512;
+	add.f32 	%f514, %f509, %f513;
+	sub.f32 	%f515, %f509, %f514;
+	add.f32 	%f516, %f513, %f515;
+	mov.f32 	%f517, 0f3EE66666;
+	mul.rn.f32 	%f518, %f517, %f514;
+	neg.f32 	%f519, %f518;
+	fma.rn.f32 	%f520, %f517, %f514, %f519;
+	fma.rn.f32 	%f521, %f517, %f516, %f520;
+	mov.f32 	%f522, 0f00000000;
+	fma.rn.f32 	%f523, %f522, %f514, %f521;
+	add.rn.f32 	%f524, %f518, %f523;
+	neg.f32 	%f525, %f524;
+	add.rn.f32 	%f526, %f518, %f525;
+	add.rn.f32 	%f527, %f526, %f523;
+	mov.b32 	 %r92, %f524;
+	setp.eq.s32	%p54, %r92, 1118925336;
+	add.s32 	%r93, %r92, -1;
+	mov.b32 	 %f528, %r93;
+	add.f32 	%f529, %f527, 0f37000000;
+	selp.f32	%f530, %f528, %f524, %p54;
+	selp.f32	%f60, %f529, %f527, %p54;
+	mul.f32 	%f531, %f530, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f532, %f531;
+	fma.rn.f32 	%f534, %f532, %f995, %f530;
+	fma.rn.f32 	%f536, %f532, %f996, %f534;
+	mul.f32 	%f537, %f536, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f538, %f537;
+	add.f32 	%f539, %f532, 0f00000000;
+	ex2.approx.f32 	%f540, %f539;
+	mul.f32 	%f541, %f538, %f540;
+	setp.lt.f32	%p55, %f530, 0fC2D20000;
+	selp.f32	%f542, 0f00000000, %f541, %p55;
+	setp.gt.f32	%p56, %f530, 0f42D20000;
+	selp.f32	%f1054, 0f7F800000, %f542, %p56;
+	setp.eq.f32	%p57, %f1054, 0f7F800000;
+	@%p57 bra 	BB0_36;
+
+	fma.rn.f32 	%f1054, %f1054, %f60, %f1054;
+
+BB0_36:
+	mov.f32 	%f1025, 0f3E666666;
+	cvt.rzi.f32.f32	%f1024, %f1025;
+	fma.rn.f32 	%f1023, %f1024, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f1022, %f1023;
+	setp.lt.f32	%p58, %f42, 0f00000000;
+	setp.eq.f32	%p59, %f1022, 0f3F800000;
+	and.pred  	%p3, %p58, %p59;
+	mov.b32 	 %r94, %f1054;
+	xor.b32  	%r95, %r94, -2147483648;
+	mov.b32 	 %f543, %r95;
+	selp.f32	%f1056, %f543, %f1054, %p3;
+	setp.eq.f32	%p60, %f42, 0f00000000;
+	@%p60 bra 	BB0_39;
+	bra.uni 	BB0_37;
+
+BB0_39:
+	add.f32 	%f546, %f42, %f42;
+	selp.f32	%f1056, %f546, 0f00000000, %p59;
+	bra.uni 	BB0_40;
+
+BB0_37:
+	setp.geu.f32	%p61, %f42, 0f00000000;
+	@%p61 bra 	BB0_40;
+
+	mov.f32 	%f1035, 0f3EE66666;
+	cvt.rzi.f32.f32	%f545, %f1035;
+	setp.neu.f32	%p62, %f545, 0f3EE66666;
+	selp.f32	%f1056, 0f7FFFFFFF, %f1056, %p62;
+
+BB0_40:
+	abs.f32 	%f1026, %f42;
+	add.f32 	%f547, %f1026, 0f3EE66666;
+	mov.b32 	 %r96, %f547;
+	setp.lt.s32	%p64, %r96, 2139095040;
+	@%p64 bra 	BB0_45;
+
+	abs.f32 	%f1033, %f42;
+	setp.gtu.f32	%p65, %f1033, 0f7F800000;
+	@%p65 bra 	BB0_44;
+	bra.uni 	BB0_42;
+
+BB0_44:
+	add.f32 	%f1056, %f42, 0f3EE66666;
+	bra.uni 	BB0_45;
+
+BB0_42:
+	abs.f32 	%f1034, %f42;
+	setp.neu.f32	%p66, %f1034, 0f7F800000;
+	@%p66 bra 	BB0_45;
+
+	selp.f32	%f1056, 0fFF800000, 0f7F800000, %p3;
+
+BB0_45:
+	mov.f32 	%f1028, 0f00000000;
+	mov.f32 	%f1027, 0f3EE66666;
+	mov.f32 	%f1003, 0fB5BFBE8E;
+	mov.f32 	%f1002, 0fBF317200;
+	mov.f32 	%f1001, 0f35BFBE8E;
+	mov.f32 	%f1000, 0f3F317200;
+	mov.f32 	%f999, 0f3DAAAABD;
+	mov.f32 	%f998, 0f3C4CAF63;
+	mov.f32 	%f997, 0f3B18F0FE;
+	setp.eq.f32	%p67, %f42, 0f3F800000;
+	selp.f32	%f71, 0f3F800000, %f1056, %p67;
+	abs.f32 	%f72, %f43;
+	setp.lt.f32	%p68, %f72, 0f00800000;
+	mul.f32 	%f550, %f72, 0f4B800000;
+	selp.f32	%f551, 0fC3170000, 0fC2FE0000, %p68;
+	selp.f32	%f552, %f550, %f72, %p68;
+	mov.b32 	 %r97, %f552;
+	and.b32  	%r98, %r97, 8388607;
+	or.b32  	%r99, %r98, 1065353216;
+	mov.b32 	 %f553, %r99;
+	shr.u32 	%r100, %r97, 23;
+	cvt.rn.f32.u32	%f554, %r100;
+	add.f32 	%f555, %f551, %f554;
+	setp.gt.f32	%p69, %f553, 0f3FB504F3;
+	mul.f32 	%f556, %f553, 0f3F000000;
+	add.f32 	%f557, %f555, 0f3F800000;
+	selp.f32	%f558, %f556, %f553, %p69;
+	selp.f32	%f559, %f557, %f555, %p69;
+	add.f32 	%f560, %f558, 0fBF800000;
+	add.f32 	%f549, %f558, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f548,%f549;
+	// inline asm
+	add.f32 	%f561, %f560, %f560;
+	mul.f32 	%f562, %f548, %f561;
+	mul.f32 	%f563, %f562, %f562;
+	fma.rn.f32 	%f566, %f997, %f563, %f998;
+	fma.rn.f32 	%f568, %f566, %f563, %f999;
+	mul.rn.f32 	%f569, %f568, %f563;
+	mul.rn.f32 	%f570, %f569, %f562;
+	sub.f32 	%f571, %f560, %f562;
+	neg.f32 	%f572, %f562;
+	add.f32 	%f573, %f571, %f571;
+	fma.rn.f32 	%f574, %f572, %f560, %f573;
+	mul.rn.f32 	%f575, %f548, %f574;
+	add.f32 	%f576, %f570, %f562;
+	sub.f32 	%f577, %f562, %f576;
+	add.f32 	%f578, %f570, %f577;
+	add.f32 	%f579, %f575, %f578;
+	add.f32 	%f580, %f576, %f579;
+	sub.f32 	%f581, %f576, %f580;
+	add.f32 	%f582, %f579, %f581;
+	mul.rn.f32 	%f584, %f559, %f1000;
+	mul.rn.f32 	%f586, %f559, %f1001;
+	add.f32 	%f587, %f584, %f580;
+	sub.f32 	%f588, %f584, %f587;
+	add.f32 	%f589, %f580, %f588;
+	add.f32 	%f590, %f582, %f589;
+	add.f32 	%f591, %f586, %f590;
+	add.f32 	%f592, %f587, %f591;
+	sub.f32 	%f593, %f587, %f592;
+	add.f32 	%f594, %f591, %f593;
+	mul.rn.f32 	%f596, %f1027, %f592;
+	neg.f32 	%f597, %f596;
+	fma.rn.f32 	%f598, %f1027, %f592, %f597;
+	fma.rn.f32 	%f599, %f1027, %f594, %f598;
+	fma.rn.f32 	%f601, %f1028, %f592, %f599;
+	add.rn.f32 	%f602, %f596, %f601;
+	neg.f32 	%f603, %f602;
+	add.rn.f32 	%f604, %f596, %f603;
+	add.rn.f32 	%f605, %f604, %f601;
+	mov.b32 	 %r101, %f602;
+	setp.eq.s32	%p70, %r101, 1118925336;
+	add.s32 	%r102, %r101, -1;
+	mov.b32 	 %f606, %r102;
+	add.f32 	%f607, %f605, 0f37000000;
+	selp.f32	%f608, %f606, %f602, %p70;
+	selp.f32	%f73, %f607, %f605, %p70;
+	mul.f32 	%f609, %f608, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f610, %f609;
+	fma.rn.f32 	%f612, %f610, %f1002, %f608;
+	fma.rn.f32 	%f614, %f610, %f1003, %f612;
+	mul.f32 	%f615, %f614, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f616, %f615;
+	add.f32 	%f617, %f610, 0f00000000;
+	ex2.approx.f32 	%f618, %f617;
+	mul.f32 	%f619, %f616, %f618;
+	setp.lt.f32	%p71, %f608, 0fC2D20000;
+	selp.f32	%f620, 0f00000000, %f619, %p71;
+	setp.gt.f32	%p72, %f608, 0f42D20000;
+	selp.f32	%f1057, 0f7F800000, %f620, %p72;
+	setp.eq.f32	%p73, %f1057, 0f7F800000;
+	@%p73 bra 	BB0_47;
+
+	fma.rn.f32 	%f1057, %f1057, %f73, %f1057;
+
+BB0_47:
+	setp.lt.f32	%p74, %f43, 0f00000000;
+	and.pred  	%p4, %p74, %p59;
+	mov.b32 	 %r103, %f1057;
+	xor.b32  	%r104, %r103, -2147483648;
+	mov.b32 	 %f621, %r104;
+	selp.f32	%f1059, %f621, %f1057, %p4;
+	setp.eq.f32	%p76, %f43, 0f00000000;
+	@%p76 bra 	BB0_50;
+	bra.uni 	BB0_48;
+
+BB0_50:
+	add.f32 	%f624, %f43, %f43;
+	selp.f32	%f1059, %f624, 0f00000000, %p59;
+	bra.uni 	BB0_51;
+
+BB0_48:
+	setp.geu.f32	%p77, %f43, 0f00000000;
+	@%p77 bra 	BB0_51;
+
+	mov.f32 	%f1032, 0f3EE66666;
+	cvt.rzi.f32.f32	%f623, %f1032;
+	setp.neu.f32	%p78, %f623, 0f3EE66666;
+	selp.f32	%f1059, 0f7FFFFFFF, %f1059, %p78;
+
+BB0_51:
+	abs.f32 	%f1036, %f43;
+	add.f32 	%f625, %f1036, 0f3EE66666;
+	mov.b32 	 %r105, %f625;
+	setp.lt.s32	%p80, %r105, 2139095040;
+	@%p80 bra 	BB0_56;
+
+	abs.f32 	%f1037, %f43;
+	setp.gtu.f32	%p81, %f1037, 0f7F800000;
+	@%p81 bra 	BB0_55;
+	bra.uni 	BB0_53;
+
+BB0_55:
+	add.f32 	%f1059, %f43, 0f3EE66666;
+	bra.uni 	BB0_56;
+
+BB0_53:
+	abs.f32 	%f1038, %f43;
+	setp.neu.f32	%p82, %f1038, 0f7F800000;
+	@%p82 bra 	BB0_56;
+
+	selp.f32	%f1059, 0fFF800000, 0f7F800000, %p4;
+
+BB0_56:
+	mov.f32 	%f1030, 0f00000000;
+	mov.f32 	%f1029, 0f3EE66666;
+	mov.f32 	%f1010, 0fB5BFBE8E;
+	mov.f32 	%f1009, 0fBF317200;
+	mov.f32 	%f1008, 0f35BFBE8E;
+	mov.f32 	%f1007, 0f3F317200;
+	mov.f32 	%f1006, 0f3DAAAABD;
+	mov.f32 	%f1005, 0f3C4CAF63;
+	mov.f32 	%f1004, 0f3B18F0FE;
+	setp.eq.f32	%p83, %f43, 0f3F800000;
+	selp.f32	%f84, 0f3F800000, %f1059, %p83;
+	abs.f32 	%f85, %f44;
+	setp.lt.f32	%p84, %f85, 0f00800000;
+	mul.f32 	%f628, %f85, 0f4B800000;
+	selp.f32	%f629, 0fC3170000, 0fC2FE0000, %p84;
+	selp.f32	%f630, %f628, %f85, %p84;
+	mov.b32 	 %r106, %f630;
+	and.b32  	%r107, %r106, 8388607;
+	or.b32  	%r108, %r107, 1065353216;
+	mov.b32 	 %f631, %r108;
+	shr.u32 	%r109, %r106, 23;
+	cvt.rn.f32.u32	%f632, %r109;
+	add.f32 	%f633, %f629, %f632;
+	setp.gt.f32	%p85, %f631, 0f3FB504F3;
+	mul.f32 	%f634, %f631, 0f3F000000;
+	add.f32 	%f635, %f633, 0f3F800000;
+	selp.f32	%f636, %f634, %f631, %p85;
+	selp.f32	%f637, %f635, %f633, %p85;
+	add.f32 	%f638, %f636, 0fBF800000;
+	add.f32 	%f627, %f636, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f626,%f627;
+	// inline asm
+	add.f32 	%f639, %f638, %f638;
+	mul.f32 	%f640, %f626, %f639;
+	mul.f32 	%f641, %f640, %f640;
+	fma.rn.f32 	%f644, %f1004, %f641, %f1005;
+	fma.rn.f32 	%f646, %f644, %f641, %f1006;
+	mul.rn.f32 	%f647, %f646, %f641;
+	mul.rn.f32 	%f648, %f647, %f640;
+	sub.f32 	%f649, %f638, %f640;
+	neg.f32 	%f650, %f640;
+	add.f32 	%f651, %f649, %f649;
+	fma.rn.f32 	%f652, %f650, %f638, %f651;
+	mul.rn.f32 	%f653, %f626, %f652;
+	add.f32 	%f654, %f648, %f640;
+	sub.f32 	%f655, %f640, %f654;
+	add.f32 	%f656, %f648, %f655;
+	add.f32 	%f657, %f653, %f656;
+	add.f32 	%f658, %f654, %f657;
+	sub.f32 	%f659, %f654, %f658;
+	add.f32 	%f660, %f657, %f659;
+	mul.rn.f32 	%f662, %f637, %f1007;
+	mul.rn.f32 	%f664, %f637, %f1008;
+	add.f32 	%f665, %f662, %f658;
+	sub.f32 	%f666, %f662, %f665;
+	add.f32 	%f667, %f658, %f666;
+	add.f32 	%f668, %f660, %f667;
+	add.f32 	%f669, %f664, %f668;
+	add.f32 	%f670, %f665, %f669;
+	sub.f32 	%f671, %f665, %f670;
+	add.f32 	%f672, %f669, %f671;
+	mul.rn.f32 	%f674, %f1029, %f670;
+	neg.f32 	%f675, %f674;
+	fma.rn.f32 	%f676, %f1029, %f670, %f675;
+	fma.rn.f32 	%f677, %f1029, %f672, %f676;
+	fma.rn.f32 	%f679, %f1030, %f670, %f677;
+	add.rn.f32 	%f680, %f674, %f679;
+	neg.f32 	%f681, %f680;
+	add.rn.f32 	%f682, %f674, %f681;
+	add.rn.f32 	%f683, %f682, %f679;
+	mov.b32 	 %r110, %f680;
+	setp.eq.s32	%p86, %r110, 1118925336;
+	add.s32 	%r111, %r110, -1;
+	mov.b32 	 %f684, %r111;
+	add.f32 	%f685, %f683, 0f37000000;
+	selp.f32	%f686, %f684, %f680, %p86;
+	selp.f32	%f86, %f685, %f683, %p86;
+	mul.f32 	%f687, %f686, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f688, %f687;
+	fma.rn.f32 	%f690, %f688, %f1009, %f686;
+	fma.rn.f32 	%f692, %f688, %f1010, %f690;
+	mul.f32 	%f693, %f692, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f694, %f693;
+	add.f32 	%f695, %f688, 0f00000000;
+	ex2.approx.f32 	%f696, %f695;
+	mul.f32 	%f697, %f694, %f696;
+	setp.lt.f32	%p87, %f686, 0fC2D20000;
+	selp.f32	%f698, 0f00000000, %f697, %p87;
+	setp.gt.f32	%p88, %f686, 0f42D20000;
+	selp.f32	%f1060, 0f7F800000, %f698, %p88;
+	setp.eq.f32	%p89, %f1060, 0f7F800000;
+	@%p89 bra 	BB0_58;
+
+	fma.rn.f32 	%f1060, %f1060, %f86, %f1060;
+
+BB0_58:
+	setp.lt.f32	%p90, %f44, 0f00000000;
+	and.pred  	%p5, %p90, %p59;
+	mov.b32 	 %r112, %f1060;
+	xor.b32  	%r113, %r112, -2147483648;
+	mov.b32 	 %f699, %r113;
+	selp.f32	%f1062, %f699, %f1060, %p5;
+	setp.eq.f32	%p92, %f44, 0f00000000;
+	@%p92 bra 	BB0_61;
+	bra.uni 	BB0_59;
+
+BB0_61:
+	add.f32 	%f702, %f44, %f44;
+	selp.f32	%f1062, %f702, 0f00000000, %p59;
+	bra.uni 	BB0_62;
+
+BB0_59:
+	setp.geu.f32	%p93, %f44, 0f00000000;
+	@%p93 bra 	BB0_62;
+
+	mov.f32 	%f1031, 0f3EE66666;
+	cvt.rzi.f32.f32	%f701, %f1031;
+	setp.neu.f32	%p94, %f701, 0f3EE66666;
+	selp.f32	%f1062, 0f7FFFFFFF, %f1062, %p94;
+
+BB0_62:
+	abs.f32 	%f1039, %f44;
+	add.f32 	%f703, %f1039, 0f3EE66666;
+	mov.b32 	 %r114, %f703;
+	setp.lt.s32	%p96, %r114, 2139095040;
+	@%p96 bra 	BB0_67;
+
+	abs.f32 	%f1040, %f44;
+	setp.gtu.f32	%p97, %f1040, 0f7F800000;
+	@%p97 bra 	BB0_66;
+	bra.uni 	BB0_64;
+
+BB0_66:
+	add.f32 	%f1062, %f44, 0f3EE66666;
+	bra.uni 	BB0_67;
+
+BB0_64:
+	abs.f32 	%f1041, %f44;
+	setp.neu.f32	%p98, %f1041, 0f7F800000;
+	@%p98 bra 	BB0_67;
+
+	selp.f32	%f1062, 0fFF800000, 0f7F800000, %p5;
+
+BB0_67:
+	mov.u32 	%r239, 4;
+	setp.eq.f32	%p99, %f44, 0f3F800000;
+	selp.f32	%f704, 0f3F800000, %f1062, %p99;
+	cvt.u64.u32	%rd40, %r3;
+	cvt.u64.u32	%rd39, %r2;
+	mov.u64 	%rd43, image;
+	cvta.global.u64 	%rd38, %rd43;
+	// inline asm
+	call (%rd37), _rt_buffer_get_64, (%rd38, %r31, %r239, %rd39, %rd40, %rd19, %rd19);
+	// inline asm
+	cvt.sat.f32.f32	%f705, %f704;
+	mul.f32 	%f706, %f705, 0f437FFD71;
+	cvt.rzi.u32.f32	%r117, %f706;
+	cvt.sat.f32.f32	%f707, %f84;
+	mul.f32 	%f708, %f707, 0f437FFD71;
+	cvt.rzi.u32.f32	%r118, %f708;
+	cvt.sat.f32.f32	%f709, %f71;
+	mul.f32 	%f710, %f709, 0f437FFD71;
+	cvt.rzi.u32.f32	%r119, %f710;
+	cvt.u16.u32	%rs19, %r117;
+	cvt.u16.u32	%rs20, %r119;
+	cvt.u16.u32	%rs21, %r118;
+	mov.u16 	%rs22, 255;
+	st.v4.u8 	[%rd37], {%rs19, %rs21, %rs20, %rs22};
+	ld.global.u32 	%r246, [imageEnabled];
+
+BB0_68:
+	and.b32  	%r120, %r246, 4;
+	setp.eq.s32	%p100, %r120, 0;
+	@%p100 bra 	BB0_72;
+
+	ld.global.u32 	%r121, [additive];
+	setp.eq.s32	%p101, %r121, 0;
+	cvt.u64.u32	%rd3, %r2;
+	cvt.u64.u32	%rd4, %r3;
+	mov.f32 	%f711, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs23, %f711;}
+
+	// inline asm
+	@%p101 bra 	BB0_71;
+
+	mov.u64 	%rd56, image_HDR;
+	cvta.global.u64 	%rd45, %rd56;
+	mov.u32 	%r125, 8;
+	// inline asm
+	call (%rd44), _rt_buffer_get_64, (%rd45, %r31, %r125, %rd3, %rd4, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd44];
+	// inline asm
+	{  cvt.f32.f16 %f712, %rs30;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f713, %rs31;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f714, %rs32;}
+
+	// inline asm
+	// inline asm
+	call (%rd50), _rt_buffer_get_64, (%rd45, %r31, %r125, %rd3, %rd4, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f715, %f42, %f712;
+	add.f32 	%f716, %f43, %f713;
+	add.f32 	%f717, %f44, %f714;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs29, %f717;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs28, %f716;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs27, %f715;}
+
+	// inline asm
+	st.v4.u16 	[%rd50], {%rs27, %rs28, %rs29, %rs23};
+	bra.uni 	BB0_72;
+
+BB0_71:
+	mov.u64 	%rd63, image_HDR;
+	cvta.global.u64 	%rd58, %rd63;
+	mov.u32 	%r127, 8;
+	// inline asm
+	call (%rd57), _rt_buffer_get_64, (%rd58, %r31, %r127, %rd3, %rd4, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs36, %f44;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs35, %f43;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs34, %f42;}
+
+	// inline asm
+	st.v4.u16 	[%rd57], {%rs34, %rs35, %rs36, %rs23};
+
+BB0_72:
+	mov.u32 	%r240, 4;
+	mul.f32 	%f724, %f28, %f1050;
+	ld.global.f32 	%f725, [lightColor];
+	mul.f32 	%f726, %f724, %f725;
+	ld.global.f32 	%f727, [lightColor+4];
+	mul.f32 	%f728, %f724, %f727;
+	ld.global.f32 	%f729, [lightColor+8];
+	mul.f32 	%f730, %f724, %f729;
+	mul.f32 	%f97, %f248, %f726;
+	mul.f32 	%f98, %f249, %f728;
+	mul.f32 	%f99, %f250, %f730;
+	ld.global.v2.u32 	{%r130, %r131}, [pixelID];
+	cvt.u64.u32	%rd66, %r130;
+	cvt.u64.u32	%rd67, %r131;
+	mov.u64 	%rd70, uvtangent;
+	cvta.global.u64 	%rd65, %rd70;
+	// inline asm
+	call (%rd64), _rt_buffer_get_64, (%rd65, %r31, %r240, %rd66, %rd67, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r15, [%rd64];
+	shr.u32 	%r16, %r15, 16;
+	cvt.u16.u32	%rs37, %r16;
+	and.b16  	%rs38, %rs37, 255;
+	cvt.u16.u32	%rs39, %r15;
+	or.b16  	%rs40, %rs39, %rs38;
+	setp.eq.s16	%p102, %rs40, 0;
+	mov.f32 	%f1069, 0f00000000;
+	mov.f32 	%f1063, %f1069;
+	mov.f32 	%f1064, %f1069;
+	mov.f32 	%f1065, %f1069;
+	@%p102 bra 	BB0_74;
+
+	ld.u8 	%rs41, [%rd64+1];
+	and.b16  	%rs43, %rs39, 255;
+	cvt.rn.f32.u16	%f731, %rs43;
+	div.rn.f32 	%f732, %f731, 0f437F0000;
+	fma.rn.f32 	%f733, %f732, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f734, %rs41;
+	div.rn.f32 	%f735, %f734, 0f437F0000;
+	fma.rn.f32 	%f736, %f735, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f737, %rs38;
+	div.rn.f32 	%f738, %f737, 0f437F0000;
+	fma.rn.f32 	%f739, %f738, 0f40000000, 0fBF800000;
+	mul.f32 	%f740, %f736, %f736;
+	fma.rn.f32 	%f741, %f733, %f733, %f740;
+	fma.rn.f32 	%f742, %f739, %f739, %f741;
+	sqrt.rn.f32 	%f743, %f742;
+	rcp.rn.f32 	%f744, %f743;
+	mul.f32 	%f1063, %f733, %f744;
+	mul.f32 	%f1064, %f736, %f744;
+	mul.f32 	%f1065, %f739, %f744;
+
+BB0_74:
+	mov.u32 	%r241, 4;
+	mul.f32 	%f748, %f1044, %f1064;
+	mul.f32 	%f749, %f1043, %f1065;
+	sub.f32 	%f750, %f749, %f748;
+	mul.f32 	%f751, %f1042, %f1065;
+	mul.f32 	%f752, %f1044, %f1063;
+	sub.f32 	%f753, %f752, %f751;
+	mul.f32 	%f754, %f1043, %f1063;
+	mul.f32 	%f755, %f1042, %f1064;
+	sub.f32 	%f756, %f755, %f754;
+	setp.lt.u32	%p103, %r15, 16777216;
+	selp.f32	%f757, 0fBF800000, 0f3F800000, %p103;
+	mul.f32 	%f758, %f750, %f757;
+	mul.f32 	%f759, %f753, %f757;
+	mul.f32 	%f760, %f756, %f757;
+	mul.f32 	%f761, %f758, 0f00000000;
+	mul.f32 	%f762, %f759, 0f00000000;
+	mul.f32 	%f763, %f760, 0f00000000;
+	fma.rn.f32 	%f764, %f1063, 0f3F5105EC, %f761;
+	fma.rn.f32 	%f765, %f1064, 0f3F5105EC, %f762;
+	fma.rn.f32 	%f766, %f1065, 0f3F5105EC, %f763;
+	mul.f32 	%f106, %f1042, 0f3F13CD3A;
+	add.f32 	%f107, %f106, %f764;
+	mul.f32 	%f108, %f1043, 0f3F13CD3A;
+	add.f32 	%f109, %f108, %f765;
+	mul.f32 	%f110, %f1044, 0f3F13CD3A;
+	add.f32 	%f111, %f110, %f766;
+	ld.global.v2.u32 	{%r136, %r137}, [pixelID];
+	cvt.u64.u32	%rd73, %r136;
+	cvt.u64.u32	%rd74, %r137;
+	// inline asm
+	call (%rd71), _rt_buffer_get_64, (%rd65, %r31, %r241, %rd73, %rd74, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r17, [%rd71];
+	shr.u32 	%r18, %r17, 16;
+	cvt.u16.u32	%rs46, %r18;
+	and.b16  	%rs47, %rs46, 255;
+	cvt.u16.u32	%rs48, %r17;
+	or.b16  	%rs49, %rs48, %rs47;
+	setp.eq.s16	%p104, %rs49, 0;
+	mov.f32 	%f1066, %f1069;
+	mov.f32 	%f1067, %f1069;
+	mov.f32 	%f1068, %f1069;
+	@%p104 bra 	BB0_76;
+
+	ld.u8 	%rs50, [%rd71+1];
+	and.b16  	%rs52, %rs48, 255;
+	cvt.rn.f32.u16	%f767, %rs52;
+	div.rn.f32 	%f768, %f767, 0f437F0000;
+	fma.rn.f32 	%f769, %f768, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f770, %rs50;
+	div.rn.f32 	%f771, %f770, 0f437F0000;
+	fma.rn.f32 	%f772, %f771, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f773, %rs47;
+	div.rn.f32 	%f774, %f773, 0f437F0000;
+	fma.rn.f32 	%f775, %f774, 0f40000000, 0fBF800000;
+	mul.f32 	%f776, %f772, %f772;
+	fma.rn.f32 	%f777, %f769, %f769, %f776;
+	fma.rn.f32 	%f778, %f775, %f775, %f777;
+	sqrt.rn.f32 	%f779, %f778;
+	rcp.rn.f32 	%f780, %f779;
+	mul.f32 	%f1066, %f769, %f780;
+	mul.f32 	%f1067, %f772, %f780;
+	mul.f32 	%f1068, %f775, %f780;
+
+BB0_76:
+	mov.u32 	%r242, 4;
+	mul.f32 	%f784, %f1044, %f1067;
+	mul.f32 	%f785, %f1043, %f1068;
+	sub.f32 	%f786, %f785, %f784;
+	mul.f32 	%f787, %f1042, %f1068;
+	mul.f32 	%f788, %f1044, %f1066;
+	sub.f32 	%f789, %f788, %f787;
+	mul.f32 	%f790, %f1043, %f1066;
+	mul.f32 	%f791, %f1042, %f1067;
+	sub.f32 	%f792, %f791, %f790;
+	setp.lt.u32	%p105, %r17, 16777216;
+	selp.f32	%f793, 0fBF800000, 0f3F800000, %p105;
+	mul.f32 	%f794, %f786, %f793;
+	mul.f32 	%f795, %f789, %f793;
+	mul.f32 	%f796, %f792, %f793;
+	mul.f32 	%f797, %f794, 0f3F3504F3;
+	mul.f32 	%f798, %f795, 0f3F3504F3;
+	mul.f32 	%f799, %f796, 0f3F3504F3;
+	fma.rn.f32 	%f800, %f1066, 0fBED105EC, %f797;
+	fma.rn.f32 	%f801, %f1067, 0fBED105EC, %f798;
+	fma.rn.f32 	%f802, %f1068, 0fBED105EC, %f799;
+	add.f32 	%f118, %f106, %f800;
+	add.f32 	%f119, %f108, %f801;
+	add.f32 	%f120, %f110, %f802;
+	ld.global.v2.u32 	{%r142, %r143}, [pixelID];
+	cvt.u64.u32	%rd80, %r142;
+	cvt.u64.u32	%rd81, %r143;
+	// inline asm
+	call (%rd78), _rt_buffer_get_64, (%rd65, %r31, %r242, %rd80, %rd81, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r19, [%rd78];
+	shr.u32 	%r20, %r19, 16;
+	cvt.u16.u32	%rs55, %r20;
+	and.b16  	%rs56, %rs55, 255;
+	cvt.u16.u32	%rs57, %r19;
+	or.b16  	%rs58, %rs57, %rs56;
+	setp.eq.s16	%p106, %rs58, 0;
+	mov.f32 	%f1070, %f1069;
+	mov.f32 	%f1071, %f1069;
+	@%p106 bra 	BB0_78;
+
+	ld.u8 	%rs59, [%rd78+1];
+	and.b16  	%rs61, %rs57, 255;
+	cvt.rn.f32.u16	%f803, %rs61;
+	div.rn.f32 	%f804, %f803, 0f437F0000;
+	fma.rn.f32 	%f805, %f804, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f806, %rs59;
+	div.rn.f32 	%f807, %f806, 0f437F0000;
+	fma.rn.f32 	%f808, %f807, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f809, %rs56;
+	div.rn.f32 	%f810, %f809, 0f437F0000;
+	fma.rn.f32 	%f811, %f810, 0f40000000, 0fBF800000;
+	mul.f32 	%f812, %f808, %f808;
+	fma.rn.f32 	%f813, %f805, %f805, %f812;
+	fma.rn.f32 	%f814, %f811, %f811, %f813;
+	sqrt.rn.f32 	%f815, %f814;
+	rcp.rn.f32 	%f816, %f815;
+	mul.f32 	%f1069, %f805, %f816;
+	mul.f32 	%f1070, %f808, %f816;
+	mul.f32 	%f1071, %f811, %f816;
+
+BB0_78:
+	mul.f32 	%f818, %f1044, %f1070;
+	mul.f32 	%f819, %f1043, %f1071;
+	sub.f32 	%f820, %f819, %f818;
+	mul.f32 	%f821, %f1042, %f1071;
+	mul.f32 	%f822, %f1044, %f1069;
+	sub.f32 	%f823, %f822, %f821;
+	mul.f32 	%f824, %f1043, %f1069;
+	mul.f32 	%f825, %f1042, %f1070;
+	sub.f32 	%f826, %f825, %f824;
+	setp.lt.u32	%p107, %r19, 16777216;
+	selp.f32	%f827, 0fBF800000, 0f3F800000, %p107;
+	mul.f32 	%f828, %f820, %f827;
+	mul.f32 	%f829, %f823, %f827;
+	mul.f32 	%f830, %f826, %f827;
+	mul.f32 	%f831, %f828, 0fBF3504F3;
+	mul.f32 	%f832, %f829, 0fBF3504F3;
+	mul.f32 	%f833, %f830, 0fBF3504F3;
+	fma.rn.f32 	%f834, %f1069, 0fBED105EC, %f831;
+	fma.rn.f32 	%f835, %f1070, 0fBED105EC, %f832;
+	fma.rn.f32 	%f836, %f1071, 0fBED105EC, %f833;
+	add.f32 	%f837, %f106, %f834;
+	add.f32 	%f838, %f108, %f835;
+	add.f32 	%f839, %f110, %f836;
+	mul.f32 	%f840, %f109, %f11;
+	fma.rn.f32 	%f841, %f107, %f10, %f840;
+	fma.rn.f32 	%f842, %f111, %f12, %f841;
+	cvt.sat.f32.f32	%f843, %f842;
+	mul.f32 	%f844, %f97, %f843;
+	mul.f32 	%f845, %f98, %f843;
+	mul.f32 	%f846, %f99, %f843;
+	mul.f32 	%f847, %f119, %f11;
+	fma.rn.f32 	%f848, %f118, %f10, %f847;
+	fma.rn.f32 	%f849, %f120, %f12, %f848;
+	cvt.sat.f32.f32	%f850, %f849;
+	mul.f32 	%f851, %f97, %f850;
+	mul.f32 	%f852, %f98, %f850;
+	mul.f32 	%f853, %f99, %f850;
+	mul.f32 	%f854, %f838, %f11;
+	fma.rn.f32 	%f855, %f837, %f10, %f854;
+	fma.rn.f32 	%f856, %f839, %f12, %f855;
+	cvt.sat.f32.f32	%f857, %f856;
+	mul.f32 	%f858, %f97, %f857;
+	mul.f32 	%f859, %f98, %f857;
+	mul.f32 	%f860, %f99, %f857;
+	cvt.sat.f32.f32	%f861, %f29;
+	mul.f32 	%f862, %f97, %f861;
+	mul.f32 	%f863, %f98, %f861;
+	mul.f32 	%f864, %f99, %f861;
+	add.f32 	%f865, %f844, %f851;
+	add.f32 	%f866, %f845, %f852;
+	add.f32 	%f867, %f846, %f853;
+	add.f32 	%f868, %f865, %f858;
+	add.f32 	%f869, %f866, %f859;
+	add.f32 	%f870, %f867, %f860;
+	mul.f32 	%f871, %f868, 0f3F13CD3A;
+	mul.f32 	%f872, %f869, 0f3F13CD3A;
+	mul.f32 	%f873, %f870, 0f3F13CD3A;
+	div.rn.f32 	%f874, %f862, %f871;
+	div.rn.f32 	%f875, %f863, %f872;
+	div.rn.f32 	%f876, %f864, %f873;
+	setp.eq.f32	%p108, %f862, 0f00000000;
+	selp.f32	%f877, 0f00000000, %f874, %p108;
+	setp.eq.f32	%p109, %f863, 0f00000000;
+	selp.f32	%f878, 0f00000000, %f875, %p109;
+	setp.eq.f32	%p110, %f864, 0f00000000;
+	selp.f32	%f879, 0f00000000, %f876, %p110;
+	mul.f32 	%f127, %f844, %f877;
+	mul.f32 	%f128, %f845, %f878;
+	mul.f32 	%f129, %f846, %f879;
+	mul.f32 	%f130, %f851, %f877;
+	mul.f32 	%f131, %f852, %f878;
+	mul.f32 	%f132, %f853, %f879;
+	mul.f32 	%f133, %f858, %f877;
+	mul.f32 	%f134, %f859, %f878;
+	mul.f32 	%f135, %f860, %f879;
+	ld.global.u32 	%r146, [additive];
+	setp.eq.s32	%p111, %r146, 0;
+	cvt.u64.u32	%rd8, %r2;
+	cvt.u64.u32	%rd9, %r3;
+	mov.f32 	%f817, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f817;}
+
+	// inline asm
+	@%p111 bra 	BB0_80;
+
+	mov.u64 	%rd97, image_RNM0;
+	cvta.global.u64 	%rd86, %rd97;
+	mov.u32 	%r150, 8;
+	// inline asm
+	call (%rd85), _rt_buffer_get_64, (%rd86, %r31, %r150, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs71, %rs72, %rs73, %rs74}, [%rd85];
+	// inline asm
+	{  cvt.f32.f16 %f880, %rs71;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f881, %rs72;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f882, %rs73;}
+
+	// inline asm
+	// inline asm
+	call (%rd91), _rt_buffer_get_64, (%rd86, %r31, %r150, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f883, %f127, %f880;
+	add.f32 	%f884, %f128, %f881;
+	add.f32 	%f885, %f129, %f882;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs70, %f885;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs69, %f884;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs68, %f883;}
+
+	// inline asm
+	st.v4.u16 	[%rd91], {%rs68, %rs69, %rs70, %rs64};
+	bra.uni 	BB0_81;
+
+BB0_80:
+	mov.u64 	%rd104, image_RNM0;
+	cvta.global.u64 	%rd99, %rd104;
+	mov.u32 	%r152, 8;
+	// inline asm
+	call (%rd98), _rt_buffer_get_64, (%rd99, %r31, %r152, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs77, %f129;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs76, %f128;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs75, %f127;}
+
+	// inline asm
+	st.v4.u16 	[%rd98], {%rs75, %rs76, %rs77, %rs64};
+
+BB0_81:
+	ld.global.u32 	%r153, [additive];
+	setp.eq.s32	%p112, %r153, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs78, %f817;}
+
+	// inline asm
+	@%p112 bra 	BB0_83;
+
+	mov.u64 	%rd117, image_RNM1;
+	cvta.global.u64 	%rd106, %rd117;
+	mov.u32 	%r157, 8;
+	// inline asm
+	call (%rd105), _rt_buffer_get_64, (%rd106, %r31, %r157, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs85, %rs86, %rs87, %rs88}, [%rd105];
+	// inline asm
+	{  cvt.f32.f16 %f890, %rs85;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f891, %rs86;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f892, %rs87;}
+
+	// inline asm
+	// inline asm
+	call (%rd111), _rt_buffer_get_64, (%rd106, %r31, %r157, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f893, %f130, %f890;
+	add.f32 	%f894, %f131, %f891;
+	add.f32 	%f895, %f132, %f892;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs84, %f895;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs83, %f894;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs82, %f893;}
+
+	// inline asm
+	st.v4.u16 	[%rd111], {%rs82, %rs83, %rs84, %rs78};
+	bra.uni 	BB0_84;
+
+BB0_83:
+	mov.u64 	%rd124, image_RNM1;
+	cvta.global.u64 	%rd119, %rd124;
+	mov.u32 	%r159, 8;
+	// inline asm
+	call (%rd118), _rt_buffer_get_64, (%rd119, %r31, %r159, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs91, %f132;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs90, %f131;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs89, %f130;}
+
+	// inline asm
+	st.v4.u16 	[%rd118], {%rs89, %rs90, %rs91, %rs78};
+
+BB0_84:
+	ld.global.u32 	%r160, [additive];
+	setp.eq.s32	%p113, %r160, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs92, %f817;}
+
+	// inline asm
+	@%p113 bra 	BB0_86;
+
+	mov.u64 	%rd137, image_RNM2;
+	cvta.global.u64 	%rd126, %rd137;
+	mov.u32 	%r164, 8;
+	// inline asm
+	call (%rd125), _rt_buffer_get_64, (%rd126, %r31, %r164, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs99, %rs100, %rs101, %rs102}, [%rd125];
+	// inline asm
+	{  cvt.f32.f16 %f900, %rs99;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f901, %rs100;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f902, %rs101;}
+
+	// inline asm
+	// inline asm
+	call (%rd131), _rt_buffer_get_64, (%rd126, %r31, %r164, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f903, %f133, %f900;
+	add.f32 	%f904, %f134, %f901;
+	add.f32 	%f905, %f135, %f902;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs98, %f905;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs97, %f904;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs96, %f903;}
+
+	// inline asm
+	st.v4.u16 	[%rd131], {%rs96, %rs97, %rs98, %rs92};
+	bra.uni 	BB0_121;
+
+BB0_86:
+	mov.u64 	%rd144, image_RNM2;
+	cvta.global.u64 	%rd139, %rd144;
+	mov.u32 	%r166, 8;
+	// inline asm
+	call (%rd138), _rt_buffer_get_64, (%rd139, %r31, %r166, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs105, %f135;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs104, %f134;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs103, %f133;}
+
+	// inline asm
+	st.v4.u16 	[%rd138], {%rs103, %rs104, %rs105, %rs92};
+
+BB0_121:
+	ret;
+}
+
+