move to self host

1 files changed, 1569 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLight.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLight.ptx
new file mode 100644
index 00000000..529a9bdb
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCubemapLight.ptx
@@ -0,0 +1,1569 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_Dir[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 4 .u32 samples;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightRadius;
+.global .align 4 .b8 lightPos[12];
+.global .align 4 .b8 lightColor[12];
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .u32 lightCubemap;
+.global .align 4 .b8 lightMatrix[36];
+.global .align 4 .f32 lightFalloffFakeDistanceMult;
+.global .align 4 .f32 lightFalloffMinRadiusSq;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12lightCubemapE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightMatrixE[8] = {82, 97, 121, 0, 36, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12lightCubemapE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename11lightMatrixE[10] = {77, 97, 116, 114, 105, 120, 51, 120, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12lightCubemapE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightMatrixE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12lightCubemapE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightMatrixE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12lightCubemapE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightMatrixE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[4];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<113>;
+	.reg .b16 	%rs<76>;
+	.reg .f32 	%f<769>;
+	.reg .b32 	%r<169>;
+	.reg .b64 	%rd<150>;
+
+
+	mov.u64 	%rd149, __local_depot0;
+	cvta.local.u64 	%SP, %rd149;
+	ld.global.v2.u32 	{%r26, %r27}, [pixelID];
+	cvt.u64.u32	%rd12, %r26;
+	cvt.u64.u32	%rd13, %r27;
+	mov.u64 	%rd16, uvnormal;
+	cvta.global.u64 	%rd11, %rd16;
+	mov.u32 	%r24, 2;
+	mov.u32 	%r25, 4;
+	mov.u64 	%rd15, 0;
+	// inline asm
+	call (%rd10), _rt_buffer_get_64, (%rd11, %r24, %r25, %rd12, %rd13, %rd15, %rd15);
+	// inline asm
+	ld.u32 	%r1, [%rd10];
+	shr.u32 	%r30, %r1, 16;
+	cvt.u16.u32	%rs1, %r30;
+	and.b16  	%rs4, %rs1, 255;
+	cvt.u16.u32	%rs5, %r1;
+	or.b16  	%rs6, %rs5, %rs4;
+	setp.eq.s16	%p6, %rs6, 0;
+	mov.f32 	%f748, 0f00000000;
+	mov.f32 	%f749, %f748;
+	mov.f32 	%f750, %f748;
+	@%p6 bra 	BB0_2;
+
+	ld.u8 	%rs7, [%rd10+1];
+	and.b16  	%rs9, %rs5, 255;
+	cvt.rn.f32.u16	%f99, %rs9;
+	div.rn.f32 	%f100, %f99, 0f437F0000;
+	fma.rn.f32 	%f101, %f100, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f102, %rs7;
+	div.rn.f32 	%f103, %f102, 0f437F0000;
+	fma.rn.f32 	%f104, %f103, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f105, %rs4;
+	div.rn.f32 	%f106, %f105, 0f437F0000;
+	fma.rn.f32 	%f107, %f106, 0f40000000, 0fBF800000;
+	mul.f32 	%f108, %f104, %f104;
+	fma.rn.f32 	%f109, %f101, %f101, %f108;
+	fma.rn.f32 	%f110, %f107, %f107, %f109;
+	sqrt.rn.f32 	%f111, %f110;
+	rcp.rn.f32 	%f112, %f111;
+	mul.f32 	%f748, %f101, %f112;
+	mul.f32 	%f749, %f104, %f112;
+	mul.f32 	%f750, %f107, %f112;
+
+BB0_2:
+	ld.global.v2.u32 	{%r31, %r32}, [pixelID];
+	ld.global.v2.u32 	{%r34, %r35}, [tileInfo];
+	add.s32 	%r2, %r31, %r34;
+	add.s32 	%r3, %r32, %r35;
+	setp.eq.f32	%p7, %f749, 0f00000000;
+	setp.eq.f32	%p8, %f748, 0f00000000;
+	and.pred  	%p9, %p8, %p7;
+	setp.eq.f32	%p10, %f750, 0f00000000;
+	and.pred  	%p11, %p9, %p10;
+	@%p11 bra 	BB0_84;
+	bra.uni 	BB0_3;
+
+BB0_84:
+	ld.global.u32 	%r168, [imageEnabled];
+	and.b32  	%r144, %r168, 1;
+	setp.eq.b32	%p108, %r144, 1;
+	@!%p108 bra 	BB0_86;
+	bra.uni 	BB0_85;
+
+BB0_85:
+	cvt.u64.u32	%rd110, %r2;
+	cvt.u64.u32	%rd111, %r3;
+	mov.u64 	%rd114, image;
+	cvta.global.u64 	%rd109, %rd114;
+	// inline asm
+	call (%rd108), _rt_buffer_get_64, (%rd109, %r24, %r25, %rd110, %rd111, %rd15, %rd15);
+	// inline asm
+	mov.u16 	%rs57, 0;
+	st.v4.u8 	[%rd108], {%rs57, %rs57, %rs57, %rs57};
+	ld.global.u32 	%r168, [imageEnabled];
+
+BB0_86:
+	and.b32  	%r147, %r168, 8;
+	setp.eq.s32	%p109, %r147, 0;
+	@%p109 bra 	BB0_88;
+
+	cvt.u64.u32	%rd117, %r2;
+	cvt.u64.u32	%rd118, %r3;
+	mov.u64 	%rd121, image_Mask;
+	cvta.global.u64 	%rd116, %rd121;
+	// inline asm
+	call (%rd115), _rt_buffer_get_64, (%rd116, %r24, %r24, %rd117, %rd118, %rd15, %rd15);
+	// inline asm
+	mov.f32 	%f701, 0f00000000;
+	cvt.rzi.u32.f32	%r150, %f701;
+	cvt.u16.u32	%rs58, %r150;
+	mov.u16 	%rs59, 0;
+	st.v2.u8 	[%rd115], {%rs58, %rs59};
+	ld.global.u32 	%r168, [imageEnabled];
+
+BB0_88:
+	and.b32  	%r151, %r168, 4;
+	setp.eq.s32	%p110, %r151, 0;
+	@%p110 bra 	BB0_92;
+
+	ld.global.u32 	%r152, [additive];
+	setp.eq.s32	%p111, %r152, 0;
+	cvt.u64.u32	%rd8, %r2;
+	cvt.u64.u32	%rd9, %r3;
+	@%p111 bra 	BB0_91;
+
+	mov.u64 	%rd134, image_HDR;
+	cvta.global.u64 	%rd123, %rd134;
+	mov.u32 	%r156, 8;
+	// inline asm
+	call (%rd122), _rt_buffer_get_64, (%rd123, %r24, %r156, %rd8, %rd9, %rd15, %rd15);
+	// inline asm
+	ld.v4.u16 	{%rs66, %rs67, %rs68, %rs69}, [%rd122];
+	// inline asm
+	{  cvt.f32.f16 %f702, %rs66;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f703, %rs67;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f704, %rs68;}
+
+	// inline asm
+	// inline asm
+	call (%rd128), _rt_buffer_get_64, (%rd123, %r24, %r156, %rd8, %rd9, %rd15, %rd15);
+	// inline asm
+	add.f32 	%f705, %f702, 0f00000000;
+	add.f32 	%f706, %f703, 0f00000000;
+	add.f32 	%f707, %f704, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs65, %f707;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f706;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs63, %f705;}
+
+	// inline asm
+	mov.u16 	%rs70, 0;
+	st.v4.u16 	[%rd128], {%rs63, %rs64, %rs65, %rs70};
+	bra.uni 	BB0_92;
+
+BB0_3:
+	ld.global.v2.u32 	{%r41, %r42}, [pixelID];
+	cvt.u64.u32	%rd19, %r41;
+	cvt.u64.u32	%rd20, %r42;
+	mov.u64 	%rd23, uvpos;
+	cvta.global.u64 	%rd18, %rd23;
+	mov.u32 	%r40, 12;
+	// inline asm
+	call (%rd17), _rt_buffer_get_64, (%rd18, %r24, %r40, %rd19, %rd20, %rd15, %rd15);
+	// inline asm
+	ld.global.f32 	%f115, [lightPos];
+	ld.f32 	%f9, [%rd17+8];
+	ld.f32 	%f8, [%rd17+4];
+	ld.f32 	%f7, [%rd17];
+	sub.f32 	%f116, %f115, %f7;
+	ld.global.f32 	%f117, [lightPos+4];
+	sub.f32 	%f118, %f117, %f8;
+	ld.global.f32 	%f119, [lightPos+8];
+	sub.f32 	%f120, %f119, %f9;
+	mul.f32 	%f121, %f118, %f118;
+	fma.rn.f32 	%f122, %f116, %f116, %f121;
+	fma.rn.f32 	%f123, %f120, %f120, %f122;
+	sqrt.rn.f32 	%f124, %f123;
+	rcp.rn.f32 	%f125, %f124;
+	mul.f32 	%f10, %f116, %f125;
+	mul.f32 	%f11, %f118, %f125;
+	mul.f32 	%f12, %f120, %f125;
+	ld.global.f32 	%f126, [lightFalloffFakeDistanceMult];
+	mul.f32 	%f13, %f124, %f126;
+	ld.global.f32 	%f127, [lightInvCutoff];
+	mul.f32 	%f14, %f124, %f127;
+	mov.f32 	%f131, 0f40800000;
+	abs.f32 	%f16, %f14;
+	setp.lt.f32	%p12, %f16, 0f00800000;
+	mul.f32 	%f133, %f16, 0f4B800000;
+	selp.f32	%f134, 0fC3170000, 0fC2FE0000, %p12;
+	selp.f32	%f135, %f133, %f16, %p12;
+	mov.b32 	 %r45, %f135;
+	and.b32  	%r46, %r45, 8388607;
+	or.b32  	%r47, %r46, 1065353216;
+	mov.b32 	 %f136, %r47;
+	shr.u32 	%r48, %r45, 23;
+	cvt.rn.f32.u32	%f137, %r48;
+	add.f32 	%f138, %f134, %f137;
+	setp.gt.f32	%p13, %f136, 0f3FB504F3;
+	mul.f32 	%f139, %f136, 0f3F000000;
+	add.f32 	%f140, %f138, 0f3F800000;
+	selp.f32	%f141, %f139, %f136, %p13;
+	selp.f32	%f142, %f140, %f138, %p13;
+	add.f32 	%f143, %f141, 0fBF800000;
+	add.f32 	%f114, %f141, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f113,%f114;
+	// inline asm
+	add.f32 	%f144, %f143, %f143;
+	mul.f32 	%f145, %f113, %f144;
+	mul.f32 	%f146, %f145, %f145;
+	mov.f32 	%f147, 0f3C4CAF63;
+	mov.f32 	%f148, 0f3B18F0FE;
+	fma.rn.f32 	%f149, %f148, %f146, %f147;
+	mov.f32 	%f150, 0f3DAAAABD;
+	fma.rn.f32 	%f151, %f149, %f146, %f150;
+	mul.rn.f32 	%f152, %f151, %f146;
+	mul.rn.f32 	%f153, %f152, %f145;
+	sub.f32 	%f154, %f143, %f145;
+	neg.f32 	%f155, %f145;
+	add.f32 	%f156, %f154, %f154;
+	fma.rn.f32 	%f157, %f155, %f143, %f156;
+	mul.rn.f32 	%f158, %f113, %f157;
+	add.f32 	%f159, %f153, %f145;
+	sub.f32 	%f160, %f145, %f159;
+	add.f32 	%f161, %f153, %f160;
+	add.f32 	%f162, %f158, %f161;
+	add.f32 	%f163, %f159, %f162;
+	sub.f32 	%f164, %f159, %f163;
+	add.f32 	%f165, %f162, %f164;
+	mov.f32 	%f166, 0f3F317200;
+	mul.rn.f32 	%f167, %f142, %f166;
+	mov.f32 	%f168, 0f35BFBE8E;
+	mul.rn.f32 	%f169, %f142, %f168;
+	add.f32 	%f170, %f167, %f163;
+	sub.f32 	%f171, %f167, %f170;
+	add.f32 	%f172, %f163, %f171;
+	add.f32 	%f173, %f165, %f172;
+	add.f32 	%f174, %f169, %f173;
+	add.f32 	%f175, %f170, %f174;
+	sub.f32 	%f176, %f170, %f175;
+	add.f32 	%f177, %f174, %f176;
+	mul.rn.f32 	%f178, %f131, %f175;
+	neg.f32 	%f179, %f178;
+	fma.rn.f32 	%f180, %f131, %f175, %f179;
+	fma.rn.f32 	%f181, %f131, %f177, %f180;
+	mov.f32 	%f182, 0f00000000;
+	fma.rn.f32 	%f183, %f182, %f175, %f181;
+	add.rn.f32 	%f184, %f178, %f183;
+	neg.f32 	%f185, %f184;
+	add.rn.f32 	%f186, %f178, %f185;
+	add.rn.f32 	%f187, %f186, %f183;
+	mov.b32 	 %r49, %f184;
+	setp.eq.s32	%p14, %r49, 1118925336;
+	add.s32 	%r50, %r49, -1;
+	mov.b32 	 %f188, %r50;
+	add.f32 	%f189, %f187, 0f37000000;
+	selp.f32	%f190, %f188, %f184, %p14;
+	selp.f32	%f17, %f189, %f187, %p14;
+	mul.f32 	%f191, %f190, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f192, %f191;
+	mov.f32 	%f193, 0fBF317200;
+	fma.rn.f32 	%f194, %f192, %f193, %f190;
+	mov.f32 	%f195, 0fB5BFBE8E;
+	fma.rn.f32 	%f196, %f192, %f195, %f194;
+	mul.f32 	%f197, %f196, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f198, %f197;
+	add.f32 	%f199, %f192, 0f00000000;
+	ex2.approx.f32 	%f200, %f199;
+	mul.f32 	%f201, %f198, %f200;
+	setp.lt.f32	%p15, %f190, 0fC2D20000;
+	selp.f32	%f202, 0f00000000, %f201, %p15;
+	setp.gt.f32	%p16, %f190, 0f42D20000;
+	selp.f32	%f751, 0f7F800000, %f202, %p16;
+	setp.eq.f32	%p17, %f751, 0f7F800000;
+	@%p17 bra 	BB0_5;
+
+	fma.rn.f32 	%f751, %f751, %f17, %f751;
+
+BB0_5:
+	mov.f32 	%f714, 0f40000000;
+	cvt.rzi.f32.f32	%f713, %f714;
+	add.f32 	%f712, %f713, %f713;
+	mov.f32 	%f711, 0f40800000;
+	sub.f32 	%f710, %f711, %f712;
+	abs.f32 	%f709, %f710;
+	setp.lt.f32	%p18, %f14, 0f00000000;
+	setp.eq.f32	%p19, %f709, 0f3F800000;
+	and.pred  	%p1, %p18, %p19;
+	mov.b32 	 %r51, %f751;
+	xor.b32  	%r52, %r51, -2147483648;
+	mov.b32 	 %f203, %r52;
+	selp.f32	%f753, %f203, %f751, %p1;
+	setp.eq.f32	%p20, %f14, 0f00000000;
+	@%p20 bra 	BB0_8;
+	bra.uni 	BB0_6;
+
+BB0_8:
+	add.f32 	%f206, %f14, %f14;
+	selp.f32	%f753, %f206, 0f00000000, %p19;
+	bra.uni 	BB0_9;
+
+BB0_6:
+	setp.geu.f32	%p21, %f14, 0f00000000;
+	@%p21 bra 	BB0_9;
+
+	mov.f32 	%f747, 0f40800000;
+	cvt.rzi.f32.f32	%f205, %f747;
+	setp.neu.f32	%p22, %f205, 0f40800000;
+	selp.f32	%f753, 0f7FFFFFFF, %f753, %p22;
+
+BB0_9:
+	abs.f32 	%f715, %f14;
+	add.f32 	%f207, %f715, 0f40800000;
+	mov.b32 	 %r53, %f207;
+	setp.lt.s32	%p24, %r53, 2139095040;
+	@%p24 bra 	BB0_14;
+
+	abs.f32 	%f745, %f14;
+	setp.gtu.f32	%p25, %f745, 0f7F800000;
+	@%p25 bra 	BB0_13;
+	bra.uni 	BB0_11;
+
+BB0_13:
+	add.f32 	%f753, %f14, 0f40800000;
+	bra.uni 	BB0_14;
+
+BB0_11:
+	abs.f32 	%f746, %f14;
+	setp.neu.f32	%p26, %f746, 0f7F800000;
+	@%p26 bra 	BB0_14;
+
+	selp.f32	%f753, 0fFF800000, 0f7F800000, %p1;
+
+BB0_14:
+	mov.f32 	%f756, 0f3F800000;
+	sub.f32 	%f216, %f756, %f753;
+	setp.eq.f32	%p27, %f14, 0f3F800000;
+	selp.f32	%f217, 0f00000000, %f216, %p27;
+	cvt.sat.f32.f32	%f218, %f217;
+	ld.global.f32 	%f219, [lightFalloffMinRadiusSq];
+	fma.rn.f32 	%f220, %f13, %f13, %f219;
+	div.rn.f32 	%f221, %f218, %f220;
+	mul.f32 	%f222, %f749, %f11;
+	fma.rn.f32 	%f223, %f748, %f10, %f222;
+	fma.rn.f32 	%f224, %f750, %f12, %f223;
+	ld.global.u32 	%r57, [imageEnabled];
+	and.b32  	%r58, %r57, 32;
+	ld.global.u32 	%r59, [ignoreNormal];
+	or.b32  	%r60, %r58, %r59;
+	setp.eq.s32	%p28, %r60, 0;
+	selp.f32	%f225, %f224, 0f3F800000, %p28;
+	ld.global.f32 	%f226, [lightMatrix];
+	fma.rn.f32 	%f227, %f226, %f10, 0f00000000;
+	ld.global.f32 	%f228, [lightMatrix+4];
+	fma.rn.f32 	%f229, %f228, %f11, %f227;
+	ld.global.f32 	%f230, [lightMatrix+8];
+	fma.rn.f32 	%f214, %f230, %f12, %f229;
+	cvt.sat.f32.f32	%f231, %f225;
+	ld.global.f32 	%f232, [lightMatrix+12];
+	fma.rn.f32 	%f233, %f232, %f10, 0f00000000;
+	ld.global.f32 	%f234, [lightMatrix+16];
+	fma.rn.f32 	%f235, %f234, %f11, %f233;
+	ld.global.f32 	%f236, [lightMatrix+20];
+	fma.rn.f32 	%f213, %f236, %f12, %f235;
+	ld.global.f32 	%f237, [lightMatrix+24];
+	fma.rn.f32 	%f238, %f237, %f10, 0f00000000;
+	ld.global.f32 	%f239, [lightMatrix+28];
+	fma.rn.f32 	%f240, %f239, %f11, %f238;
+	ld.global.f32 	%f241, [lightMatrix+32];
+	fma.rn.f32 	%f212, %f241, %f12, %f240;
+	ld.global.u32 	%r54, [lightCubemap];
+	mov.u32 	%r55, 6;
+	mov.u32 	%r161, 0;
+	// inline asm
+	call (%f208, %f209, %f210, %f211), _rt_texture_get_base_id, (%r54, %r55, %f212, %f213, %f214, %r161);
+	// inline asm
+	max.f32 	%f242, %f208, %f209;
+	max.f32 	%f243, %f242, %f210;
+	mul.f32 	%f31, %f221, %f231;
+	mul.f32 	%f244, %f31, %f243;
+	ld.global.f32 	%f245, [lightColor+4];
+	ld.global.f32 	%f246, [lightColor];
+	max.f32 	%f247, %f246, %f245;
+	ld.global.f32 	%f248, [lightColor+8];
+	max.f32 	%f249, %f247, %f248;
+	mul.f32 	%f250, %f244, %f249;
+	setp.lt.f32	%p29, %f250, 0f3727C5AC;
+	@%p29 bra 	BB0_74;
+	bra.uni 	BB0_15;
+
+BB0_74:
+	ld.global.u32 	%r166, [imageEnabled];
+	and.b32  	%r127, %r166, 1;
+	setp.eq.b32	%p103, %r127, 1;
+	@!%p103 bra 	BB0_76;
+	bra.uni 	BB0_75;
+
+BB0_75:
+	cvt.u64.u32	%rd69, %r2;
+	cvt.u64.u32	%rd70, %r3;
+	mov.u64 	%rd73, image;
+	cvta.global.u64 	%rd68, %rd73;
+	// inline asm
+	call (%rd67), _rt_buffer_get_64, (%rd68, %r24, %r25, %rd69, %rd70, %rd15, %rd15);
+	// inline asm
+	mov.u16 	%rs37, 1;
+	mov.u16 	%rs38, 0;
+	st.v4.u8 	[%rd67], {%rs38, %rs38, %rs38, %rs37};
+	ld.global.u32 	%r166, [imageEnabled];
+
+BB0_76:
+	and.b32  	%r130, %r166, 8;
+	setp.eq.s32	%p104, %r130, 0;
+	@%p104 bra 	BB0_78;
+
+	cvt.u64.u32	%rd76, %r2;
+	cvt.u64.u32	%rd77, %r3;
+	mov.u64 	%rd80, image_Mask;
+	cvta.global.u64 	%rd75, %rd80;
+	// inline asm
+	call (%rd74), _rt_buffer_get_64, (%rd75, %r24, %r24, %rd76, %rd77, %rd15, %rd15);
+	// inline asm
+	mov.f32 	%f690, 0f00000000;
+	cvt.rzi.u32.f32	%r133, %f690;
+	cvt.u16.u32	%rs39, %r133;
+	mov.u16 	%rs40, 255;
+	st.v2.u8 	[%rd74], {%rs39, %rs40};
+	ld.global.u32 	%r166, [imageEnabled];
+
+BB0_78:
+	and.b32  	%r134, %r166, 4;
+	setp.eq.s32	%p105, %r134, 0;
+	@%p105 bra 	BB0_82;
+
+	ld.global.u32 	%r135, [additive];
+	setp.eq.s32	%p106, %r135, 0;
+	cvt.u64.u32	%rd6, %r2;
+	cvt.u64.u32	%rd7, %r3;
+	mov.f32 	%f691, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs41, %f691;}
+
+	// inline asm
+	@%p106 bra 	BB0_81;
+
+	mov.u64 	%rd93, image_HDR;
+	cvta.global.u64 	%rd82, %rd93;
+	mov.u32 	%r139, 8;
+	// inline asm
+	call (%rd81), _rt_buffer_get_64, (%rd82, %r24, %r139, %rd6, %rd7, %rd15, %rd15);
+	// inline asm
+	ld.v4.u16 	{%rs48, %rs49, %rs50, %rs51}, [%rd81];
+	// inline asm
+	{  cvt.f32.f16 %f692, %rs48;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f693, %rs49;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f694, %rs50;}
+
+	// inline asm
+	// inline asm
+	call (%rd87), _rt_buffer_get_64, (%rd82, %r24, %r139, %rd6, %rd7, %rd15, %rd15);
+	// inline asm
+	add.f32 	%f695, %f692, 0f00000000;
+	add.f32 	%f696, %f693, 0f00000000;
+	add.f32 	%f697, %f694, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs47, %f697;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs46, %f696;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs45, %f695;}
+
+	// inline asm
+	st.v4.u16 	[%rd87], {%rs45, %rs46, %rs47, %rs41};
+	bra.uni 	BB0_82;
+
+BB0_15:
+	mov.f32 	%f755, 0f00000000;
+	mul.f32 	%f252, %f7, 0f3456BF95;
+	abs.f32 	%f253, %f748;
+	div.rn.f32 	%f254, %f252, %f253;
+	abs.f32 	%f255, %f749;
+	mul.f32 	%f256, %f8, 0f3456BF95;
+	div.rn.f32 	%f257, %f256, %f255;
+	abs.f32 	%f258, %f750;
+	mul.f32 	%f259, %f9, 0f3456BF95;
+	div.rn.f32 	%f260, %f259, %f258;
+	abs.f32 	%f261, %f254;
+	abs.f32 	%f262, %f257;
+	abs.f32 	%f263, %f260;
+	mov.f32 	%f264, 0f38D1B717;
+	max.f32 	%f265, %f261, %f264;
+	max.f32 	%f266, %f262, %f264;
+	max.f32 	%f267, %f263, %f264;
+	fma.rn.f32 	%f32, %f748, %f265, %f7;
+	fma.rn.f32 	%f33, %f749, %f266, %f8;
+	fma.rn.f32 	%f34, %f750, %f267, %f9;
+	ld.global.u32 	%r162, [samples];
+	setp.lt.s32	%p30, %r162, 1;
+	@%p30 bra 	BB0_18;
+
+	mul.f32 	%f269, %f32, 0f3456BF95;
+	abs.f32 	%f270, %f269;
+	mul.f32 	%f271, %f33, 0f3456BF95;
+	abs.f32 	%f272, %f271;
+	mul.f32 	%f273, %f34, 0f3456BF95;
+	abs.f32 	%f274, %f273;
+	max.f32 	%f275, %f270, %f272;
+	max.f32 	%f276, %f275, %f274;
+	max.f32 	%f35, %f276, %f264;
+	add.u64 	%rd24, %SP, 0;
+	cvta.to.local.u64 	%rd2, %rd24;
+	mov.f32 	%f755, 0f00000000;
+
+BB0_17:
+	cvt.rn.f32.s32	%f286, %r161;
+	mul.f32 	%f287, %f286, 0f3DD32618;
+	cvt.rmi.f32.f32	%f288, %f287;
+	sub.f32 	%f289, %f287, %f288;
+	mul.f32 	%f290, %f286, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f291, %f290;
+	sub.f32 	%f292, %f290, %f291;
+	mul.f32 	%f293, %f286, 0f3DC74539;
+	cvt.rmi.f32.f32	%f294, %f293;
+	sub.f32 	%f295, %f293, %f294;
+	add.f32 	%f296, %f292, 0f4199851F;
+	add.f32 	%f297, %f295, 0f4199851F;
+	add.f32 	%f298, %f289, 0f4199851F;
+	mul.f32 	%f299, %f292, %f297;
+	fma.rn.f32 	%f300, %f289, %f296, %f299;
+	fma.rn.f32 	%f301, %f298, %f295, %f300;
+	add.f32 	%f302, %f289, %f301;
+	add.f32 	%f303, %f292, %f301;
+	add.f32 	%f304, %f295, %f301;
+	add.f32 	%f305, %f302, %f303;
+	mul.f32 	%f306, %f304, %f305;
+	cvt.rmi.f32.f32	%f307, %f306;
+	sub.f32 	%f308, %f306, %f307;
+	add.f32 	%f309, %f302, %f304;
+	mul.f32 	%f310, %f303, %f309;
+	cvt.rmi.f32.f32	%f311, %f310;
+	sub.f32 	%f312, %f310, %f311;
+	add.f32 	%f313, %f303, %f304;
+	mul.f32 	%f314, %f302, %f313;
+	cvt.rmi.f32.f32	%f315, %f314;
+	sub.f32 	%f316, %f314, %f315;
+	fma.rn.f32 	%f317, %f308, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f318, %f312, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f319, %f316, 0f40000000, 0fBF800000;
+	ld.global.f32 	%f320, [lightRadius];
+	ld.global.f32 	%f321, [lightPos];
+	fma.rn.f32 	%f322, %f320, %f317, %f321;
+	ld.global.f32 	%f323, [lightPos+4];
+	fma.rn.f32 	%f324, %f320, %f318, %f323;
+	ld.global.f32 	%f325, [lightPos+8];
+	fma.rn.f32 	%f326, %f320, %f319, %f325;
+	sub.f32 	%f327, %f322, %f7;
+	sub.f32 	%f328, %f324, %f8;
+	sub.f32 	%f329, %f326, %f9;
+	mul.f32 	%f330, %f328, %f328;
+	fma.rn.f32 	%f331, %f327, %f327, %f330;
+	fma.rn.f32 	%f332, %f329, %f329, %f331;
+	sqrt.rn.f32 	%f285, %f332;
+	rcp.rn.f32 	%f333, %f285;
+	mul.f32 	%f281, %f333, %f327;
+	mul.f32 	%f282, %f333, %f328;
+	mul.f32 	%f283, %f333, %f329;
+	ld.global.u32 	%r65, [imageEnabled];
+	and.b32  	%r66, %r65, 32;
+	setp.eq.s32	%p31, %r66, 0;
+	selp.f32	%f334, 0f3F800000, 0f41200000, %p31;
+	mul.f32 	%f284, %f334, %f35;
+	mov.u32 	%r67, 1065353216;
+	st.local.u32 	[%rd2], %r67;
+	ld.global.u32 	%r62, [root];
+	mov.u32 	%r63, 1;
+	// inline asm
+	call _rt_trace_64, (%r62, %f32, %f33, %f34, %f281, %f282, %f283, %r63, %f284, %f285, %rd24, %r25);
+	// inline asm
+	ld.local.f32 	%f335, [%rd2];
+	add.f32 	%f755, %f755, %f335;
+	ld.global.u32 	%r162, [samples];
+	add.s32 	%r161, %r161, 1;
+	setp.lt.s32	%p32, %r161, %r162;
+	@%p32 bra 	BB0_17;
+
+BB0_18:
+	setp.eq.s32	%p33, %r162, 0;
+	@%p33 bra 	BB0_20;
+
+	cvt.rn.f32.s32	%f337, %r162;
+	div.rn.f32 	%f756, %f755, %f337;
+
+BB0_20:
+	ld.global.f32 	%f338, [lightColor];
+	mul.f32 	%f339, %f31, %f756;
+	mul.f32 	%f340, %f338, %f339;
+	ld.global.f32 	%f341, [lightColor+4];
+	mul.f32 	%f342, %f339, %f341;
+	ld.global.f32 	%f343, [lightColor+8];
+	mul.f32 	%f344, %f339, %f343;
+	mul.f32 	%f41, %f208, %f340;
+	mul.f32 	%f42, %f209, %f342;
+	mul.f32 	%f43, %f210, %f344;
+	ld.global.u32 	%r164, [imageEnabled];
+	and.b32  	%r68, %r164, 8;
+	setp.eq.s32	%p34, %r68, 0;
+	@%p34 bra 	BB0_33;
+
+	mov.f32 	%f723, 0fB5BFBE8E;
+	mov.f32 	%f722, 0fBF317200;
+	mov.f32 	%f721, 0f35BFBE8E;
+	mov.f32 	%f720, 0f3F317200;
+	mov.f32 	%f719, 0f3DAAAABD;
+	mov.f32 	%f718, 0f3C4CAF63;
+	mov.f32 	%f717, 0f3B18F0FE;
+	cvt.u64.u32	%rd28, %r2;
+	cvt.u64.u32	%rd29, %r3;
+	mov.u64 	%rd32, image_Mask;
+	cvta.global.u64 	%rd27, %rd32;
+	// inline asm
+	call (%rd26), _rt_buffer_get_64, (%rd27, %r24, %r24, %rd28, %rd29, %rd15, %rd15);
+	// inline asm
+	mov.f32 	%f347, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f348, %f347;
+	fma.rn.f32 	%f349, %f348, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f44, %f349;
+	abs.f32 	%f45, %f756;
+	setp.lt.f32	%p35, %f45, 0f00800000;
+	mul.f32 	%f350, %f45, 0f4B800000;
+	selp.f32	%f351, 0fC3170000, 0fC2FE0000, %p35;
+	selp.f32	%f352, %f350, %f45, %p35;
+	mov.b32 	 %r71, %f352;
+	and.b32  	%r72, %r71, 8388607;
+	or.b32  	%r73, %r72, 1065353216;
+	mov.b32 	 %f353, %r73;
+	shr.u32 	%r74, %r71, 23;
+	cvt.rn.f32.u32	%f354, %r74;
+	add.f32 	%f355, %f351, %f354;
+	setp.gt.f32	%p36, %f353, 0f3FB504F3;
+	mul.f32 	%f356, %f353, 0f3F000000;
+	add.f32 	%f357, %f355, 0f3F800000;
+	selp.f32	%f358, %f356, %f353, %p36;
+	selp.f32	%f359, %f357, %f355, %p36;
+	add.f32 	%f360, %f358, 0fBF800000;
+	add.f32 	%f346, %f358, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f345,%f346;
+	// inline asm
+	add.f32 	%f361, %f360, %f360;
+	mul.f32 	%f362, %f345, %f361;
+	mul.f32 	%f363, %f362, %f362;
+	fma.rn.f32 	%f366, %f717, %f363, %f718;
+	fma.rn.f32 	%f368, %f366, %f363, %f719;
+	mul.rn.f32 	%f369, %f368, %f363;
+	mul.rn.f32 	%f370, %f369, %f362;
+	sub.f32 	%f371, %f360, %f362;
+	neg.f32 	%f372, %f362;
+	add.f32 	%f373, %f371, %f371;
+	fma.rn.f32 	%f374, %f372, %f360, %f373;
+	mul.rn.f32 	%f375, %f345, %f374;
+	add.f32 	%f376, %f370, %f362;
+	sub.f32 	%f377, %f362, %f376;
+	add.f32 	%f378, %f370, %f377;
+	add.f32 	%f379, %f375, %f378;
+	add.f32 	%f380, %f376, %f379;
+	sub.f32 	%f381, %f376, %f380;
+	add.f32 	%f382, %f379, %f381;
+	mul.rn.f32 	%f384, %f359, %f720;
+	mul.rn.f32 	%f386, %f359, %f721;
+	add.f32 	%f387, %f384, %f380;
+	sub.f32 	%f388, %f384, %f387;
+	add.f32 	%f389, %f380, %f388;
+	add.f32 	%f390, %f382, %f389;
+	add.f32 	%f391, %f386, %f390;
+	add.f32 	%f392, %f387, %f391;
+	sub.f32 	%f393, %f387, %f392;
+	add.f32 	%f394, %f391, %f393;
+	mov.f32 	%f395, 0f3EE8BA2E;
+	mul.rn.f32 	%f396, %f395, %f392;
+	neg.f32 	%f397, %f396;
+	fma.rn.f32 	%f398, %f395, %f392, %f397;
+	fma.rn.f32 	%f399, %f395, %f394, %f398;
+	mov.f32 	%f400, 0f00000000;
+	fma.rn.f32 	%f401, %f400, %f392, %f399;
+	add.rn.f32 	%f402, %f396, %f401;
+	neg.f32 	%f403, %f402;
+	add.rn.f32 	%f404, %f396, %f403;
+	add.rn.f32 	%f405, %f404, %f401;
+	mov.b32 	 %r75, %f402;
+	setp.eq.s32	%p37, %r75, 1118925336;
+	add.s32 	%r76, %r75, -1;
+	mov.b32 	 %f406, %r76;
+	add.f32 	%f407, %f405, 0f37000000;
+	selp.f32	%f408, %f406, %f402, %p37;
+	selp.f32	%f46, %f407, %f405, %p37;
+	mul.f32 	%f409, %f408, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f410, %f409;
+	fma.rn.f32 	%f412, %f410, %f722, %f408;
+	fma.rn.f32 	%f414, %f410, %f723, %f412;
+	mul.f32 	%f415, %f414, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f416, %f415;
+	add.f32 	%f417, %f410, 0f00000000;
+	ex2.approx.f32 	%f418, %f417;
+	mul.f32 	%f419, %f416, %f418;
+	setp.lt.f32	%p38, %f408, 0fC2D20000;
+	selp.f32	%f420, 0f00000000, %f419, %p38;
+	setp.gt.f32	%p39, %f408, 0f42D20000;
+	selp.f32	%f757, 0f7F800000, %f420, %p39;
+	setp.eq.f32	%p40, %f757, 0f7F800000;
+	@%p40 bra 	BB0_23;
+
+	fma.rn.f32 	%f757, %f757, %f46, %f757;
+
+BB0_23:
+	setp.lt.f32	%p41, %f756, 0f00000000;
+	setp.eq.f32	%p42, %f44, 0f3F800000;
+	and.pred  	%p2, %p41, %p42;
+	mov.b32 	 %r77, %f757;
+	xor.b32  	%r78, %r77, -2147483648;
+	mov.b32 	 %f421, %r78;
+	selp.f32	%f759, %f421, %f757, %p2;
+	setp.eq.f32	%p43, %f756, 0f00000000;
+	@%p43 bra 	BB0_26;
+	bra.uni 	BB0_24;
+
+BB0_26:
+	add.f32 	%f424, %f756, %f756;
+	selp.f32	%f759, %f424, 0f00000000, %p42;
+	bra.uni 	BB0_27;
+
+BB0_91:
+	mov.u64 	%rd141, image_HDR;
+	cvta.global.u64 	%rd136, %rd141;
+	mov.u32 	%r158, 8;
+	// inline asm
+	call (%rd135), _rt_buffer_get_64, (%rd136, %r24, %r158, %rd8, %rd9, %rd15, %rd15);
+	// inline asm
+	mov.f32 	%f708, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs71, %f708;}
+
+	// inline asm
+	mov.u16 	%rs72, 0;
+	st.v4.u16 	[%rd135], {%rs71, %rs71, %rs71, %rs72};
+
+BB0_92:
+	ld.global.u8 	%rs73, [imageEnabled];
+	and.b16  	%rs74, %rs73, 64;
+	setp.eq.s16	%p112, %rs74, 0;
+	@%p112 bra 	BB0_94;
+
+	cvt.u64.u32	%rd144, %r2;
+	cvt.u64.u32	%rd145, %r3;
+	mov.u64 	%rd148, image_Dir;
+	cvta.global.u64 	%rd143, %rd148;
+	// inline asm
+	call (%rd142), _rt_buffer_get_64, (%rd143, %r24, %r25, %rd144, %rd145, %rd15, %rd15);
+	// inline asm
+	mov.u16 	%rs75, 0;
+	st.v4.u8 	[%rd142], {%rs75, %rs75, %rs75, %rs75};
+	bra.uni 	BB0_94;
+
+BB0_81:
+	mov.u64 	%rd100, image_HDR;
+	cvta.global.u64 	%rd95, %rd100;
+	mov.u32 	%r141, 8;
+	// inline asm
+	call (%rd94), _rt_buffer_get_64, (%rd95, %r24, %r141, %rd6, %rd7, %rd15, %rd15);
+	// inline asm
+	mov.f32 	%f698, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs52, %f698;}
+
+	// inline asm
+	st.v4.u16 	[%rd94], {%rs52, %rs52, %rs52, %rs41};
+
+BB0_82:
+	ld.global.u8 	%rs53, [imageEnabled];
+	and.b16  	%rs54, %rs53, 64;
+	setp.eq.s16	%p107, %rs54, 0;
+	@%p107 bra 	BB0_94;
+
+	cvt.u64.u32	%rd103, %r2;
+	cvt.u64.u32	%rd104, %r3;
+	mov.u64 	%rd107, image_Dir;
+	cvta.global.u64 	%rd102, %rd107;
+	// inline asm
+	call (%rd101), _rt_buffer_get_64, (%rd102, %r24, %r25, %rd103, %rd104, %rd15, %rd15);
+	// inline asm
+	mov.u16 	%rs55, 255;
+	mov.u16 	%rs56, 0;
+	st.v4.u8 	[%rd101], {%rs56, %rs56, %rs56, %rs55};
+	bra.uni 	BB0_94;
+
+BB0_24:
+	setp.geu.f32	%p44, %f756, 0f00000000;
+	@%p44 bra 	BB0_27;
+
+	cvt.rzi.f32.f32	%f423, %f395;
+	setp.neu.f32	%p45, %f423, 0f3EE8BA2E;
+	selp.f32	%f759, 0f7FFFFFFF, %f759, %p45;
+
+BB0_27:
+	add.f32 	%f425, %f45, 0f3EE8BA2E;
+	mov.b32 	 %r79, %f425;
+	setp.lt.s32	%p47, %r79, 2139095040;
+	@%p47 bra 	BB0_32;
+
+	setp.gtu.f32	%p48, %f45, 0f7F800000;
+	@%p48 bra 	BB0_31;
+	bra.uni 	BB0_29;
+
+BB0_31:
+	add.f32 	%f759, %f756, 0f3EE8BA2E;
+	bra.uni 	BB0_32;
+
+BB0_29:
+	setp.neu.f32	%p49, %f45, 0f7F800000;
+	@%p49 bra 	BB0_32;
+
+	selp.f32	%f759, 0fFF800000, 0f7F800000, %p2;
+
+BB0_32:
+	mul.f32 	%f426, %f759, 0f437F0000;
+	setp.eq.f32	%p50, %f756, 0f3F800000;
+	selp.f32	%f427, 0f437F0000, %f426, %p50;
+	cvt.rzi.u32.f32	%r80, %f427;
+	cvt.u16.u32	%rs11, %r80;
+	mov.u16 	%rs12, 255;
+	st.v2.u8 	[%rd26], {%rs11, %rs12};
+	ld.global.u32 	%r164, [imageEnabled];
+
+BB0_33:
+	and.b32  	%r81, %r164, 1;
+	setp.eq.b32	%p51, %r81, 1;
+	@!%p51 bra 	BB0_68;
+	bra.uni 	BB0_34;
+
+BB0_34:
+	mov.f32 	%f730, 0fB5BFBE8E;
+	mov.f32 	%f729, 0fBF317200;
+	mov.f32 	%f728, 0f35BFBE8E;
+	mov.f32 	%f727, 0f3F317200;
+	mov.f32 	%f726, 0f3DAAAABD;
+	mov.f32 	%f725, 0f3C4CAF63;
+	mov.f32 	%f724, 0f3B18F0FE;
+	mov.f32 	%f430, 0f3E666666;
+	cvt.rzi.f32.f32	%f431, %f430;
+	fma.rn.f32 	%f432, %f431, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f57, %f432;
+	abs.f32 	%f58, %f41;
+	setp.lt.f32	%p52, %f58, 0f00800000;
+	mul.f32 	%f433, %f58, 0f4B800000;
+	selp.f32	%f434, 0fC3170000, 0fC2FE0000, %p52;
+	selp.f32	%f435, %f433, %f58, %p52;
+	mov.b32 	 %r82, %f435;
+	and.b32  	%r83, %r82, 8388607;
+	or.b32  	%r84, %r83, 1065353216;
+	mov.b32 	 %f436, %r84;
+	shr.u32 	%r85, %r82, 23;
+	cvt.rn.f32.u32	%f437, %r85;
+	add.f32 	%f438, %f434, %f437;
+	setp.gt.f32	%p53, %f436, 0f3FB504F3;
+	mul.f32 	%f439, %f436, 0f3F000000;
+	add.f32 	%f440, %f438, 0f3F800000;
+	selp.f32	%f441, %f439, %f436, %p53;
+	selp.f32	%f442, %f440, %f438, %p53;
+	add.f32 	%f443, %f441, 0fBF800000;
+	add.f32 	%f429, %f441, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f428,%f429;
+	// inline asm
+	add.f32 	%f444, %f443, %f443;
+	mul.f32 	%f445, %f428, %f444;
+	mul.f32 	%f446, %f445, %f445;
+	fma.rn.f32 	%f449, %f724, %f446, %f725;
+	fma.rn.f32 	%f451, %f449, %f446, %f726;
+	mul.rn.f32 	%f452, %f451, %f446;
+	mul.rn.f32 	%f453, %f452, %f445;
+	sub.f32 	%f454, %f443, %f445;
+	neg.f32 	%f455, %f445;
+	add.f32 	%f456, %f454, %f454;
+	fma.rn.f32 	%f457, %f455, %f443, %f456;
+	mul.rn.f32 	%f458, %f428, %f457;
+	add.f32 	%f459, %f453, %f445;
+	sub.f32 	%f460, %f445, %f459;
+	add.f32 	%f461, %f453, %f460;
+	add.f32 	%f462, %f458, %f461;
+	add.f32 	%f463, %f459, %f462;
+	sub.f32 	%f464, %f459, %f463;
+	add.f32 	%f465, %f462, %f464;
+	mul.rn.f32 	%f467, %f442, %f727;
+	mul.rn.f32 	%f469, %f442, %f728;
+	add.f32 	%f470, %f467, %f463;
+	sub.f32 	%f471, %f467, %f470;
+	add.f32 	%f472, %f463, %f471;
+	add.f32 	%f473, %f465, %f472;
+	add.f32 	%f474, %f469, %f473;
+	add.f32 	%f475, %f470, %f474;
+	sub.f32 	%f476, %f470, %f475;
+	add.f32 	%f477, %f474, %f476;
+	mov.f32 	%f478, 0f3EE66666;
+	mul.rn.f32 	%f479, %f478, %f475;
+	neg.f32 	%f480, %f479;
+	fma.rn.f32 	%f481, %f478, %f475, %f480;
+	fma.rn.f32 	%f482, %f478, %f477, %f481;
+	mov.f32 	%f483, 0f00000000;
+	fma.rn.f32 	%f484, %f483, %f475, %f482;
+	add.rn.f32 	%f485, %f479, %f484;
+	neg.f32 	%f486, %f485;
+	add.rn.f32 	%f487, %f479, %f486;
+	add.rn.f32 	%f488, %f487, %f484;
+	mov.b32 	 %r86, %f485;
+	setp.eq.s32	%p54, %r86, 1118925336;
+	add.s32 	%r87, %r86, -1;
+	mov.b32 	 %f489, %r87;
+	add.f32 	%f490, %f488, 0f37000000;
+	selp.f32	%f491, %f489, %f485, %p54;
+	selp.f32	%f59, %f490, %f488, %p54;
+	mul.f32 	%f492, %f491, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f493, %f492;
+	fma.rn.f32 	%f495, %f493, %f729, %f491;
+	fma.rn.f32 	%f497, %f493, %f730, %f495;
+	mul.f32 	%f498, %f497, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f499, %f498;
+	add.f32 	%f500, %f493, 0f00000000;
+	ex2.approx.f32 	%f501, %f500;
+	mul.f32 	%f502, %f499, %f501;
+	setp.lt.f32	%p55, %f491, 0fC2D20000;
+	selp.f32	%f503, 0f00000000, %f502, %p55;
+	setp.gt.f32	%p56, %f491, 0f42D20000;
+	selp.f32	%f760, 0f7F800000, %f503, %p56;
+	setp.eq.f32	%p57, %f760, 0f7F800000;
+	@%p57 bra 	BB0_36;
+
+	fma.rn.f32 	%f760, %f760, %f59, %f760;
+
+BB0_36:
+	setp.lt.f32	%p58, %f41, 0f00000000;
+	setp.eq.f32	%p59, %f57, 0f3F800000;
+	and.pred  	%p3, %p58, %p59;
+	mov.b32 	 %r88, %f760;
+	xor.b32  	%r89, %r88, -2147483648;
+	mov.b32 	 %f504, %r89;
+	selp.f32	%f762, %f504, %f760, %p3;
+	setp.eq.f32	%p60, %f41, 0f00000000;
+	@%p60 bra 	BB0_39;
+	bra.uni 	BB0_37;
+
+BB0_39:
+	add.f32 	%f507, %f41, %f41;
+	selp.f32	%f762, %f507, 0f00000000, %p59;
+	bra.uni 	BB0_40;
+
+BB0_37:
+	setp.geu.f32	%p61, %f41, 0f00000000;
+	@%p61 bra 	BB0_40;
+
+	cvt.rzi.f32.f32	%f506, %f478;
+	setp.neu.f32	%p62, %f506, 0f3EE66666;
+	selp.f32	%f762, 0f7FFFFFFF, %f762, %p62;
+
+BB0_40:
+	add.f32 	%f508, %f58, 0f3EE66666;
+	mov.b32 	 %r90, %f508;
+	setp.lt.s32	%p64, %r90, 2139095040;
+	@%p64 bra 	BB0_45;
+
+	setp.gtu.f32	%p65, %f58, 0f7F800000;
+	@%p65 bra 	BB0_44;
+	bra.uni 	BB0_42;
+
+BB0_44:
+	add.f32 	%f762, %f41, 0f3EE66666;
+	bra.uni 	BB0_45;
+
+BB0_42:
+	setp.neu.f32	%p66, %f58, 0f7F800000;
+	@%p66 bra 	BB0_45;
+
+	selp.f32	%f762, 0fFF800000, 0f7F800000, %p3;
+
+BB0_45:
+	mov.f32 	%f737, 0fB5BFBE8E;
+	mov.f32 	%f736, 0fBF317200;
+	mov.f32 	%f735, 0f35BFBE8E;
+	mov.f32 	%f734, 0f3F317200;
+	mov.f32 	%f733, 0f3DAAAABD;
+	mov.f32 	%f732, 0f3C4CAF63;
+	mov.f32 	%f731, 0f3B18F0FE;
+	setp.eq.f32	%p67, %f41, 0f3F800000;
+	selp.f32	%f70, 0f3F800000, %f762, %p67;
+	abs.f32 	%f71, %f42;
+	setp.lt.f32	%p68, %f71, 0f00800000;
+	mul.f32 	%f511, %f71, 0f4B800000;
+	selp.f32	%f512, 0fC3170000, 0fC2FE0000, %p68;
+	selp.f32	%f513, %f511, %f71, %p68;
+	mov.b32 	 %r91, %f513;
+	and.b32  	%r92, %r91, 8388607;
+	or.b32  	%r93, %r92, 1065353216;
+	mov.b32 	 %f514, %r93;
+	shr.u32 	%r94, %r91, 23;
+	cvt.rn.f32.u32	%f515, %r94;
+	add.f32 	%f516, %f512, %f515;
+	setp.gt.f32	%p69, %f514, 0f3FB504F3;
+	mul.f32 	%f517, %f514, 0f3F000000;
+	add.f32 	%f518, %f516, 0f3F800000;
+	selp.f32	%f519, %f517, %f514, %p69;
+	selp.f32	%f520, %f518, %f516, %p69;
+	add.f32 	%f521, %f519, 0fBF800000;
+	add.f32 	%f510, %f519, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f509,%f510;
+	// inline asm
+	add.f32 	%f522, %f521, %f521;
+	mul.f32 	%f523, %f509, %f522;
+	mul.f32 	%f524, %f523, %f523;
+	fma.rn.f32 	%f527, %f731, %f524, %f732;
+	fma.rn.f32 	%f529, %f527, %f524, %f733;
+	mul.rn.f32 	%f530, %f529, %f524;
+	mul.rn.f32 	%f531, %f530, %f523;
+	sub.f32 	%f532, %f521, %f523;
+	neg.f32 	%f533, %f523;
+	add.f32 	%f534, %f532, %f532;
+	fma.rn.f32 	%f535, %f533, %f521, %f534;
+	mul.rn.f32 	%f536, %f509, %f535;
+	add.f32 	%f537, %f531, %f523;
+	sub.f32 	%f538, %f523, %f537;
+	add.f32 	%f539, %f531, %f538;
+	add.f32 	%f540, %f536, %f539;
+	add.f32 	%f541, %f537, %f540;
+	sub.f32 	%f542, %f537, %f541;
+	add.f32 	%f543, %f540, %f542;
+	mul.rn.f32 	%f545, %f520, %f734;
+	mul.rn.f32 	%f547, %f520, %f735;
+	add.f32 	%f548, %f545, %f541;
+	sub.f32 	%f549, %f545, %f548;
+	add.f32 	%f550, %f541, %f549;
+	add.f32 	%f551, %f543, %f550;
+	add.f32 	%f552, %f547, %f551;
+	add.f32 	%f553, %f548, %f552;
+	sub.f32 	%f554, %f548, %f553;
+	add.f32 	%f555, %f552, %f554;
+	mul.rn.f32 	%f557, %f478, %f553;
+	neg.f32 	%f558, %f557;
+	fma.rn.f32 	%f559, %f478, %f553, %f558;
+	fma.rn.f32 	%f560, %f478, %f555, %f559;
+	fma.rn.f32 	%f562, %f483, %f553, %f560;
+	add.rn.f32 	%f563, %f557, %f562;
+	neg.f32 	%f564, %f563;
+	add.rn.f32 	%f565, %f557, %f564;
+	add.rn.f32 	%f566, %f565, %f562;
+	mov.b32 	 %r95, %f563;
+	setp.eq.s32	%p70, %r95, 1118925336;
+	add.s32 	%r96, %r95, -1;
+	mov.b32 	 %f567, %r96;
+	add.f32 	%f568, %f566, 0f37000000;
+	selp.f32	%f569, %f567, %f563, %p70;
+	selp.f32	%f72, %f568, %f566, %p70;
+	mul.f32 	%f570, %f569, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f571, %f570;
+	fma.rn.f32 	%f573, %f571, %f736, %f569;
+	fma.rn.f32 	%f575, %f571, %f737, %f573;
+	mul.f32 	%f576, %f575, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f577, %f576;
+	add.f32 	%f578, %f571, 0f00000000;
+	ex2.approx.f32 	%f579, %f578;
+	mul.f32 	%f580, %f577, %f579;
+	setp.lt.f32	%p71, %f569, 0fC2D20000;
+	selp.f32	%f581, 0f00000000, %f580, %p71;
+	setp.gt.f32	%p72, %f569, 0f42D20000;
+	selp.f32	%f763, 0f7F800000, %f581, %p72;
+	setp.eq.f32	%p73, %f763, 0f7F800000;
+	@%p73 bra 	BB0_47;
+
+	fma.rn.f32 	%f763, %f763, %f72, %f763;
+
+BB0_47:
+	setp.lt.f32	%p74, %f42, 0f00000000;
+	and.pred  	%p4, %p74, %p59;
+	mov.b32 	 %r97, %f763;
+	xor.b32  	%r98, %r97, -2147483648;
+	mov.b32 	 %f582, %r98;
+	selp.f32	%f765, %f582, %f763, %p4;
+	setp.eq.f32	%p76, %f42, 0f00000000;
+	@%p76 bra 	BB0_50;
+	bra.uni 	BB0_48;
+
+BB0_50:
+	add.f32 	%f585, %f42, %f42;
+	selp.f32	%f765, %f585, 0f00000000, %p59;
+	bra.uni 	BB0_51;
+
+BB0_48:
+	setp.geu.f32	%p77, %f42, 0f00000000;
+	@%p77 bra 	BB0_51;
+
+	cvt.rzi.f32.f32	%f584, %f478;
+	setp.neu.f32	%p78, %f584, 0f3EE66666;
+	selp.f32	%f765, 0f7FFFFFFF, %f765, %p78;
+
+BB0_51:
+	add.f32 	%f586, %f71, 0f3EE66666;
+	mov.b32 	 %r99, %f586;
+	setp.lt.s32	%p80, %r99, 2139095040;
+	@%p80 bra 	BB0_56;
+
+	setp.gtu.f32	%p81, %f71, 0f7F800000;
+	@%p81 bra 	BB0_55;
+	bra.uni 	BB0_53;
+
+BB0_55:
+	add.f32 	%f765, %f42, 0f3EE66666;
+	bra.uni 	BB0_56;
+
+BB0_53:
+	setp.neu.f32	%p82, %f71, 0f7F800000;
+	@%p82 bra 	BB0_56;
+
+	selp.f32	%f765, 0fFF800000, 0f7F800000, %p4;
+
+BB0_56:
+	mov.f32 	%f744, 0fB5BFBE8E;
+	mov.f32 	%f743, 0fBF317200;
+	mov.f32 	%f742, 0f35BFBE8E;
+	mov.f32 	%f741, 0f3F317200;
+	mov.f32 	%f740, 0f3DAAAABD;
+	mov.f32 	%f739, 0f3C4CAF63;
+	mov.f32 	%f738, 0f3B18F0FE;
+	setp.eq.f32	%p83, %f42, 0f3F800000;
+	selp.f32	%f83, 0f3F800000, %f765, %p83;
+	abs.f32 	%f84, %f43;
+	setp.lt.f32	%p84, %f84, 0f00800000;
+	mul.f32 	%f589, %f84, 0f4B800000;
+	selp.f32	%f590, 0fC3170000, 0fC2FE0000, %p84;
+	selp.f32	%f591, %f589, %f84, %p84;
+	mov.b32 	 %r100, %f591;
+	and.b32  	%r101, %r100, 8388607;
+	or.b32  	%r102, %r101, 1065353216;
+	mov.b32 	 %f592, %r102;
+	shr.u32 	%r103, %r100, 23;
+	cvt.rn.f32.u32	%f593, %r103;
+	add.f32 	%f594, %f590, %f593;
+	setp.gt.f32	%p85, %f592, 0f3FB504F3;
+	mul.f32 	%f595, %f592, 0f3F000000;
+	add.f32 	%f596, %f594, 0f3F800000;
+	selp.f32	%f597, %f595, %f592, %p85;
+	selp.f32	%f598, %f596, %f594, %p85;
+	add.f32 	%f599, %f597, 0fBF800000;
+	add.f32 	%f588, %f597, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f587,%f588;
+	// inline asm
+	add.f32 	%f600, %f599, %f599;
+	mul.f32 	%f601, %f587, %f600;
+	mul.f32 	%f602, %f601, %f601;
+	fma.rn.f32 	%f605, %f738, %f602, %f739;
+	fma.rn.f32 	%f607, %f605, %f602, %f740;
+	mul.rn.f32 	%f608, %f607, %f602;
+	mul.rn.f32 	%f609, %f608, %f601;
+	sub.f32 	%f610, %f599, %f601;
+	neg.f32 	%f611, %f601;
+	add.f32 	%f612, %f610, %f610;
+	fma.rn.f32 	%f613, %f611, %f599, %f612;
+	mul.rn.f32 	%f614, %f587, %f613;
+	add.f32 	%f615, %f609, %f601;
+	sub.f32 	%f616, %f601, %f615;
+	add.f32 	%f617, %f609, %f616;
+	add.f32 	%f618, %f614, %f617;
+	add.f32 	%f619, %f615, %f618;
+	sub.f32 	%f620, %f615, %f619;
+	add.f32 	%f621, %f618, %f620;
+	mul.rn.f32 	%f623, %f598, %f741;
+	mul.rn.f32 	%f625, %f598, %f742;
+	add.f32 	%f626, %f623, %f619;
+	sub.f32 	%f627, %f623, %f626;
+	add.f32 	%f628, %f619, %f627;
+	add.f32 	%f629, %f621, %f628;
+	add.f32 	%f630, %f625, %f629;
+	add.f32 	%f631, %f626, %f630;
+	sub.f32 	%f632, %f626, %f631;
+	add.f32 	%f633, %f630, %f632;
+	mul.rn.f32 	%f635, %f478, %f631;
+	neg.f32 	%f636, %f635;
+	fma.rn.f32 	%f637, %f478, %f631, %f636;
+	fma.rn.f32 	%f638, %f478, %f633, %f637;
+	fma.rn.f32 	%f640, %f483, %f631, %f638;
+	add.rn.f32 	%f641, %f635, %f640;
+	neg.f32 	%f642, %f641;
+	add.rn.f32 	%f643, %f635, %f642;
+	add.rn.f32 	%f644, %f643, %f640;
+	mov.b32 	 %r104, %f641;
+	setp.eq.s32	%p86, %r104, 1118925336;
+	add.s32 	%r105, %r104, -1;
+	mov.b32 	 %f645, %r105;
+	add.f32 	%f646, %f644, 0f37000000;
+	selp.f32	%f647, %f645, %f641, %p86;
+	selp.f32	%f85, %f646, %f644, %p86;
+	mul.f32 	%f648, %f647, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f649, %f648;
+	fma.rn.f32 	%f651, %f649, %f743, %f647;
+	fma.rn.f32 	%f653, %f649, %f744, %f651;
+	mul.f32 	%f654, %f653, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f655, %f654;
+	add.f32 	%f656, %f649, 0f00000000;
+	ex2.approx.f32 	%f657, %f656;
+	mul.f32 	%f658, %f655, %f657;
+	setp.lt.f32	%p87, %f647, 0fC2D20000;
+	selp.f32	%f659, 0f00000000, %f658, %p87;
+	setp.gt.f32	%p88, %f647, 0f42D20000;
+	selp.f32	%f766, 0f7F800000, %f659, %p88;
+	setp.eq.f32	%p89, %f766, 0f7F800000;
+	@%p89 bra 	BB0_58;
+
+	fma.rn.f32 	%f766, %f766, %f85, %f766;
+
+BB0_58:
+	setp.lt.f32	%p90, %f43, 0f00000000;
+	and.pred  	%p5, %p90, %p59;
+	mov.b32 	 %r106, %f766;
+	xor.b32  	%r107, %r106, -2147483648;
+	mov.b32 	 %f660, %r107;
+	selp.f32	%f768, %f660, %f766, %p5;
+	setp.eq.f32	%p92, %f43, 0f00000000;
+	@%p92 bra 	BB0_61;
+	bra.uni 	BB0_59;
+
+BB0_61:
+	add.f32 	%f663, %f43, %f43;
+	selp.f32	%f768, %f663, 0f00000000, %p59;
+	bra.uni 	BB0_62;
+
+BB0_59:
+	setp.geu.f32	%p93, %f43, 0f00000000;
+	@%p93 bra 	BB0_62;
+
+	cvt.rzi.f32.f32	%f662, %f478;
+	setp.neu.f32	%p94, %f662, 0f3EE66666;
+	selp.f32	%f768, 0f7FFFFFFF, %f768, %p94;
+
+BB0_62:
+	add.f32 	%f664, %f84, 0f3EE66666;
+	mov.b32 	 %r108, %f664;
+	setp.lt.s32	%p96, %r108, 2139095040;
+	@%p96 bra 	BB0_67;
+
+	setp.gtu.f32	%p97, %f84, 0f7F800000;
+	@%p97 bra 	BB0_66;
+	bra.uni 	BB0_64;
+
+BB0_66:
+	add.f32 	%f768, %f43, 0f3EE66666;
+	bra.uni 	BB0_67;
+
+BB0_64:
+	setp.neu.f32	%p98, %f84, 0f7F800000;
+	@%p98 bra 	BB0_67;
+
+	selp.f32	%f768, 0fFF800000, 0f7F800000, %p5;
+
+BB0_67:
+	setp.eq.f32	%p99, %f43, 0f3F800000;
+	selp.f32	%f665, 0f3F800000, %f768, %p99;
+	cvt.u64.u32	%rd36, %r3;
+	cvt.u64.u32	%rd35, %r2;
+	mov.u64 	%rd39, image;
+	cvta.global.u64 	%rd34, %rd39;
+	// inline asm
+	call (%rd33), _rt_buffer_get_64, (%rd34, %r24, %r25, %rd35, %rd36, %rd15, %rd15);
+	// inline asm
+	cvt.sat.f32.f32	%f666, %f665;
+	mul.f32 	%f667, %f666, 0f437FFD71;
+	cvt.rzi.u32.f32	%r111, %f667;
+	cvt.sat.f32.f32	%f668, %f83;
+	mul.f32 	%f669, %f668, 0f437FFD71;
+	cvt.rzi.u32.f32	%r112, %f669;
+	cvt.sat.f32.f32	%f670, %f70;
+	mul.f32 	%f671, %f670, 0f437FFD71;
+	cvt.rzi.u32.f32	%r113, %f671;
+	cvt.u16.u32	%rs13, %r111;
+	cvt.u16.u32	%rs14, %r113;
+	cvt.u16.u32	%rs15, %r112;
+	mov.u16 	%rs16, 255;
+	st.v4.u8 	[%rd33], {%rs13, %rs15, %rs14, %rs16};
+	ld.global.u32 	%r164, [imageEnabled];
+
+BB0_68:
+	and.b32  	%r114, %r164, 4;
+	setp.eq.s32	%p100, %r114, 0;
+	@%p100 bra 	BB0_72;
+
+	ld.global.u32 	%r115, [additive];
+	setp.eq.s32	%p101, %r115, 0;
+	cvt.u64.u32	%rd4, %r2;
+	cvt.u64.u32	%rd5, %r3;
+	mov.f32 	%f672, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs17, %f672;}
+
+	// inline asm
+	@%p101 bra 	BB0_71;
+
+	mov.u64 	%rd52, image_HDR;
+	cvta.global.u64 	%rd41, %rd52;
+	mov.u32 	%r119, 8;
+	// inline asm
+	call (%rd40), _rt_buffer_get_64, (%rd41, %r24, %r119, %rd4, %rd5, %rd15, %rd15);
+	// inline asm
+	ld.v4.u16 	{%rs24, %rs25, %rs26, %rs27}, [%rd40];
+	// inline asm
+	{  cvt.f32.f16 %f673, %rs24;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f674, %rs25;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f675, %rs26;}
+
+	// inline asm
+	// inline asm
+	call (%rd46), _rt_buffer_get_64, (%rd41, %r24, %r119, %rd4, %rd5, %rd15, %rd15);
+	// inline asm
+	add.f32 	%f676, %f41, %f673;
+	add.f32 	%f677, %f42, %f674;
+	add.f32 	%f678, %f43, %f675;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs23, %f678;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs22, %f677;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs21, %f676;}
+
+	// inline asm
+	st.v4.u16 	[%rd46], {%rs21, %rs22, %rs23, %rs17};
+	bra.uni 	BB0_72;
+
+BB0_71:
+	mov.u64 	%rd59, image_HDR;
+	cvta.global.u64 	%rd54, %rd59;
+	mov.u32 	%r121, 8;
+	// inline asm
+	call (%rd53), _rt_buffer_get_64, (%rd54, %r24, %r121, %rd4, %rd5, %rd15, %rd15);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs30, %f43;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs29, %f42;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs28, %f41;}
+
+	// inline asm
+	st.v4.u16 	[%rd53], {%rs28, %rs29, %rs30, %rs17};
+
+BB0_72:
+	ld.global.u8 	%rs31, [imageEnabled];
+	and.b16  	%rs32, %rs31, 64;
+	setp.eq.s16	%p102, %rs32, 0;
+	@%p102 bra 	BB0_94;
+
+	cvt.u64.u32	%rd62, %r2;
+	cvt.u64.u32	%rd63, %r3;
+	mov.u64 	%rd66, image_Dir;
+	cvta.global.u64 	%rd61, %rd66;
+	// inline asm
+	call (%rd60), _rt_buffer_get_64, (%rd61, %r24, %r25, %rd62, %rd63, %rd15, %rd15);
+	// inline asm
+	fma.rn.f32 	%f682, %f10, 0f3F000000, 0f3F000000;
+	mul.f32 	%f683, %f682, 0f437F0000;
+	cvt.rzi.u32.f32	%r124, %f683;
+	fma.rn.f32 	%f684, %f11, 0f3F000000, 0f3F000000;
+	mul.f32 	%f685, %f684, 0f437F0000;
+	cvt.rzi.u32.f32	%r125, %f685;
+	fma.rn.f32 	%f686, %f12, 0f3F000000, 0f3F000000;
+	mul.f32 	%f687, %f686, 0f437F0000;
+	cvt.rzi.u32.f32	%r126, %f687;
+	cvt.u16.u32	%rs33, %r126;
+	cvt.u16.u32	%rs34, %r125;
+	cvt.u16.u32	%rs35, %r124;
+	mov.u16 	%rs36, 255;
+	st.v4.u8 	[%rd60], {%rs35, %rs34, %rs33, %rs36};
+
+BB0_94:
+	ret;
+}
+
+