move to self host

1 files changed, 2395 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightRNM.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightRNM.ptx
new file mode 100644
index 00000000..c5b361e6
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmCookieLightRNM.ptx
@@ -0,0 +1,2395 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 uvtangent[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 4 .u32 samples;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightRadius;
+.global .align 4 .b8 lightPos[12];
+.global .align 4 .b8 lightColor[12];
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .u32 lightCookie;
+.global .align 4 .b8 lightMatrix[36];
+.global .align 4 .f32 lightFOV;
+.global .align 4 .f32 lightFalloffFakeDistanceMult;
+.global .align 4 .f32 lightFalloffMinRadiusSq;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightCookieE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightMatrixE[8] = {82, 97, 121, 0, 36, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightFOVE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename11lightCookieE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename11lightMatrixE[10] = {77, 97, 116, 114, 105, 120, 51, 120, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightFOVE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightCookieE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightMatrixE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightFOVE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightCookieE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightMatrixE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightFOVE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightCookieE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightMatrixE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightFOVE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[4];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<129>;
+	.reg .b16 	%rs<213>;
+	.reg .f32 	%f<1089>;
+	.reg .b32 	%r<250>;
+	.reg .b64 	%rd<334>;
+
+
+	mov.u64 	%rd333, __local_depot0;
+	cvta.local.u64 	%SP, %rd333;
+	ld.global.v2.u32 	{%r33, %r34}, [pixelID];
+	cvt.u64.u32	%rd16, %r33;
+	cvt.u64.u32	%rd17, %r34;
+	mov.u64 	%rd20, uvnormal;
+	cvta.global.u64 	%rd15, %rd20;
+	mov.u32 	%r31, 2;
+	mov.u32 	%r32, 4;
+	mov.u64 	%rd19, 0;
+	// inline asm
+	call (%rd14), _rt_buffer_get_64, (%rd15, %r31, %r32, %rd16, %rd17, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r1, [%rd14];
+	shr.u32 	%r37, %r1, 16;
+	cvt.u16.u32	%rs1, %r37;
+	and.b16  	%rs10, %rs1, 255;
+	cvt.u16.u32	%rs11, %r1;
+	or.b16  	%rs12, %rs11, %rs10;
+	setp.eq.s16	%p6, %rs12, 0;
+	mov.f32 	%f1059, 0f00000000;
+	mov.f32 	%f1060, %f1059;
+	mov.f32 	%f1061, %f1059;
+	@%p6 bra 	BB0_2;
+
+	ld.u8 	%rs13, [%rd14+1];
+	and.b16  	%rs15, %rs11, 255;
+	cvt.rn.f32.u16	%f139, %rs15;
+	div.rn.f32 	%f140, %f139, 0f437F0000;
+	fma.rn.f32 	%f141, %f140, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f142, %rs13;
+	div.rn.f32 	%f143, %f142, 0f437F0000;
+	fma.rn.f32 	%f144, %f143, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f145, %rs10;
+	div.rn.f32 	%f146, %f145, 0f437F0000;
+	fma.rn.f32 	%f147, %f146, 0f40000000, 0fBF800000;
+	mul.f32 	%f148, %f144, %f144;
+	fma.rn.f32 	%f149, %f141, %f141, %f148;
+	fma.rn.f32 	%f150, %f147, %f147, %f149;
+	sqrt.rn.f32 	%f151, %f150;
+	rcp.rn.f32 	%f152, %f151;
+	mul.f32 	%f1059, %f141, %f152;
+	mul.f32 	%f1060, %f144, %f152;
+	mul.f32 	%f1061, %f147, %f152;
+
+BB0_2:
+	ld.global.v2.u32 	{%r38, %r39}, [pixelID];
+	ld.global.v2.u32 	{%r41, %r42}, [tileInfo];
+	add.s32 	%r2, %r38, %r41;
+	add.s32 	%r3, %r39, %r42;
+	setp.eq.f32	%p7, %f1060, 0f00000000;
+	setp.eq.f32	%p8, %f1059, 0f00000000;
+	and.pred  	%p9, %p8, %p7;
+	setp.eq.f32	%p10, %f1061, 0f00000000;
+	and.pred  	%p11, %p9, %p10;
+	@%p11 bra 	BB0_104;
+	bra.uni 	BB0_3;
+
+BB0_104:
+	ld.global.u32 	%r249, [imageEnabled];
+	and.b32  	%r202, %r249, 1;
+	setp.eq.b32	%p122, %r202, 1;
+	@!%p122 bra 	BB0_106;
+	bra.uni 	BB0_105;
+
+BB0_105:
+	cvt.u64.u32	%rd241, %r2;
+	cvt.u64.u32	%rd242, %r3;
+	mov.u64 	%rd245, image;
+	cvta.global.u64 	%rd240, %rd245;
+	// inline asm
+	call (%rd239), _rt_buffer_get_64, (%rd240, %r31, %r32, %rd241, %rd242, %rd19, %rd19);
+	// inline asm
+	mov.u16 	%rs158, 0;
+	st.v4.u8 	[%rd239], {%rs158, %rs158, %rs158, %rs158};
+	ld.global.u32 	%r249, [imageEnabled];
+
+BB0_106:
+	and.b32  	%r205, %r249, 8;
+	setp.eq.s32	%p123, %r205, 0;
+	@%p123 bra 	BB0_108;
+
+	cvt.u64.u32	%rd249, %r3;
+	cvt.u64.u32	%rd248, %r2;
+	mov.u64 	%rd252, image_Mask;
+	cvta.global.u64 	%rd247, %rd252;
+	// inline asm
+	call (%rd246), _rt_buffer_get_64, (%rd247, %r31, %r31, %rd248, %rd249, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f962, 0f00000000;
+	cvt.rzi.u32.f32	%r208, %f962;
+	cvt.u16.u32	%rs159, %r208;
+	mov.u16 	%rs160, 0;
+	st.v2.u8 	[%rd246], {%rs159, %rs160};
+	ld.global.u32 	%r249, [imageEnabled];
+
+BB0_108:
+	cvt.u64.u32	%rd12, %r2;
+	cvt.u64.u32	%rd13, %r3;
+	and.b32  	%r209, %r249, 4;
+	setp.eq.s32	%p124, %r209, 0;
+	@%p124 bra 	BB0_112;
+
+	ld.global.u32 	%r210, [additive];
+	setp.eq.s32	%p125, %r210, 0;
+	@%p125 bra 	BB0_111;
+
+	mov.u64 	%rd265, image_HDR;
+	cvta.global.u64 	%rd254, %rd265;
+	mov.u32 	%r214, 8;
+	// inline asm
+	call (%rd253), _rt_buffer_get_64, (%rd254, %r31, %r214, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs167, %rs168, %rs169, %rs170}, [%rd253];
+	// inline asm
+	{  cvt.f32.f16 %f963, %rs167;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f964, %rs168;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f965, %rs169;}
+
+	// inline asm
+	// inline asm
+	call (%rd259), _rt_buffer_get_64, (%rd254, %r31, %r214, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f966, %f963, 0f00000000;
+	add.f32 	%f967, %f964, 0f00000000;
+	add.f32 	%f968, %f965, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs166, %f968;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs165, %f967;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs164, %f966;}
+
+	// inline asm
+	mov.u16 	%rs171, 0;
+	st.v4.u16 	[%rd259], {%rs164, %rs165, %rs166, %rs171};
+	bra.uni 	BB0_112;
+
+BB0_3:
+	ld.global.v2.u32 	{%r48, %r49}, [pixelID];
+	cvt.u64.u32	%rd23, %r48;
+	cvt.u64.u32	%rd24, %r49;
+	mov.u64 	%rd27, uvpos;
+	cvta.global.u64 	%rd22, %rd27;
+	mov.u32 	%r47, 12;
+	// inline asm
+	call (%rd21), _rt_buffer_get_64, (%rd22, %r31, %r47, %rd23, %rd24, %rd19, %rd19);
+	// inline asm
+	ld.global.f32 	%f155, [lightPos];
+	ld.f32 	%f9, [%rd21+8];
+	ld.f32 	%f8, [%rd21+4];
+	ld.f32 	%f7, [%rd21];
+	sub.f32 	%f156, %f155, %f7;
+	ld.global.f32 	%f157, [lightPos+4];
+	sub.f32 	%f158, %f157, %f8;
+	ld.global.f32 	%f159, [lightPos+8];
+	sub.f32 	%f160, %f159, %f9;
+	mul.f32 	%f161, %f158, %f158;
+	fma.rn.f32 	%f162, %f156, %f156, %f161;
+	fma.rn.f32 	%f163, %f160, %f160, %f162;
+	sqrt.rn.f32 	%f164, %f163;
+	rcp.rn.f32 	%f165, %f164;
+	mul.f32 	%f10, %f156, %f165;
+	mul.f32 	%f11, %f158, %f165;
+	mul.f32 	%f12, %f160, %f165;
+	ld.global.f32 	%f166, [lightFalloffFakeDistanceMult];
+	mul.f32 	%f13, %f164, %f166;
+	ld.global.f32 	%f167, [lightInvCutoff];
+	mul.f32 	%f14, %f164, %f167;
+	mov.f32 	%f171, 0f40800000;
+	abs.f32 	%f16, %f14;
+	setp.lt.f32	%p12, %f16, 0f00800000;
+	mul.f32 	%f173, %f16, 0f4B800000;
+	selp.f32	%f174, 0fC3170000, 0fC2FE0000, %p12;
+	selp.f32	%f175, %f173, %f16, %p12;
+	mov.b32 	 %r52, %f175;
+	and.b32  	%r53, %r52, 8388607;
+	or.b32  	%r54, %r53, 1065353216;
+	mov.b32 	 %f176, %r54;
+	shr.u32 	%r55, %r52, 23;
+	cvt.rn.f32.u32	%f177, %r55;
+	add.f32 	%f178, %f174, %f177;
+	setp.gt.f32	%p13, %f176, 0f3FB504F3;
+	mul.f32 	%f179, %f176, 0f3F000000;
+	add.f32 	%f180, %f178, 0f3F800000;
+	selp.f32	%f181, %f179, %f176, %p13;
+	selp.f32	%f182, %f180, %f178, %p13;
+	add.f32 	%f183, %f181, 0fBF800000;
+	add.f32 	%f154, %f181, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f153,%f154;
+	// inline asm
+	add.f32 	%f184, %f183, %f183;
+	mul.f32 	%f185, %f153, %f184;
+	mul.f32 	%f186, %f185, %f185;
+	mov.f32 	%f187, 0f3C4CAF63;
+	mov.f32 	%f188, 0f3B18F0FE;
+	fma.rn.f32 	%f189, %f188, %f186, %f187;
+	mov.f32 	%f190, 0f3DAAAABD;
+	fma.rn.f32 	%f191, %f189, %f186, %f190;
+	mul.rn.f32 	%f192, %f191, %f186;
+	mul.rn.f32 	%f193, %f192, %f185;
+	sub.f32 	%f194, %f183, %f185;
+	neg.f32 	%f195, %f185;
+	add.f32 	%f196, %f194, %f194;
+	fma.rn.f32 	%f197, %f195, %f183, %f196;
+	mul.rn.f32 	%f198, %f153, %f197;
+	add.f32 	%f199, %f193, %f185;
+	sub.f32 	%f200, %f185, %f199;
+	add.f32 	%f201, %f193, %f200;
+	add.f32 	%f202, %f198, %f201;
+	add.f32 	%f203, %f199, %f202;
+	sub.f32 	%f204, %f199, %f203;
+	add.f32 	%f205, %f202, %f204;
+	mov.f32 	%f206, 0f3F317200;
+	mul.rn.f32 	%f207, %f182, %f206;
+	mov.f32 	%f208, 0f35BFBE8E;
+	mul.rn.f32 	%f209, %f182, %f208;
+	add.f32 	%f210, %f207, %f203;
+	sub.f32 	%f211, %f207, %f210;
+	add.f32 	%f212, %f203, %f211;
+	add.f32 	%f213, %f205, %f212;
+	add.f32 	%f214, %f209, %f213;
+	add.f32 	%f215, %f210, %f214;
+	sub.f32 	%f216, %f210, %f215;
+	add.f32 	%f217, %f214, %f216;
+	mul.rn.f32 	%f218, %f171, %f215;
+	neg.f32 	%f219, %f218;
+	fma.rn.f32 	%f220, %f171, %f215, %f219;
+	fma.rn.f32 	%f221, %f171, %f217, %f220;
+	mov.f32 	%f222, 0f00000000;
+	fma.rn.f32 	%f223, %f222, %f215, %f221;
+	add.rn.f32 	%f224, %f218, %f223;
+	neg.f32 	%f225, %f224;
+	add.rn.f32 	%f226, %f218, %f225;
+	add.rn.f32 	%f227, %f226, %f223;
+	mov.b32 	 %r56, %f224;
+	setp.eq.s32	%p14, %r56, 1118925336;
+	add.s32 	%r57, %r56, -1;
+	mov.b32 	 %f228, %r57;
+	add.f32 	%f229, %f227, 0f37000000;
+	selp.f32	%f230, %f228, %f224, %p14;
+	selp.f32	%f17, %f229, %f227, %p14;
+	mul.f32 	%f231, %f230, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f232, %f231;
+	mov.f32 	%f233, 0fBF317200;
+	fma.rn.f32 	%f234, %f232, %f233, %f230;
+	mov.f32 	%f235, 0fB5BFBE8E;
+	fma.rn.f32 	%f236, %f232, %f235, %f234;
+	mul.f32 	%f237, %f236, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f238, %f237;
+	add.f32 	%f239, %f232, 0f00000000;
+	ex2.approx.f32 	%f240, %f239;
+	mul.f32 	%f241, %f238, %f240;
+	setp.lt.f32	%p15, %f230, 0fC2D20000;
+	selp.f32	%f242, 0f00000000, %f241, %p15;
+	setp.gt.f32	%p16, %f230, 0f42D20000;
+	selp.f32	%f1062, 0f7F800000, %f242, %p16;
+	setp.eq.f32	%p17, %f1062, 0f7F800000;
+	@%p17 bra 	BB0_5;
+
+	fma.rn.f32 	%f1062, %f1062, %f17, %f1062;
+
+BB0_5:
+	mov.f32 	%f996, 0f40000000;
+	cvt.rzi.f32.f32	%f995, %f996;
+	add.f32 	%f994, %f995, %f995;
+	mov.f32 	%f993, 0f40800000;
+	sub.f32 	%f992, %f993, %f994;
+	abs.f32 	%f991, %f992;
+	setp.lt.f32	%p18, %f14, 0f00000000;
+	setp.eq.f32	%p19, %f991, 0f3F800000;
+	and.pred  	%p1, %p18, %p19;
+	mov.b32 	 %r58, %f1062;
+	xor.b32  	%r59, %r58, -2147483648;
+	mov.b32 	 %f243, %r59;
+	selp.f32	%f1064, %f243, %f1062, %p1;
+	setp.eq.f32	%p20, %f14, 0f00000000;
+	@%p20 bra 	BB0_8;
+	bra.uni 	BB0_6;
+
+BB0_8:
+	add.f32 	%f246, %f14, %f14;
+	selp.f32	%f1064, %f246, 0f00000000, %p19;
+	bra.uni 	BB0_9;
+
+BB0_6:
+	setp.geu.f32	%p21, %f14, 0f00000000;
+	@%p21 bra 	BB0_9;
+
+	mov.f32 	%f1030, 0f40800000;
+	cvt.rzi.f32.f32	%f245, %f1030;
+	setp.neu.f32	%p22, %f245, 0f40800000;
+	selp.f32	%f1064, 0f7FFFFFFF, %f1064, %p22;
+
+BB0_9:
+	abs.f32 	%f997, %f14;
+	add.f32 	%f247, %f997, 0f40800000;
+	mov.b32 	 %r60, %f247;
+	setp.lt.s32	%p24, %r60, 2139095040;
+	@%p24 bra 	BB0_14;
+
+	abs.f32 	%f1028, %f14;
+	setp.gtu.f32	%p25, %f1028, 0f7F800000;
+	@%p25 bra 	BB0_13;
+	bra.uni 	BB0_11;
+
+BB0_13:
+	add.f32 	%f1064, %f14, 0f40800000;
+	bra.uni 	BB0_14;
+
+BB0_11:
+	abs.f32 	%f1029, %f14;
+	setp.neu.f32	%p26, %f1029, 0f7F800000;
+	@%p26 bra 	BB0_14;
+
+	selp.f32	%f1064, 0fFF800000, 0f7F800000, %p1;
+
+BB0_14:
+	mov.f32 	%f998, 0f00000000;
+	mov.f32 	%f1067, 0f3F800000;
+	sub.f32 	%f257, %f1067, %f1064;
+	setp.eq.f32	%p27, %f14, 0f3F800000;
+	selp.f32	%f258, 0f00000000, %f257, %p27;
+	cvt.sat.f32.f32	%f259, %f258;
+	ld.global.f32 	%f260, [lightFalloffMinRadiusSq];
+	fma.rn.f32 	%f261, %f13, %f13, %f260;
+	div.rn.f32 	%f28, %f259, %f261;
+	mul.f32 	%f262, %f1060, %f11;
+	fma.rn.f32 	%f263, %f1059, %f10, %f262;
+	fma.rn.f32 	%f29, %f1061, %f12, %f263;
+	ld.global.u32 	%r63, [imageEnabled];
+	and.b32  	%r64, %r63, 32;
+	ld.global.u32 	%r65, [ignoreNormal];
+	or.b32  	%r4, %r64, %r65;
+	ld.global.f32 	%f264, [lightMatrix+24];
+	mul.f32 	%f265, %f10, %f264;
+	ld.global.f32 	%f266, [lightMatrix+28];
+	mul.f32 	%f267, %f11, %f266;
+	neg.f32 	%f268, %f267;
+	sub.f32 	%f269, %f268, %f265;
+	ld.global.f32 	%f270, [lightMatrix+32];
+	mul.f32 	%f271, %f12, %f270;
+	sub.f32 	%f272, %f269, %f271;
+	setp.gt.f32	%p28, %f272, 0f00000000;
+	ld.global.f32 	%f273, [lightMatrix];
+	mul.f32 	%f274, %f273, %f10;
+	sub.f32 	%f275, %f998, %f274;
+	ld.global.f32 	%f276, [lightMatrix+4];
+	mul.f32 	%f277, %f276, %f11;
+	sub.f32 	%f278, %f275, %f277;
+	ld.global.f32 	%f279, [lightMatrix+8];
+	mul.f32 	%f280, %f279, %f12;
+	sub.f32 	%f281, %f278, %f280;
+	selp.f32	%f282, 0f3F800000, 0f00000000, %p28;
+	ld.global.f32 	%f283, [lightMatrix+12];
+	mul.f32 	%f284, %f283, %f10;
+	sub.f32 	%f285, %f998, %f284;
+	ld.global.f32 	%f286, [lightMatrix+16];
+	mul.f32 	%f287, %f286, %f11;
+	sub.f32 	%f288, %f285, %f287;
+	ld.global.f32 	%f289, [lightMatrix+20];
+	mul.f32 	%f290, %f289, %f12;
+	sub.f32 	%f291, %f288, %f290;
+	ld.global.u32 	%r61, [lightCookie];
+	ld.global.f32 	%f292, [lightFOV];
+	fma.rn.f32 	%f252, %f281, %f292, 0f3F000000;
+	fma.rn.f32 	%f253, %f291, %f292, 0f3F000000;
+	// inline asm
+	call (%f248, %f249, %f250, %f251), _rt_texture_get_f_id, (%r61, %r31, %f252, %f253, %f998, %f998);
+	// inline asm
+	max.f32 	%f293, %f248, %f249;
+	max.f32 	%f294, %f293, %f250;
+	mul.f32 	%f295, %f282, %f294;
+	mul.f32 	%f296, %f28, %f295;
+	ld.global.f32 	%f297, [lightColor+4];
+	ld.global.f32 	%f298, [lightColor];
+	max.f32 	%f299, %f298, %f297;
+	ld.global.f32 	%f300, [lightColor+8];
+	max.f32 	%f301, %f299, %f300;
+	mul.f32 	%f302, %f296, %f301;
+	setp.lt.f32	%p29, %f302, 0f3727C5AC;
+	@%p29 bra 	BB0_87;
+	bra.uni 	BB0_15;
+
+BB0_87:
+	ld.global.u32 	%r247, [imageEnabled];
+	and.b32  	%r166, %r247, 1;
+	setp.eq.b32	%p115, %r166, 1;
+	@!%p115 bra 	BB0_89;
+	bra.uni 	BB0_88;
+
+BB0_88:
+	cvt.u64.u32	%rd147, %r2;
+	cvt.u64.u32	%rd148, %r3;
+	mov.u64 	%rd151, image;
+	cvta.global.u64 	%rd146, %rd151;
+	// inline asm
+	call (%rd145), _rt_buffer_get_64, (%rd146, %r31, %r32, %rd147, %rd148, %rd19, %rd19);
+	// inline asm
+	mov.u16 	%rs106, 1;
+	mov.u16 	%rs107, 0;
+	st.v4.u8 	[%rd145], {%rs107, %rs107, %rs107, %rs106};
+	ld.global.u32 	%r247, [imageEnabled];
+
+BB0_89:
+	and.b32  	%r169, %r247, 8;
+	setp.eq.s32	%p116, %r169, 0;
+	@%p116 bra 	BB0_91;
+
+	cvt.u64.u32	%rd155, %r3;
+	cvt.u64.u32	%rd154, %r2;
+	mov.u64 	%rd158, image_Mask;
+	cvta.global.u64 	%rd153, %rd158;
+	// inline asm
+	call (%rd152), _rt_buffer_get_64, (%rd153, %r31, %r31, %rd154, %rd155, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f927, 0f00000000;
+	cvt.rzi.u32.f32	%r172, %f927;
+	cvt.u16.u32	%rs108, %r172;
+	mov.u16 	%rs109, 255;
+	st.v2.u8 	[%rd152], {%rs108, %rs109};
+	ld.global.u32 	%r247, [imageEnabled];
+
+BB0_91:
+	cvt.u64.u32	%rd10, %r2;
+	cvt.u64.u32	%rd11, %r3;
+	and.b32  	%r173, %r247, 4;
+	setp.eq.s32	%p117, %r173, 0;
+	@%p117 bra 	BB0_95;
+
+	ld.global.u32 	%r174, [additive];
+	setp.eq.s32	%p118, %r174, 0;
+	mov.f32 	%f928, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs110, %f928;}
+
+	// inline asm
+	@%p118 bra 	BB0_94;
+
+	mov.u64 	%rd171, image_HDR;
+	cvta.global.u64 	%rd160, %rd171;
+	mov.u32 	%r178, 8;
+	// inline asm
+	call (%rd159), _rt_buffer_get_64, (%rd160, %r31, %r178, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs117, %rs118, %rs119, %rs120}, [%rd159];
+	// inline asm
+	{  cvt.f32.f16 %f929, %rs117;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f930, %rs118;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f931, %rs119;}
+
+	// inline asm
+	// inline asm
+	call (%rd165), _rt_buffer_get_64, (%rd160, %r31, %r178, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f932, %f929, 0f00000000;
+	add.f32 	%f933, %f930, 0f00000000;
+	add.f32 	%f934, %f931, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs116, %f934;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs115, %f933;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs114, %f932;}
+
+	// inline asm
+	st.v4.u16 	[%rd165], {%rs114, %rs115, %rs116, %rs110};
+	bra.uni 	BB0_95;
+
+BB0_15:
+	mov.f32 	%f1066, 0f00000000;
+	mul.f32 	%f304, %f7, 0f3456BF95;
+	abs.f32 	%f305, %f1059;
+	div.rn.f32 	%f306, %f304, %f305;
+	abs.f32 	%f307, %f1060;
+	mul.f32 	%f308, %f8, 0f3456BF95;
+	div.rn.f32 	%f309, %f308, %f307;
+	abs.f32 	%f310, %f1061;
+	mul.f32 	%f311, %f9, 0f3456BF95;
+	div.rn.f32 	%f312, %f311, %f310;
+	abs.f32 	%f313, %f306;
+	abs.f32 	%f314, %f309;
+	abs.f32 	%f315, %f312;
+	mov.f32 	%f316, 0f38D1B717;
+	max.f32 	%f317, %f313, %f316;
+	max.f32 	%f318, %f314, %f316;
+	max.f32 	%f319, %f315, %f316;
+	fma.rn.f32 	%f33, %f1059, %f317, %f7;
+	fma.rn.f32 	%f34, %f1060, %f318, %f8;
+	fma.rn.f32 	%f35, %f1061, %f319, %f9;
+	ld.global.u32 	%r243, [samples];
+	setp.lt.s32	%p30, %r243, 1;
+	@%p30 bra 	BB0_18;
+
+	mul.f32 	%f321, %f33, 0f3456BF95;
+	abs.f32 	%f322, %f321;
+	mul.f32 	%f323, %f34, 0f3456BF95;
+	abs.f32 	%f324, %f323;
+	mul.f32 	%f325, %f35, 0f3456BF95;
+	abs.f32 	%f326, %f325;
+	max.f32 	%f327, %f322, %f324;
+	max.f32 	%f328, %f327, %f326;
+	max.f32 	%f36, %f328, %f316;
+	mov.f32 	%f1066, 0f00000000;
+	mov.u32 	%r242, 0;
+
+BB0_17:
+	add.u64 	%rd28, %SP, 0;
+	cvta.to.local.u64 	%rd29, %rd28;
+	cvt.rn.f32.s32	%f338, %r242;
+	mul.f32 	%f339, %f338, 0f3DD32618;
+	cvt.rmi.f32.f32	%f340, %f339;
+	sub.f32 	%f341, %f339, %f340;
+	mul.f32 	%f342, %f338, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f343, %f342;
+	sub.f32 	%f344, %f342, %f343;
+	mul.f32 	%f345, %f338, 0f3DC74539;
+	cvt.rmi.f32.f32	%f346, %f345;
+	sub.f32 	%f347, %f345, %f346;
+	add.f32 	%f348, %f344, 0f4199851F;
+	add.f32 	%f349, %f347, 0f4199851F;
+	add.f32 	%f350, %f341, 0f4199851F;
+	mul.f32 	%f351, %f344, %f349;
+	fma.rn.f32 	%f352, %f341, %f348, %f351;
+	fma.rn.f32 	%f353, %f350, %f347, %f352;
+	add.f32 	%f354, %f341, %f353;
+	add.f32 	%f355, %f344, %f353;
+	add.f32 	%f356, %f347, %f353;
+	add.f32 	%f357, %f354, %f355;
+	mul.f32 	%f358, %f356, %f357;
+	cvt.rmi.f32.f32	%f359, %f358;
+	sub.f32 	%f360, %f358, %f359;
+	add.f32 	%f361, %f354, %f356;
+	mul.f32 	%f362, %f355, %f361;
+	cvt.rmi.f32.f32	%f363, %f362;
+	sub.f32 	%f364, %f362, %f363;
+	add.f32 	%f365, %f355, %f356;
+	mul.f32 	%f366, %f354, %f365;
+	cvt.rmi.f32.f32	%f367, %f366;
+	sub.f32 	%f368, %f366, %f367;
+	fma.rn.f32 	%f369, %f360, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f370, %f364, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f371, %f368, 0f40000000, 0fBF800000;
+	ld.global.f32 	%f372, [lightRadius];
+	ld.global.f32 	%f373, [lightPos];
+	fma.rn.f32 	%f374, %f372, %f369, %f373;
+	ld.global.f32 	%f375, [lightPos+4];
+	fma.rn.f32 	%f376, %f372, %f370, %f375;
+	ld.global.f32 	%f377, [lightPos+8];
+	fma.rn.f32 	%f378, %f372, %f371, %f377;
+	sub.f32 	%f379, %f374, %f7;
+	sub.f32 	%f380, %f376, %f8;
+	sub.f32 	%f381, %f378, %f9;
+	mul.f32 	%f382, %f380, %f380;
+	fma.rn.f32 	%f383, %f379, %f379, %f382;
+	fma.rn.f32 	%f384, %f381, %f381, %f383;
+	sqrt.rn.f32 	%f337, %f384;
+	rcp.rn.f32 	%f385, %f337;
+	mul.f32 	%f333, %f385, %f379;
+	mul.f32 	%f334, %f385, %f380;
+	mul.f32 	%f335, %f385, %f381;
+	ld.global.u32 	%r70, [imageEnabled];
+	and.b32  	%r71, %r70, 32;
+	setp.eq.s32	%p31, %r71, 0;
+	selp.f32	%f386, 0f3F800000, 0f41200000, %p31;
+	mul.f32 	%f336, %f386, %f36;
+	mov.u32 	%r72, 1065353216;
+	st.local.u32 	[%rd29], %r72;
+	ld.global.u32 	%r67, [root];
+	mov.u32 	%r68, 1;
+	// inline asm
+	call _rt_trace_64, (%r67, %f33, %f34, %f35, %f333, %f334, %f335, %r68, %f336, %f337, %rd28, %r32);
+	// inline asm
+	ld.local.f32 	%f387, [%rd29];
+	add.f32 	%f1066, %f1066, %f387;
+	ld.global.u32 	%r243, [samples];
+	add.s32 	%r242, %r242, 1;
+	setp.lt.s32	%p32, %r242, %r243;
+	@%p32 bra 	BB0_17;
+
+BB0_18:
+	setp.eq.s32	%p33, %r243, 0;
+	@%p33 bra 	BB0_20;
+
+	cvt.rn.f32.s32	%f389, %r243;
+	div.rn.f32 	%f1067, %f1066, %f389;
+
+BB0_20:
+	setp.eq.s32	%p34, %r4, 0;
+	selp.f32	%f390, %f29, 0f3F800000, %p34;
+	cvt.sat.f32.f32	%f391, %f390;
+	mul.f32 	%f392, %f28, %f391;
+	mul.f32 	%f393, %f1067, %f392;
+	ld.global.f32 	%f394, [lightColor];
+	mul.f32 	%f395, %f394, %f393;
+	ld.global.f32 	%f396, [lightColor+4];
+	mul.f32 	%f397, %f396, %f393;
+	ld.global.f32 	%f398, [lightColor+8];
+	mul.f32 	%f399, %f393, %f398;
+	mul.f32 	%f42, %f248, %f395;
+	mul.f32 	%f43, %f249, %f397;
+	mul.f32 	%f44, %f250, %f399;
+	ld.global.u32 	%r245, [imageEnabled];
+	and.b32  	%r73, %r245, 8;
+	setp.eq.s32	%p35, %r73, 0;
+	@%p35 bra 	BB0_33;
+
+	mov.f32 	%f1006, 0fB5BFBE8E;
+	mov.f32 	%f1005, 0fBF317200;
+	mov.f32 	%f1004, 0f35BFBE8E;
+	mov.f32 	%f1003, 0f3F317200;
+	mov.f32 	%f1002, 0f3DAAAABD;
+	mov.f32 	%f1001, 0f3C4CAF63;
+	mov.f32 	%f1000, 0f3B18F0FE;
+	cvt.u64.u32	%rd32, %r2;
+	cvt.u64.u32	%rd33, %r3;
+	mov.u64 	%rd36, image_Mask;
+	cvta.global.u64 	%rd31, %rd36;
+	// inline asm
+	call (%rd30), _rt_buffer_get_64, (%rd31, %r31, %r31, %rd32, %rd33, %rd19, %rd19);
+	// inline asm
+	abs.f32 	%f46, %f1067;
+	setp.lt.f32	%p36, %f46, 0f00800000;
+	mul.f32 	%f405, %f46, 0f4B800000;
+	selp.f32	%f406, 0fC3170000, 0fC2FE0000, %p36;
+	selp.f32	%f407, %f405, %f46, %p36;
+	mov.b32 	 %r76, %f407;
+	and.b32  	%r77, %r76, 8388607;
+	or.b32  	%r78, %r77, 1065353216;
+	mov.b32 	 %f408, %r78;
+	shr.u32 	%r79, %r76, 23;
+	cvt.rn.f32.u32	%f409, %r79;
+	add.f32 	%f410, %f406, %f409;
+	setp.gt.f32	%p37, %f408, 0f3FB504F3;
+	mul.f32 	%f411, %f408, 0f3F000000;
+	add.f32 	%f412, %f410, 0f3F800000;
+	selp.f32	%f413, %f411, %f408, %p37;
+	selp.f32	%f414, %f412, %f410, %p37;
+	add.f32 	%f415, %f413, 0fBF800000;
+	add.f32 	%f401, %f413, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f400,%f401;
+	// inline asm
+	add.f32 	%f416, %f415, %f415;
+	mul.f32 	%f417, %f400, %f416;
+	mul.f32 	%f418, %f417, %f417;
+	fma.rn.f32 	%f421, %f1000, %f418, %f1001;
+	fma.rn.f32 	%f423, %f421, %f418, %f1002;
+	mul.rn.f32 	%f424, %f423, %f418;
+	mul.rn.f32 	%f425, %f424, %f417;
+	sub.f32 	%f426, %f415, %f417;
+	neg.f32 	%f427, %f417;
+	add.f32 	%f428, %f426, %f426;
+	fma.rn.f32 	%f429, %f427, %f415, %f428;
+	mul.rn.f32 	%f430, %f400, %f429;
+	add.f32 	%f431, %f425, %f417;
+	sub.f32 	%f432, %f417, %f431;
+	add.f32 	%f433, %f425, %f432;
+	add.f32 	%f434, %f430, %f433;
+	add.f32 	%f435, %f431, %f434;
+	sub.f32 	%f436, %f431, %f435;
+	add.f32 	%f437, %f434, %f436;
+	mul.rn.f32 	%f439, %f414, %f1003;
+	mul.rn.f32 	%f441, %f414, %f1004;
+	add.f32 	%f442, %f439, %f435;
+	sub.f32 	%f443, %f439, %f442;
+	add.f32 	%f444, %f435, %f443;
+	add.f32 	%f445, %f437, %f444;
+	add.f32 	%f446, %f441, %f445;
+	add.f32 	%f447, %f442, %f446;
+	sub.f32 	%f448, %f442, %f447;
+	add.f32 	%f449, %f446, %f448;
+	mov.f32 	%f450, 0f3EE8BA2E;
+	mul.rn.f32 	%f451, %f450, %f447;
+	neg.f32 	%f452, %f451;
+	fma.rn.f32 	%f453, %f450, %f447, %f452;
+	fma.rn.f32 	%f454, %f450, %f449, %f453;
+	mov.f32 	%f455, 0f00000000;
+	fma.rn.f32 	%f456, %f455, %f447, %f454;
+	add.rn.f32 	%f457, %f451, %f456;
+	neg.f32 	%f458, %f457;
+	add.rn.f32 	%f459, %f451, %f458;
+	add.rn.f32 	%f460, %f459, %f456;
+	mov.b32 	 %r80, %f457;
+	setp.eq.s32	%p38, %r80, 1118925336;
+	add.s32 	%r81, %r80, -1;
+	mov.b32 	 %f461, %r81;
+	add.f32 	%f462, %f460, 0f37000000;
+	selp.f32	%f463, %f461, %f457, %p38;
+	selp.f32	%f47, %f462, %f460, %p38;
+	mul.f32 	%f464, %f463, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f465, %f464;
+	fma.rn.f32 	%f467, %f465, %f1005, %f463;
+	fma.rn.f32 	%f469, %f465, %f1006, %f467;
+	mul.f32 	%f470, %f469, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f471, %f470;
+	add.f32 	%f472, %f465, 0f00000000;
+	ex2.approx.f32 	%f473, %f472;
+	mul.f32 	%f474, %f471, %f473;
+	setp.lt.f32	%p39, %f463, 0fC2D20000;
+	selp.f32	%f475, 0f00000000, %f474, %p39;
+	setp.gt.f32	%p40, %f463, 0f42D20000;
+	selp.f32	%f1068, 0f7F800000, %f475, %p40;
+	setp.eq.f32	%p41, %f1068, 0f7F800000;
+	@%p41 bra 	BB0_23;
+
+	fma.rn.f32 	%f1068, %f1068, %f47, %f1068;
+
+BB0_23:
+	mov.f32 	%f1034, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f1033, %f1034;
+	fma.rn.f32 	%f1032, %f1033, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f1031, %f1032;
+	setp.lt.f32	%p42, %f1067, 0f00000000;
+	setp.eq.f32	%p43, %f1031, 0f3F800000;
+	and.pred  	%p2, %p42, %p43;
+	mov.b32 	 %r82, %f1068;
+	xor.b32  	%r83, %r82, -2147483648;
+	mov.b32 	 %f476, %r83;
+	selp.f32	%f1070, %f476, %f1068, %p2;
+	setp.eq.f32	%p44, %f1067, 0f00000000;
+	@%p44 bra 	BB0_26;
+	bra.uni 	BB0_24;
+
+BB0_26:
+	add.f32 	%f479, %f1067, %f1067;
+	selp.f32	%f1070, %f479, 0f00000000, %p43;
+	bra.uni 	BB0_27;
+
+BB0_111:
+	mov.u64 	%rd272, image_HDR;
+	cvta.global.u64 	%rd267, %rd272;
+	mov.u32 	%r216, 8;
+	// inline asm
+	call (%rd266), _rt_buffer_get_64, (%rd267, %r31, %r216, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f969, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs172, %f969;}
+
+	// inline asm
+	mov.u16 	%rs173, 0;
+	st.v4.u16 	[%rd266], {%rs172, %rs172, %rs172, %rs173};
+
+BB0_112:
+	ld.global.u32 	%r217, [additive];
+	setp.eq.s32	%p126, %r217, 0;
+	@%p126 bra 	BB0_114;
+
+	mov.u64 	%rd285, image_RNM0;
+	cvta.global.u64 	%rd274, %rd285;
+	mov.u32 	%r221, 8;
+	// inline asm
+	call (%rd273), _rt_buffer_get_64, (%rd274, %r31, %r221, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs180, %rs181, %rs182, %rs183}, [%rd273];
+	// inline asm
+	{  cvt.f32.f16 %f970, %rs180;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f971, %rs181;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f972, %rs182;}
+
+	// inline asm
+	// inline asm
+	call (%rd279), _rt_buffer_get_64, (%rd274, %r31, %r221, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f973, %f970, 0f00000000;
+	add.f32 	%f974, %f971, 0f00000000;
+	add.f32 	%f975, %f972, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs179, %f975;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs178, %f974;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs177, %f973;}
+
+	// inline asm
+	mov.u16 	%rs184, 0;
+	st.v4.u16 	[%rd279], {%rs177, %rs178, %rs179, %rs184};
+	bra.uni 	BB0_115;
+
+BB0_114:
+	mov.u64 	%rd292, image_RNM0;
+	cvta.global.u64 	%rd287, %rd292;
+	mov.u32 	%r223, 8;
+	// inline asm
+	call (%rd286), _rt_buffer_get_64, (%rd287, %r31, %r223, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f976, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs185, %f976;}
+
+	// inline asm
+	mov.u16 	%rs186, 0;
+	st.v4.u16 	[%rd286], {%rs185, %rs185, %rs185, %rs186};
+
+BB0_115:
+	ld.global.u32 	%r224, [additive];
+	setp.eq.s32	%p127, %r224, 0;
+	@%p127 bra 	BB0_117;
+
+	mov.u64 	%rd305, image_RNM1;
+	cvta.global.u64 	%rd294, %rd305;
+	mov.u32 	%r228, 8;
+	// inline asm
+	call (%rd293), _rt_buffer_get_64, (%rd294, %r31, %r228, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs193, %rs194, %rs195, %rs196}, [%rd293];
+	// inline asm
+	{  cvt.f32.f16 %f977, %rs193;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f978, %rs194;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f979, %rs195;}
+
+	// inline asm
+	// inline asm
+	call (%rd299), _rt_buffer_get_64, (%rd294, %r31, %r228, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f980, %f977, 0f00000000;
+	add.f32 	%f981, %f978, 0f00000000;
+	add.f32 	%f982, %f979, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs192, %f982;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs191, %f981;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs190, %f980;}
+
+	// inline asm
+	mov.u16 	%rs197, 0;
+	st.v4.u16 	[%rd299], {%rs190, %rs191, %rs192, %rs197};
+	bra.uni 	BB0_118;
+
+BB0_117:
+	mov.u64 	%rd312, image_RNM1;
+	cvta.global.u64 	%rd307, %rd312;
+	mov.u32 	%r230, 8;
+	// inline asm
+	call (%rd306), _rt_buffer_get_64, (%rd307, %r31, %r230, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f983, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs198, %f983;}
+
+	// inline asm
+	mov.u16 	%rs199, 0;
+	st.v4.u16 	[%rd306], {%rs198, %rs198, %rs198, %rs199};
+
+BB0_118:
+	ld.global.u32 	%r231, [additive];
+	setp.eq.s32	%p128, %r231, 0;
+	@%p128 bra 	BB0_120;
+
+	mov.u64 	%rd325, image_RNM2;
+	cvta.global.u64 	%rd314, %rd325;
+	mov.u32 	%r235, 8;
+	// inline asm
+	call (%rd313), _rt_buffer_get_64, (%rd314, %r31, %r235, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs206, %rs207, %rs208, %rs209}, [%rd313];
+	// inline asm
+	{  cvt.f32.f16 %f984, %rs206;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f985, %rs207;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f986, %rs208;}
+
+	// inline asm
+	// inline asm
+	call (%rd319), _rt_buffer_get_64, (%rd314, %r31, %r235, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f987, %f984, 0f00000000;
+	add.f32 	%f988, %f985, 0f00000000;
+	add.f32 	%f989, %f986, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs205, %f989;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs204, %f988;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs203, %f987;}
+
+	// inline asm
+	mov.u16 	%rs210, 0;
+	st.v4.u16 	[%rd319], {%rs203, %rs204, %rs205, %rs210};
+	bra.uni 	BB0_121;
+
+BB0_120:
+	mov.u64 	%rd332, image_RNM2;
+	cvta.global.u64 	%rd327, %rd332;
+	mov.u32 	%r237, 8;
+	// inline asm
+	call (%rd326), _rt_buffer_get_64, (%rd327, %r31, %r237, %rd12, %rd13, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f990, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs211, %f990;}
+
+	// inline asm
+	mov.u16 	%rs212, 0;
+	st.v4.u16 	[%rd326], {%rs211, %rs211, %rs211, %rs212};
+	bra.uni 	BB0_121;
+
+BB0_94:
+	mov.u64 	%rd178, image_HDR;
+	cvta.global.u64 	%rd173, %rd178;
+	mov.u32 	%r180, 8;
+	// inline asm
+	call (%rd172), _rt_buffer_get_64, (%rd173, %r31, %r180, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f935, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs121, %f935;}
+
+	// inline asm
+	st.v4.u16 	[%rd172], {%rs121, %rs121, %rs121, %rs110};
+
+BB0_95:
+	ld.global.u32 	%r181, [additive];
+	setp.eq.s32	%p119, %r181, 0;
+	mov.f32 	%f936, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs122, %f936;}
+
+	// inline asm
+	@%p119 bra 	BB0_97;
+
+	mov.u64 	%rd191, image_RNM0;
+	cvta.global.u64 	%rd180, %rd191;
+	mov.u32 	%r185, 8;
+	// inline asm
+	call (%rd179), _rt_buffer_get_64, (%rd180, %r31, %r185, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs129, %rs130, %rs131, %rs132}, [%rd179];
+	// inline asm
+	{  cvt.f32.f16 %f937, %rs129;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f938, %rs130;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f939, %rs131;}
+
+	// inline asm
+	// inline asm
+	call (%rd185), _rt_buffer_get_64, (%rd180, %r31, %r185, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f940, %f937, 0f00000000;
+	add.f32 	%f941, %f938, 0f00000000;
+	add.f32 	%f942, %f939, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs128, %f942;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs127, %f941;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs126, %f940;}
+
+	// inline asm
+	st.v4.u16 	[%rd185], {%rs126, %rs127, %rs128, %rs122};
+	bra.uni 	BB0_98;
+
+BB0_97:
+	mov.u64 	%rd198, image_RNM0;
+	cvta.global.u64 	%rd193, %rd198;
+	mov.u32 	%r187, 8;
+	// inline asm
+	call (%rd192), _rt_buffer_get_64, (%rd193, %r31, %r187, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f943, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs133, %f943;}
+
+	// inline asm
+	st.v4.u16 	[%rd192], {%rs133, %rs133, %rs133, %rs122};
+
+BB0_98:
+	ld.global.u32 	%r188, [additive];
+	setp.eq.s32	%p120, %r188, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs134, %f936;}
+
+	// inline asm
+	@%p120 bra 	BB0_100;
+
+	mov.u64 	%rd211, image_RNM1;
+	cvta.global.u64 	%rd200, %rd211;
+	mov.u32 	%r192, 8;
+	// inline asm
+	call (%rd199), _rt_buffer_get_64, (%rd200, %r31, %r192, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs141, %rs142, %rs143, %rs144}, [%rd199];
+	// inline asm
+	{  cvt.f32.f16 %f945, %rs141;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f946, %rs142;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f947, %rs143;}
+
+	// inline asm
+	// inline asm
+	call (%rd205), _rt_buffer_get_64, (%rd200, %r31, %r192, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f948, %f945, 0f00000000;
+	add.f32 	%f949, %f946, 0f00000000;
+	add.f32 	%f950, %f947, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs140, %f950;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs139, %f949;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs138, %f948;}
+
+	// inline asm
+	st.v4.u16 	[%rd205], {%rs138, %rs139, %rs140, %rs134};
+	bra.uni 	BB0_101;
+
+BB0_100:
+	mov.u64 	%rd218, image_RNM1;
+	cvta.global.u64 	%rd213, %rd218;
+	mov.u32 	%r194, 8;
+	// inline asm
+	call (%rd212), _rt_buffer_get_64, (%rd213, %r31, %r194, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f951, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs145, %f951;}
+
+	// inline asm
+	st.v4.u16 	[%rd212], {%rs145, %rs145, %rs145, %rs134};
+
+BB0_101:
+	ld.global.u32 	%r195, [additive];
+	setp.eq.s32	%p121, %r195, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs146, %f936;}
+
+	// inline asm
+	@%p121 bra 	BB0_103;
+
+	mov.u64 	%rd231, image_RNM2;
+	cvta.global.u64 	%rd220, %rd231;
+	mov.u32 	%r199, 8;
+	// inline asm
+	call (%rd219), _rt_buffer_get_64, (%rd220, %r31, %r199, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs153, %rs154, %rs155, %rs156}, [%rd219];
+	// inline asm
+	{  cvt.f32.f16 %f953, %rs153;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f954, %rs154;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f955, %rs155;}
+
+	// inline asm
+	// inline asm
+	call (%rd225), _rt_buffer_get_64, (%rd220, %r31, %r199, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f956, %f953, 0f00000000;
+	add.f32 	%f957, %f954, 0f00000000;
+	add.f32 	%f958, %f955, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs152, %f958;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs151, %f957;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs150, %f956;}
+
+	// inline asm
+	st.v4.u16 	[%rd225], {%rs150, %rs151, %rs152, %rs146};
+	bra.uni 	BB0_121;
+
+BB0_103:
+	mov.u64 	%rd238, image_RNM2;
+	cvta.global.u64 	%rd233, %rd238;
+	mov.u32 	%r201, 8;
+	// inline asm
+	call (%rd232), _rt_buffer_get_64, (%rd233, %r31, %r201, %rd10, %rd11, %rd19, %rd19);
+	// inline asm
+	mov.f32 	%f959, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs157, %f959;}
+
+	// inline asm
+	st.v4.u16 	[%rd232], {%rs157, %rs157, %rs157, %rs146};
+	bra.uni 	BB0_121;
+
+BB0_24:
+	setp.geu.f32	%p45, %f1067, 0f00000000;
+	@%p45 bra 	BB0_27;
+
+	mov.f32 	%f1038, 0f3EE8BA2E;
+	cvt.rzi.f32.f32	%f478, %f1038;
+	setp.neu.f32	%p46, %f478, 0f3EE8BA2E;
+	selp.f32	%f1070, 0f7FFFFFFF, %f1070, %p46;
+
+BB0_27:
+	abs.f32 	%f1035, %f1067;
+	add.f32 	%f480, %f1035, 0f3EE8BA2E;
+	mov.b32 	 %r84, %f480;
+	setp.lt.s32	%p48, %r84, 2139095040;
+	@%p48 bra 	BB0_32;
+
+	abs.f32 	%f1036, %f1067;
+	setp.gtu.f32	%p49, %f1036, 0f7F800000;
+	@%p49 bra 	BB0_31;
+	bra.uni 	BB0_29;
+
+BB0_31:
+	add.f32 	%f1070, %f1067, 0f3EE8BA2E;
+	bra.uni 	BB0_32;
+
+BB0_29:
+	abs.f32 	%f1037, %f1067;
+	setp.neu.f32	%p50, %f1037, 0f7F800000;
+	@%p50 bra 	BB0_32;
+
+	selp.f32	%f1070, 0fFF800000, 0f7F800000, %p2;
+
+BB0_32:
+	mul.f32 	%f481, %f1070, 0f437F0000;
+	setp.eq.f32	%p51, %f1067, 0f3F800000;
+	selp.f32	%f482, 0f437F0000, %f481, %p51;
+	cvt.rzi.u32.f32	%r85, %f482;
+	cvt.u16.u32	%rs17, %r85;
+	mov.u16 	%rs18, 255;
+	st.v2.u8 	[%rd30], {%rs17, %rs18};
+	ld.global.u32 	%r245, [imageEnabled];
+
+BB0_33:
+	and.b32  	%r86, %r245, 1;
+	setp.eq.b32	%p52, %r86, 1;
+	@!%p52 bra 	BB0_68;
+	bra.uni 	BB0_34;
+
+BB0_34:
+	mov.f32 	%f1013, 0fB5BFBE8E;
+	mov.f32 	%f1012, 0fBF317200;
+	mov.f32 	%f1011, 0f35BFBE8E;
+	mov.f32 	%f1010, 0f3F317200;
+	mov.f32 	%f1009, 0f3DAAAABD;
+	mov.f32 	%f1008, 0f3C4CAF63;
+	mov.f32 	%f1007, 0f3B18F0FE;
+	abs.f32 	%f59, %f42;
+	setp.lt.f32	%p53, %f59, 0f00800000;
+	mul.f32 	%f488, %f59, 0f4B800000;
+	selp.f32	%f489, 0fC3170000, 0fC2FE0000, %p53;
+	selp.f32	%f490, %f488, %f59, %p53;
+	mov.b32 	 %r87, %f490;
+	and.b32  	%r88, %r87, 8388607;
+	or.b32  	%r89, %r88, 1065353216;
+	mov.b32 	 %f491, %r89;
+	shr.u32 	%r90, %r87, 23;
+	cvt.rn.f32.u32	%f492, %r90;
+	add.f32 	%f493, %f489, %f492;
+	setp.gt.f32	%p54, %f491, 0f3FB504F3;
+	mul.f32 	%f494, %f491, 0f3F000000;
+	add.f32 	%f495, %f493, 0f3F800000;
+	selp.f32	%f496, %f494, %f491, %p54;
+	selp.f32	%f497, %f495, %f493, %p54;
+	add.f32 	%f498, %f496, 0fBF800000;
+	add.f32 	%f484, %f496, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f483,%f484;
+	// inline asm
+	add.f32 	%f499, %f498, %f498;
+	mul.f32 	%f500, %f483, %f499;
+	mul.f32 	%f501, %f500, %f500;
+	fma.rn.f32 	%f504, %f1007, %f501, %f1008;
+	fma.rn.f32 	%f506, %f504, %f501, %f1009;
+	mul.rn.f32 	%f507, %f506, %f501;
+	mul.rn.f32 	%f508, %f507, %f500;
+	sub.f32 	%f509, %f498, %f500;
+	neg.f32 	%f510, %f500;
+	add.f32 	%f511, %f509, %f509;
+	fma.rn.f32 	%f512, %f510, %f498, %f511;
+	mul.rn.f32 	%f513, %f483, %f512;
+	add.f32 	%f514, %f508, %f500;
+	sub.f32 	%f515, %f500, %f514;
+	add.f32 	%f516, %f508, %f515;
+	add.f32 	%f517, %f513, %f516;
+	add.f32 	%f518, %f514, %f517;
+	sub.f32 	%f519, %f514, %f518;
+	add.f32 	%f520, %f517, %f519;
+	mul.rn.f32 	%f522, %f497, %f1010;
+	mul.rn.f32 	%f524, %f497, %f1011;
+	add.f32 	%f525, %f522, %f518;
+	sub.f32 	%f526, %f522, %f525;
+	add.f32 	%f527, %f518, %f526;
+	add.f32 	%f528, %f520, %f527;
+	add.f32 	%f529, %f524, %f528;
+	add.f32 	%f530, %f525, %f529;
+	sub.f32 	%f531, %f525, %f530;
+	add.f32 	%f532, %f529, %f531;
+	mov.f32 	%f533, 0f3EE66666;
+	mul.rn.f32 	%f534, %f533, %f530;
+	neg.f32 	%f535, %f534;
+	fma.rn.f32 	%f536, %f533, %f530, %f535;
+	fma.rn.f32 	%f537, %f533, %f532, %f536;
+	mov.f32 	%f538, 0f00000000;
+	fma.rn.f32 	%f539, %f538, %f530, %f537;
+	add.rn.f32 	%f540, %f534, %f539;
+	neg.f32 	%f541, %f540;
+	add.rn.f32 	%f542, %f534, %f541;
+	add.rn.f32 	%f543, %f542, %f539;
+	mov.b32 	 %r91, %f540;
+	setp.eq.s32	%p55, %r91, 1118925336;
+	add.s32 	%r92, %r91, -1;
+	mov.b32 	 %f544, %r92;
+	add.f32 	%f545, %f543, 0f37000000;
+	selp.f32	%f546, %f544, %f540, %p55;
+	selp.f32	%f60, %f545, %f543, %p55;
+	mul.f32 	%f547, %f546, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f548, %f547;
+	fma.rn.f32 	%f550, %f548, %f1012, %f546;
+	fma.rn.f32 	%f552, %f548, %f1013, %f550;
+	mul.f32 	%f553, %f552, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f554, %f553;
+	add.f32 	%f555, %f548, 0f00000000;
+	ex2.approx.f32 	%f556, %f555;
+	mul.f32 	%f557, %f554, %f556;
+	setp.lt.f32	%p56, %f546, 0fC2D20000;
+	selp.f32	%f558, 0f00000000, %f557, %p56;
+	setp.gt.f32	%p57, %f546, 0f42D20000;
+	selp.f32	%f1071, 0f7F800000, %f558, %p57;
+	setp.eq.f32	%p58, %f1071, 0f7F800000;
+	@%p58 bra 	BB0_36;
+
+	fma.rn.f32 	%f1071, %f1071, %f60, %f1071;
+
+BB0_36:
+	mov.f32 	%f1042, 0f3E666666;
+	cvt.rzi.f32.f32	%f1041, %f1042;
+	fma.rn.f32 	%f1040, %f1041, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f1039, %f1040;
+	setp.lt.f32	%p59, %f42, 0f00000000;
+	setp.eq.f32	%p60, %f1039, 0f3F800000;
+	and.pred  	%p3, %p59, %p60;
+	mov.b32 	 %r93, %f1071;
+	xor.b32  	%r94, %r93, -2147483648;
+	mov.b32 	 %f559, %r94;
+	selp.f32	%f1073, %f559, %f1071, %p3;
+	setp.eq.f32	%p61, %f42, 0f00000000;
+	@%p61 bra 	BB0_39;
+	bra.uni 	BB0_37;
+
+BB0_39:
+	add.f32 	%f562, %f42, %f42;
+	selp.f32	%f1073, %f562, 0f00000000, %p60;
+	bra.uni 	BB0_40;
+
+BB0_37:
+	setp.geu.f32	%p62, %f42, 0f00000000;
+	@%p62 bra 	BB0_40;
+
+	mov.f32 	%f1052, 0f3EE66666;
+	cvt.rzi.f32.f32	%f561, %f1052;
+	setp.neu.f32	%p63, %f561, 0f3EE66666;
+	selp.f32	%f1073, 0f7FFFFFFF, %f1073, %p63;
+
+BB0_40:
+	abs.f32 	%f1043, %f42;
+	add.f32 	%f563, %f1043, 0f3EE66666;
+	mov.b32 	 %r95, %f563;
+	setp.lt.s32	%p65, %r95, 2139095040;
+	@%p65 bra 	BB0_45;
+
+	abs.f32 	%f1050, %f42;
+	setp.gtu.f32	%p66, %f1050, 0f7F800000;
+	@%p66 bra 	BB0_44;
+	bra.uni 	BB0_42;
+
+BB0_44:
+	add.f32 	%f1073, %f42, 0f3EE66666;
+	bra.uni 	BB0_45;
+
+BB0_42:
+	abs.f32 	%f1051, %f42;
+	setp.neu.f32	%p67, %f1051, 0f7F800000;
+	@%p67 bra 	BB0_45;
+
+	selp.f32	%f1073, 0fFF800000, 0f7F800000, %p3;
+
+BB0_45:
+	mov.f32 	%f1045, 0f00000000;
+	mov.f32 	%f1044, 0f3EE66666;
+	mov.f32 	%f1020, 0fB5BFBE8E;
+	mov.f32 	%f1019, 0fBF317200;
+	mov.f32 	%f1018, 0f35BFBE8E;
+	mov.f32 	%f1017, 0f3F317200;
+	mov.f32 	%f1016, 0f3DAAAABD;
+	mov.f32 	%f1015, 0f3C4CAF63;
+	mov.f32 	%f1014, 0f3B18F0FE;
+	setp.eq.f32	%p68, %f42, 0f3F800000;
+	selp.f32	%f71, 0f3F800000, %f1073, %p68;
+	abs.f32 	%f72, %f43;
+	setp.lt.f32	%p69, %f72, 0f00800000;
+	mul.f32 	%f566, %f72, 0f4B800000;
+	selp.f32	%f567, 0fC3170000, 0fC2FE0000, %p69;
+	selp.f32	%f568, %f566, %f72, %p69;
+	mov.b32 	 %r96, %f568;
+	and.b32  	%r97, %r96, 8388607;
+	or.b32  	%r98, %r97, 1065353216;
+	mov.b32 	 %f569, %r98;
+	shr.u32 	%r99, %r96, 23;
+	cvt.rn.f32.u32	%f570, %r99;
+	add.f32 	%f571, %f567, %f570;
+	setp.gt.f32	%p70, %f569, 0f3FB504F3;
+	mul.f32 	%f572, %f569, 0f3F000000;
+	add.f32 	%f573, %f571, 0f3F800000;
+	selp.f32	%f574, %f572, %f569, %p70;
+	selp.f32	%f575, %f573, %f571, %p70;
+	add.f32 	%f576, %f574, 0fBF800000;
+	add.f32 	%f565, %f574, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f564,%f565;
+	// inline asm
+	add.f32 	%f577, %f576, %f576;
+	mul.f32 	%f578, %f564, %f577;
+	mul.f32 	%f579, %f578, %f578;
+	fma.rn.f32 	%f582, %f1014, %f579, %f1015;
+	fma.rn.f32 	%f584, %f582, %f579, %f1016;
+	mul.rn.f32 	%f585, %f584, %f579;
+	mul.rn.f32 	%f586, %f585, %f578;
+	sub.f32 	%f587, %f576, %f578;
+	neg.f32 	%f588, %f578;
+	add.f32 	%f589, %f587, %f587;
+	fma.rn.f32 	%f590, %f588, %f576, %f589;
+	mul.rn.f32 	%f591, %f564, %f590;
+	add.f32 	%f592, %f586, %f578;
+	sub.f32 	%f593, %f578, %f592;
+	add.f32 	%f594, %f586, %f593;
+	add.f32 	%f595, %f591, %f594;
+	add.f32 	%f596, %f592, %f595;
+	sub.f32 	%f597, %f592, %f596;
+	add.f32 	%f598, %f595, %f597;
+	mul.rn.f32 	%f600, %f575, %f1017;
+	mul.rn.f32 	%f602, %f575, %f1018;
+	add.f32 	%f603, %f600, %f596;
+	sub.f32 	%f604, %f600, %f603;
+	add.f32 	%f605, %f596, %f604;
+	add.f32 	%f606, %f598, %f605;
+	add.f32 	%f607, %f602, %f606;
+	add.f32 	%f608, %f603, %f607;
+	sub.f32 	%f609, %f603, %f608;
+	add.f32 	%f610, %f607, %f609;
+	mul.rn.f32 	%f612, %f1044, %f608;
+	neg.f32 	%f613, %f612;
+	fma.rn.f32 	%f614, %f1044, %f608, %f613;
+	fma.rn.f32 	%f615, %f1044, %f610, %f614;
+	fma.rn.f32 	%f617, %f1045, %f608, %f615;
+	add.rn.f32 	%f618, %f612, %f617;
+	neg.f32 	%f619, %f618;
+	add.rn.f32 	%f620, %f612, %f619;
+	add.rn.f32 	%f621, %f620, %f617;
+	mov.b32 	 %r100, %f618;
+	setp.eq.s32	%p71, %r100, 1118925336;
+	add.s32 	%r101, %r100, -1;
+	mov.b32 	 %f622, %r101;
+	add.f32 	%f623, %f621, 0f37000000;
+	selp.f32	%f624, %f622, %f618, %p71;
+	selp.f32	%f73, %f623, %f621, %p71;
+	mul.f32 	%f625, %f624, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f626, %f625;
+	fma.rn.f32 	%f628, %f626, %f1019, %f624;
+	fma.rn.f32 	%f630, %f626, %f1020, %f628;
+	mul.f32 	%f631, %f630, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f632, %f631;
+	add.f32 	%f633, %f626, 0f00000000;
+	ex2.approx.f32 	%f634, %f633;
+	mul.f32 	%f635, %f632, %f634;
+	setp.lt.f32	%p72, %f624, 0fC2D20000;
+	selp.f32	%f636, 0f00000000, %f635, %p72;
+	setp.gt.f32	%p73, %f624, 0f42D20000;
+	selp.f32	%f1074, 0f7F800000, %f636, %p73;
+	setp.eq.f32	%p74, %f1074, 0f7F800000;
+	@%p74 bra 	BB0_47;
+
+	fma.rn.f32 	%f1074, %f1074, %f73, %f1074;
+
+BB0_47:
+	setp.lt.f32	%p75, %f43, 0f00000000;
+	and.pred  	%p4, %p75, %p60;
+	mov.b32 	 %r102, %f1074;
+	xor.b32  	%r103, %r102, -2147483648;
+	mov.b32 	 %f637, %r103;
+	selp.f32	%f1076, %f637, %f1074, %p4;
+	setp.eq.f32	%p77, %f43, 0f00000000;
+	@%p77 bra 	BB0_50;
+	bra.uni 	BB0_48;
+
+BB0_50:
+	add.f32 	%f640, %f43, %f43;
+	selp.f32	%f1076, %f640, 0f00000000, %p60;
+	bra.uni 	BB0_51;
+
+BB0_48:
+	setp.geu.f32	%p78, %f43, 0f00000000;
+	@%p78 bra 	BB0_51;
+
+	mov.f32 	%f1049, 0f3EE66666;
+	cvt.rzi.f32.f32	%f639, %f1049;
+	setp.neu.f32	%p79, %f639, 0f3EE66666;
+	selp.f32	%f1076, 0f7FFFFFFF, %f1076, %p79;
+
+BB0_51:
+	abs.f32 	%f1053, %f43;
+	add.f32 	%f641, %f1053, 0f3EE66666;
+	mov.b32 	 %r104, %f641;
+	setp.lt.s32	%p81, %r104, 2139095040;
+	@%p81 bra 	BB0_56;
+
+	abs.f32 	%f1054, %f43;
+	setp.gtu.f32	%p82, %f1054, 0f7F800000;
+	@%p82 bra 	BB0_55;
+	bra.uni 	BB0_53;
+
+BB0_55:
+	add.f32 	%f1076, %f43, 0f3EE66666;
+	bra.uni 	BB0_56;
+
+BB0_53:
+	abs.f32 	%f1055, %f43;
+	setp.neu.f32	%p83, %f1055, 0f7F800000;
+	@%p83 bra 	BB0_56;
+
+	selp.f32	%f1076, 0fFF800000, 0f7F800000, %p4;
+
+BB0_56:
+	mov.f32 	%f1047, 0f00000000;
+	mov.f32 	%f1046, 0f3EE66666;
+	mov.f32 	%f1027, 0fB5BFBE8E;
+	mov.f32 	%f1026, 0fBF317200;
+	mov.f32 	%f1025, 0f35BFBE8E;
+	mov.f32 	%f1024, 0f3F317200;
+	mov.f32 	%f1023, 0f3DAAAABD;
+	mov.f32 	%f1022, 0f3C4CAF63;
+	mov.f32 	%f1021, 0f3B18F0FE;
+	setp.eq.f32	%p84, %f43, 0f3F800000;
+	selp.f32	%f84, 0f3F800000, %f1076, %p84;
+	abs.f32 	%f85, %f44;
+	setp.lt.f32	%p85, %f85, 0f00800000;
+	mul.f32 	%f644, %f85, 0f4B800000;
+	selp.f32	%f645, 0fC3170000, 0fC2FE0000, %p85;
+	selp.f32	%f646, %f644, %f85, %p85;
+	mov.b32 	 %r105, %f646;
+	and.b32  	%r106, %r105, 8388607;
+	or.b32  	%r107, %r106, 1065353216;
+	mov.b32 	 %f647, %r107;
+	shr.u32 	%r108, %r105, 23;
+	cvt.rn.f32.u32	%f648, %r108;
+	add.f32 	%f649, %f645, %f648;
+	setp.gt.f32	%p86, %f647, 0f3FB504F3;
+	mul.f32 	%f650, %f647, 0f3F000000;
+	add.f32 	%f651, %f649, 0f3F800000;
+	selp.f32	%f652, %f650, %f647, %p86;
+	selp.f32	%f653, %f651, %f649, %p86;
+	add.f32 	%f654, %f652, 0fBF800000;
+	add.f32 	%f643, %f652, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f642,%f643;
+	// inline asm
+	add.f32 	%f655, %f654, %f654;
+	mul.f32 	%f656, %f642, %f655;
+	mul.f32 	%f657, %f656, %f656;
+	fma.rn.f32 	%f660, %f1021, %f657, %f1022;
+	fma.rn.f32 	%f662, %f660, %f657, %f1023;
+	mul.rn.f32 	%f663, %f662, %f657;
+	mul.rn.f32 	%f664, %f663, %f656;
+	sub.f32 	%f665, %f654, %f656;
+	neg.f32 	%f666, %f656;
+	add.f32 	%f667, %f665, %f665;
+	fma.rn.f32 	%f668, %f666, %f654, %f667;
+	mul.rn.f32 	%f669, %f642, %f668;
+	add.f32 	%f670, %f664, %f656;
+	sub.f32 	%f671, %f656, %f670;
+	add.f32 	%f672, %f664, %f671;
+	add.f32 	%f673, %f669, %f672;
+	add.f32 	%f674, %f670, %f673;
+	sub.f32 	%f675, %f670, %f674;
+	add.f32 	%f676, %f673, %f675;
+	mul.rn.f32 	%f678, %f653, %f1024;
+	mul.rn.f32 	%f680, %f653, %f1025;
+	add.f32 	%f681, %f678, %f674;
+	sub.f32 	%f682, %f678, %f681;
+	add.f32 	%f683, %f674, %f682;
+	add.f32 	%f684, %f676, %f683;
+	add.f32 	%f685, %f680, %f684;
+	add.f32 	%f686, %f681, %f685;
+	sub.f32 	%f687, %f681, %f686;
+	add.f32 	%f688, %f685, %f687;
+	mul.rn.f32 	%f690, %f1046, %f686;
+	neg.f32 	%f691, %f690;
+	fma.rn.f32 	%f692, %f1046, %f686, %f691;
+	fma.rn.f32 	%f693, %f1046, %f688, %f692;
+	fma.rn.f32 	%f695, %f1047, %f686, %f693;
+	add.rn.f32 	%f696, %f690, %f695;
+	neg.f32 	%f697, %f696;
+	add.rn.f32 	%f698, %f690, %f697;
+	add.rn.f32 	%f699, %f698, %f695;
+	mov.b32 	 %r109, %f696;
+	setp.eq.s32	%p87, %r109, 1118925336;
+	add.s32 	%r110, %r109, -1;
+	mov.b32 	 %f700, %r110;
+	add.f32 	%f701, %f699, 0f37000000;
+	selp.f32	%f702, %f700, %f696, %p87;
+	selp.f32	%f86, %f701, %f699, %p87;
+	mul.f32 	%f703, %f702, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f704, %f703;
+	fma.rn.f32 	%f706, %f704, %f1026, %f702;
+	fma.rn.f32 	%f708, %f704, %f1027, %f706;
+	mul.f32 	%f709, %f708, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f710, %f709;
+	add.f32 	%f711, %f704, 0f00000000;
+	ex2.approx.f32 	%f712, %f711;
+	mul.f32 	%f713, %f710, %f712;
+	setp.lt.f32	%p88, %f702, 0fC2D20000;
+	selp.f32	%f714, 0f00000000, %f713, %p88;
+	setp.gt.f32	%p89, %f702, 0f42D20000;
+	selp.f32	%f1077, 0f7F800000, %f714, %p89;
+	setp.eq.f32	%p90, %f1077, 0f7F800000;
+	@%p90 bra 	BB0_58;
+
+	fma.rn.f32 	%f1077, %f1077, %f86, %f1077;
+
+BB0_58:
+	setp.lt.f32	%p91, %f44, 0f00000000;
+	and.pred  	%p5, %p91, %p60;
+	mov.b32 	 %r111, %f1077;
+	xor.b32  	%r112, %r111, -2147483648;
+	mov.b32 	 %f715, %r112;
+	selp.f32	%f1079, %f715, %f1077, %p5;
+	setp.eq.f32	%p93, %f44, 0f00000000;
+	@%p93 bra 	BB0_61;
+	bra.uni 	BB0_59;
+
+BB0_61:
+	add.f32 	%f718, %f44, %f44;
+	selp.f32	%f1079, %f718, 0f00000000, %p60;
+	bra.uni 	BB0_62;
+
+BB0_59:
+	setp.geu.f32	%p94, %f44, 0f00000000;
+	@%p94 bra 	BB0_62;
+
+	mov.f32 	%f1048, 0f3EE66666;
+	cvt.rzi.f32.f32	%f717, %f1048;
+	setp.neu.f32	%p95, %f717, 0f3EE66666;
+	selp.f32	%f1079, 0f7FFFFFFF, %f1079, %p95;
+
+BB0_62:
+	abs.f32 	%f1056, %f44;
+	add.f32 	%f719, %f1056, 0f3EE66666;
+	mov.b32 	 %r113, %f719;
+	setp.lt.s32	%p97, %r113, 2139095040;
+	@%p97 bra 	BB0_67;
+
+	abs.f32 	%f1057, %f44;
+	setp.gtu.f32	%p98, %f1057, 0f7F800000;
+	@%p98 bra 	BB0_66;
+	bra.uni 	BB0_64;
+
+BB0_66:
+	add.f32 	%f1079, %f44, 0f3EE66666;
+	bra.uni 	BB0_67;
+
+BB0_64:
+	abs.f32 	%f1058, %f44;
+	setp.neu.f32	%p99, %f1058, 0f7F800000;
+	@%p99 bra 	BB0_67;
+
+	selp.f32	%f1079, 0fFF800000, 0f7F800000, %p5;
+
+BB0_67:
+	mov.u32 	%r238, 4;
+	setp.eq.f32	%p100, %f44, 0f3F800000;
+	selp.f32	%f720, 0f3F800000, %f1079, %p100;
+	cvt.u64.u32	%rd40, %r3;
+	cvt.u64.u32	%rd39, %r2;
+	mov.u64 	%rd43, image;
+	cvta.global.u64 	%rd38, %rd43;
+	// inline asm
+	call (%rd37), _rt_buffer_get_64, (%rd38, %r31, %r238, %rd39, %rd40, %rd19, %rd19);
+	// inline asm
+	cvt.sat.f32.f32	%f721, %f720;
+	mul.f32 	%f722, %f721, 0f437FFD71;
+	cvt.rzi.u32.f32	%r116, %f722;
+	cvt.sat.f32.f32	%f723, %f84;
+	mul.f32 	%f724, %f723, 0f437FFD71;
+	cvt.rzi.u32.f32	%r117, %f724;
+	cvt.sat.f32.f32	%f725, %f71;
+	mul.f32 	%f726, %f725, 0f437FFD71;
+	cvt.rzi.u32.f32	%r118, %f726;
+	cvt.u16.u32	%rs19, %r116;
+	cvt.u16.u32	%rs20, %r118;
+	cvt.u16.u32	%rs21, %r117;
+	mov.u16 	%rs22, 255;
+	st.v4.u8 	[%rd37], {%rs19, %rs21, %rs20, %rs22};
+	ld.global.u32 	%r245, [imageEnabled];
+
+BB0_68:
+	and.b32  	%r119, %r245, 4;
+	setp.eq.s32	%p101, %r119, 0;
+	@%p101 bra 	BB0_72;
+
+	ld.global.u32 	%r120, [additive];
+	setp.eq.s32	%p102, %r120, 0;
+	cvt.u64.u32	%rd3, %r2;
+	cvt.u64.u32	%rd4, %r3;
+	mov.f32 	%f727, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs23, %f727;}
+
+	// inline asm
+	@%p102 bra 	BB0_71;
+
+	mov.u64 	%rd56, image_HDR;
+	cvta.global.u64 	%rd45, %rd56;
+	mov.u32 	%r124, 8;
+	// inline asm
+	call (%rd44), _rt_buffer_get_64, (%rd45, %r31, %r124, %rd3, %rd4, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd44];
+	// inline asm
+	{  cvt.f32.f16 %f728, %rs30;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f729, %rs31;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f730, %rs32;}
+
+	// inline asm
+	// inline asm
+	call (%rd50), _rt_buffer_get_64, (%rd45, %r31, %r124, %rd3, %rd4, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f731, %f42, %f728;
+	add.f32 	%f732, %f43, %f729;
+	add.f32 	%f733, %f44, %f730;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs29, %f733;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs28, %f732;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs27, %f731;}
+
+	// inline asm
+	st.v4.u16 	[%rd50], {%rs27, %rs28, %rs29, %rs23};
+	bra.uni 	BB0_72;
+
+BB0_71:
+	mov.u64 	%rd63, image_HDR;
+	cvta.global.u64 	%rd58, %rd63;
+	mov.u32 	%r126, 8;
+	// inline asm
+	call (%rd57), _rt_buffer_get_64, (%rd58, %r31, %r126, %rd3, %rd4, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs36, %f44;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs35, %f43;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs34, %f42;}
+
+	// inline asm
+	st.v4.u16 	[%rd57], {%rs34, %rs35, %rs36, %rs23};
+
+BB0_72:
+	mov.u32 	%r239, 4;
+	mul.f32 	%f740, %f28, %f1067;
+	ld.global.f32 	%f741, [lightColor];
+	mul.f32 	%f742, %f740, %f741;
+	ld.global.f32 	%f743, [lightColor+4];
+	mul.f32 	%f744, %f740, %f743;
+	ld.global.f32 	%f745, [lightColor+8];
+	mul.f32 	%f746, %f740, %f745;
+	mul.f32 	%f97, %f248, %f742;
+	mul.f32 	%f98, %f249, %f744;
+	mul.f32 	%f99, %f250, %f746;
+	ld.global.v2.u32 	{%r129, %r130}, [pixelID];
+	cvt.u64.u32	%rd66, %r129;
+	cvt.u64.u32	%rd67, %r130;
+	mov.u64 	%rd70, uvtangent;
+	cvta.global.u64 	%rd65, %rd70;
+	// inline asm
+	call (%rd64), _rt_buffer_get_64, (%rd65, %r31, %r239, %rd66, %rd67, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r15, [%rd64];
+	shr.u32 	%r16, %r15, 16;
+	cvt.u16.u32	%rs37, %r16;
+	and.b16  	%rs38, %rs37, 255;
+	cvt.u16.u32	%rs39, %r15;
+	or.b16  	%rs40, %rs39, %rs38;
+	setp.eq.s16	%p103, %rs40, 0;
+	mov.f32 	%f1086, 0f00000000;
+	mov.f32 	%f1080, %f1086;
+	mov.f32 	%f1081, %f1086;
+	mov.f32 	%f1082, %f1086;
+	@%p103 bra 	BB0_74;
+
+	ld.u8 	%rs41, [%rd64+1];
+	and.b16  	%rs43, %rs39, 255;
+	cvt.rn.f32.u16	%f747, %rs43;
+	div.rn.f32 	%f748, %f747, 0f437F0000;
+	fma.rn.f32 	%f749, %f748, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f750, %rs41;
+	div.rn.f32 	%f751, %f750, 0f437F0000;
+	fma.rn.f32 	%f752, %f751, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f753, %rs38;
+	div.rn.f32 	%f754, %f753, 0f437F0000;
+	fma.rn.f32 	%f755, %f754, 0f40000000, 0fBF800000;
+	mul.f32 	%f756, %f752, %f752;
+	fma.rn.f32 	%f757, %f749, %f749, %f756;
+	fma.rn.f32 	%f758, %f755, %f755, %f757;
+	sqrt.rn.f32 	%f759, %f758;
+	rcp.rn.f32 	%f760, %f759;
+	mul.f32 	%f1080, %f749, %f760;
+	mul.f32 	%f1081, %f752, %f760;
+	mul.f32 	%f1082, %f755, %f760;
+
+BB0_74:
+	mov.u32 	%r240, 4;
+	mul.f32 	%f764, %f1061, %f1081;
+	mul.f32 	%f765, %f1060, %f1082;
+	sub.f32 	%f766, %f765, %f764;
+	mul.f32 	%f767, %f1059, %f1082;
+	mul.f32 	%f768, %f1061, %f1080;
+	sub.f32 	%f769, %f768, %f767;
+	mul.f32 	%f770, %f1060, %f1080;
+	mul.f32 	%f771, %f1059, %f1081;
+	sub.f32 	%f772, %f771, %f770;
+	setp.lt.u32	%p104, %r15, 16777216;
+	selp.f32	%f773, 0fBF800000, 0f3F800000, %p104;
+	mul.f32 	%f774, %f766, %f773;
+	mul.f32 	%f775, %f769, %f773;
+	mul.f32 	%f776, %f772, %f773;
+	mul.f32 	%f777, %f774, 0f00000000;
+	mul.f32 	%f778, %f775, 0f00000000;
+	mul.f32 	%f779, %f776, 0f00000000;
+	fma.rn.f32 	%f780, %f1080, 0f3F5105EC, %f777;
+	fma.rn.f32 	%f781, %f1081, 0f3F5105EC, %f778;
+	fma.rn.f32 	%f782, %f1082, 0f3F5105EC, %f779;
+	mul.f32 	%f106, %f1059, 0f3F13CD3A;
+	add.f32 	%f107, %f106, %f780;
+	mul.f32 	%f108, %f1060, 0f3F13CD3A;
+	add.f32 	%f109, %f108, %f781;
+	mul.f32 	%f110, %f1061, 0f3F13CD3A;
+	add.f32 	%f111, %f110, %f782;
+	ld.global.v2.u32 	{%r135, %r136}, [pixelID];
+	cvt.u64.u32	%rd73, %r135;
+	cvt.u64.u32	%rd74, %r136;
+	// inline asm
+	call (%rd71), _rt_buffer_get_64, (%rd65, %r31, %r240, %rd73, %rd74, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r17, [%rd71];
+	shr.u32 	%r18, %r17, 16;
+	cvt.u16.u32	%rs46, %r18;
+	and.b16  	%rs47, %rs46, 255;
+	cvt.u16.u32	%rs48, %r17;
+	or.b16  	%rs49, %rs48, %rs47;
+	setp.eq.s16	%p105, %rs49, 0;
+	mov.f32 	%f1083, %f1086;
+	mov.f32 	%f1084, %f1086;
+	mov.f32 	%f1085, %f1086;
+	@%p105 bra 	BB0_76;
+
+	ld.u8 	%rs50, [%rd71+1];
+	and.b16  	%rs52, %rs48, 255;
+	cvt.rn.f32.u16	%f783, %rs52;
+	div.rn.f32 	%f784, %f783, 0f437F0000;
+	fma.rn.f32 	%f785, %f784, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f786, %rs50;
+	div.rn.f32 	%f787, %f786, 0f437F0000;
+	fma.rn.f32 	%f788, %f787, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f789, %rs47;
+	div.rn.f32 	%f790, %f789, 0f437F0000;
+	fma.rn.f32 	%f791, %f790, 0f40000000, 0fBF800000;
+	mul.f32 	%f792, %f788, %f788;
+	fma.rn.f32 	%f793, %f785, %f785, %f792;
+	fma.rn.f32 	%f794, %f791, %f791, %f793;
+	sqrt.rn.f32 	%f795, %f794;
+	rcp.rn.f32 	%f796, %f795;
+	mul.f32 	%f1083, %f785, %f796;
+	mul.f32 	%f1084, %f788, %f796;
+	mul.f32 	%f1085, %f791, %f796;
+
+BB0_76:
+	mov.u32 	%r241, 4;
+	mul.f32 	%f800, %f1061, %f1084;
+	mul.f32 	%f801, %f1060, %f1085;
+	sub.f32 	%f802, %f801, %f800;
+	mul.f32 	%f803, %f1059, %f1085;
+	mul.f32 	%f804, %f1061, %f1083;
+	sub.f32 	%f805, %f804, %f803;
+	mul.f32 	%f806, %f1060, %f1083;
+	mul.f32 	%f807, %f1059, %f1084;
+	sub.f32 	%f808, %f807, %f806;
+	setp.lt.u32	%p106, %r17, 16777216;
+	selp.f32	%f809, 0fBF800000, 0f3F800000, %p106;
+	mul.f32 	%f810, %f802, %f809;
+	mul.f32 	%f811, %f805, %f809;
+	mul.f32 	%f812, %f808, %f809;
+	mul.f32 	%f813, %f810, 0f3F3504F3;
+	mul.f32 	%f814, %f811, 0f3F3504F3;
+	mul.f32 	%f815, %f812, 0f3F3504F3;
+	fma.rn.f32 	%f816, %f1083, 0fBED105EC, %f813;
+	fma.rn.f32 	%f817, %f1084, 0fBED105EC, %f814;
+	fma.rn.f32 	%f818, %f1085, 0fBED105EC, %f815;
+	add.f32 	%f118, %f106, %f816;
+	add.f32 	%f119, %f108, %f817;
+	add.f32 	%f120, %f110, %f818;
+	ld.global.v2.u32 	{%r141, %r142}, [pixelID];
+	cvt.u64.u32	%rd80, %r141;
+	cvt.u64.u32	%rd81, %r142;
+	// inline asm
+	call (%rd78), _rt_buffer_get_64, (%rd65, %r31, %r241, %rd80, %rd81, %rd19, %rd19);
+	// inline asm
+	ld.u32 	%r19, [%rd78];
+	shr.u32 	%r20, %r19, 16;
+	cvt.u16.u32	%rs55, %r20;
+	and.b16  	%rs56, %rs55, 255;
+	cvt.u16.u32	%rs57, %r19;
+	or.b16  	%rs58, %rs57, %rs56;
+	setp.eq.s16	%p107, %rs58, 0;
+	mov.f32 	%f1087, %f1086;
+	mov.f32 	%f1088, %f1086;
+	@%p107 bra 	BB0_78;
+
+	ld.u8 	%rs59, [%rd78+1];
+	and.b16  	%rs61, %rs57, 255;
+	cvt.rn.f32.u16	%f819, %rs61;
+	div.rn.f32 	%f820, %f819, 0f437F0000;
+	fma.rn.f32 	%f821, %f820, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f822, %rs59;
+	div.rn.f32 	%f823, %f822, 0f437F0000;
+	fma.rn.f32 	%f824, %f823, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f825, %rs56;
+	div.rn.f32 	%f826, %f825, 0f437F0000;
+	fma.rn.f32 	%f827, %f826, 0f40000000, 0fBF800000;
+	mul.f32 	%f828, %f824, %f824;
+	fma.rn.f32 	%f829, %f821, %f821, %f828;
+	fma.rn.f32 	%f830, %f827, %f827, %f829;
+	sqrt.rn.f32 	%f831, %f830;
+	rcp.rn.f32 	%f832, %f831;
+	mul.f32 	%f1086, %f821, %f832;
+	mul.f32 	%f1087, %f824, %f832;
+	mul.f32 	%f1088, %f827, %f832;
+
+BB0_78:
+	mul.f32 	%f834, %f1061, %f1087;
+	mul.f32 	%f835, %f1060, %f1088;
+	sub.f32 	%f836, %f835, %f834;
+	mul.f32 	%f837, %f1059, %f1088;
+	mul.f32 	%f838, %f1061, %f1086;
+	sub.f32 	%f839, %f838, %f837;
+	mul.f32 	%f840, %f1060, %f1086;
+	mul.f32 	%f841, %f1059, %f1087;
+	sub.f32 	%f842, %f841, %f840;
+	setp.lt.u32	%p108, %r19, 16777216;
+	selp.f32	%f843, 0fBF800000, 0f3F800000, %p108;
+	mul.f32 	%f844, %f836, %f843;
+	mul.f32 	%f845, %f839, %f843;
+	mul.f32 	%f846, %f842, %f843;
+	mul.f32 	%f847, %f844, 0fBF3504F3;
+	mul.f32 	%f848, %f845, 0fBF3504F3;
+	mul.f32 	%f849, %f846, 0fBF3504F3;
+	fma.rn.f32 	%f850, %f1086, 0fBED105EC, %f847;
+	fma.rn.f32 	%f851, %f1087, 0fBED105EC, %f848;
+	fma.rn.f32 	%f852, %f1088, 0fBED105EC, %f849;
+	add.f32 	%f853, %f106, %f850;
+	add.f32 	%f854, %f108, %f851;
+	add.f32 	%f855, %f110, %f852;
+	mul.f32 	%f856, %f11, %f109;
+	fma.rn.f32 	%f857, %f10, %f107, %f856;
+	fma.rn.f32 	%f858, %f12, %f111, %f857;
+	cvt.sat.f32.f32	%f859, %f858;
+	mul.f32 	%f860, %f97, %f859;
+	mul.f32 	%f861, %f98, %f859;
+	mul.f32 	%f862, %f99, %f859;
+	mul.f32 	%f863, %f11, %f119;
+	fma.rn.f32 	%f864, %f10, %f118, %f863;
+	fma.rn.f32 	%f865, %f12, %f120, %f864;
+	cvt.sat.f32.f32	%f866, %f865;
+	mul.f32 	%f867, %f97, %f866;
+	mul.f32 	%f868, %f98, %f866;
+	mul.f32 	%f869, %f99, %f866;
+	mul.f32 	%f870, %f11, %f854;
+	fma.rn.f32 	%f871, %f10, %f853, %f870;
+	fma.rn.f32 	%f872, %f12, %f855, %f871;
+	cvt.sat.f32.f32	%f873, %f872;
+	mul.f32 	%f874, %f97, %f873;
+	mul.f32 	%f875, %f98, %f873;
+	mul.f32 	%f876, %f99, %f873;
+	cvt.sat.f32.f32	%f877, %f29;
+	mul.f32 	%f878, %f97, %f877;
+	mul.f32 	%f879, %f98, %f877;
+	mul.f32 	%f880, %f99, %f877;
+	add.f32 	%f881, %f860, %f867;
+	add.f32 	%f882, %f861, %f868;
+	add.f32 	%f883, %f862, %f869;
+	add.f32 	%f884, %f881, %f874;
+	add.f32 	%f885, %f882, %f875;
+	add.f32 	%f886, %f883, %f876;
+	mul.f32 	%f887, %f884, 0f3F13CD3A;
+	mul.f32 	%f888, %f885, 0f3F13CD3A;
+	mul.f32 	%f889, %f886, 0f3F13CD3A;
+	div.rn.f32 	%f890, %f878, %f887;
+	div.rn.f32 	%f891, %f879, %f888;
+	div.rn.f32 	%f892, %f880, %f889;
+	setp.eq.f32	%p109, %f878, 0f00000000;
+	selp.f32	%f893, 0f00000000, %f890, %p109;
+	setp.eq.f32	%p110, %f879, 0f00000000;
+	selp.f32	%f894, 0f00000000, %f891, %p110;
+	setp.eq.f32	%p111, %f880, 0f00000000;
+	selp.f32	%f895, 0f00000000, %f892, %p111;
+	mul.f32 	%f127, %f860, %f893;
+	mul.f32 	%f128, %f861, %f894;
+	mul.f32 	%f129, %f862, %f895;
+	mul.f32 	%f130, %f867, %f893;
+	mul.f32 	%f131, %f868, %f894;
+	mul.f32 	%f132, %f869, %f895;
+	mul.f32 	%f133, %f874, %f893;
+	mul.f32 	%f134, %f875, %f894;
+	mul.f32 	%f135, %f876, %f895;
+	ld.global.u32 	%r145, [additive];
+	setp.eq.s32	%p112, %r145, 0;
+	cvt.u64.u32	%rd8, %r2;
+	cvt.u64.u32	%rd9, %r3;
+	mov.f32 	%f833, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f833;}
+
+	// inline asm
+	@%p112 bra 	BB0_80;
+
+	mov.u64 	%rd97, image_RNM0;
+	cvta.global.u64 	%rd86, %rd97;
+	mov.u32 	%r149, 8;
+	// inline asm
+	call (%rd85), _rt_buffer_get_64, (%rd86, %r31, %r149, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs71, %rs72, %rs73, %rs74}, [%rd85];
+	// inline asm
+	{  cvt.f32.f16 %f896, %rs71;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f897, %rs72;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f898, %rs73;}
+
+	// inline asm
+	// inline asm
+	call (%rd91), _rt_buffer_get_64, (%rd86, %r31, %r149, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f899, %f127, %f896;
+	add.f32 	%f900, %f128, %f897;
+	add.f32 	%f901, %f129, %f898;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs70, %f901;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs69, %f900;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs68, %f899;}
+
+	// inline asm
+	st.v4.u16 	[%rd91], {%rs68, %rs69, %rs70, %rs64};
+	bra.uni 	BB0_81;
+
+BB0_80:
+	mov.u64 	%rd104, image_RNM0;
+	cvta.global.u64 	%rd99, %rd104;
+	mov.u32 	%r151, 8;
+	// inline asm
+	call (%rd98), _rt_buffer_get_64, (%rd99, %r31, %r151, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs77, %f129;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs76, %f128;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs75, %f127;}
+
+	// inline asm
+	st.v4.u16 	[%rd98], {%rs75, %rs76, %rs77, %rs64};
+
+BB0_81:
+	ld.global.u32 	%r152, [additive];
+	setp.eq.s32	%p113, %r152, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs78, %f833;}
+
+	// inline asm
+	@%p113 bra 	BB0_83;
+
+	mov.u64 	%rd117, image_RNM1;
+	cvta.global.u64 	%rd106, %rd117;
+	mov.u32 	%r156, 8;
+	// inline asm
+	call (%rd105), _rt_buffer_get_64, (%rd106, %r31, %r156, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs85, %rs86, %rs87, %rs88}, [%rd105];
+	// inline asm
+	{  cvt.f32.f16 %f906, %rs85;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f907, %rs86;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f908, %rs87;}
+
+	// inline asm
+	// inline asm
+	call (%rd111), _rt_buffer_get_64, (%rd106, %r31, %r156, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f909, %f130, %f906;
+	add.f32 	%f910, %f131, %f907;
+	add.f32 	%f911, %f132, %f908;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs84, %f911;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs83, %f910;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs82, %f909;}
+
+	// inline asm
+	st.v4.u16 	[%rd111], {%rs82, %rs83, %rs84, %rs78};
+	bra.uni 	BB0_84;
+
+BB0_83:
+	mov.u64 	%rd124, image_RNM1;
+	cvta.global.u64 	%rd119, %rd124;
+	mov.u32 	%r158, 8;
+	// inline asm
+	call (%rd118), _rt_buffer_get_64, (%rd119, %r31, %r158, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs91, %f132;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs90, %f131;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs89, %f130;}
+
+	// inline asm
+	st.v4.u16 	[%rd118], {%rs89, %rs90, %rs91, %rs78};
+
+BB0_84:
+	ld.global.u32 	%r159, [additive];
+	setp.eq.s32	%p114, %r159, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs92, %f833;}
+
+	// inline asm
+	@%p114 bra 	BB0_86;
+
+	mov.u64 	%rd137, image_RNM2;
+	cvta.global.u64 	%rd126, %rd137;
+	mov.u32 	%r163, 8;
+	// inline asm
+	call (%rd125), _rt_buffer_get_64, (%rd126, %r31, %r163, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	ld.v4.u16 	{%rs99, %rs100, %rs101, %rs102}, [%rd125];
+	// inline asm
+	{  cvt.f32.f16 %f916, %rs99;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f917, %rs100;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f918, %rs101;}
+
+	// inline asm
+	// inline asm
+	call (%rd131), _rt_buffer_get_64, (%rd126, %r31, %r163, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	add.f32 	%f919, %f133, %f916;
+	add.f32 	%f920, %f134, %f917;
+	add.f32 	%f921, %f135, %f918;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs98, %f921;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs97, %f920;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs96, %f919;}
+
+	// inline asm
+	st.v4.u16 	[%rd131], {%rs96, %rs97, %rs98, %rs92};
+	bra.uni 	BB0_121;
+
+BB0_86:
+	mov.u64 	%rd144, image_RNM2;
+	cvta.global.u64 	%rd139, %rd144;
+	mov.u32 	%r165, 8;
+	// inline asm
+	call (%rd138), _rt_buffer_get_64, (%rd139, %r31, %r165, %rd8, %rd9, %rd19, %rd19);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs105, %f135;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs104, %f134;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs103, %f133;}
+
+	// inline asm
+	st.v4.u16 	[%rd138], {%rs103, %rs104, %rs105, %rs92};
+
+BB0_121:
+	ret;
+}
+
+