move to self host

1 files changed, 2347 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmConeLightRNM.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmConeLightRNM.ptx
new file mode 100644
index 00000000..8dcdb02c
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmConeLightRNM.ptx
@@ -0,0 +1,2347 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 uvtangent[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 4 .u32 samples;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightRadius;
+.global .align 4 .b8 lightPos[12];
+.global .align 4 .b8 lightColor[12];
+.global .align 4 .u32 ignoreNormal;
+.global .align 4 .b8 lightConeDir[12];
+.global .align 8 .b8 lightCone[8];
+.global .align 4 .f32 lightFalloffFakeDistanceMult;
+.global .align 4 .f32 lightFalloffMinRadiusSq;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12lightConeDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo9lightConeE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename12lightConeDirE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename9lightConeE[7] = {102, 108, 111, 97, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12lightConeDirE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum9lightConeE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12lightConeDirE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic9lightConeE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12lightConeDirE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation9lightConeE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[4];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<128>;
+	.reg .b16 	%rs<213>;
+	.reg .f32 	%f<1045>;
+	.reg .b32 	%r<245>;
+	.reg .b64 	%rd<335>;
+
+
+	mov.u64 	%rd334, __local_depot0;
+	cvta.local.u64 	%SP, %rd334;
+	ld.global.v2.u32 	{%r34, %r35}, [pixelID];
+	cvt.u64.u32	%rd17, %r34;
+	cvt.u64.u32	%rd18, %r35;
+	mov.u64 	%rd21, uvnormal;
+	cvta.global.u64 	%rd16, %rd21;
+	mov.u32 	%r32, 2;
+	mov.u32 	%r33, 4;
+	mov.u64 	%rd20, 0;
+	// inline asm
+	call (%rd15), _rt_buffer_get_64, (%rd16, %r32, %r33, %rd17, %rd18, %rd20, %rd20);
+	// inline asm
+	ld.u32 	%r1, [%rd15];
+	shr.u32 	%r38, %r1, 16;
+	cvt.u16.u32	%rs1, %r38;
+	and.b16  	%rs10, %rs1, 255;
+	cvt.u16.u32	%rs11, %r1;
+	or.b16  	%rs12, %rs11, %rs10;
+	setp.eq.s16	%p6, %rs12, 0;
+	mov.f32 	%f1012, 0f00000000;
+	mov.f32 	%f1013, %f1012;
+	mov.f32 	%f1014, %f1012;
+	@%p6 bra 	BB0_2;
+
+	ld.u8 	%rs13, [%rd15+1];
+	and.b16  	%rs15, %rs11, 255;
+	cvt.rn.f32.u16	%f145, %rs15;
+	div.rn.f32 	%f146, %f145, 0f437F0000;
+	fma.rn.f32 	%f147, %f146, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f148, %rs13;
+	div.rn.f32 	%f149, %f148, 0f437F0000;
+	fma.rn.f32 	%f150, %f149, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f151, %rs10;
+	div.rn.f32 	%f152, %f151, 0f437F0000;
+	fma.rn.f32 	%f153, %f152, 0f40000000, 0fBF800000;
+	mul.f32 	%f154, %f150, %f150;
+	fma.rn.f32 	%f155, %f147, %f147, %f154;
+	fma.rn.f32 	%f156, %f153, %f153, %f155;
+	sqrt.rn.f32 	%f157, %f156;
+	rcp.rn.f32 	%f158, %f157;
+	mul.f32 	%f1012, %f147, %f158;
+	mul.f32 	%f1013, %f150, %f158;
+	mul.f32 	%f1014, %f153, %f158;
+
+BB0_2:
+	ld.global.v2.u32 	{%r39, %r40}, [pixelID];
+	ld.global.v2.u32 	{%r42, %r43}, [tileInfo];
+	add.s32 	%r2, %r39, %r42;
+	add.s32 	%r3, %r40, %r43;
+	setp.eq.f32	%p7, %f1013, 0f00000000;
+	setp.eq.f32	%p8, %f1012, 0f00000000;
+	and.pred  	%p9, %p8, %p7;
+	setp.eq.f32	%p10, %f1014, 0f00000000;
+	and.pred  	%p11, %p9, %p10;
+	@%p11 bra 	BB0_105;
+	bra.uni 	BB0_3;
+
+BB0_105:
+	ld.global.u32 	%r244, [imageEnabled];
+	and.b32  	%r200, %r244, 1;
+	setp.eq.b32	%p121, %r200, 1;
+	@!%p121 bra 	BB0_107;
+	bra.uni 	BB0_106;
+
+BB0_106:
+	cvt.u64.u32	%rd242, %r2;
+	cvt.u64.u32	%rd243, %r3;
+	mov.u64 	%rd246, image;
+	cvta.global.u64 	%rd241, %rd246;
+	// inline asm
+	call (%rd240), _rt_buffer_get_64, (%rd241, %r32, %r33, %rd242, %rd243, %rd20, %rd20);
+	// inline asm
+	mov.u16 	%rs158, 0;
+	st.v4.u8 	[%rd240], {%rs158, %rs158, %rs158, %rs158};
+	ld.global.u32 	%r244, [imageEnabled];
+
+BB0_107:
+	and.b32  	%r203, %r244, 8;
+	setp.eq.s32	%p122, %r203, 0;
+	@%p122 bra 	BB0_109;
+
+	cvt.u64.u32	%rd250, %r3;
+	cvt.u64.u32	%rd249, %r2;
+	mov.u64 	%rd253, image_Mask;
+	cvta.global.u64 	%rd248, %rd253;
+	// inline asm
+	call (%rd247), _rt_buffer_get_64, (%rd248, %r32, %r32, %rd249, %rd250, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f932, 0f00000000;
+	cvt.rzi.u32.f32	%r206, %f932;
+	cvt.u16.u32	%rs159, %r206;
+	mov.u16 	%rs160, 0;
+	st.v2.u8 	[%rd247], {%rs159, %rs160};
+	ld.global.u32 	%r244, [imageEnabled];
+
+BB0_109:
+	cvt.u64.u32	%rd13, %r2;
+	cvt.u64.u32	%rd14, %r3;
+	and.b32  	%r207, %r244, 4;
+	setp.eq.s32	%p123, %r207, 0;
+	@%p123 bra 	BB0_113;
+
+	ld.global.u32 	%r208, [additive];
+	setp.eq.s32	%p124, %r208, 0;
+	@%p124 bra 	BB0_112;
+
+	mov.u64 	%rd266, image_HDR;
+	cvta.global.u64 	%rd255, %rd266;
+	mov.u32 	%r212, 8;
+	// inline asm
+	call (%rd254), _rt_buffer_get_64, (%rd255, %r32, %r212, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs167, %rs168, %rs169, %rs170}, [%rd254];
+	// inline asm
+	{  cvt.f32.f16 %f933, %rs167;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f934, %rs168;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f935, %rs169;}
+
+	// inline asm
+	// inline asm
+	call (%rd260), _rt_buffer_get_64, (%rd255, %r32, %r212, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f936, %f933, 0f00000000;
+	add.f32 	%f937, %f934, 0f00000000;
+	add.f32 	%f938, %f935, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs166, %f938;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs165, %f937;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs164, %f936;}
+
+	// inline asm
+	mov.u16 	%rs171, 0;
+	st.v4.u16 	[%rd260], {%rs164, %rs165, %rs166, %rs171};
+	bra.uni 	BB0_113;
+
+BB0_3:
+	ld.global.v2.u32 	{%r49, %r50}, [pixelID];
+	cvt.u64.u32	%rd24, %r49;
+	cvt.u64.u32	%rd25, %r50;
+	mov.u64 	%rd28, uvpos;
+	cvta.global.u64 	%rd23, %rd28;
+	mov.u32 	%r48, 12;
+	// inline asm
+	call (%rd22), _rt_buffer_get_64, (%rd23, %r32, %r48, %rd24, %rd25, %rd20, %rd20);
+	// inline asm
+	ld.global.f32 	%f7, [lightPos];
+	ld.f32 	%f12, [%rd22+8];
+	ld.f32 	%f10, [%rd22+4];
+	ld.f32 	%f8, [%rd22];
+	sub.f32 	%f161, %f7, %f8;
+	ld.global.f32 	%f9, [lightPos+4];
+	sub.f32 	%f162, %f9, %f10;
+	ld.global.f32 	%f11, [lightPos+8];
+	sub.f32 	%f163, %f11, %f12;
+	mul.f32 	%f164, %f162, %f162;
+	fma.rn.f32 	%f165, %f161, %f161, %f164;
+	fma.rn.f32 	%f166, %f163, %f163, %f165;
+	sqrt.rn.f32 	%f167, %f166;
+	rcp.rn.f32 	%f168, %f167;
+	ld.global.f32 	%f169, [lightFalloffFakeDistanceMult];
+	mul.f32 	%f16, %f167, %f169;
+	ld.global.f32 	%f170, [lightInvCutoff];
+	mul.f32 	%f17, %f167, %f170;
+	mov.f32 	%f174, 0f40800000;
+	abs.f32 	%f19, %f17;
+	setp.lt.f32	%p12, %f19, 0f00800000;
+	mul.f32 	%f176, %f19, 0f4B800000;
+	selp.f32	%f177, 0fC3170000, 0fC2FE0000, %p12;
+	selp.f32	%f178, %f176, %f19, %p12;
+	mov.b32 	 %r53, %f178;
+	and.b32  	%r54, %r53, 8388607;
+	or.b32  	%r55, %r54, 1065353216;
+	mov.b32 	 %f179, %r55;
+	shr.u32 	%r56, %r53, 23;
+	cvt.rn.f32.u32	%f180, %r56;
+	add.f32 	%f181, %f177, %f180;
+	setp.gt.f32	%p13, %f179, 0f3FB504F3;
+	mul.f32 	%f182, %f179, 0f3F000000;
+	add.f32 	%f183, %f181, 0f3F800000;
+	selp.f32	%f184, %f182, %f179, %p13;
+	selp.f32	%f185, %f183, %f181, %p13;
+	add.f32 	%f186, %f184, 0fBF800000;
+	add.f32 	%f160, %f184, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f159,%f160;
+	// inline asm
+	add.f32 	%f187, %f186, %f186;
+	mul.f32 	%f188, %f159, %f187;
+	mul.f32 	%f189, %f188, %f188;
+	mov.f32 	%f190, 0f3C4CAF63;
+	mov.f32 	%f191, 0f3B18F0FE;
+	fma.rn.f32 	%f192, %f191, %f189, %f190;
+	mov.f32 	%f193, 0f3DAAAABD;
+	fma.rn.f32 	%f194, %f192, %f189, %f193;
+	mul.rn.f32 	%f195, %f194, %f189;
+	mul.rn.f32 	%f196, %f195, %f188;
+	sub.f32 	%f197, %f186, %f188;
+	neg.f32 	%f198, %f188;
+	add.f32 	%f199, %f197, %f197;
+	fma.rn.f32 	%f200, %f198, %f186, %f199;
+	mul.rn.f32 	%f201, %f159, %f200;
+	add.f32 	%f202, %f196, %f188;
+	sub.f32 	%f203, %f188, %f202;
+	add.f32 	%f204, %f196, %f203;
+	add.f32 	%f205, %f201, %f204;
+	add.f32 	%f206, %f202, %f205;
+	sub.f32 	%f207, %f202, %f206;
+	add.f32 	%f208, %f205, %f207;
+	mov.f32 	%f209, 0f3F317200;
+	mul.rn.f32 	%f210, %f185, %f209;
+	mov.f32 	%f211, 0f35BFBE8E;
+	mul.rn.f32 	%f212, %f185, %f211;
+	add.f32 	%f213, %f210, %f206;
+	sub.f32 	%f214, %f210, %f213;
+	add.f32 	%f215, %f206, %f214;
+	add.f32 	%f216, %f208, %f215;
+	add.f32 	%f217, %f212, %f216;
+	add.f32 	%f218, %f213, %f217;
+	sub.f32 	%f219, %f213, %f218;
+	add.f32 	%f220, %f217, %f219;
+	mul.rn.f32 	%f221, %f174, %f218;
+	neg.f32 	%f222, %f221;
+	fma.rn.f32 	%f223, %f174, %f218, %f222;
+	fma.rn.f32 	%f224, %f174, %f220, %f223;
+	mov.f32 	%f225, 0f00000000;
+	fma.rn.f32 	%f226, %f225, %f218, %f224;
+	add.rn.f32 	%f227, %f221, %f226;
+	neg.f32 	%f228, %f227;
+	add.rn.f32 	%f229, %f221, %f228;
+	add.rn.f32 	%f230, %f229, %f226;
+	mov.b32 	 %r57, %f227;
+	setp.eq.s32	%p14, %r57, 1118925336;
+	add.s32 	%r58, %r57, -1;
+	mov.b32 	 %f231, %r58;
+	add.f32 	%f232, %f230, 0f37000000;
+	selp.f32	%f233, %f231, %f227, %p14;
+	selp.f32	%f20, %f232, %f230, %p14;
+	mul.f32 	%f234, %f233, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f235, %f234;
+	mov.f32 	%f236, 0fBF317200;
+	fma.rn.f32 	%f237, %f235, %f236, %f233;
+	mov.f32 	%f238, 0fB5BFBE8E;
+	fma.rn.f32 	%f239, %f235, %f238, %f237;
+	mul.f32 	%f240, %f239, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f241, %f240;
+	add.f32 	%f242, %f235, 0f00000000;
+	ex2.approx.f32 	%f243, %f242;
+	mul.f32 	%f244, %f241, %f243;
+	setp.lt.f32	%p15, %f233, 0fC2D20000;
+	selp.f32	%f245, 0f00000000, %f244, %p15;
+	setp.gt.f32	%p16, %f233, 0f42D20000;
+	selp.f32	%f1015, 0f7F800000, %f245, %p16;
+	setp.eq.f32	%p17, %f1015, 0f7F800000;
+	@%p17 bra 	BB0_5;
+
+	fma.rn.f32 	%f1015, %f1015, %f20, %f1015;
+
+BB0_5:
+	mov.f32 	%f966, 0f40000000;
+	cvt.rzi.f32.f32	%f965, %f966;
+	add.f32 	%f964, %f965, %f965;
+	mov.f32 	%f963, 0f40800000;
+	sub.f32 	%f962, %f963, %f964;
+	abs.f32 	%f961, %f962;
+	setp.lt.f32	%p18, %f17, 0f00000000;
+	setp.eq.f32	%p19, %f961, 0f3F800000;
+	and.pred  	%p1, %p18, %p19;
+	mov.b32 	 %r59, %f1015;
+	xor.b32  	%r60, %r59, -2147483648;
+	mov.b32 	 %f246, %r60;
+	selp.f32	%f1017, %f246, %f1015, %p1;
+	setp.eq.f32	%p20, %f17, 0f00000000;
+	@%p20 bra 	BB0_8;
+	bra.uni 	BB0_6;
+
+BB0_8:
+	add.f32 	%f249, %f17, %f17;
+	selp.f32	%f1017, %f249, 0f00000000, %p19;
+	bra.uni 	BB0_9;
+
+BB0_6:
+	setp.geu.f32	%p21, %f17, 0f00000000;
+	@%p21 bra 	BB0_9;
+
+	mov.f32 	%f1011, 0f40800000;
+	cvt.rzi.f32.f32	%f248, %f1011;
+	setp.neu.f32	%p22, %f248, 0f40800000;
+	selp.f32	%f1017, 0f7FFFFFFF, %f1017, %p22;
+
+BB0_9:
+	abs.f32 	%f967, %f17;
+	add.f32 	%f250, %f967, 0f40800000;
+	mov.b32 	 %r61, %f250;
+	setp.lt.s32	%p24, %r61, 2139095040;
+	@%p24 bra 	BB0_14;
+
+	abs.f32 	%f1009, %f17;
+	setp.gtu.f32	%p25, %f1009, 0f7F800000;
+	@%p25 bra 	BB0_13;
+	bra.uni 	BB0_11;
+
+BB0_13:
+	add.f32 	%f1017, %f17, 0f40800000;
+	bra.uni 	BB0_14;
+
+BB0_11:
+	abs.f32 	%f1010, %f17;
+	setp.neu.f32	%p26, %f1010, 0f7F800000;
+	@%p26 bra 	BB0_14;
+
+	selp.f32	%f1017, 0fFF800000, 0f7F800000, %p1;
+
+BB0_14:
+	sub.f32 	%f973, %f11, %f12;
+	mul.f32 	%f972, %f973, %f168;
+	sub.f32 	%f971, %f7, %f8;
+	mul.f32 	%f970, %f971, %f168;
+	sub.f32 	%f969, %f9, %f10;
+	mul.f32 	%f968, %f969, %f168;
+	mov.f32 	%f1023, 0f3F800000;
+	sub.f32 	%f252, %f1023, %f1017;
+	setp.eq.f32	%p27, %f17, 0f3F800000;
+	selp.f32	%f253, 0f00000000, %f252, %p27;
+	cvt.sat.f32.f32	%f254, %f253;
+	ld.global.f32 	%f255, [lightFalloffMinRadiusSq];
+	fma.rn.f32 	%f256, %f16, %f16, %f255;
+	div.rn.f32 	%f257, %f254, %f256;
+	mul.f32 	%f258, %f1013, %f968;
+	fma.rn.f32 	%f259, %f1012, %f970, %f258;
+	fma.rn.f32 	%f31, %f1014, %f972, %f259;
+	ld.global.u32 	%r242, [imageEnabled];
+	ld.global.f32 	%f260, [lightConeDir];
+	mul.f32 	%f261, %f970, %f260;
+	ld.global.f32 	%f262, [lightConeDir+4];
+	mul.f32 	%f263, %f968, %f262;
+	neg.f32 	%f264, %f263;
+	sub.f32 	%f265, %f264, %f261;
+	ld.global.f32 	%f266, [lightConeDir+8];
+	mul.f32 	%f267, %f972, %f266;
+	sub.f32 	%f268, %f265, %f267;
+	ld.global.v2.f32 	{%f269, %f270}, [lightCone];
+	fma.rn.f32 	%f273, %f269, %f268, %f270;
+	cvt.sat.f32.f32	%f274, %f273;
+	mul.f32 	%f275, %f274, %f274;
+	mul.f32 	%f32, %f257, %f275;
+	ld.global.f32 	%f276, [lightColor+4];
+	ld.global.f32 	%f277, [lightColor];
+	max.f32 	%f278, %f277, %f276;
+	ld.global.f32 	%f279, [lightColor+8];
+	max.f32 	%f280, %f278, %f279;
+	mul.f32 	%f281, %f32, %f280;
+	setp.lt.f32	%p28, %f281, 0f3727C5AC;
+	@%p28 bra 	BB0_88;
+	bra.uni 	BB0_15;
+
+BB0_88:
+	and.b32  	%r164, %r242, 1;
+	setp.eq.b32	%p114, %r164, 1;
+	@!%p114 bra 	BB0_90;
+	bra.uni 	BB0_89;
+
+BB0_89:
+	cvt.u64.u32	%rd148, %r2;
+	cvt.u64.u32	%rd149, %r3;
+	mov.u64 	%rd152, image;
+	cvta.global.u64 	%rd147, %rd152;
+	// inline asm
+	call (%rd146), _rt_buffer_get_64, (%rd147, %r32, %r33, %rd148, %rd149, %rd20, %rd20);
+	// inline asm
+	mov.u16 	%rs106, 1;
+	mov.u16 	%rs107, 0;
+	st.v4.u8 	[%rd146], {%rs107, %rs107, %rs107, %rs106};
+	ld.global.u32 	%r242, [imageEnabled];
+
+BB0_90:
+	and.b32  	%r167, %r242, 8;
+	setp.eq.s32	%p115, %r167, 0;
+	@%p115 bra 	BB0_92;
+
+	cvt.u64.u32	%rd156, %r3;
+	cvt.u64.u32	%rd155, %r2;
+	mov.u64 	%rd159, image_Mask;
+	cvta.global.u64 	%rd154, %rd159;
+	// inline asm
+	call (%rd153), _rt_buffer_get_64, (%rd154, %r32, %r32, %rd155, %rd156, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f897, 0f00000000;
+	cvt.rzi.u32.f32	%r170, %f897;
+	cvt.u16.u32	%rs108, %r170;
+	mov.u16 	%rs109, 255;
+	st.v2.u8 	[%rd153], {%rs108, %rs109};
+	ld.global.u32 	%r242, [imageEnabled];
+
+BB0_92:
+	cvt.u64.u32	%rd11, %r2;
+	cvt.u64.u32	%rd12, %r3;
+	and.b32  	%r171, %r242, 4;
+	setp.eq.s32	%p116, %r171, 0;
+	@%p116 bra 	BB0_96;
+
+	ld.global.u32 	%r172, [additive];
+	setp.eq.s32	%p117, %r172, 0;
+	mov.f32 	%f898, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs110, %f898;}
+
+	// inline asm
+	@%p117 bra 	BB0_95;
+
+	mov.u64 	%rd172, image_HDR;
+	cvta.global.u64 	%rd161, %rd172;
+	mov.u32 	%r176, 8;
+	// inline asm
+	call (%rd160), _rt_buffer_get_64, (%rd161, %r32, %r176, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs117, %rs118, %rs119, %rs120}, [%rd160];
+	// inline asm
+	{  cvt.f32.f16 %f899, %rs117;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f900, %rs118;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f901, %rs119;}
+
+	// inline asm
+	// inline asm
+	call (%rd166), _rt_buffer_get_64, (%rd161, %r32, %r176, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f902, %f899, 0f00000000;
+	add.f32 	%f903, %f900, 0f00000000;
+	add.f32 	%f904, %f901, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs116, %f904;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs115, %f903;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs114, %f902;}
+
+	// inline asm
+	st.v4.u16 	[%rd166], {%rs114, %rs115, %rs116, %rs110};
+	bra.uni 	BB0_96;
+
+BB0_15:
+	mov.f32 	%f1021, 0f00000000;
+	mul.f32 	%f283, %f8, 0f3456BF95;
+	abs.f32 	%f284, %f1012;
+	div.rn.f32 	%f285, %f283, %f284;
+	abs.f32 	%f286, %f1013;
+	mul.f32 	%f287, %f10, 0f3456BF95;
+	div.rn.f32 	%f288, %f287, %f286;
+	abs.f32 	%f289, %f1014;
+	mul.f32 	%f290, %f12, 0f3456BF95;
+	div.rn.f32 	%f291, %f290, %f289;
+	abs.f32 	%f292, %f285;
+	abs.f32 	%f293, %f288;
+	abs.f32 	%f294, %f291;
+	mov.f32 	%f295, 0f38D1B717;
+	max.f32 	%f296, %f292, %f295;
+	max.f32 	%f297, %f293, %f295;
+	max.f32 	%f298, %f294, %f295;
+	fma.rn.f32 	%f33, %f1012, %f296, %f8;
+	fma.rn.f32 	%f34, %f1013, %f297, %f10;
+	fma.rn.f32 	%f35, %f1014, %f298, %f12;
+	ld.global.u32 	%r238, [samples];
+	setp.lt.s32	%p29, %r238, 1;
+	@%p29 bra 	BB0_18;
+
+	mul.f32 	%f300, %f33, 0f3456BF95;
+	abs.f32 	%f301, %f300;
+	mul.f32 	%f302, %f34, 0f3456BF95;
+	abs.f32 	%f303, %f302;
+	mul.f32 	%f304, %f35, 0f3456BF95;
+	abs.f32 	%f305, %f304;
+	max.f32 	%f306, %f301, %f303;
+	max.f32 	%f307, %f306, %f305;
+	max.f32 	%f36, %f307, %f295;
+	add.u64 	%rd29, %SP, 0;
+	cvta.to.local.u64 	%rd2, %rd29;
+	mov.f32 	%f1021, 0f00000000;
+	mov.u32 	%r237, 0;
+	mov.u32 	%r236, %r242;
+	mov.f32 	%f1018, %f11;
+	mov.f32 	%f1019, %f9;
+	mov.f32 	%f1020, %f7;
+	bra.uni 	BB0_17;
+
+BB0_87:
+	ld.global.f32 	%f1020, [lightPos];
+	ld.global.f32 	%f1019, [lightPos+4];
+	ld.global.f32 	%f1018, [lightPos+8];
+	ld.global.u32 	%r236, [imageEnabled];
+
+BB0_17:
+	cvt.rn.f32.s32	%f317, %r237;
+	mul.f32 	%f318, %f317, 0f3DD32618;
+	cvt.rmi.f32.f32	%f319, %f318;
+	sub.f32 	%f320, %f318, %f319;
+	mul.f32 	%f321, %f317, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f322, %f321;
+	sub.f32 	%f323, %f321, %f322;
+	mul.f32 	%f324, %f317, 0f3DC74539;
+	cvt.rmi.f32.f32	%f325, %f324;
+	sub.f32 	%f326, %f324, %f325;
+	add.f32 	%f327, %f323, 0f4199851F;
+	add.f32 	%f328, %f326, 0f4199851F;
+	add.f32 	%f329, %f320, 0f4199851F;
+	mul.f32 	%f330, %f323, %f328;
+	fma.rn.f32 	%f331, %f320, %f327, %f330;
+	fma.rn.f32 	%f332, %f329, %f326, %f331;
+	add.f32 	%f333, %f320, %f332;
+	add.f32 	%f334, %f323, %f332;
+	add.f32 	%f335, %f326, %f332;
+	add.f32 	%f336, %f333, %f334;
+	mul.f32 	%f337, %f335, %f336;
+	cvt.rmi.f32.f32	%f338, %f337;
+	sub.f32 	%f339, %f337, %f338;
+	add.f32 	%f340, %f333, %f335;
+	mul.f32 	%f341, %f334, %f340;
+	cvt.rmi.f32.f32	%f342, %f341;
+	sub.f32 	%f343, %f341, %f342;
+	add.f32 	%f344, %f334, %f335;
+	mul.f32 	%f345, %f333, %f344;
+	cvt.rmi.f32.f32	%f346, %f345;
+	sub.f32 	%f347, %f345, %f346;
+	fma.rn.f32 	%f348, %f339, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f349, %f343, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f350, %f347, 0f40000000, 0fBF800000;
+	ld.global.f32 	%f351, [lightRadius];
+	fma.rn.f32 	%f352, %f351, %f348, %f1020;
+	fma.rn.f32 	%f353, %f351, %f349, %f1019;
+	fma.rn.f32 	%f354, %f351, %f350, %f1018;
+	sub.f32 	%f355, %f352, %f8;
+	sub.f32 	%f356, %f353, %f10;
+	sub.f32 	%f357, %f354, %f12;
+	mul.f32 	%f358, %f356, %f356;
+	fma.rn.f32 	%f359, %f355, %f355, %f358;
+	fma.rn.f32 	%f360, %f357, %f357, %f359;
+	sqrt.rn.f32 	%f316, %f360;
+	rcp.rn.f32 	%f361, %f316;
+	mul.f32 	%f312, %f361, %f355;
+	mul.f32 	%f313, %f361, %f356;
+	mul.f32 	%f314, %f361, %f357;
+	and.b32  	%r66, %r236, 32;
+	setp.eq.s32	%p30, %r66, 0;
+	selp.f32	%f362, 0f3F800000, 0f41200000, %p30;
+	mul.f32 	%f315, %f362, %f36;
+	mov.u32 	%r67, 1065353216;
+	st.local.u32 	[%rd2], %r67;
+	ld.global.u32 	%r63, [root];
+	mov.u32 	%r64, 1;
+	// inline asm
+	call _rt_trace_64, (%r63, %f33, %f34, %f35, %f312, %f313, %f314, %r64, %f315, %f316, %rd29, %r33);
+	// inline asm
+	ld.local.f32 	%f363, [%rd2];
+	add.f32 	%f1021, %f1021, %f363;
+	ld.global.u32 	%r238, [samples];
+	add.s32 	%r237, %r237, 1;
+	setp.lt.s32	%p31, %r237, %r238;
+	@%p31 bra 	BB0_87;
+
+BB0_18:
+	setp.eq.s32	%p32, %r238, 0;
+	@%p32 bra 	BB0_20;
+
+	cvt.rn.f32.s32	%f365, %r238;
+	div.rn.f32 	%f1023, %f1021, %f365;
+
+BB0_20:
+	ld.global.u32 	%r68, [ignoreNormal];
+	and.b32  	%r69, %r242, 32;
+	or.b32  	%r70, %r69, %r68;
+	setp.eq.s32	%p33, %r70, 0;
+	selp.f32	%f366, %f31, 0f3F800000, %p33;
+	cvt.sat.f32.f32	%f367, %f366;
+	mul.f32 	%f368, %f32, %f367;
+	mul.f32 	%f369, %f1023, %f368;
+	ld.global.f32 	%f370, [lightColor];
+	mul.f32 	%f45, %f370, %f369;
+	ld.global.f32 	%f371, [lightColor+4];
+	mul.f32 	%f46, %f371, %f369;
+	ld.global.f32 	%f372, [lightColor+8];
+	mul.f32 	%f47, %f369, %f372;
+	ld.global.u32 	%r240, [imageEnabled];
+	and.b32  	%r71, %r240, 8;
+	setp.eq.s32	%p34, %r71, 0;
+	@%p34 bra 	BB0_33;
+
+	mov.f32 	%f981, 0fB5BFBE8E;
+	mov.f32 	%f980, 0fBF317200;
+	mov.f32 	%f979, 0f35BFBE8E;
+	mov.f32 	%f978, 0f3F317200;
+	mov.f32 	%f977, 0f3DAAAABD;
+	mov.f32 	%f976, 0f3C4CAF63;
+	mov.f32 	%f975, 0f3B18F0FE;
+	cvt.u64.u32	%rd33, %r2;
+	cvt.u64.u32	%rd34, %r3;
+	mov.u64 	%rd37, image_Mask;
+	cvta.global.u64 	%rd32, %rd37;
+	// inline asm
+	call (%rd31), _rt_buffer_get_64, (%rd32, %r32, %r32, %rd33, %rd34, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f375, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f376, %f375;
+	fma.rn.f32 	%f377, %f376, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f48, %f377;
+	abs.f32 	%f49, %f1023;
+	setp.lt.f32	%p35, %f49, 0f00800000;
+	mul.f32 	%f378, %f49, 0f4B800000;
+	selp.f32	%f379, 0fC3170000, 0fC2FE0000, %p35;
+	selp.f32	%f380, %f378, %f49, %p35;
+	mov.b32 	 %r74, %f380;
+	and.b32  	%r75, %r74, 8388607;
+	or.b32  	%r76, %r75, 1065353216;
+	mov.b32 	 %f381, %r76;
+	shr.u32 	%r77, %r74, 23;
+	cvt.rn.f32.u32	%f382, %r77;
+	add.f32 	%f383, %f379, %f382;
+	setp.gt.f32	%p36, %f381, 0f3FB504F3;
+	mul.f32 	%f384, %f381, 0f3F000000;
+	add.f32 	%f385, %f383, 0f3F800000;
+	selp.f32	%f386, %f384, %f381, %p36;
+	selp.f32	%f387, %f385, %f383, %p36;
+	add.f32 	%f388, %f386, 0fBF800000;
+	add.f32 	%f374, %f386, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f373,%f374;
+	// inline asm
+	add.f32 	%f389, %f388, %f388;
+	mul.f32 	%f390, %f373, %f389;
+	mul.f32 	%f391, %f390, %f390;
+	fma.rn.f32 	%f394, %f975, %f391, %f976;
+	fma.rn.f32 	%f396, %f394, %f391, %f977;
+	mul.rn.f32 	%f397, %f396, %f391;
+	mul.rn.f32 	%f398, %f397, %f390;
+	sub.f32 	%f399, %f388, %f390;
+	neg.f32 	%f400, %f390;
+	add.f32 	%f401, %f399, %f399;
+	fma.rn.f32 	%f402, %f400, %f388, %f401;
+	mul.rn.f32 	%f403, %f373, %f402;
+	add.f32 	%f404, %f398, %f390;
+	sub.f32 	%f405, %f390, %f404;
+	add.f32 	%f406, %f398, %f405;
+	add.f32 	%f407, %f403, %f406;
+	add.f32 	%f408, %f404, %f407;
+	sub.f32 	%f409, %f404, %f408;
+	add.f32 	%f410, %f407, %f409;
+	mul.rn.f32 	%f412, %f387, %f978;
+	mul.rn.f32 	%f414, %f387, %f979;
+	add.f32 	%f415, %f412, %f408;
+	sub.f32 	%f416, %f412, %f415;
+	add.f32 	%f417, %f408, %f416;
+	add.f32 	%f418, %f410, %f417;
+	add.f32 	%f419, %f414, %f418;
+	add.f32 	%f420, %f415, %f419;
+	sub.f32 	%f421, %f415, %f420;
+	add.f32 	%f422, %f419, %f421;
+	mov.f32 	%f423, 0f3EE8BA2E;
+	mul.rn.f32 	%f424, %f423, %f420;
+	neg.f32 	%f425, %f424;
+	fma.rn.f32 	%f426, %f423, %f420, %f425;
+	fma.rn.f32 	%f427, %f423, %f422, %f426;
+	mov.f32 	%f428, 0f00000000;
+	fma.rn.f32 	%f429, %f428, %f420, %f427;
+	add.rn.f32 	%f430, %f424, %f429;
+	neg.f32 	%f431, %f430;
+	add.rn.f32 	%f432, %f424, %f431;
+	add.rn.f32 	%f433, %f432, %f429;
+	mov.b32 	 %r78, %f430;
+	setp.eq.s32	%p37, %r78, 1118925336;
+	add.s32 	%r79, %r78, -1;
+	mov.b32 	 %f434, %r79;
+	add.f32 	%f435, %f433, 0f37000000;
+	selp.f32	%f436, %f434, %f430, %p37;
+	selp.f32	%f50, %f435, %f433, %p37;
+	mul.f32 	%f437, %f436, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f438, %f437;
+	fma.rn.f32 	%f440, %f438, %f980, %f436;
+	fma.rn.f32 	%f442, %f438, %f981, %f440;
+	mul.f32 	%f443, %f442, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f444, %f443;
+	add.f32 	%f445, %f438, 0f00000000;
+	ex2.approx.f32 	%f446, %f445;
+	mul.f32 	%f447, %f444, %f446;
+	setp.lt.f32	%p38, %f436, 0fC2D20000;
+	selp.f32	%f448, 0f00000000, %f447, %p38;
+	setp.gt.f32	%p39, %f436, 0f42D20000;
+	selp.f32	%f1024, 0f7F800000, %f448, %p39;
+	setp.eq.f32	%p40, %f1024, 0f7F800000;
+	@%p40 bra 	BB0_23;
+
+	fma.rn.f32 	%f1024, %f1024, %f50, %f1024;
+
+BB0_23:
+	setp.lt.f32	%p41, %f1023, 0f00000000;
+	setp.eq.f32	%p42, %f48, 0f3F800000;
+	and.pred  	%p2, %p41, %p42;
+	mov.b32 	 %r80, %f1024;
+	xor.b32  	%r81, %r80, -2147483648;
+	mov.b32 	 %f449, %r81;
+	selp.f32	%f1026, %f449, %f1024, %p2;
+	setp.eq.f32	%p43, %f1023, 0f00000000;
+	@%p43 bra 	BB0_26;
+	bra.uni 	BB0_24;
+
+BB0_26:
+	add.f32 	%f452, %f1023, %f1023;
+	selp.f32	%f1026, %f452, 0f00000000, %p42;
+	bra.uni 	BB0_27;
+
+BB0_112:
+	mov.u64 	%rd273, image_HDR;
+	cvta.global.u64 	%rd268, %rd273;
+	mov.u32 	%r214, 8;
+	// inline asm
+	call (%rd267), _rt_buffer_get_64, (%rd268, %r32, %r214, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f939, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs172, %f939;}
+
+	// inline asm
+	mov.u16 	%rs173, 0;
+	st.v4.u16 	[%rd267], {%rs172, %rs172, %rs172, %rs173};
+
+BB0_113:
+	ld.global.u32 	%r215, [additive];
+	setp.eq.s32	%p125, %r215, 0;
+	@%p125 bra 	BB0_115;
+
+	mov.u64 	%rd286, image_RNM0;
+	cvta.global.u64 	%rd275, %rd286;
+	mov.u32 	%r219, 8;
+	// inline asm
+	call (%rd274), _rt_buffer_get_64, (%rd275, %r32, %r219, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs180, %rs181, %rs182, %rs183}, [%rd274];
+	// inline asm
+	{  cvt.f32.f16 %f940, %rs180;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f941, %rs181;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f942, %rs182;}
+
+	// inline asm
+	// inline asm
+	call (%rd280), _rt_buffer_get_64, (%rd275, %r32, %r219, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f943, %f940, 0f00000000;
+	add.f32 	%f944, %f941, 0f00000000;
+	add.f32 	%f945, %f942, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs179, %f945;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs178, %f944;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs177, %f943;}
+
+	// inline asm
+	mov.u16 	%rs184, 0;
+	st.v4.u16 	[%rd280], {%rs177, %rs178, %rs179, %rs184};
+	bra.uni 	BB0_116;
+
+BB0_115:
+	mov.u64 	%rd293, image_RNM0;
+	cvta.global.u64 	%rd288, %rd293;
+	mov.u32 	%r221, 8;
+	// inline asm
+	call (%rd287), _rt_buffer_get_64, (%rd288, %r32, %r221, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f946, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs185, %f946;}
+
+	// inline asm
+	mov.u16 	%rs186, 0;
+	st.v4.u16 	[%rd287], {%rs185, %rs185, %rs185, %rs186};
+
+BB0_116:
+	ld.global.u32 	%r222, [additive];
+	setp.eq.s32	%p126, %r222, 0;
+	@%p126 bra 	BB0_118;
+
+	mov.u64 	%rd306, image_RNM1;
+	cvta.global.u64 	%rd295, %rd306;
+	mov.u32 	%r226, 8;
+	// inline asm
+	call (%rd294), _rt_buffer_get_64, (%rd295, %r32, %r226, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs193, %rs194, %rs195, %rs196}, [%rd294];
+	// inline asm
+	{  cvt.f32.f16 %f947, %rs193;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f948, %rs194;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f949, %rs195;}
+
+	// inline asm
+	// inline asm
+	call (%rd300), _rt_buffer_get_64, (%rd295, %r32, %r226, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f950, %f947, 0f00000000;
+	add.f32 	%f951, %f948, 0f00000000;
+	add.f32 	%f952, %f949, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs192, %f952;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs191, %f951;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs190, %f950;}
+
+	// inline asm
+	mov.u16 	%rs197, 0;
+	st.v4.u16 	[%rd300], {%rs190, %rs191, %rs192, %rs197};
+	bra.uni 	BB0_119;
+
+BB0_118:
+	mov.u64 	%rd313, image_RNM1;
+	cvta.global.u64 	%rd308, %rd313;
+	mov.u32 	%r228, 8;
+	// inline asm
+	call (%rd307), _rt_buffer_get_64, (%rd308, %r32, %r228, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f953, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs198, %f953;}
+
+	// inline asm
+	mov.u16 	%rs199, 0;
+	st.v4.u16 	[%rd307], {%rs198, %rs198, %rs198, %rs199};
+
+BB0_119:
+	ld.global.u32 	%r229, [additive];
+	setp.eq.s32	%p127, %r229, 0;
+	@%p127 bra 	BB0_121;
+
+	mov.u64 	%rd326, image_RNM2;
+	cvta.global.u64 	%rd315, %rd326;
+	mov.u32 	%r233, 8;
+	// inline asm
+	call (%rd314), _rt_buffer_get_64, (%rd315, %r32, %r233, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs206, %rs207, %rs208, %rs209}, [%rd314];
+	// inline asm
+	{  cvt.f32.f16 %f954, %rs206;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f955, %rs207;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f956, %rs208;}
+
+	// inline asm
+	// inline asm
+	call (%rd320), _rt_buffer_get_64, (%rd315, %r32, %r233, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f957, %f954, 0f00000000;
+	add.f32 	%f958, %f955, 0f00000000;
+	add.f32 	%f959, %f956, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs205, %f959;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs204, %f958;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs203, %f957;}
+
+	// inline asm
+	mov.u16 	%rs210, 0;
+	st.v4.u16 	[%rd320], {%rs203, %rs204, %rs205, %rs210};
+	bra.uni 	BB0_122;
+
+BB0_121:
+	mov.u64 	%rd333, image_RNM2;
+	cvta.global.u64 	%rd328, %rd333;
+	mov.u32 	%r235, 8;
+	// inline asm
+	call (%rd327), _rt_buffer_get_64, (%rd328, %r32, %r235, %rd13, %rd14, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f960, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs211, %f960;}
+
+	// inline asm
+	mov.u16 	%rs212, 0;
+	st.v4.u16 	[%rd327], {%rs211, %rs211, %rs211, %rs212};
+	bra.uni 	BB0_122;
+
+BB0_95:
+	mov.u64 	%rd179, image_HDR;
+	cvta.global.u64 	%rd174, %rd179;
+	mov.u32 	%r178, 8;
+	// inline asm
+	call (%rd173), _rt_buffer_get_64, (%rd174, %r32, %r178, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f905, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs121, %f905;}
+
+	// inline asm
+	st.v4.u16 	[%rd173], {%rs121, %rs121, %rs121, %rs110};
+
+BB0_96:
+	ld.global.u32 	%r179, [additive];
+	setp.eq.s32	%p118, %r179, 0;
+	mov.f32 	%f906, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs122, %f906;}
+
+	// inline asm
+	@%p118 bra 	BB0_98;
+
+	mov.u64 	%rd192, image_RNM0;
+	cvta.global.u64 	%rd181, %rd192;
+	mov.u32 	%r183, 8;
+	// inline asm
+	call (%rd180), _rt_buffer_get_64, (%rd181, %r32, %r183, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs129, %rs130, %rs131, %rs132}, [%rd180];
+	// inline asm
+	{  cvt.f32.f16 %f907, %rs129;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f908, %rs130;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f909, %rs131;}
+
+	// inline asm
+	// inline asm
+	call (%rd186), _rt_buffer_get_64, (%rd181, %r32, %r183, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f910, %f907, 0f00000000;
+	add.f32 	%f911, %f908, 0f00000000;
+	add.f32 	%f912, %f909, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs128, %f912;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs127, %f911;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs126, %f910;}
+
+	// inline asm
+	st.v4.u16 	[%rd186], {%rs126, %rs127, %rs128, %rs122};
+	bra.uni 	BB0_99;
+
+BB0_98:
+	mov.u64 	%rd199, image_RNM0;
+	cvta.global.u64 	%rd194, %rd199;
+	mov.u32 	%r185, 8;
+	// inline asm
+	call (%rd193), _rt_buffer_get_64, (%rd194, %r32, %r185, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f913, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs133, %f913;}
+
+	// inline asm
+	st.v4.u16 	[%rd193], {%rs133, %rs133, %rs133, %rs122};
+
+BB0_99:
+	ld.global.u32 	%r186, [additive];
+	setp.eq.s32	%p119, %r186, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs134, %f906;}
+
+	// inline asm
+	@%p119 bra 	BB0_101;
+
+	mov.u64 	%rd212, image_RNM1;
+	cvta.global.u64 	%rd201, %rd212;
+	mov.u32 	%r190, 8;
+	// inline asm
+	call (%rd200), _rt_buffer_get_64, (%rd201, %r32, %r190, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs141, %rs142, %rs143, %rs144}, [%rd200];
+	// inline asm
+	{  cvt.f32.f16 %f915, %rs141;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f916, %rs142;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f917, %rs143;}
+
+	// inline asm
+	// inline asm
+	call (%rd206), _rt_buffer_get_64, (%rd201, %r32, %r190, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f918, %f915, 0f00000000;
+	add.f32 	%f919, %f916, 0f00000000;
+	add.f32 	%f920, %f917, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs140, %f920;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs139, %f919;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs138, %f918;}
+
+	// inline asm
+	st.v4.u16 	[%rd206], {%rs138, %rs139, %rs140, %rs134};
+	bra.uni 	BB0_102;
+
+BB0_101:
+	mov.u64 	%rd219, image_RNM1;
+	cvta.global.u64 	%rd214, %rd219;
+	mov.u32 	%r192, 8;
+	// inline asm
+	call (%rd213), _rt_buffer_get_64, (%rd214, %r32, %r192, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f921, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs145, %f921;}
+
+	// inline asm
+	st.v4.u16 	[%rd213], {%rs145, %rs145, %rs145, %rs134};
+
+BB0_102:
+	ld.global.u32 	%r193, [additive];
+	setp.eq.s32	%p120, %r193, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs146, %f906;}
+
+	// inline asm
+	@%p120 bra 	BB0_104;
+
+	mov.u64 	%rd232, image_RNM2;
+	cvta.global.u64 	%rd221, %rd232;
+	mov.u32 	%r197, 8;
+	// inline asm
+	call (%rd220), _rt_buffer_get_64, (%rd221, %r32, %r197, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs153, %rs154, %rs155, %rs156}, [%rd220];
+	// inline asm
+	{  cvt.f32.f16 %f923, %rs153;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f924, %rs154;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f925, %rs155;}
+
+	// inline asm
+	// inline asm
+	call (%rd226), _rt_buffer_get_64, (%rd221, %r32, %r197, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f926, %f923, 0f00000000;
+	add.f32 	%f927, %f924, 0f00000000;
+	add.f32 	%f928, %f925, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs152, %f928;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs151, %f927;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs150, %f926;}
+
+	// inline asm
+	st.v4.u16 	[%rd226], {%rs150, %rs151, %rs152, %rs146};
+	bra.uni 	BB0_122;
+
+BB0_104:
+	mov.u64 	%rd239, image_RNM2;
+	cvta.global.u64 	%rd234, %rd239;
+	mov.u32 	%r199, 8;
+	// inline asm
+	call (%rd233), _rt_buffer_get_64, (%rd234, %r32, %r199, %rd11, %rd12, %rd20, %rd20);
+	// inline asm
+	mov.f32 	%f929, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs157, %f929;}
+
+	// inline asm
+	st.v4.u16 	[%rd233], {%rs157, %rs157, %rs157, %rs146};
+	bra.uni 	BB0_122;
+
+BB0_24:
+	setp.geu.f32	%p44, %f1023, 0f00000000;
+	@%p44 bra 	BB0_27;
+
+	cvt.rzi.f32.f32	%f451, %f423;
+	setp.neu.f32	%p45, %f451, 0f3EE8BA2E;
+	selp.f32	%f1026, 0f7FFFFFFF, %f1026, %p45;
+
+BB0_27:
+	add.f32 	%f453, %f49, 0f3EE8BA2E;
+	mov.b32 	 %r82, %f453;
+	setp.lt.s32	%p47, %r82, 2139095040;
+	@%p47 bra 	BB0_32;
+
+	setp.gtu.f32	%p48, %f49, 0f7F800000;
+	@%p48 bra 	BB0_31;
+	bra.uni 	BB0_29;
+
+BB0_31:
+	add.f32 	%f1026, %f1023, 0f3EE8BA2E;
+	bra.uni 	BB0_32;
+
+BB0_29:
+	setp.neu.f32	%p49, %f49, 0f7F800000;
+	@%p49 bra 	BB0_32;
+
+	selp.f32	%f1026, 0fFF800000, 0f7F800000, %p2;
+
+BB0_32:
+	mul.f32 	%f454, %f1026, 0f437F0000;
+	setp.eq.f32	%p50, %f1023, 0f3F800000;
+	selp.f32	%f455, 0f437F0000, %f454, %p50;
+	cvt.rzi.u32.f32	%r83, %f455;
+	cvt.u16.u32	%rs17, %r83;
+	mov.u16 	%rs18, 255;
+	st.v2.u8 	[%rd31], {%rs17, %rs18};
+	ld.global.u32 	%r240, [imageEnabled];
+
+BB0_33:
+	and.b32  	%r84, %r240, 1;
+	setp.eq.b32	%p51, %r84, 1;
+	@!%p51 bra 	BB0_68;
+	bra.uni 	BB0_34;
+
+BB0_34:
+	mov.f32 	%f988, 0fB5BFBE8E;
+	mov.f32 	%f987, 0fBF317200;
+	mov.f32 	%f986, 0f35BFBE8E;
+	mov.f32 	%f985, 0f3F317200;
+	mov.f32 	%f984, 0f3DAAAABD;
+	mov.f32 	%f983, 0f3C4CAF63;
+	mov.f32 	%f982, 0f3B18F0FE;
+	mov.f32 	%f458, 0f3E666666;
+	cvt.rzi.f32.f32	%f459, %f458;
+	fma.rn.f32 	%f460, %f459, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f61, %f460;
+	abs.f32 	%f62, %f45;
+	setp.lt.f32	%p52, %f62, 0f00800000;
+	mul.f32 	%f461, %f62, 0f4B800000;
+	selp.f32	%f462, 0fC3170000, 0fC2FE0000, %p52;
+	selp.f32	%f463, %f461, %f62, %p52;
+	mov.b32 	 %r85, %f463;
+	and.b32  	%r86, %r85, 8388607;
+	or.b32  	%r87, %r86, 1065353216;
+	mov.b32 	 %f464, %r87;
+	shr.u32 	%r88, %r85, 23;
+	cvt.rn.f32.u32	%f465, %r88;
+	add.f32 	%f466, %f462, %f465;
+	setp.gt.f32	%p53, %f464, 0f3FB504F3;
+	mul.f32 	%f467, %f464, 0f3F000000;
+	add.f32 	%f468, %f466, 0f3F800000;
+	selp.f32	%f469, %f467, %f464, %p53;
+	selp.f32	%f470, %f468, %f466, %p53;
+	add.f32 	%f471, %f469, 0fBF800000;
+	add.f32 	%f457, %f469, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f456,%f457;
+	// inline asm
+	add.f32 	%f472, %f471, %f471;
+	mul.f32 	%f473, %f456, %f472;
+	mul.f32 	%f474, %f473, %f473;
+	fma.rn.f32 	%f477, %f982, %f474, %f983;
+	fma.rn.f32 	%f479, %f477, %f474, %f984;
+	mul.rn.f32 	%f480, %f479, %f474;
+	mul.rn.f32 	%f481, %f480, %f473;
+	sub.f32 	%f482, %f471, %f473;
+	neg.f32 	%f483, %f473;
+	add.f32 	%f484, %f482, %f482;
+	fma.rn.f32 	%f485, %f483, %f471, %f484;
+	mul.rn.f32 	%f486, %f456, %f485;
+	add.f32 	%f487, %f481, %f473;
+	sub.f32 	%f488, %f473, %f487;
+	add.f32 	%f489, %f481, %f488;
+	add.f32 	%f490, %f486, %f489;
+	add.f32 	%f491, %f487, %f490;
+	sub.f32 	%f492, %f487, %f491;
+	add.f32 	%f493, %f490, %f492;
+	mul.rn.f32 	%f495, %f470, %f985;
+	mul.rn.f32 	%f497, %f470, %f986;
+	add.f32 	%f498, %f495, %f491;
+	sub.f32 	%f499, %f495, %f498;
+	add.f32 	%f500, %f491, %f499;
+	add.f32 	%f501, %f493, %f500;
+	add.f32 	%f502, %f497, %f501;
+	add.f32 	%f503, %f498, %f502;
+	sub.f32 	%f504, %f498, %f503;
+	add.f32 	%f505, %f502, %f504;
+	mov.f32 	%f506, 0f3EE66666;
+	mul.rn.f32 	%f507, %f506, %f503;
+	neg.f32 	%f508, %f507;
+	fma.rn.f32 	%f509, %f506, %f503, %f508;
+	fma.rn.f32 	%f510, %f506, %f505, %f509;
+	mov.f32 	%f511, 0f00000000;
+	fma.rn.f32 	%f512, %f511, %f503, %f510;
+	add.rn.f32 	%f513, %f507, %f512;
+	neg.f32 	%f514, %f513;
+	add.rn.f32 	%f515, %f507, %f514;
+	add.rn.f32 	%f516, %f515, %f512;
+	mov.b32 	 %r89, %f513;
+	setp.eq.s32	%p54, %r89, 1118925336;
+	add.s32 	%r90, %r89, -1;
+	mov.b32 	 %f517, %r90;
+	add.f32 	%f518, %f516, 0f37000000;
+	selp.f32	%f519, %f517, %f513, %p54;
+	selp.f32	%f63, %f518, %f516, %p54;
+	mul.f32 	%f520, %f519, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f521, %f520;
+	fma.rn.f32 	%f523, %f521, %f987, %f519;
+	fma.rn.f32 	%f525, %f521, %f988, %f523;
+	mul.f32 	%f526, %f525, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f527, %f526;
+	add.f32 	%f528, %f521, 0f00000000;
+	ex2.approx.f32 	%f529, %f528;
+	mul.f32 	%f530, %f527, %f529;
+	setp.lt.f32	%p55, %f519, 0fC2D20000;
+	selp.f32	%f531, 0f00000000, %f530, %p55;
+	setp.gt.f32	%p56, %f519, 0f42D20000;
+	selp.f32	%f1027, 0f7F800000, %f531, %p56;
+	setp.eq.f32	%p57, %f1027, 0f7F800000;
+	@%p57 bra 	BB0_36;
+
+	fma.rn.f32 	%f1027, %f1027, %f63, %f1027;
+
+BB0_36:
+	setp.lt.f32	%p58, %f45, 0f00000000;
+	setp.eq.f32	%p59, %f61, 0f3F800000;
+	and.pred  	%p3, %p58, %p59;
+	mov.b32 	 %r91, %f1027;
+	xor.b32  	%r92, %r91, -2147483648;
+	mov.b32 	 %f532, %r92;
+	selp.f32	%f1029, %f532, %f1027, %p3;
+	setp.eq.f32	%p60, %f45, 0f00000000;
+	@%p60 bra 	BB0_39;
+	bra.uni 	BB0_37;
+
+BB0_39:
+	add.f32 	%f535, %f45, %f45;
+	selp.f32	%f1029, %f535, 0f00000000, %p59;
+	bra.uni 	BB0_40;
+
+BB0_37:
+	setp.geu.f32	%p61, %f45, 0f00000000;
+	@%p61 bra 	BB0_40;
+
+	cvt.rzi.f32.f32	%f534, %f506;
+	setp.neu.f32	%p62, %f534, 0f3EE66666;
+	selp.f32	%f1029, 0f7FFFFFFF, %f1029, %p62;
+
+BB0_40:
+	add.f32 	%f536, %f62, 0f3EE66666;
+	mov.b32 	 %r93, %f536;
+	setp.lt.s32	%p64, %r93, 2139095040;
+	@%p64 bra 	BB0_45;
+
+	setp.gtu.f32	%p65, %f62, 0f7F800000;
+	@%p65 bra 	BB0_44;
+	bra.uni 	BB0_42;
+
+BB0_44:
+	add.f32 	%f1029, %f45, 0f3EE66666;
+	bra.uni 	BB0_45;
+
+BB0_42:
+	setp.neu.f32	%p66, %f62, 0f7F800000;
+	@%p66 bra 	BB0_45;
+
+	selp.f32	%f1029, 0fFF800000, 0f7F800000, %p3;
+
+BB0_45:
+	mov.f32 	%f995, 0fB5BFBE8E;
+	mov.f32 	%f994, 0fBF317200;
+	mov.f32 	%f993, 0f35BFBE8E;
+	mov.f32 	%f992, 0f3F317200;
+	mov.f32 	%f991, 0f3DAAAABD;
+	mov.f32 	%f990, 0f3C4CAF63;
+	mov.f32 	%f989, 0f3B18F0FE;
+	setp.eq.f32	%p67, %f45, 0f3F800000;
+	selp.f32	%f74, 0f3F800000, %f1029, %p67;
+	abs.f32 	%f75, %f46;
+	setp.lt.f32	%p68, %f75, 0f00800000;
+	mul.f32 	%f539, %f75, 0f4B800000;
+	selp.f32	%f540, 0fC3170000, 0fC2FE0000, %p68;
+	selp.f32	%f541, %f539, %f75, %p68;
+	mov.b32 	 %r94, %f541;
+	and.b32  	%r95, %r94, 8388607;
+	or.b32  	%r96, %r95, 1065353216;
+	mov.b32 	 %f542, %r96;
+	shr.u32 	%r97, %r94, 23;
+	cvt.rn.f32.u32	%f543, %r97;
+	add.f32 	%f544, %f540, %f543;
+	setp.gt.f32	%p69, %f542, 0f3FB504F3;
+	mul.f32 	%f545, %f542, 0f3F000000;
+	add.f32 	%f546, %f544, 0f3F800000;
+	selp.f32	%f547, %f545, %f542, %p69;
+	selp.f32	%f548, %f546, %f544, %p69;
+	add.f32 	%f549, %f547, 0fBF800000;
+	add.f32 	%f538, %f547, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f537,%f538;
+	// inline asm
+	add.f32 	%f550, %f549, %f549;
+	mul.f32 	%f551, %f537, %f550;
+	mul.f32 	%f552, %f551, %f551;
+	fma.rn.f32 	%f555, %f989, %f552, %f990;
+	fma.rn.f32 	%f557, %f555, %f552, %f991;
+	mul.rn.f32 	%f558, %f557, %f552;
+	mul.rn.f32 	%f559, %f558, %f551;
+	sub.f32 	%f560, %f549, %f551;
+	neg.f32 	%f561, %f551;
+	add.f32 	%f562, %f560, %f560;
+	fma.rn.f32 	%f563, %f561, %f549, %f562;
+	mul.rn.f32 	%f564, %f537, %f563;
+	add.f32 	%f565, %f559, %f551;
+	sub.f32 	%f566, %f551, %f565;
+	add.f32 	%f567, %f559, %f566;
+	add.f32 	%f568, %f564, %f567;
+	add.f32 	%f569, %f565, %f568;
+	sub.f32 	%f570, %f565, %f569;
+	add.f32 	%f571, %f568, %f570;
+	mul.rn.f32 	%f573, %f548, %f992;
+	mul.rn.f32 	%f575, %f548, %f993;
+	add.f32 	%f576, %f573, %f569;
+	sub.f32 	%f577, %f573, %f576;
+	add.f32 	%f578, %f569, %f577;
+	add.f32 	%f579, %f571, %f578;
+	add.f32 	%f580, %f575, %f579;
+	add.f32 	%f581, %f576, %f580;
+	sub.f32 	%f582, %f576, %f581;
+	add.f32 	%f583, %f580, %f582;
+	mul.rn.f32 	%f585, %f506, %f581;
+	neg.f32 	%f586, %f585;
+	fma.rn.f32 	%f587, %f506, %f581, %f586;
+	fma.rn.f32 	%f588, %f506, %f583, %f587;
+	fma.rn.f32 	%f590, %f511, %f581, %f588;
+	add.rn.f32 	%f591, %f585, %f590;
+	neg.f32 	%f592, %f591;
+	add.rn.f32 	%f593, %f585, %f592;
+	add.rn.f32 	%f594, %f593, %f590;
+	mov.b32 	 %r98, %f591;
+	setp.eq.s32	%p70, %r98, 1118925336;
+	add.s32 	%r99, %r98, -1;
+	mov.b32 	 %f595, %r99;
+	add.f32 	%f596, %f594, 0f37000000;
+	selp.f32	%f597, %f595, %f591, %p70;
+	selp.f32	%f76, %f596, %f594, %p70;
+	mul.f32 	%f598, %f597, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f599, %f598;
+	fma.rn.f32 	%f601, %f599, %f994, %f597;
+	fma.rn.f32 	%f603, %f599, %f995, %f601;
+	mul.f32 	%f604, %f603, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f605, %f604;
+	add.f32 	%f606, %f599, 0f00000000;
+	ex2.approx.f32 	%f607, %f606;
+	mul.f32 	%f608, %f605, %f607;
+	setp.lt.f32	%p71, %f597, 0fC2D20000;
+	selp.f32	%f609, 0f00000000, %f608, %p71;
+	setp.gt.f32	%p72, %f597, 0f42D20000;
+	selp.f32	%f1030, 0f7F800000, %f609, %p72;
+	setp.eq.f32	%p73, %f1030, 0f7F800000;
+	@%p73 bra 	BB0_47;
+
+	fma.rn.f32 	%f1030, %f1030, %f76, %f1030;
+
+BB0_47:
+	setp.lt.f32	%p74, %f46, 0f00000000;
+	and.pred  	%p4, %p74, %p59;
+	mov.b32 	 %r100, %f1030;
+	xor.b32  	%r101, %r100, -2147483648;
+	mov.b32 	 %f610, %r101;
+	selp.f32	%f1032, %f610, %f1030, %p4;
+	setp.eq.f32	%p76, %f46, 0f00000000;
+	@%p76 bra 	BB0_50;
+	bra.uni 	BB0_48;
+
+BB0_50:
+	add.f32 	%f613, %f46, %f46;
+	selp.f32	%f1032, %f613, 0f00000000, %p59;
+	bra.uni 	BB0_51;
+
+BB0_48:
+	setp.geu.f32	%p77, %f46, 0f00000000;
+	@%p77 bra 	BB0_51;
+
+	cvt.rzi.f32.f32	%f612, %f506;
+	setp.neu.f32	%p78, %f612, 0f3EE66666;
+	selp.f32	%f1032, 0f7FFFFFFF, %f1032, %p78;
+
+BB0_51:
+	add.f32 	%f614, %f75, 0f3EE66666;
+	mov.b32 	 %r102, %f614;
+	setp.lt.s32	%p80, %r102, 2139095040;
+	@%p80 bra 	BB0_56;
+
+	setp.gtu.f32	%p81, %f75, 0f7F800000;
+	@%p81 bra 	BB0_55;
+	bra.uni 	BB0_53;
+
+BB0_55:
+	add.f32 	%f1032, %f46, 0f3EE66666;
+	bra.uni 	BB0_56;
+
+BB0_53:
+	setp.neu.f32	%p82, %f75, 0f7F800000;
+	@%p82 bra 	BB0_56;
+
+	selp.f32	%f1032, 0fFF800000, 0f7F800000, %p4;
+
+BB0_56:
+	mov.f32 	%f1002, 0fB5BFBE8E;
+	mov.f32 	%f1001, 0fBF317200;
+	mov.f32 	%f1000, 0f35BFBE8E;
+	mov.f32 	%f999, 0f3F317200;
+	mov.f32 	%f998, 0f3DAAAABD;
+	mov.f32 	%f997, 0f3C4CAF63;
+	mov.f32 	%f996, 0f3B18F0FE;
+	setp.eq.f32	%p83, %f46, 0f3F800000;
+	selp.f32	%f87, 0f3F800000, %f1032, %p83;
+	abs.f32 	%f88, %f47;
+	setp.lt.f32	%p84, %f88, 0f00800000;
+	mul.f32 	%f617, %f88, 0f4B800000;
+	selp.f32	%f618, 0fC3170000, 0fC2FE0000, %p84;
+	selp.f32	%f619, %f617, %f88, %p84;
+	mov.b32 	 %r103, %f619;
+	and.b32  	%r104, %r103, 8388607;
+	or.b32  	%r105, %r104, 1065353216;
+	mov.b32 	 %f620, %r105;
+	shr.u32 	%r106, %r103, 23;
+	cvt.rn.f32.u32	%f621, %r106;
+	add.f32 	%f622, %f618, %f621;
+	setp.gt.f32	%p85, %f620, 0f3FB504F3;
+	mul.f32 	%f623, %f620, 0f3F000000;
+	add.f32 	%f624, %f622, 0f3F800000;
+	selp.f32	%f625, %f623, %f620, %p85;
+	selp.f32	%f626, %f624, %f622, %p85;
+	add.f32 	%f627, %f625, 0fBF800000;
+	add.f32 	%f616, %f625, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f615,%f616;
+	// inline asm
+	add.f32 	%f628, %f627, %f627;
+	mul.f32 	%f629, %f615, %f628;
+	mul.f32 	%f630, %f629, %f629;
+	fma.rn.f32 	%f633, %f996, %f630, %f997;
+	fma.rn.f32 	%f635, %f633, %f630, %f998;
+	mul.rn.f32 	%f636, %f635, %f630;
+	mul.rn.f32 	%f637, %f636, %f629;
+	sub.f32 	%f638, %f627, %f629;
+	neg.f32 	%f639, %f629;
+	add.f32 	%f640, %f638, %f638;
+	fma.rn.f32 	%f641, %f639, %f627, %f640;
+	mul.rn.f32 	%f642, %f615, %f641;
+	add.f32 	%f643, %f637, %f629;
+	sub.f32 	%f644, %f629, %f643;
+	add.f32 	%f645, %f637, %f644;
+	add.f32 	%f646, %f642, %f645;
+	add.f32 	%f647, %f643, %f646;
+	sub.f32 	%f648, %f643, %f647;
+	add.f32 	%f649, %f646, %f648;
+	mul.rn.f32 	%f651, %f626, %f999;
+	mul.rn.f32 	%f653, %f626, %f1000;
+	add.f32 	%f654, %f651, %f647;
+	sub.f32 	%f655, %f651, %f654;
+	add.f32 	%f656, %f647, %f655;
+	add.f32 	%f657, %f649, %f656;
+	add.f32 	%f658, %f653, %f657;
+	add.f32 	%f659, %f654, %f658;
+	sub.f32 	%f660, %f654, %f659;
+	add.f32 	%f661, %f658, %f660;
+	mul.rn.f32 	%f663, %f506, %f659;
+	neg.f32 	%f664, %f663;
+	fma.rn.f32 	%f665, %f506, %f659, %f664;
+	fma.rn.f32 	%f666, %f506, %f661, %f665;
+	fma.rn.f32 	%f668, %f511, %f659, %f666;
+	add.rn.f32 	%f669, %f663, %f668;
+	neg.f32 	%f670, %f669;
+	add.rn.f32 	%f671, %f663, %f670;
+	add.rn.f32 	%f672, %f671, %f668;
+	mov.b32 	 %r107, %f669;
+	setp.eq.s32	%p86, %r107, 1118925336;
+	add.s32 	%r108, %r107, -1;
+	mov.b32 	 %f673, %r108;
+	add.f32 	%f674, %f672, 0f37000000;
+	selp.f32	%f675, %f673, %f669, %p86;
+	selp.f32	%f89, %f674, %f672, %p86;
+	mul.f32 	%f676, %f675, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f677, %f676;
+	fma.rn.f32 	%f679, %f677, %f1001, %f675;
+	fma.rn.f32 	%f681, %f677, %f1002, %f679;
+	mul.f32 	%f682, %f681, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f683, %f682;
+	add.f32 	%f684, %f677, 0f00000000;
+	ex2.approx.f32 	%f685, %f684;
+	mul.f32 	%f686, %f683, %f685;
+	setp.lt.f32	%p87, %f675, 0fC2D20000;
+	selp.f32	%f687, 0f00000000, %f686, %p87;
+	setp.gt.f32	%p88, %f675, 0f42D20000;
+	selp.f32	%f1033, 0f7F800000, %f687, %p88;
+	setp.eq.f32	%p89, %f1033, 0f7F800000;
+	@%p89 bra 	BB0_58;
+
+	fma.rn.f32 	%f1033, %f1033, %f89, %f1033;
+
+BB0_58:
+	setp.lt.f32	%p90, %f47, 0f00000000;
+	and.pred  	%p5, %p90, %p59;
+	mov.b32 	 %r109, %f1033;
+	xor.b32  	%r110, %r109, -2147483648;
+	mov.b32 	 %f688, %r110;
+	selp.f32	%f1035, %f688, %f1033, %p5;
+	setp.eq.f32	%p92, %f47, 0f00000000;
+	@%p92 bra 	BB0_61;
+	bra.uni 	BB0_59;
+
+BB0_61:
+	add.f32 	%f691, %f47, %f47;
+	selp.f32	%f1035, %f691, 0f00000000, %p59;
+	bra.uni 	BB0_62;
+
+BB0_59:
+	setp.geu.f32	%p93, %f47, 0f00000000;
+	@%p93 bra 	BB0_62;
+
+	cvt.rzi.f32.f32	%f690, %f506;
+	setp.neu.f32	%p94, %f690, 0f3EE66666;
+	selp.f32	%f1035, 0f7FFFFFFF, %f1035, %p94;
+
+BB0_62:
+	add.f32 	%f692, %f88, 0f3EE66666;
+	mov.b32 	 %r111, %f692;
+	setp.lt.s32	%p96, %r111, 2139095040;
+	@%p96 bra 	BB0_67;
+
+	setp.gtu.f32	%p97, %f88, 0f7F800000;
+	@%p97 bra 	BB0_66;
+	bra.uni 	BB0_64;
+
+BB0_66:
+	add.f32 	%f1035, %f47, 0f3EE66666;
+	bra.uni 	BB0_67;
+
+BB0_64:
+	setp.neu.f32	%p98, %f88, 0f7F800000;
+	@%p98 bra 	BB0_67;
+
+	selp.f32	%f1035, 0fFF800000, 0f7F800000, %p5;
+
+BB0_67:
+	setp.eq.f32	%p99, %f47, 0f3F800000;
+	selp.f32	%f693, 0f3F800000, %f1035, %p99;
+	cvt.u64.u32	%rd41, %r3;
+	cvt.u64.u32	%rd40, %r2;
+	mov.u64 	%rd44, image;
+	cvta.global.u64 	%rd39, %rd44;
+	// inline asm
+	call (%rd38), _rt_buffer_get_64, (%rd39, %r32, %r33, %rd40, %rd41, %rd20, %rd20);
+	// inline asm
+	cvt.sat.f32.f32	%f694, %f693;
+	mul.f32 	%f695, %f694, 0f437FFD71;
+	cvt.rzi.u32.f32	%r114, %f695;
+	cvt.sat.f32.f32	%f696, %f87;
+	mul.f32 	%f697, %f696, 0f437FFD71;
+	cvt.rzi.u32.f32	%r115, %f697;
+	cvt.sat.f32.f32	%f698, %f74;
+	mul.f32 	%f699, %f698, 0f437FFD71;
+	cvt.rzi.u32.f32	%r116, %f699;
+	cvt.u16.u32	%rs19, %r114;
+	cvt.u16.u32	%rs20, %r116;
+	cvt.u16.u32	%rs21, %r115;
+	mov.u16 	%rs22, 255;
+	st.v4.u8 	[%rd38], {%rs19, %rs21, %rs20, %rs22};
+	ld.global.u32 	%r240, [imageEnabled];
+
+BB0_68:
+	and.b32  	%r117, %r240, 4;
+	setp.eq.s32	%p100, %r117, 0;
+	@%p100 bra 	BB0_72;
+
+	ld.global.u32 	%r118, [additive];
+	setp.eq.s32	%p101, %r118, 0;
+	cvt.u64.u32	%rd4, %r2;
+	cvt.u64.u32	%rd5, %r3;
+	mov.f32 	%f700, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs23, %f700;}
+
+	// inline asm
+	@%p101 bra 	BB0_71;
+
+	mov.u64 	%rd57, image_HDR;
+	cvta.global.u64 	%rd46, %rd57;
+	mov.u32 	%r122, 8;
+	// inline asm
+	call (%rd45), _rt_buffer_get_64, (%rd46, %r32, %r122, %rd4, %rd5, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd45];
+	// inline asm
+	{  cvt.f32.f16 %f701, %rs30;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f702, %rs31;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f703, %rs32;}
+
+	// inline asm
+	// inline asm
+	call (%rd51), _rt_buffer_get_64, (%rd46, %r32, %r122, %rd4, %rd5, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f704, %f45, %f701;
+	add.f32 	%f705, %f46, %f702;
+	add.f32 	%f706, %f47, %f703;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs29, %f706;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs28, %f705;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs27, %f704;}
+
+	// inline asm
+	st.v4.u16 	[%rd51], {%rs27, %rs28, %rs29, %rs23};
+	bra.uni 	BB0_72;
+
+BB0_71:
+	mov.u64 	%rd64, image_HDR;
+	cvta.global.u64 	%rd59, %rd64;
+	mov.u32 	%r124, 8;
+	// inline asm
+	call (%rd58), _rt_buffer_get_64, (%rd59, %r32, %r124, %rd4, %rd5, %rd20, %rd20);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs36, %f47;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs35, %f46;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs34, %f45;}
+
+	// inline asm
+	st.v4.u16 	[%rd58], {%rs34, %rs35, %rs36, %rs23};
+
+BB0_72:
+	mul.f32 	%f713, %f32, %f1023;
+	ld.global.f32 	%f714, [lightColor];
+	mul.f32 	%f100, %f713, %f714;
+	ld.global.f32 	%f715, [lightColor+4];
+	mul.f32 	%f101, %f713, %f715;
+	ld.global.f32 	%f716, [lightColor+8];
+	mul.f32 	%f102, %f713, %f716;
+	ld.global.v2.u32 	{%r127, %r128}, [pixelID];
+	cvt.u64.u32	%rd67, %r127;
+	cvt.u64.u32	%rd68, %r128;
+	mov.u64 	%rd71, uvtangent;
+	cvta.global.u64 	%rd66, %rd71;
+	// inline asm
+	call (%rd65), _rt_buffer_get_64, (%rd66, %r32, %r33, %rd67, %rd68, %rd20, %rd20);
+	// inline asm
+	ld.u32 	%r16, [%rd65];
+	shr.u32 	%r17, %r16, 16;
+	cvt.u16.u32	%rs37, %r17;
+	and.b16  	%rs38, %rs37, 255;
+	cvt.u16.u32	%rs39, %r16;
+	or.b16  	%rs40, %rs39, %rs38;
+	setp.eq.s16	%p102, %rs40, 0;
+	mov.f32 	%f1042, 0f00000000;
+	mov.f32 	%f1036, %f1042;
+	mov.f32 	%f1037, %f1042;
+	mov.f32 	%f1038, %f1042;
+	@%p102 bra 	BB0_74;
+
+	ld.u8 	%rs41, [%rd65+1];
+	and.b16  	%rs43, %rs39, 255;
+	cvt.rn.f32.u16	%f717, %rs43;
+	div.rn.f32 	%f718, %f717, 0f437F0000;
+	fma.rn.f32 	%f719, %f718, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f720, %rs41;
+	div.rn.f32 	%f721, %f720, 0f437F0000;
+	fma.rn.f32 	%f722, %f721, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f723, %rs38;
+	div.rn.f32 	%f724, %f723, 0f437F0000;
+	fma.rn.f32 	%f725, %f724, 0f40000000, 0fBF800000;
+	mul.f32 	%f726, %f722, %f722;
+	fma.rn.f32 	%f727, %f719, %f719, %f726;
+	fma.rn.f32 	%f728, %f725, %f725, %f727;
+	sqrt.rn.f32 	%f729, %f728;
+	rcp.rn.f32 	%f730, %f729;
+	mul.f32 	%f1036, %f719, %f730;
+	mul.f32 	%f1037, %f722, %f730;
+	mul.f32 	%f1038, %f725, %f730;
+
+BB0_74:
+	mul.f32 	%f734, %f1014, %f1037;
+	mul.f32 	%f735, %f1013, %f1038;
+	sub.f32 	%f736, %f735, %f734;
+	mul.f32 	%f737, %f1012, %f1038;
+	mul.f32 	%f738, %f1014, %f1036;
+	sub.f32 	%f739, %f738, %f737;
+	mul.f32 	%f740, %f1013, %f1036;
+	mul.f32 	%f741, %f1012, %f1037;
+	sub.f32 	%f742, %f741, %f740;
+	setp.lt.u32	%p103, %r16, 16777216;
+	selp.f32	%f743, 0fBF800000, 0f3F800000, %p103;
+	mul.f32 	%f744, %f736, %f743;
+	mul.f32 	%f745, %f739, %f743;
+	mul.f32 	%f746, %f742, %f743;
+	mul.f32 	%f747, %f744, 0f00000000;
+	mul.f32 	%f748, %f745, 0f00000000;
+	mul.f32 	%f749, %f746, 0f00000000;
+	fma.rn.f32 	%f750, %f1036, 0f3F5105EC, %f747;
+	fma.rn.f32 	%f751, %f1037, 0f3F5105EC, %f748;
+	fma.rn.f32 	%f752, %f1038, 0f3F5105EC, %f749;
+	mul.f32 	%f109, %f1012, 0f3F13CD3A;
+	add.f32 	%f110, %f109, %f750;
+	mul.f32 	%f111, %f1013, 0f3F13CD3A;
+	add.f32 	%f112, %f111, %f751;
+	mul.f32 	%f113, %f1014, 0f3F13CD3A;
+	add.f32 	%f114, %f113, %f752;
+	ld.global.v2.u32 	{%r133, %r134}, [pixelID];
+	cvt.u64.u32	%rd74, %r133;
+	cvt.u64.u32	%rd75, %r134;
+	// inline asm
+	call (%rd72), _rt_buffer_get_64, (%rd66, %r32, %r33, %rd74, %rd75, %rd20, %rd20);
+	// inline asm
+	ld.u32 	%r18, [%rd72];
+	shr.u32 	%r19, %r18, 16;
+	cvt.u16.u32	%rs46, %r19;
+	and.b16  	%rs47, %rs46, 255;
+	cvt.u16.u32	%rs48, %r18;
+	or.b16  	%rs49, %rs48, %rs47;
+	setp.eq.s16	%p104, %rs49, 0;
+	mov.f32 	%f1039, %f1042;
+	mov.f32 	%f1040, %f1042;
+	mov.f32 	%f1041, %f1042;
+	@%p104 bra 	BB0_76;
+
+	ld.u8 	%rs50, [%rd72+1];
+	and.b16  	%rs52, %rs48, 255;
+	cvt.rn.f32.u16	%f753, %rs52;
+	div.rn.f32 	%f754, %f753, 0f437F0000;
+	fma.rn.f32 	%f755, %f754, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f756, %rs50;
+	div.rn.f32 	%f757, %f756, 0f437F0000;
+	fma.rn.f32 	%f758, %f757, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f759, %rs47;
+	div.rn.f32 	%f760, %f759, 0f437F0000;
+	fma.rn.f32 	%f761, %f760, 0f40000000, 0fBF800000;
+	mul.f32 	%f762, %f758, %f758;
+	fma.rn.f32 	%f763, %f755, %f755, %f762;
+	fma.rn.f32 	%f764, %f761, %f761, %f763;
+	sqrt.rn.f32 	%f765, %f764;
+	rcp.rn.f32 	%f766, %f765;
+	mul.f32 	%f1039, %f755, %f766;
+	mul.f32 	%f1040, %f758, %f766;
+	mul.f32 	%f1041, %f761, %f766;
+
+BB0_76:
+	mul.f32 	%f770, %f1014, %f1040;
+	mul.f32 	%f771, %f1013, %f1041;
+	sub.f32 	%f772, %f771, %f770;
+	mul.f32 	%f773, %f1012, %f1041;
+	mul.f32 	%f774, %f1014, %f1039;
+	sub.f32 	%f775, %f774, %f773;
+	mul.f32 	%f776, %f1013, %f1039;
+	mul.f32 	%f777, %f1012, %f1040;
+	sub.f32 	%f778, %f777, %f776;
+	setp.lt.u32	%p105, %r18, 16777216;
+	selp.f32	%f779, 0fBF800000, 0f3F800000, %p105;
+	mul.f32 	%f780, %f772, %f779;
+	mul.f32 	%f781, %f775, %f779;
+	mul.f32 	%f782, %f778, %f779;
+	mul.f32 	%f783, %f780, 0f3F3504F3;
+	mul.f32 	%f784, %f781, 0f3F3504F3;
+	mul.f32 	%f785, %f782, 0f3F3504F3;
+	fma.rn.f32 	%f786, %f1039, 0fBED105EC, %f783;
+	fma.rn.f32 	%f787, %f1040, 0fBED105EC, %f784;
+	fma.rn.f32 	%f788, %f1041, 0fBED105EC, %f785;
+	add.f32 	%f121, %f109, %f786;
+	add.f32 	%f122, %f111, %f787;
+	add.f32 	%f123, %f113, %f788;
+	ld.global.v2.u32 	{%r139, %r140}, [pixelID];
+	cvt.u64.u32	%rd81, %r139;
+	cvt.u64.u32	%rd82, %r140;
+	// inline asm
+	call (%rd79), _rt_buffer_get_64, (%rd66, %r32, %r33, %rd81, %rd82, %rd20, %rd20);
+	// inline asm
+	ld.u32 	%r20, [%rd79];
+	shr.u32 	%r21, %r20, 16;
+	cvt.u16.u32	%rs55, %r21;
+	and.b16  	%rs56, %rs55, 255;
+	cvt.u16.u32	%rs57, %r20;
+	or.b16  	%rs58, %rs57, %rs56;
+	setp.eq.s16	%p106, %rs58, 0;
+	mov.f32 	%f1043, %f1042;
+	mov.f32 	%f1044, %f1042;
+	@%p106 bra 	BB0_78;
+
+	ld.u8 	%rs59, [%rd79+1];
+	and.b16  	%rs61, %rs57, 255;
+	cvt.rn.f32.u16	%f789, %rs61;
+	div.rn.f32 	%f790, %f789, 0f437F0000;
+	fma.rn.f32 	%f791, %f790, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f792, %rs59;
+	div.rn.f32 	%f793, %f792, 0f437F0000;
+	fma.rn.f32 	%f794, %f793, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f795, %rs56;
+	div.rn.f32 	%f796, %f795, 0f437F0000;
+	fma.rn.f32 	%f797, %f796, 0f40000000, 0fBF800000;
+	mul.f32 	%f798, %f794, %f794;
+	fma.rn.f32 	%f799, %f791, %f791, %f798;
+	fma.rn.f32 	%f800, %f797, %f797, %f799;
+	sqrt.rn.f32 	%f801, %f800;
+	rcp.rn.f32 	%f802, %f801;
+	mul.f32 	%f1042, %f791, %f802;
+	mul.f32 	%f1043, %f794, %f802;
+	mul.f32 	%f1044, %f797, %f802;
+
+BB0_78:
+	sub.f32 	%f1008, %f11, %f12;
+	mul.f32 	%f1007, %f1008, %f168;
+	sub.f32 	%f1006, %f7, %f8;
+	mul.f32 	%f1005, %f1006, %f168;
+	sub.f32 	%f1004, %f9, %f10;
+	mul.f32 	%f1003, %f1004, %f168;
+	mul.f32 	%f804, %f1014, %f1043;
+	mul.f32 	%f805, %f1013, %f1044;
+	sub.f32 	%f806, %f805, %f804;
+	mul.f32 	%f807, %f1012, %f1044;
+	mul.f32 	%f808, %f1014, %f1042;
+	sub.f32 	%f809, %f808, %f807;
+	mul.f32 	%f810, %f1013, %f1042;
+	mul.f32 	%f811, %f1012, %f1043;
+	sub.f32 	%f812, %f811, %f810;
+	setp.lt.u32	%p107, %r20, 16777216;
+	selp.f32	%f813, 0fBF800000, 0f3F800000, %p107;
+	mul.f32 	%f814, %f806, %f813;
+	mul.f32 	%f815, %f809, %f813;
+	mul.f32 	%f816, %f812, %f813;
+	mul.f32 	%f817, %f814, 0fBF3504F3;
+	mul.f32 	%f818, %f815, 0fBF3504F3;
+	mul.f32 	%f819, %f816, 0fBF3504F3;
+	fma.rn.f32 	%f820, %f1042, 0fBED105EC, %f817;
+	fma.rn.f32 	%f821, %f1043, 0fBED105EC, %f818;
+	fma.rn.f32 	%f822, %f1044, 0fBED105EC, %f819;
+	add.f32 	%f823, %f109, %f820;
+	add.f32 	%f824, %f111, %f821;
+	add.f32 	%f825, %f113, %f822;
+	mul.f32 	%f826, %f1003, %f112;
+	fma.rn.f32 	%f827, %f1005, %f110, %f826;
+	fma.rn.f32 	%f828, %f1007, %f114, %f827;
+	cvt.sat.f32.f32	%f829, %f828;
+	mul.f32 	%f830, %f100, %f829;
+	mul.f32 	%f831, %f101, %f829;
+	mul.f32 	%f832, %f102, %f829;
+	mul.f32 	%f833, %f1003, %f122;
+	fma.rn.f32 	%f834, %f1005, %f121, %f833;
+	fma.rn.f32 	%f835, %f1007, %f123, %f834;
+	cvt.sat.f32.f32	%f836, %f835;
+	mul.f32 	%f837, %f100, %f836;
+	mul.f32 	%f838, %f101, %f836;
+	mul.f32 	%f839, %f102, %f836;
+	mul.f32 	%f840, %f1003, %f824;
+	fma.rn.f32 	%f841, %f1005, %f823, %f840;
+	fma.rn.f32 	%f842, %f1007, %f825, %f841;
+	cvt.sat.f32.f32	%f843, %f842;
+	mul.f32 	%f844, %f100, %f843;
+	mul.f32 	%f845, %f101, %f843;
+	mul.f32 	%f846, %f102, %f843;
+	cvt.sat.f32.f32	%f847, %f31;
+	mul.f32 	%f848, %f100, %f847;
+	mul.f32 	%f849, %f101, %f847;
+	mul.f32 	%f850, %f102, %f847;
+	add.f32 	%f851, %f830, %f837;
+	add.f32 	%f852, %f831, %f838;
+	add.f32 	%f853, %f832, %f839;
+	add.f32 	%f854, %f851, %f844;
+	add.f32 	%f855, %f852, %f845;
+	add.f32 	%f856, %f853, %f846;
+	mul.f32 	%f857, %f854, 0f3F13CD3A;
+	mul.f32 	%f858, %f855, 0f3F13CD3A;
+	mul.f32 	%f859, %f856, 0f3F13CD3A;
+	div.rn.f32 	%f860, %f848, %f857;
+	div.rn.f32 	%f861, %f849, %f858;
+	div.rn.f32 	%f862, %f850, %f859;
+	setp.eq.f32	%p108, %f848, 0f00000000;
+	selp.f32	%f863, 0f00000000, %f860, %p108;
+	setp.eq.f32	%p109, %f849, 0f00000000;
+	selp.f32	%f864, 0f00000000, %f861, %p109;
+	setp.eq.f32	%p110, %f850, 0f00000000;
+	selp.f32	%f865, 0f00000000, %f862, %p110;
+	mul.f32 	%f130, %f830, %f863;
+	mul.f32 	%f131, %f831, %f864;
+	mul.f32 	%f132, %f832, %f865;
+	mul.f32 	%f133, %f837, %f863;
+	mul.f32 	%f134, %f838, %f864;
+	mul.f32 	%f135, %f839, %f865;
+	mul.f32 	%f136, %f844, %f863;
+	mul.f32 	%f137, %f845, %f864;
+	mul.f32 	%f138, %f846, %f865;
+	ld.global.u32 	%r143, [additive];
+	setp.eq.s32	%p111, %r143, 0;
+	cvt.u64.u32	%rd9, %r2;
+	cvt.u64.u32	%rd10, %r3;
+	mov.f32 	%f803, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs64, %f803;}
+
+	// inline asm
+	@%p111 bra 	BB0_80;
+
+	mov.u64 	%rd98, image_RNM0;
+	cvta.global.u64 	%rd87, %rd98;
+	mov.u32 	%r147, 8;
+	// inline asm
+	call (%rd86), _rt_buffer_get_64, (%rd87, %r32, %r147, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs71, %rs72, %rs73, %rs74}, [%rd86];
+	// inline asm
+	{  cvt.f32.f16 %f866, %rs71;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f867, %rs72;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f868, %rs73;}
+
+	// inline asm
+	// inline asm
+	call (%rd92), _rt_buffer_get_64, (%rd87, %r32, %r147, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f869, %f130, %f866;
+	add.f32 	%f870, %f131, %f867;
+	add.f32 	%f871, %f132, %f868;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs70, %f871;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs69, %f870;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs68, %f869;}
+
+	// inline asm
+	st.v4.u16 	[%rd92], {%rs68, %rs69, %rs70, %rs64};
+	bra.uni 	BB0_81;
+
+BB0_80:
+	mov.u64 	%rd105, image_RNM0;
+	cvta.global.u64 	%rd100, %rd105;
+	mov.u32 	%r149, 8;
+	// inline asm
+	call (%rd99), _rt_buffer_get_64, (%rd100, %r32, %r149, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs77, %f132;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs76, %f131;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs75, %f130;}
+
+	// inline asm
+	st.v4.u16 	[%rd99], {%rs75, %rs76, %rs77, %rs64};
+
+BB0_81:
+	ld.global.u32 	%r150, [additive];
+	setp.eq.s32	%p112, %r150, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs78, %f803;}
+
+	// inline asm
+	@%p112 bra 	BB0_83;
+
+	mov.u64 	%rd118, image_RNM1;
+	cvta.global.u64 	%rd107, %rd118;
+	mov.u32 	%r154, 8;
+	// inline asm
+	call (%rd106), _rt_buffer_get_64, (%rd107, %r32, %r154, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs85, %rs86, %rs87, %rs88}, [%rd106];
+	// inline asm
+	{  cvt.f32.f16 %f876, %rs85;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f877, %rs86;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f878, %rs87;}
+
+	// inline asm
+	// inline asm
+	call (%rd112), _rt_buffer_get_64, (%rd107, %r32, %r154, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f879, %f133, %f876;
+	add.f32 	%f880, %f134, %f877;
+	add.f32 	%f881, %f135, %f878;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs84, %f881;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs83, %f880;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs82, %f879;}
+
+	// inline asm
+	st.v4.u16 	[%rd112], {%rs82, %rs83, %rs84, %rs78};
+	bra.uni 	BB0_84;
+
+BB0_83:
+	mov.u64 	%rd125, image_RNM1;
+	cvta.global.u64 	%rd120, %rd125;
+	mov.u32 	%r156, 8;
+	// inline asm
+	call (%rd119), _rt_buffer_get_64, (%rd120, %r32, %r156, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs91, %f135;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs90, %f134;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs89, %f133;}
+
+	// inline asm
+	st.v4.u16 	[%rd119], {%rs89, %rs90, %rs91, %rs78};
+
+BB0_84:
+	ld.global.u32 	%r157, [additive];
+	setp.eq.s32	%p113, %r157, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs92, %f803;}
+
+	// inline asm
+	@%p113 bra 	BB0_86;
+
+	mov.u64 	%rd138, image_RNM2;
+	cvta.global.u64 	%rd127, %rd138;
+	mov.u32 	%r161, 8;
+	// inline asm
+	call (%rd126), _rt_buffer_get_64, (%rd127, %r32, %r161, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	ld.v4.u16 	{%rs99, %rs100, %rs101, %rs102}, [%rd126];
+	// inline asm
+	{  cvt.f32.f16 %f886, %rs99;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f887, %rs100;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f888, %rs101;}
+
+	// inline asm
+	// inline asm
+	call (%rd132), _rt_buffer_get_64, (%rd127, %r32, %r161, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	add.f32 	%f889, %f136, %f886;
+	add.f32 	%f890, %f137, %f887;
+	add.f32 	%f891, %f138, %f888;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs98, %f891;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs97, %f890;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs96, %f889;}
+
+	// inline asm
+	st.v4.u16 	[%rd132], {%rs96, %rs97, %rs98, %rs92};
+	bra.uni 	BB0_122;
+
+BB0_86:
+	mov.u64 	%rd145, image_RNM2;
+	cvta.global.u64 	%rd140, %rd145;
+	mov.u32 	%r163, 8;
+	// inline asm
+	call (%rd139), _rt_buffer_get_64, (%rd140, %r32, %r163, %rd9, %rd10, %rd20, %rd20);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs105, %f138;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs104, %f137;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs103, %f136;}
+
+	// inline asm
+	st.v4.u16 	[%rd139], {%rs103, %rs104, %rs105, %rs92};
+
+BB0_122:
+	ret;
+}
+
+