move to self host

1 files changed, 2382 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmBatchPointLightSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmBatchPointLightSH.ptx
new file mode 100644
index 00000000..3eb90e6c
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmBatchPointLightSH.ptx
@@ -0,0 +1,2382 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_RNM0[1];
+.global .align 1 .b8 image_RNM1[1];
+.global .align 1 .b8 image_RNM2[1];
+.global .align 1 .b8 image_RNM3[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 4 .u32 ignoreNormal;
+.global .align 1 .b8 localLights[1];
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[4];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<136>;
+	.reg .b16 	%rs<158>;
+	.reg .f32 	%f<1395>;
+	.reg .b32 	%r<248>;
+	.reg .b64 	%rd<272>;
+
+
+	mov.u64 	%rd271, __local_depot0;
+	cvta.local.u64 	%SP, %rd271;
+	ld.global.v2.u32 	{%r29, %r30}, [pixelID];
+	cvt.u64.u32	%rd10, %r29;
+	cvt.u64.u32	%rd11, %r30;
+	mov.u64 	%rd14, uvnormal;
+	cvta.global.u64 	%rd9, %rd14;
+	mov.u32 	%r27, 2;
+	mov.u32 	%r28, 4;
+	mov.u64 	%rd13, 0;
+	// inline asm
+	call (%rd8), _rt_buffer_get_64, (%rd9, %r27, %r28, %rd10, %rd11, %rd13, %rd13);
+	// inline asm
+	ld.u32 	%r1, [%rd8];
+	shr.u32 	%r33, %r1, 16;
+	cvt.u16.u32	%rs1, %r33;
+	and.b16  	%rs7, %rs1, 255;
+	cvt.u16.u32	%rs8, %r1;
+	or.b16  	%rs9, %rs8, %rs7;
+	setp.eq.s16	%p8, %rs9, 0;
+	mov.f32 	%f1304, 0f00000000;
+	mov.f32 	%f1305, %f1304;
+	mov.f32 	%f1306, %f1304;
+	@%p8 bra 	BB0_2;
+
+	ld.u8 	%rs10, [%rd8+1];
+	and.b16  	%rs12, %rs8, 255;
+	cvt.rn.f32.u16	%f263, %rs12;
+	div.rn.f32 	%f264, %f263, 0f437F0000;
+	fma.rn.f32 	%f265, %f264, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f266, %rs10;
+	div.rn.f32 	%f267, %f266, 0f437F0000;
+	fma.rn.f32 	%f268, %f267, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f269, %rs7;
+	div.rn.f32 	%f270, %f269, 0f437F0000;
+	fma.rn.f32 	%f271, %f270, 0f40000000, 0fBF800000;
+	mul.f32 	%f272, %f268, %f268;
+	fma.rn.f32 	%f273, %f265, %f265, %f272;
+	fma.rn.f32 	%f274, %f271, %f271, %f273;
+	sqrt.rn.f32 	%f275, %f274;
+	rcp.rn.f32 	%f276, %f275;
+	mul.f32 	%f1304, %f265, %f276;
+	mul.f32 	%f1305, %f268, %f276;
+	mul.f32 	%f1306, %f271, %f276;
+
+BB0_2:
+	ld.global.v2.u32 	{%r34, %r35}, [pixelID];
+	ld.global.v2.u32 	{%r37, %r38}, [tileInfo];
+	add.s32 	%r2, %r34, %r37;
+	add.s32 	%r3, %r35, %r38;
+	setp.eq.f32	%p9, %f1305, 0f00000000;
+	setp.eq.f32	%p10, %f1304, 0f00000000;
+	and.pred  	%p11, %p10, %p9;
+	setp.eq.f32	%p12, %f1306, 0f00000000;
+	and.pred  	%p13, %p11, %p12;
+	@%p13 bra 	BB0_104;
+	bra.uni 	BB0_3;
+
+BB0_104:
+	ld.global.u32 	%r247, [imageEnabled];
+	and.b32  	%r196, %r247, 1;
+	setp.eq.b32	%p127, %r196, 1;
+	@!%p127 bra 	BB0_106;
+	bra.uni 	BB0_105;
+
+BB0_105:
+	cvt.u64.u32	%rd159, %r2;
+	cvt.u64.u32	%rd160, %r3;
+	mov.u64 	%rd163, image;
+	cvta.global.u64 	%rd158, %rd163;
+	// inline asm
+	call (%rd157), _rt_buffer_get_64, (%rd158, %r27, %r28, %rd159, %rd160, %rd13, %rd13);
+	// inline asm
+	mov.u16 	%rs90, 0;
+	st.v4.u8 	[%rd157], {%rs90, %rs90, %rs90, %rs90};
+	ld.global.u32 	%r247, [imageEnabled];
+
+BB0_106:
+	and.b32  	%r199, %r247, 8;
+	setp.eq.s32	%p128, %r199, 0;
+	@%p128 bra 	BB0_108;
+
+	cvt.u64.u32	%rd167, %r3;
+	cvt.u64.u32	%rd166, %r2;
+	mov.u64 	%rd170, image_Mask;
+	cvta.global.u64 	%rd165, %rd170;
+	// inline asm
+	call (%rd164), _rt_buffer_get_64, (%rd165, %r27, %r27, %rd166, %rd167, %rd13, %rd13);
+	// inline asm
+	mov.f32 	%f1268, 0f00000000;
+	cvt.rzi.u32.f32	%r202, %f1268;
+	cvt.u16.u32	%rs91, %r202;
+	mov.u16 	%rs92, 0;
+	st.v2.u8 	[%rd164], {%rs91, %rs92};
+	ld.global.u32 	%r247, [imageEnabled];
+
+BB0_108:
+	cvt.u64.u32	%rd6, %r2;
+	cvt.u64.u32	%rd7, %r3;
+	and.b32  	%r203, %r247, 4;
+	setp.eq.s32	%p129, %r203, 0;
+	@%p129 bra 	BB0_112;
+
+	ld.global.u32 	%r204, [additive];
+	setp.eq.s32	%p130, %r204, 0;
+	@%p130 bra 	BB0_111;
+
+	mov.u64 	%rd183, image_HDR;
+	cvta.global.u64 	%rd172, %rd183;
+	mov.u32 	%r208, 8;
+	// inline asm
+	call (%rd171), _rt_buffer_get_64, (%rd172, %r27, %r208, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs99, %rs100, %rs101, %rs102}, [%rd171];
+	// inline asm
+	{  cvt.f32.f16 %f1269, %rs99;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1270, %rs100;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1271, %rs101;}
+
+	// inline asm
+	// inline asm
+	call (%rd177), _rt_buffer_get_64, (%rd172, %r27, %r208, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1272, %f1269, 0f00000000;
+	add.f32 	%f1273, %f1270, 0f00000000;
+	add.f32 	%f1274, %f1271, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs98, %f1274;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs97, %f1273;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs96, %f1272;}
+
+	// inline asm
+	mov.u16 	%rs103, 0;
+	st.v4.u16 	[%rd177], {%rs96, %rs97, %rs98, %rs103};
+	bra.uni 	BB0_112;
+
+BB0_3:
+	ld.global.v2.u32 	{%r46, %r47}, [pixelID];
+	cvt.u64.u32	%rd17, %r46;
+	cvt.u64.u32	%rd18, %r47;
+	mov.u64 	%rd26, uvpos;
+	cvta.global.u64 	%rd16, %rd26;
+	mov.u32 	%r43, 12;
+	// inline asm
+	call (%rd15), _rt_buffer_get_64, (%rd16, %r27, %r43, %rd17, %rd18, %rd13, %rd13);
+	// inline asm
+	ld.f32 	%f9, [%rd15+8];
+	ld.f32 	%f8, [%rd15+4];
+	ld.f32 	%f7, [%rd15];
+	mul.f32 	%f293, %f7, 0f3456BF95;
+	mul.f32 	%f294, %f8, 0f3456BF95;
+	mul.f32 	%f295, %f9, 0f3456BF95;
+	abs.f32 	%f296, %f1304;
+	div.rn.f32 	%f297, %f293, %f296;
+	abs.f32 	%f298, %f1305;
+	div.rn.f32 	%f299, %f294, %f298;
+	abs.f32 	%f300, %f1306;
+	div.rn.f32 	%f301, %f295, %f300;
+	abs.f32 	%f302, %f297;
+	abs.f32 	%f303, %f299;
+	abs.f32 	%f304, %f301;
+	mov.f32 	%f305, 0f38D1B717;
+	max.f32 	%f306, %f302, %f305;
+	max.f32 	%f307, %f303, %f305;
+	max.f32 	%f308, %f304, %f305;
+	fma.rn.f32 	%f10, %f1304, %f306, %f7;
+	fma.rn.f32 	%f11, %f1305, %f307, %f8;
+	fma.rn.f32 	%f12, %f1306, %f308, %f9;
+	mov.u64 	%rd27, localLights;
+	cvta.global.u64 	%rd25, %rd27;
+	mov.u32 	%r44, 1;
+	mov.u32 	%r45, 96;
+	// inline asm
+	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r44, %r45);
+	// inline asm
+	cvt.u32.u64	%r4, %rd21;
+	setp.eq.s32	%p14, %r4, 0;
+	mov.f32 	%f1307, 0f00000000;
+	mov.f32 	%f1308, %f1307;
+	mov.f32 	%f1309, %f1307;
+	mov.f32 	%f1310, %f1307;
+	mov.f32 	%f1311, %f1307;
+	mov.f32 	%f1312, %f1307;
+	mov.f32 	%f1313, %f1307;
+	mov.f32 	%f1314, %f1307;
+	mov.f32 	%f1315, %f1307;
+	mov.f32 	%f1316, %f1307;
+	mov.f32 	%f1317, %f1307;
+	mov.f32 	%f1318, %f1307;
+	mov.f32 	%f1319, %f1307;
+	mov.f32 	%f1320, %f1307;
+	mov.f32 	%f1321, %f1307;
+	mov.f32 	%f1322, %f1307;
+	@%p14 bra 	BB0_40;
+
+	mov.f32 	%f325, 0f40000000;
+	cvt.rzi.f32.f32	%f326, %f325;
+	add.f32 	%f327, %f326, %f326;
+	mov.f32 	%f328, 0f40800000;
+	sub.f32 	%f329, %f328, %f327;
+	abs.f32 	%f13, %f329;
+	mul.f32 	%f14, %f10, 0f3456BF95;
+	mul.f32 	%f15, %f11, 0f3456BF95;
+	mul.f32 	%f16, %f12, 0f3456BF95;
+	mov.f32 	%f324, 0f00000000;
+	mov.u32 	%r239, 0;
+	abs.f32 	%f520, %f14;
+	abs.f32 	%f521, %f15;
+	max.f32 	%f522, %f520, %f521;
+	abs.f32 	%f523, %f16;
+	max.f32 	%f524, %f522, %f523;
+	mov.f32 	%f1307, %f324;
+	mov.f32 	%f1308, %f324;
+	mov.f32 	%f1309, %f324;
+	mov.f32 	%f1310, %f324;
+	mov.f32 	%f1311, %f324;
+	mov.f32 	%f1312, %f324;
+	mov.f32 	%f1313, %f324;
+	mov.f32 	%f1314, %f324;
+	mov.f32 	%f1315, %f324;
+	mov.f32 	%f1316, %f324;
+	mov.f32 	%f1317, %f324;
+	mov.f32 	%f1318, %f324;
+	mov.f32 	%f1319, %f324;
+	mov.f32 	%f1320, %f324;
+	mov.f32 	%f1321, %f324;
+	mov.f32 	%f1322, %f324;
+
+BB0_5:
+	cvt.u64.u32	%rd30, %r239;
+	// inline asm
+	call (%rd28), _rt_buffer_get_64, (%rd25, %r44, %r45, %rd30, %rd13, %rd13, %rd13);
+	// inline asm
+	ld.v4.f32 	{%f332, %f333, %f334, %f335}, [%rd28+80];
+	ld.v4.f32 	{%f336, %f337, %f338, %f339}, [%rd28+64];
+	ld.v4.f32 	{%f340, %f341, %f342, %f343}, [%rd28+48];
+	ld.v4.f32 	{%f1326, %f1327, %f1328, %f347}, [%rd28+32];
+	ld.v4.f32 	{%f348, %f349, %f350, %f351}, [%rd28+16];
+	ld.v4.f32 	{%f352, %f353, %f354, %f355}, [%rd28];
+	mov.b32 	 %r6, %f335;
+	sub.f32 	%f357, %f353, %f7;
+	sub.f32 	%f358, %f354, %f8;
+	sub.f32 	%f359, %f355, %f9;
+	mul.f32 	%f360, %f358, %f358;
+	fma.rn.f32 	%f361, %f357, %f357, %f360;
+	fma.rn.f32 	%f362, %f359, %f359, %f361;
+	sqrt.rn.f32 	%f59, %f362;
+	rcp.rn.f32 	%f363, %f59;
+	mul.f32 	%f60, %f357, %f363;
+	mul.f32 	%f61, %f358, %f363;
+	mul.f32 	%f62, %f359, %f363;
+	mul.f32 	%f63, %f59, %f351;
+	abs.f32 	%f64, %f63;
+	setp.lt.f32	%p15, %f64, 0f00800000;
+	mul.f32 	%f364, %f64, 0f4B800000;
+	selp.f32	%f365, 0fC3170000, 0fC2FE0000, %p15;
+	selp.f32	%f366, %f364, %f64, %p15;
+	mov.b32 	 %r53, %f366;
+	and.b32  	%r54, %r53, 8388607;
+	or.b32  	%r55, %r54, 1065353216;
+	mov.b32 	 %f367, %r55;
+	shr.u32 	%r56, %r53, 23;
+	cvt.rn.f32.u32	%f368, %r56;
+	add.f32 	%f369, %f365, %f368;
+	setp.gt.f32	%p16, %f367, 0f3FB504F3;
+	mul.f32 	%f370, %f367, 0f3F000000;
+	add.f32 	%f371, %f369, 0f3F800000;
+	selp.f32	%f372, %f370, %f367, %p16;
+	selp.f32	%f373, %f371, %f369, %p16;
+	add.f32 	%f374, %f372, 0fBF800000;
+	add.f32 	%f331, %f372, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f330,%f331;
+	// inline asm
+	add.f32 	%f375, %f374, %f374;
+	mul.f32 	%f376, %f330, %f375;
+	mul.f32 	%f377, %f376, %f376;
+	mov.f32 	%f378, 0f3C4CAF63;
+	mov.f32 	%f379, 0f3B18F0FE;
+	fma.rn.f32 	%f380, %f379, %f377, %f378;
+	mov.f32 	%f381, 0f3DAAAABD;
+	fma.rn.f32 	%f382, %f380, %f377, %f381;
+	mul.rn.f32 	%f383, %f382, %f377;
+	mul.rn.f32 	%f384, %f383, %f376;
+	sub.f32 	%f385, %f374, %f376;
+	neg.f32 	%f386, %f376;
+	add.f32 	%f387, %f385, %f385;
+	fma.rn.f32 	%f388, %f386, %f374, %f387;
+	mul.rn.f32 	%f389, %f330, %f388;
+	add.f32 	%f390, %f384, %f376;
+	sub.f32 	%f391, %f376, %f390;
+	add.f32 	%f392, %f384, %f391;
+	add.f32 	%f393, %f389, %f392;
+	add.f32 	%f394, %f390, %f393;
+	sub.f32 	%f395, %f390, %f394;
+	add.f32 	%f396, %f393, %f395;
+	mov.f32 	%f397, 0f3F317200;
+	mul.rn.f32 	%f398, %f373, %f397;
+	mov.f32 	%f399, 0f35BFBE8E;
+	mul.rn.f32 	%f400, %f373, %f399;
+	add.f32 	%f401, %f398, %f394;
+	sub.f32 	%f402, %f398, %f401;
+	add.f32 	%f403, %f394, %f402;
+	add.f32 	%f404, %f396, %f403;
+	add.f32 	%f405, %f400, %f404;
+	add.f32 	%f406, %f401, %f405;
+	sub.f32 	%f407, %f401, %f406;
+	add.f32 	%f408, %f405, %f407;
+	mul.rn.f32 	%f65, %f328, %f406;
+	neg.f32 	%f410, %f65;
+	fma.rn.f32 	%f411, %f328, %f406, %f410;
+	fma.rn.f32 	%f412, %f328, %f408, %f411;
+	fma.rn.f32 	%f66, %f324, %f406, %f412;
+	add.rn.f32 	%f67, %f65, %f66;
+	mov.b32 	 %r57, %f67;
+	setp.eq.s32	%p1, %r57, 1118925336;
+	add.s32 	%r58, %r57, -1;
+	mov.b32 	 %f414, %r58;
+	selp.f32	%f415, %f414, %f67, %p1;
+	mul.f32 	%f416, %f415, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f417, %f416;
+	mov.f32 	%f418, 0fBF317200;
+	fma.rn.f32 	%f419, %f417, %f418, %f415;
+	mov.f32 	%f420, 0fB5BFBE8E;
+	fma.rn.f32 	%f421, %f417, %f420, %f419;
+	mul.f32 	%f422, %f421, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f423, %f422;
+	add.f32 	%f424, %f417, 0f00000000;
+	ex2.approx.f32 	%f425, %f424;
+	mul.f32 	%f426, %f423, %f425;
+	setp.lt.f32	%p17, %f415, 0fC2D20000;
+	selp.f32	%f427, 0f00000000, %f426, %p17;
+	setp.gt.f32	%p18, %f415, 0f42D20000;
+	selp.f32	%f1323, 0f7F800000, %f427, %p18;
+	setp.eq.f32	%p19, %f1323, 0f7F800000;
+	@%p19 bra 	BB0_7;
+
+	neg.f32 	%f428, %f67;
+	add.rn.f32 	%f429, %f65, %f428;
+	add.rn.f32 	%f430, %f429, %f66;
+	add.f32 	%f431, %f430, 0f37000000;
+	selp.f32	%f432, %f431, %f430, %p1;
+	fma.rn.f32 	%f1323, %f1323, %f432, %f1323;
+
+BB0_7:
+	setp.lt.f32	%p20, %f63, 0f00000000;
+	setp.eq.f32	%p21, %f13, 0f3F800000;
+	and.pred  	%p2, %p20, %p21;
+	mov.b32 	 %r59, %f1323;
+	xor.b32  	%r60, %r59, -2147483648;
+	mov.b32 	 %f433, %r60;
+	selp.f32	%f1325, %f433, %f1323, %p2;
+	setp.eq.f32	%p22, %f63, 0f00000000;
+	@%p22 bra 	BB0_10;
+	bra.uni 	BB0_8;
+
+BB0_10:
+	add.f32 	%f436, %f63, %f63;
+	selp.f32	%f1325, %f436, 0f00000000, %p21;
+	bra.uni 	BB0_11;
+
+BB0_8:
+	setp.geu.f32	%p23, %f63, 0f00000000;
+	@%p23 bra 	BB0_11;
+
+	cvt.rzi.f32.f32	%f435, %f328;
+	setp.neu.f32	%p24, %f435, 0f40800000;
+	selp.f32	%f1325, 0f7FFFFFFF, %f1325, %p24;
+
+BB0_11:
+	add.f32 	%f437, %f64, 0f40800000;
+	mov.b32 	 %r61, %f437;
+	setp.lt.s32	%p26, %r61, 2139095040;
+	@%p26 bra 	BB0_16;
+
+	setp.gtu.f32	%p27, %f64, 0f7F800000;
+	@%p27 bra 	BB0_15;
+	bra.uni 	BB0_13;
+
+BB0_15:
+	add.f32 	%f1325, %f63, 0f40800000;
+	bra.uni 	BB0_16;
+
+BB0_13:
+	setp.neu.f32	%p28, %f64, 0f7F800000;
+	@%p28 bra 	BB0_16;
+
+	selp.f32	%f1325, 0fFF800000, 0f7F800000, %p2;
+
+BB0_16:
+	mul.f32 	%f438, %f59, %f349;
+	mov.f32 	%f1350, 0f3F800000;
+	sub.f32 	%f440, %f1350, %f1325;
+	setp.eq.f32	%p29, %f63, 0f3F800000;
+	selp.f32	%f441, 0f00000000, %f440, %p29;
+	cvt.sat.f32.f32	%f442, %f441;
+	fma.rn.f32 	%f443, %f438, %f438, %f350;
+	div.rn.f32 	%f1329, %f442, %f443;
+	mul.f32 	%f444, %f1305, %f61;
+	fma.rn.f32 	%f445, %f1304, %f60, %f444;
+	fma.rn.f32 	%f446, %f1306, %f62, %f445;
+	ld.global.u32 	%r62, [ignoreNormal];
+	setp.eq.s32	%p30, %r62, 0;
+	selp.f32	%f94, %f446, 0f3F800000, %p30;
+	mul.f32 	%f447, %f94, 0f40800000;
+	cvt.sat.f32.f32	%f95, %f447;
+	setp.eq.f32	%p31, %f352, 0f3F800000;
+	@%p31 bra 	BB0_22;
+	bra.uni 	BB0_17;
+
+BB0_22:
+	setp.leu.f32	%p35, %f347, 0f00000000;
+	@%p35 bra 	BB0_24;
+
+	mul.f32 	%f478, %f332, %f60;
+	mul.f32 	%f479, %f333, %f61;
+	neg.f32 	%f480, %f479;
+	sub.f32 	%f481, %f480, %f478;
+	mul.f32 	%f482, %f334, %f62;
+	sub.f32 	%f483, %f481, %f482;
+	setp.gt.f32	%p36, %f483, 0f00000000;
+	selp.f32	%f484, 0f3F800000, 0f00000000, %p36;
+	mul.f32 	%f485, %f341, %f61;
+	fma.rn.f32 	%f486, %f340, %f60, %f485;
+	mul.f32 	%f487, %f337, %f61;
+	fma.rn.f32 	%f488, %f336, %f60, %f487;
+	fma.rn.f32 	%f489, %f342, %f62, %f486;
+	fma.rn.f32 	%f490, %f338, %f62, %f488;
+	fma.rn.f32 	%f474, %f343, %f489, 0f3F000000;
+	fma.rn.f32 	%f475, %f343, %f490, 0f3F000000;
+	cvt.rzi.s32.f32	%r66, %f347;
+	mov.f32 	%f477, 0f00000000;
+	// inline asm
+	call (%f470, %f471, %f472, %f473), _rt_texture_get_f_id, (%r66, %r27, %f474, %f475, %f477, %f477);
+	// inline asm
+	mul.f32 	%f491, %f484, %f470;
+	mul.f32 	%f492, %f484, %f471;
+	mul.f32 	%f493, %f484, %f472;
+	mul.f32 	%f1326, %f1326, %f491;
+	mul.f32 	%f1327, %f1327, %f492;
+	mul.f32 	%f1328, %f1328, %f493;
+	bra.uni 	BB0_24;
+
+BB0_17:
+	setp.eq.f32	%p32, %f352, 0f40000000;
+	@%p32 bra 	BB0_20;
+	bra.uni 	BB0_18;
+
+BB0_20:
+	setp.leu.f32	%p34, %f347, 0f00000000;
+	@%p34 bra 	BB0_24;
+
+	mul.f32 	%f464, %f341, %f61;
+	fma.rn.f32 	%f465, %f340, %f60, %f464;
+	mul.f32 	%f466, %f337, %f61;
+	fma.rn.f32 	%f467, %f336, %f60, %f466;
+	mul.f32 	%f468, %f333, %f61;
+	fma.rn.f32 	%f469, %f332, %f60, %f468;
+	fma.rn.f32 	%f461, %f342, %f62, %f465;
+	fma.rn.f32 	%f462, %f338, %f62, %f467;
+	fma.rn.f32 	%f463, %f334, %f62, %f469;
+	cvt.rzi.s32.f32	%r63, %f347;
+	mov.u32 	%r64, 6;
+	mov.u32 	%r65, 0;
+	// inline asm
+	call (%f457, %f458, %f459, %f460), _rt_texture_get_base_id, (%r63, %r64, %f461, %f462, %f463, %r65);
+	// inline asm
+	mul.f32 	%f1326, %f1326, %f457;
+	mul.f32 	%f1327, %f1327, %f458;
+	mul.f32 	%f1328, %f1328, %f459;
+	bra.uni 	BB0_24;
+
+BB0_18:
+	setp.neu.f32	%p33, %f352, 0f40800000;
+	@%p33 bra 	BB0_24;
+
+	mul.f32 	%f448, %f332, %f60;
+	mul.f32 	%f449, %f333, %f61;
+	neg.f32 	%f450, %f449;
+	sub.f32 	%f451, %f450, %f448;
+	mul.f32 	%f452, %f334, %f62;
+	sub.f32 	%f453, %f451, %f452;
+	fma.rn.f32 	%f454, %f347, %f453, %f343;
+	cvt.sat.f32.f32	%f455, %f454;
+	mul.f32 	%f456, %f455, %f455;
+	mul.f32 	%f1329, %f1329, %f456;
+
+BB0_24:
+	max.f32 	%f509, %f1326, %f1327;
+	max.f32 	%f510, %f509, %f1328;
+	mul.f32 	%f511, %f95, %f1329;
+	mul.f32 	%f512, %f511, %f510;
+	setp.lt.f32	%p38, %f512, 0f3727C5AC;
+	mov.pred 	%p135, -1;
+	mov.f32 	%f1330, 0f00000000;
+	mov.f32 	%f1331, %f1330;
+	mov.f32 	%f1332, %f1330;
+	mov.f32 	%f1333, %f1330;
+	mov.f32 	%f1334, %f1330;
+	mov.f32 	%f1335, %f1330;
+	mov.f32 	%f1336, %f1330;
+	mov.f32 	%f1337, %f1330;
+	mov.f32 	%f1338, %f1330;
+	mov.f32 	%f1339, %f1330;
+	mov.f32 	%f1340, %f1330;
+	mov.f32 	%f1341, %f1330;
+	mov.f32 	%f1342, %f1330;
+	mov.f32 	%f1343, %f1330;
+	mov.f32 	%f1344, %f1330;
+	@%p38 bra 	BB0_26;
+
+	cvt.sat.f32.f32	%f513, %f94;
+	mul.f32 	%f514, %f1329, %f513;
+	mul.f32 	%f1330, %f1326, %f514;
+	mul.f32 	%f1331, %f1327, %f514;
+	mul.f32 	%f1332, %f1328, %f514;
+	mul.f32 	%f515, %f1329, 0f3E800000;
+	mul.f32 	%f516, %f95, %f515;
+	mul.f32 	%f1333, %f1326, %f516;
+	mul.f32 	%f1334, %f1327, %f516;
+	mul.f32 	%f1335, %f1328, %f516;
+	mul.f32 	%f1336, %f60, %f1333;
+	mul.f32 	%f1337, %f60, %f1334;
+	mul.f32 	%f1338, %f60, %f1335;
+	mul.f32 	%f1339, %f61, %f1333;
+	mul.f32 	%f1340, %f61, %f1334;
+	mul.f32 	%f1341, %f61, %f1335;
+	mul.f32 	%f1342, %f62, %f1333;
+	mul.f32 	%f1343, %f62, %f1334;
+	mul.f32 	%f1344, %f62, %f1335;
+	mov.pred 	%p135, 0;
+
+BB0_26:
+	@%p135 bra 	BB0_39;
+
+	setp.eq.s32	%p40, %r6, 0;
+	@%p40 bra 	BB0_38;
+
+	mov.f32 	%f1349, 0f00000000;
+	setp.lt.s32	%p41, %r6, 1;
+	@%p41 bra 	BB0_37;
+
+	max.f32 	%f138, %f524, %f305;
+	and.b32  	%r8, %r6, 3;
+	setp.eq.s32	%p42, %r8, 0;
+	add.u64 	%rd35, %SP, 0;
+	cvta.to.local.u64 	%rd2, %rd35;
+	mov.f32 	%f1349, 0f00000000;
+	mov.u32 	%r243, 0;
+	@%p42 bra 	BB0_35;
+
+	setp.eq.s32	%p43, %r8, 1;
+	mov.f32 	%f1346, 0f00000000;
+	mov.u32 	%r241, 0;
+	@%p43 bra 	BB0_34;
+
+	setp.eq.s32	%p44, %r8, 2;
+	mov.f32 	%f1345, 0f00000000;
+	mov.u32 	%r240, 0;
+	@%p44 bra 	BB0_33;
+
+	sub.f32 	%f536, %f353, %f348;
+	sub.f32 	%f537, %f354, %f348;
+	sub.f32 	%f538, %f355, %f348;
+	sub.f32 	%f539, %f536, %f7;
+	sub.f32 	%f540, %f537, %f8;
+	sub.f32 	%f541, %f538, %f9;
+	mul.f32 	%f542, %f540, %f540;
+	fma.rn.f32 	%f543, %f539, %f539, %f542;
+	fma.rn.f32 	%f544, %f541, %f541, %f543;
+	sqrt.rn.f32 	%f535, %f544;
+	rcp.rn.f32 	%f545, %f535;
+	mul.f32 	%f531, %f545, %f539;
+	mul.f32 	%f532, %f545, %f540;
+	mul.f32 	%f533, %f545, %f541;
+	ld.global.u32 	%r75, [imageEnabled];
+	and.b32  	%r76, %r75, 32;
+	setp.eq.s32	%p45, %r76, 0;
+	selp.f32	%f546, 0f3F800000, 0f41200000, %p45;
+	mul.f32 	%f534, %f546, %f138;
+	mov.u32 	%r77, 1065353216;
+	st.local.u32 	[%rd2], %r77;
+	ld.global.u32 	%r71, [root];
+	// inline asm
+	call _rt_trace_64, (%r71, %f10, %f11, %f12, %f531, %f532, %f533, %r44, %f534, %f535, %rd35, %r28);
+	// inline asm
+	ld.local.f32 	%f547, [%rd2];
+	add.f32 	%f1345, %f547, 0f00000000;
+	mov.u32 	%r240, %r44;
+
+BB0_33:
+	cvt.rn.f32.s32	%f556, %r240;
+	mul.f32 	%f557, %f556, 0f3DD32618;
+	cvt.rmi.f32.f32	%f558, %f557;
+	sub.f32 	%f559, %f557, %f558;
+	mul.f32 	%f560, %f556, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f561, %f560;
+	sub.f32 	%f562, %f560, %f561;
+	mul.f32 	%f563, %f556, 0f3DC74539;
+	cvt.rmi.f32.f32	%f564, %f563;
+	sub.f32 	%f565, %f563, %f564;
+	add.f32 	%f566, %f562, 0f4199851F;
+	add.f32 	%f567, %f565, 0f4199851F;
+	add.f32 	%f568, %f559, 0f4199851F;
+	mul.f32 	%f569, %f562, %f567;
+	fma.rn.f32 	%f570, %f559, %f566, %f569;
+	fma.rn.f32 	%f571, %f568, %f565, %f570;
+	add.f32 	%f572, %f559, %f571;
+	add.f32 	%f573, %f562, %f571;
+	add.f32 	%f574, %f565, %f571;
+	add.f32 	%f575, %f572, %f573;
+	mul.f32 	%f576, %f574, %f575;
+	cvt.rmi.f32.f32	%f577, %f576;
+	sub.f32 	%f578, %f576, %f577;
+	add.f32 	%f579, %f572, %f574;
+	mul.f32 	%f580, %f573, %f579;
+	cvt.rmi.f32.f32	%f581, %f580;
+	sub.f32 	%f582, %f580, %f581;
+	add.f32 	%f583, %f573, %f574;
+	mul.f32 	%f584, %f572, %f583;
+	cvt.rmi.f32.f32	%f585, %f584;
+	sub.f32 	%f586, %f584, %f585;
+	fma.rn.f32 	%f587, %f578, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f588, %f582, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f589, %f586, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f590, %f348, %f587, %f353;
+	fma.rn.f32 	%f591, %f348, %f588, %f354;
+	fma.rn.f32 	%f592, %f348, %f589, %f355;
+	sub.f32 	%f593, %f590, %f7;
+	sub.f32 	%f594, %f591, %f8;
+	sub.f32 	%f595, %f592, %f9;
+	mul.f32 	%f596, %f594, %f594;
+	fma.rn.f32 	%f597, %f593, %f593, %f596;
+	fma.rn.f32 	%f598, %f595, %f595, %f597;
+	sqrt.rn.f32 	%f555, %f598;
+	rcp.rn.f32 	%f599, %f555;
+	mul.f32 	%f551, %f599, %f593;
+	mul.f32 	%f552, %f599, %f594;
+	mul.f32 	%f553, %f599, %f595;
+	ld.global.u32 	%r81, [imageEnabled];
+	and.b32  	%r82, %r81, 32;
+	setp.eq.s32	%p46, %r82, 0;
+	selp.f32	%f600, 0f3F800000, 0f41200000, %p46;
+	mul.f32 	%f554, %f600, %f138;
+	mov.u32 	%r83, 1065353216;
+	st.local.u32 	[%rd2], %r83;
+	ld.global.u32 	%r78, [root];
+	// inline asm
+	call _rt_trace_64, (%r78, %f10, %f11, %f12, %f551, %f552, %f553, %r44, %f554, %f555, %rd35, %r28);
+	// inline asm
+	ld.local.f32 	%f601, [%rd2];
+	add.f32 	%f1346, %f1345, %f601;
+	add.s32 	%r241, %r240, 1;
+
+BB0_34:
+	cvt.rn.f32.s32	%f610, %r241;
+	mul.f32 	%f611, %f610, 0f3DD32618;
+	cvt.rmi.f32.f32	%f612, %f611;
+	sub.f32 	%f613, %f611, %f612;
+	mul.f32 	%f614, %f610, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f615, %f614;
+	sub.f32 	%f616, %f614, %f615;
+	mul.f32 	%f617, %f610, 0f3DC74539;
+	cvt.rmi.f32.f32	%f618, %f617;
+	sub.f32 	%f619, %f617, %f618;
+	add.f32 	%f620, %f616, 0f4199851F;
+	add.f32 	%f621, %f619, 0f4199851F;
+	add.f32 	%f622, %f613, 0f4199851F;
+	mul.f32 	%f623, %f616, %f621;
+	fma.rn.f32 	%f624, %f613, %f620, %f623;
+	fma.rn.f32 	%f625, %f622, %f619, %f624;
+	add.f32 	%f626, %f613, %f625;
+	add.f32 	%f627, %f616, %f625;
+	add.f32 	%f628, %f619, %f625;
+	add.f32 	%f629, %f626, %f627;
+	mul.f32 	%f630, %f628, %f629;
+	cvt.rmi.f32.f32	%f631, %f630;
+	sub.f32 	%f632, %f630, %f631;
+	add.f32 	%f633, %f626, %f628;
+	mul.f32 	%f634, %f627, %f633;
+	cvt.rmi.f32.f32	%f635, %f634;
+	sub.f32 	%f636, %f634, %f635;
+	add.f32 	%f637, %f627, %f628;
+	mul.f32 	%f638, %f626, %f637;
+	cvt.rmi.f32.f32	%f639, %f638;
+	sub.f32 	%f640, %f638, %f639;
+	fma.rn.f32 	%f641, %f632, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f642, %f636, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f643, %f640, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f644, %f348, %f641, %f353;
+	fma.rn.f32 	%f645, %f348, %f642, %f354;
+	fma.rn.f32 	%f646, %f348, %f643, %f355;
+	sub.f32 	%f647, %f644, %f7;
+	sub.f32 	%f648, %f645, %f8;
+	sub.f32 	%f649, %f646, %f9;
+	mul.f32 	%f650, %f648, %f648;
+	fma.rn.f32 	%f651, %f647, %f647, %f650;
+	fma.rn.f32 	%f652, %f649, %f649, %f651;
+	sqrt.rn.f32 	%f609, %f652;
+	rcp.rn.f32 	%f653, %f609;
+	mul.f32 	%f605, %f653, %f647;
+	mul.f32 	%f606, %f653, %f648;
+	mul.f32 	%f607, %f653, %f649;
+	ld.global.u32 	%r87, [imageEnabled];
+	and.b32  	%r88, %r87, 32;
+	setp.eq.s32	%p47, %r88, 0;
+	selp.f32	%f654, 0f3F800000, 0f41200000, %p47;
+	mul.f32 	%f608, %f654, %f138;
+	mov.u32 	%r89, 1065353216;
+	st.local.u32 	[%rd2], %r89;
+	ld.global.u32 	%r84, [root];
+	mov.u32 	%r85, 1;
+	// inline asm
+	call _rt_trace_64, (%r84, %f10, %f11, %f12, %f605, %f606, %f607, %r85, %f608, %f609, %rd35, %r28);
+	// inline asm
+	ld.local.f32 	%f655, [%rd2];
+	add.f32 	%f1349, %f1346, %f655;
+	add.s32 	%r243, %r241, 1;
+
+BB0_35:
+	setp.lt.u32	%p48, %r6, 4;
+	@%p48 bra 	BB0_37;
+
+BB0_36:
+	cvt.rn.f32.s32	%f688, %r243;
+	mul.f32 	%f689, %f688, 0f3DD32618;
+	cvt.rmi.f32.f32	%f690, %f689;
+	sub.f32 	%f691, %f689, %f690;
+	mul.f32 	%f692, %f688, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f693, %f692;
+	sub.f32 	%f694, %f692, %f693;
+	mul.f32 	%f695, %f688, 0f3DC74539;
+	cvt.rmi.f32.f32	%f696, %f695;
+	sub.f32 	%f697, %f695, %f696;
+	add.f32 	%f698, %f694, 0f4199851F;
+	add.f32 	%f699, %f697, 0f4199851F;
+	add.f32 	%f700, %f691, 0f4199851F;
+	mul.f32 	%f701, %f694, %f699;
+	fma.rn.f32 	%f702, %f691, %f698, %f701;
+	fma.rn.f32 	%f703, %f700, %f697, %f702;
+	add.f32 	%f704, %f691, %f703;
+	add.f32 	%f705, %f694, %f703;
+	add.f32 	%f706, %f697, %f703;
+	add.f32 	%f707, %f704, %f705;
+	mul.f32 	%f708, %f706, %f707;
+	cvt.rmi.f32.f32	%f709, %f708;
+	sub.f32 	%f710, %f708, %f709;
+	add.f32 	%f711, %f704, %f706;
+	mul.f32 	%f712, %f705, %f711;
+	cvt.rmi.f32.f32	%f713, %f712;
+	sub.f32 	%f714, %f712, %f713;
+	add.f32 	%f715, %f705, %f706;
+	mul.f32 	%f716, %f704, %f715;
+	cvt.rmi.f32.f32	%f717, %f716;
+	sub.f32 	%f718, %f716, %f717;
+	fma.rn.f32 	%f719, %f710, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f720, %f714, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f721, %f718, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f722, %f348, %f719, %f353;
+	fma.rn.f32 	%f723, %f348, %f720, %f354;
+	fma.rn.f32 	%f724, %f348, %f721, %f355;
+	sub.f32 	%f725, %f722, %f7;
+	sub.f32 	%f726, %f723, %f8;
+	sub.f32 	%f727, %f724, %f9;
+	mul.f32 	%f728, %f726, %f726;
+	fma.rn.f32 	%f729, %f725, %f725, %f728;
+	fma.rn.f32 	%f730, %f727, %f727, %f729;
+	sqrt.rn.f32 	%f663, %f730;
+	rcp.rn.f32 	%f731, %f663;
+	mul.f32 	%f659, %f731, %f725;
+	mul.f32 	%f660, %f731, %f726;
+	mul.f32 	%f661, %f731, %f727;
+	ld.global.u32 	%r102, [imageEnabled];
+	and.b32  	%r103, %r102, 32;
+	setp.eq.s32	%p49, %r103, 0;
+	selp.f32	%f732, 0f3F800000, 0f41200000, %p49;
+	mul.f32 	%f662, %f732, %f138;
+	mov.u32 	%r104, 1065353216;
+	st.local.u32 	[%rd2], %r104;
+	ld.global.u32 	%r90, [root];
+	mov.u32 	%r100, 1;
+	// inline asm
+	call _rt_trace_64, (%r90, %f10, %f11, %f12, %f659, %f660, %f661, %r100, %f662, %f663, %rd35, %r28);
+	// inline asm
+	ld.local.f32 	%f733, [%rd2];
+	add.f32 	%f734, %f1349, %f733;
+	add.s32 	%r105, %r243, 1;
+	cvt.rn.f32.s32	%f735, %r105;
+	mul.f32 	%f736, %f735, 0f3DD32618;
+	cvt.rmi.f32.f32	%f737, %f736;
+	sub.f32 	%f738, %f736, %f737;
+	mul.f32 	%f739, %f735, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f740, %f739;
+	sub.f32 	%f741, %f739, %f740;
+	mul.f32 	%f742, %f735, 0f3DC74539;
+	cvt.rmi.f32.f32	%f743, %f742;
+	sub.f32 	%f744, %f742, %f743;
+	add.f32 	%f745, %f741, 0f4199851F;
+	add.f32 	%f746, %f744, 0f4199851F;
+	add.f32 	%f747, %f738, 0f4199851F;
+	mul.f32 	%f748, %f741, %f746;
+	fma.rn.f32 	%f749, %f738, %f745, %f748;
+	fma.rn.f32 	%f750, %f747, %f744, %f749;
+	add.f32 	%f751, %f738, %f750;
+	add.f32 	%f752, %f741, %f750;
+	add.f32 	%f753, %f744, %f750;
+	add.f32 	%f754, %f751, %f752;
+	mul.f32 	%f755, %f753, %f754;
+	cvt.rmi.f32.f32	%f756, %f755;
+	sub.f32 	%f757, %f755, %f756;
+	add.f32 	%f758, %f751, %f753;
+	mul.f32 	%f759, %f752, %f758;
+	cvt.rmi.f32.f32	%f760, %f759;
+	sub.f32 	%f761, %f759, %f760;
+	add.f32 	%f762, %f752, %f753;
+	mul.f32 	%f763, %f751, %f762;
+	cvt.rmi.f32.f32	%f764, %f763;
+	sub.f32 	%f765, %f763, %f764;
+	fma.rn.f32 	%f766, %f757, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f767, %f761, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f768, %f765, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f769, %f348, %f766, %f353;
+	fma.rn.f32 	%f770, %f348, %f767, %f354;
+	fma.rn.f32 	%f771, %f348, %f768, %f355;
+	sub.f32 	%f772, %f769, %f7;
+	sub.f32 	%f773, %f770, %f8;
+	sub.f32 	%f774, %f771, %f9;
+	mul.f32 	%f775, %f773, %f773;
+	fma.rn.f32 	%f776, %f772, %f772, %f775;
+	fma.rn.f32 	%f777, %f774, %f774, %f776;
+	sqrt.rn.f32 	%f671, %f777;
+	rcp.rn.f32 	%f778, %f671;
+	mul.f32 	%f667, %f778, %f772;
+	mul.f32 	%f668, %f778, %f773;
+	mul.f32 	%f669, %f778, %f774;
+	ld.global.u32 	%r106, [imageEnabled];
+	and.b32  	%r107, %r106, 32;
+	setp.eq.s32	%p50, %r107, 0;
+	selp.f32	%f779, 0f3F800000, 0f41200000, %p50;
+	mul.f32 	%f670, %f779, %f138;
+	st.local.u32 	[%rd2], %r104;
+	ld.global.u32 	%r93, [root];
+	// inline asm
+	call _rt_trace_64, (%r93, %f10, %f11, %f12, %f667, %f668, %f669, %r100, %f670, %f671, %rd35, %r28);
+	// inline asm
+	ld.local.f32 	%f780, [%rd2];
+	add.f32 	%f781, %f734, %f780;
+	add.s32 	%r108, %r243, 2;
+	cvt.rn.f32.s32	%f782, %r108;
+	mul.f32 	%f783, %f782, 0f3DD32618;
+	cvt.rmi.f32.f32	%f784, %f783;
+	sub.f32 	%f785, %f783, %f784;
+	mul.f32 	%f786, %f782, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f787, %f786;
+	sub.f32 	%f788, %f786, %f787;
+	mul.f32 	%f789, %f782, 0f3DC74539;
+	cvt.rmi.f32.f32	%f790, %f789;
+	sub.f32 	%f791, %f789, %f790;
+	add.f32 	%f792, %f788, 0f4199851F;
+	add.f32 	%f793, %f791, 0f4199851F;
+	add.f32 	%f794, %f785, 0f4199851F;
+	mul.f32 	%f795, %f788, %f793;
+	fma.rn.f32 	%f796, %f785, %f792, %f795;
+	fma.rn.f32 	%f797, %f794, %f791, %f796;
+	add.f32 	%f798, %f785, %f797;
+	add.f32 	%f799, %f788, %f797;
+	add.f32 	%f800, %f791, %f797;
+	add.f32 	%f801, %f798, %f799;
+	mul.f32 	%f802, %f800, %f801;
+	cvt.rmi.f32.f32	%f803, %f802;
+	sub.f32 	%f804, %f802, %f803;
+	add.f32 	%f805, %f798, %f800;
+	mul.f32 	%f806, %f799, %f805;
+	cvt.rmi.f32.f32	%f807, %f806;
+	sub.f32 	%f808, %f806, %f807;
+	add.f32 	%f809, %f799, %f800;
+	mul.f32 	%f810, %f798, %f809;
+	cvt.rmi.f32.f32	%f811, %f810;
+	sub.f32 	%f812, %f810, %f811;
+	fma.rn.f32 	%f813, %f804, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f814, %f808, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f815, %f812, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f816, %f348, %f813, %f353;
+	fma.rn.f32 	%f817, %f348, %f814, %f354;
+	fma.rn.f32 	%f818, %f348, %f815, %f355;
+	sub.f32 	%f819, %f816, %f7;
+	sub.f32 	%f820, %f817, %f8;
+	sub.f32 	%f821, %f818, %f9;
+	mul.f32 	%f822, %f820, %f820;
+	fma.rn.f32 	%f823, %f819, %f819, %f822;
+	fma.rn.f32 	%f824, %f821, %f821, %f823;
+	sqrt.rn.f32 	%f679, %f824;
+	rcp.rn.f32 	%f825, %f679;
+	mul.f32 	%f675, %f825, %f819;
+	mul.f32 	%f676, %f825, %f820;
+	mul.f32 	%f677, %f825, %f821;
+	ld.global.u32 	%r109, [imageEnabled];
+	and.b32  	%r110, %r109, 32;
+	setp.eq.s32	%p51, %r110, 0;
+	selp.f32	%f826, 0f3F800000, 0f41200000, %p51;
+	mul.f32 	%f678, %f826, %f138;
+	st.local.u32 	[%rd2], %r104;
+	ld.global.u32 	%r96, [root];
+	// inline asm
+	call _rt_trace_64, (%r96, %f10, %f11, %f12, %f675, %f676, %f677, %r100, %f678, %f679, %rd35, %r28);
+	// inline asm
+	ld.local.f32 	%f827, [%rd2];
+	add.f32 	%f828, %f781, %f827;
+	add.s32 	%r111, %r243, 3;
+	cvt.rn.f32.s32	%f829, %r111;
+	mul.f32 	%f830, %f829, 0f3DD32618;
+	cvt.rmi.f32.f32	%f831, %f830;
+	sub.f32 	%f832, %f830, %f831;
+	mul.f32 	%f833, %f829, 0f3DD2F1AA;
+	cvt.rmi.f32.f32	%f834, %f833;
+	sub.f32 	%f835, %f833, %f834;
+	mul.f32 	%f836, %f829, 0f3DC74539;
+	cvt.rmi.f32.f32	%f837, %f836;
+	sub.f32 	%f838, %f836, %f837;
+	add.f32 	%f839, %f835, 0f4199851F;
+	add.f32 	%f840, %f838, 0f4199851F;
+	add.f32 	%f841, %f832, 0f4199851F;
+	mul.f32 	%f842, %f835, %f840;
+	fma.rn.f32 	%f843, %f832, %f839, %f842;
+	fma.rn.f32 	%f844, %f841, %f838, %f843;
+	add.f32 	%f845, %f832, %f844;
+	add.f32 	%f846, %f835, %f844;
+	add.f32 	%f847, %f838, %f844;
+	add.f32 	%f848, %f845, %f846;
+	mul.f32 	%f849, %f847, %f848;
+	cvt.rmi.f32.f32	%f850, %f849;
+	sub.f32 	%f851, %f849, %f850;
+	add.f32 	%f852, %f845, %f847;
+	mul.f32 	%f853, %f846, %f852;
+	cvt.rmi.f32.f32	%f854, %f853;
+	sub.f32 	%f855, %f853, %f854;
+	add.f32 	%f856, %f846, %f847;
+	mul.f32 	%f857, %f845, %f856;
+	cvt.rmi.f32.f32	%f858, %f857;
+	sub.f32 	%f859, %f857, %f858;
+	fma.rn.f32 	%f860, %f851, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f861, %f855, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f862, %f859, 0f40000000, 0fBF800000;
+	fma.rn.f32 	%f863, %f348, %f860, %f353;
+	fma.rn.f32 	%f864, %f348, %f861, %f354;
+	fma.rn.f32 	%f865, %f348, %f862, %f355;
+	sub.f32 	%f866, %f863, %f7;
+	sub.f32 	%f867, %f864, %f8;
+	sub.f32 	%f868, %f865, %f9;
+	mul.f32 	%f869, %f867, %f867;
+	fma.rn.f32 	%f870, %f866, %f866, %f869;
+	fma.rn.f32 	%f871, %f868, %f868, %f870;
+	sqrt.rn.f32 	%f687, %f871;
+	rcp.rn.f32 	%f872, %f687;
+	mul.f32 	%f683, %f872, %f866;
+	mul.f32 	%f684, %f872, %f867;
+	mul.f32 	%f685, %f872, %f868;
+	ld.global.u32 	%r112, [imageEnabled];
+	and.b32  	%r113, %r112, 32;
+	setp.eq.s32	%p52, %r113, 0;
+	selp.f32	%f873, 0f3F800000, 0f41200000, %p52;
+	mul.f32 	%f686, %f873, %f138;
+	st.local.u32 	[%rd2], %r104;
+	ld.global.u32 	%r99, [root];
+	// inline asm
+	call _rt_trace_64, (%r99, %f10, %f11, %f12, %f683, %f684, %f685, %r100, %f686, %f687, %rd35, %r28);
+	// inline asm
+	ld.local.f32 	%f874, [%rd2];
+	add.f32 	%f1349, %f828, %f874;
+	add.s32 	%r243, %r243, 4;
+	setp.lt.s32	%p53, %r243, %r6;
+	@%p53 bra 	BB0_36;
+
+BB0_37:
+	cvt.rn.f32.s32	%f875, %r6;
+	div.rn.f32 	%f1350, %f1349, %f875;
+
+BB0_38:
+	fma.rn.f32 	%f1322, %f1330, %f1350, %f1322;
+	fma.rn.f32 	%f1321, %f1331, %f1350, %f1321;
+	fma.rn.f32 	%f1320, %f1332, %f1350, %f1320;
+	fma.rn.f32 	%f1319, %f1333, %f1350, %f1319;
+	fma.rn.f32 	%f1318, %f1334, %f1350, %f1318;
+	fma.rn.f32 	%f1317, %f1335, %f1350, %f1317;
+	fma.rn.f32 	%f1316, %f1336, %f1350, %f1316;
+	fma.rn.f32 	%f1315, %f1337, %f1350, %f1315;
+	fma.rn.f32 	%f1314, %f1338, %f1350, %f1314;
+	fma.rn.f32 	%f1313, %f1339, %f1350, %f1313;
+	fma.rn.f32 	%f1312, %f1340, %f1350, %f1312;
+	fma.rn.f32 	%f1311, %f1341, %f1350, %f1311;
+	fma.rn.f32 	%f1310, %f1342, %f1350, %f1310;
+	fma.rn.f32 	%f1309, %f1343, %f1350, %f1309;
+	fma.rn.f32 	%f1308, %f1344, %f1350, %f1308;
+	add.f32 	%f1307, %f1307, %f1350;
+
+BB0_39:
+	add.s32 	%r239, %r239, 1;
+	setp.lt.u32	%p54, %r239, %r4;
+	@%p54 bra 	BB0_5;
+
+BB0_40:
+	ld.global.u32 	%r245, [imageEnabled];
+	and.b32  	%r114, %r245, 8;
+	setp.eq.s32	%p55, %r114, 0;
+	@%p55 bra 	BB0_53;
+
+	cvt.sat.f32.f32	%f198, %f1307;
+	cvt.u64.u32	%rd46, %r3;
+	cvt.u64.u32	%rd45, %r2;
+	mov.u64 	%rd49, image_Mask;
+	cvta.global.u64 	%rd44, %rd49;
+	// inline asm
+	call (%rd43), _rt_buffer_get_64, (%rd44, %r27, %r27, %rd45, %rd46, %rd13, %rd13);
+	// inline asm
+	mov.f32 	%f878, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f879, %f878;
+	fma.rn.f32 	%f880, %f879, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f199, %f880;
+	abs.f32 	%f200, %f198;
+	setp.lt.f32	%p56, %f200, 0f00800000;
+	mul.f32 	%f881, %f200, 0f4B800000;
+	selp.f32	%f882, 0fC3170000, 0fC2FE0000, %p56;
+	selp.f32	%f883, %f881, %f200, %p56;
+	mov.b32 	 %r117, %f883;
+	and.b32  	%r118, %r117, 8388607;
+	or.b32  	%r119, %r118, 1065353216;
+	mov.b32 	 %f884, %r119;
+	shr.u32 	%r120, %r117, 23;
+	cvt.rn.f32.u32	%f885, %r120;
+	add.f32 	%f886, %f882, %f885;
+	setp.gt.f32	%p57, %f884, 0f3FB504F3;
+	mul.f32 	%f887, %f884, 0f3F000000;
+	add.f32 	%f888, %f886, 0f3F800000;
+	selp.f32	%f889, %f887, %f884, %p57;
+	selp.f32	%f890, %f888, %f886, %p57;
+	add.f32 	%f891, %f889, 0fBF800000;
+	add.f32 	%f877, %f889, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f876,%f877;
+	// inline asm
+	add.f32 	%f892, %f891, %f891;
+	mul.f32 	%f893, %f876, %f892;
+	mul.f32 	%f894, %f893, %f893;
+	mov.f32 	%f895, 0f3C4CAF63;
+	mov.f32 	%f896, 0f3B18F0FE;
+	fma.rn.f32 	%f897, %f896, %f894, %f895;
+	mov.f32 	%f898, 0f3DAAAABD;
+	fma.rn.f32 	%f899, %f897, %f894, %f898;
+	mul.rn.f32 	%f900, %f899, %f894;
+	mul.rn.f32 	%f901, %f900, %f893;
+	sub.f32 	%f902, %f891, %f893;
+	neg.f32 	%f903, %f893;
+	add.f32 	%f904, %f902, %f902;
+	fma.rn.f32 	%f905, %f903, %f891, %f904;
+	mul.rn.f32 	%f906, %f876, %f905;
+	add.f32 	%f907, %f901, %f893;
+	sub.f32 	%f908, %f893, %f907;
+	add.f32 	%f909, %f901, %f908;
+	add.f32 	%f910, %f906, %f909;
+	add.f32 	%f911, %f907, %f910;
+	sub.f32 	%f912, %f907, %f911;
+	add.f32 	%f913, %f910, %f912;
+	mov.f32 	%f914, 0f3F317200;
+	mul.rn.f32 	%f915, %f890, %f914;
+	mov.f32 	%f916, 0f35BFBE8E;
+	mul.rn.f32 	%f917, %f890, %f916;
+	add.f32 	%f918, %f915, %f911;
+	sub.f32 	%f919, %f915, %f918;
+	add.f32 	%f920, %f911, %f919;
+	add.f32 	%f921, %f913, %f920;
+	add.f32 	%f922, %f917, %f921;
+	add.f32 	%f923, %f918, %f922;
+	sub.f32 	%f924, %f918, %f923;
+	add.f32 	%f925, %f922, %f924;
+	mov.f32 	%f926, 0f3EE8BA2E;
+	mul.rn.f32 	%f927, %f926, %f923;
+	neg.f32 	%f928, %f927;
+	fma.rn.f32 	%f929, %f926, %f923, %f928;
+	fma.rn.f32 	%f930, %f926, %f925, %f929;
+	mov.f32 	%f931, 0f00000000;
+	fma.rn.f32 	%f932, %f931, %f923, %f930;
+	add.rn.f32 	%f933, %f927, %f932;
+	neg.f32 	%f934, %f933;
+	add.rn.f32 	%f935, %f927, %f934;
+	add.rn.f32 	%f936, %f935, %f932;
+	mov.b32 	 %r121, %f933;
+	setp.eq.s32	%p58, %r121, 1118925336;
+	add.s32 	%r122, %r121, -1;
+	mov.b32 	 %f937, %r122;
+	add.f32 	%f938, %f936, 0f37000000;
+	selp.f32	%f939, %f937, %f933, %p58;
+	selp.f32	%f201, %f938, %f936, %p58;
+	mul.f32 	%f940, %f939, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f941, %f940;
+	mov.f32 	%f942, 0fBF317200;
+	fma.rn.f32 	%f943, %f941, %f942, %f939;
+	mov.f32 	%f944, 0fB5BFBE8E;
+	fma.rn.f32 	%f945, %f941, %f944, %f943;
+	mul.f32 	%f946, %f945, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f947, %f946;
+	add.f32 	%f948, %f941, 0f00000000;
+	ex2.approx.f32 	%f949, %f948;
+	mul.f32 	%f950, %f947, %f949;
+	setp.lt.f32	%p59, %f939, 0fC2D20000;
+	selp.f32	%f951, 0f00000000, %f950, %p59;
+	setp.gt.f32	%p60, %f939, 0f42D20000;
+	selp.f32	%f1383, 0f7F800000, %f951, %p60;
+	setp.eq.f32	%p61, %f1383, 0f7F800000;
+	@%p61 bra 	BB0_43;
+
+	fma.rn.f32 	%f1383, %f1383, %f201, %f1383;
+
+BB0_43:
+	setp.lt.f32	%p62, %f198, 0f00000000;
+	setp.eq.f32	%p63, %f199, 0f3F800000;
+	and.pred  	%p4, %p62, %p63;
+	mov.b32 	 %r123, %f1383;
+	xor.b32  	%r124, %r123, -2147483648;
+	mov.b32 	 %f952, %r124;
+	selp.f32	%f1385, %f952, %f1383, %p4;
+	setp.eq.f32	%p64, %f198, 0f00000000;
+	@%p64 bra 	BB0_46;
+	bra.uni 	BB0_44;
+
+BB0_46:
+	add.f32 	%f955, %f198, %f198;
+	selp.f32	%f1385, %f955, 0f00000000, %p63;
+	bra.uni 	BB0_47;
+
+BB0_111:
+	mov.u64 	%rd190, image_HDR;
+	cvta.global.u64 	%rd185, %rd190;
+	mov.u32 	%r210, 8;
+	// inline asm
+	call (%rd184), _rt_buffer_get_64, (%rd185, %r27, %r210, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	mov.f32 	%f1275, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs104, %f1275;}
+
+	// inline asm
+	mov.u16 	%rs105, 0;
+	st.v4.u16 	[%rd184], {%rs104, %rs104, %rs104, %rs105};
+
+BB0_112:
+	ld.global.u32 	%r211, [additive];
+	setp.eq.s32	%p131, %r211, 0;
+	@%p131 bra 	BB0_114;
+
+	mov.u64 	%rd203, image_RNM0;
+	cvta.global.u64 	%rd192, %rd203;
+	mov.u32 	%r215, 8;
+	// inline asm
+	call (%rd191), _rt_buffer_get_64, (%rd192, %r27, %r215, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs112, %rs113, %rs114, %rs115}, [%rd191];
+	// inline asm
+	{  cvt.f32.f16 %f1276, %rs112;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1277, %rs113;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1278, %rs114;}
+
+	// inline asm
+	// inline asm
+	call (%rd197), _rt_buffer_get_64, (%rd192, %r27, %r215, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1279, %f1276, 0f00000000;
+	add.f32 	%f1280, %f1277, 0f00000000;
+	add.f32 	%f1281, %f1278, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs111, %f1281;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs110, %f1280;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs109, %f1279;}
+
+	// inline asm
+	mov.u16 	%rs116, 0;
+	st.v4.u16 	[%rd197], {%rs109, %rs110, %rs111, %rs116};
+	bra.uni 	BB0_115;
+
+BB0_114:
+	mov.u64 	%rd210, image_RNM0;
+	cvta.global.u64 	%rd205, %rd210;
+	mov.u32 	%r217, 8;
+	// inline asm
+	call (%rd204), _rt_buffer_get_64, (%rd205, %r27, %r217, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	mov.f32 	%f1282, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs117, %f1282;}
+
+	// inline asm
+	mov.u16 	%rs118, 0;
+	st.v4.u16 	[%rd204], {%rs117, %rs117, %rs117, %rs118};
+
+BB0_115:
+	ld.global.u32 	%r218, [additive];
+	setp.eq.s32	%p132, %r218, 0;
+	@%p132 bra 	BB0_117;
+
+	mov.u64 	%rd223, image_RNM1;
+	cvta.global.u64 	%rd212, %rd223;
+	mov.u32 	%r222, 8;
+	// inline asm
+	call (%rd211), _rt_buffer_get_64, (%rd212, %r27, %r222, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs125, %rs126, %rs127, %rs128}, [%rd211];
+	// inline asm
+	{  cvt.f32.f16 %f1283, %rs125;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1284, %rs126;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1285, %rs127;}
+
+	// inline asm
+	// inline asm
+	call (%rd217), _rt_buffer_get_64, (%rd212, %r27, %r222, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1286, %f1283, 0f00000000;
+	add.f32 	%f1287, %f1284, 0f00000000;
+	add.f32 	%f1288, %f1285, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs124, %f1288;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs123, %f1287;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs122, %f1286;}
+
+	// inline asm
+	mov.u16 	%rs129, 0;
+	st.v4.u16 	[%rd217], {%rs122, %rs123, %rs124, %rs129};
+	bra.uni 	BB0_118;
+
+BB0_117:
+	mov.u64 	%rd230, image_RNM1;
+	cvta.global.u64 	%rd225, %rd230;
+	mov.u32 	%r224, 8;
+	// inline asm
+	call (%rd224), _rt_buffer_get_64, (%rd225, %r27, %r224, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	mov.f32 	%f1289, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs130, %f1289;}
+
+	// inline asm
+	mov.u16 	%rs131, 0;
+	st.v4.u16 	[%rd224], {%rs130, %rs130, %rs130, %rs131};
+
+BB0_118:
+	ld.global.u32 	%r225, [additive];
+	setp.eq.s32	%p133, %r225, 0;
+	@%p133 bra 	BB0_120;
+
+	mov.u64 	%rd243, image_RNM2;
+	cvta.global.u64 	%rd232, %rd243;
+	mov.u32 	%r229, 8;
+	// inline asm
+	call (%rd231), _rt_buffer_get_64, (%rd232, %r27, %r229, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs138, %rs139, %rs140, %rs141}, [%rd231];
+	// inline asm
+	{  cvt.f32.f16 %f1290, %rs138;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1291, %rs139;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1292, %rs140;}
+
+	// inline asm
+	// inline asm
+	call (%rd237), _rt_buffer_get_64, (%rd232, %r27, %r229, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1293, %f1290, 0f00000000;
+	add.f32 	%f1294, %f1291, 0f00000000;
+	add.f32 	%f1295, %f1292, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs137, %f1295;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs136, %f1294;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs135, %f1293;}
+
+	// inline asm
+	mov.u16 	%rs142, 0;
+	st.v4.u16 	[%rd237], {%rs135, %rs136, %rs137, %rs142};
+	bra.uni 	BB0_121;
+
+BB0_120:
+	mov.u64 	%rd250, image_RNM2;
+	cvta.global.u64 	%rd245, %rd250;
+	mov.u32 	%r231, 8;
+	// inline asm
+	call (%rd244), _rt_buffer_get_64, (%rd245, %r27, %r231, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	mov.f32 	%f1296, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs143, %f1296;}
+
+	// inline asm
+	mov.u16 	%rs144, 0;
+	st.v4.u16 	[%rd244], {%rs143, %rs143, %rs143, %rs144};
+
+BB0_121:
+	ld.global.u32 	%r232, [additive];
+	setp.eq.s32	%p134, %r232, 0;
+	@%p134 bra 	BB0_123;
+
+	mov.u64 	%rd263, image_RNM3;
+	cvta.global.u64 	%rd252, %rd263;
+	mov.u32 	%r236, 8;
+	// inline asm
+	call (%rd251), _rt_buffer_get_64, (%rd252, %r27, %r236, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs151, %rs152, %rs153, %rs154}, [%rd251];
+	// inline asm
+	{  cvt.f32.f16 %f1297, %rs151;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1298, %rs152;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1299, %rs153;}
+
+	// inline asm
+	// inline asm
+	call (%rd257), _rt_buffer_get_64, (%rd252, %r27, %r236, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1300, %f1297, 0f00000000;
+	add.f32 	%f1301, %f1298, 0f00000000;
+	add.f32 	%f1302, %f1299, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs150, %f1302;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs149, %f1301;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs148, %f1300;}
+
+	// inline asm
+	mov.u16 	%rs155, 0;
+	st.v4.u16 	[%rd257], {%rs148, %rs149, %rs150, %rs155};
+	bra.uni 	BB0_124;
+
+BB0_123:
+	mov.u64 	%rd270, image_RNM3;
+	cvta.global.u64 	%rd265, %rd270;
+	mov.u32 	%r238, 8;
+	// inline asm
+	call (%rd264), _rt_buffer_get_64, (%rd265, %r27, %r238, %rd6, %rd7, %rd13, %rd13);
+	// inline asm
+	mov.f32 	%f1303, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs156, %f1303;}
+
+	// inline asm
+	mov.u16 	%rs157, 0;
+	st.v4.u16 	[%rd264], {%rs156, %rs156, %rs156, %rs157};
+	bra.uni 	BB0_124;
+
+BB0_44:
+	setp.geu.f32	%p65, %f198, 0f00000000;
+	@%p65 bra 	BB0_47;
+
+	cvt.rzi.f32.f32	%f954, %f926;
+	setp.neu.f32	%p66, %f954, 0f3EE8BA2E;
+	selp.f32	%f1385, 0f7FFFFFFF, %f1385, %p66;
+
+BB0_47:
+	add.f32 	%f956, %f200, 0f3EE8BA2E;
+	mov.b32 	 %r125, %f956;
+	setp.lt.s32	%p68, %r125, 2139095040;
+	@%p68 bra 	BB0_52;
+
+	setp.gtu.f32	%p69, %f200, 0f7F800000;
+	@%p69 bra 	BB0_51;
+	bra.uni 	BB0_49;
+
+BB0_51:
+	add.f32 	%f1385, %f198, 0f3EE8BA2E;
+	bra.uni 	BB0_52;
+
+BB0_49:
+	setp.neu.f32	%p70, %f200, 0f7F800000;
+	@%p70 bra 	BB0_52;
+
+	selp.f32	%f1385, 0fFF800000, 0f7F800000, %p4;
+
+BB0_52:
+	mul.f32 	%f957, %f1385, 0f437F0000;
+	setp.eq.f32	%p71, %f198, 0f3F800000;
+	selp.f32	%f958, 0f437F0000, %f957, %p71;
+	cvt.rzi.u32.f32	%r126, %f958;
+	cvt.u16.u32	%rs14, %r126;
+	mov.u16 	%rs15, 255;
+	st.v2.u8 	[%rd43], {%rs14, %rs15};
+	ld.global.u32 	%r245, [imageEnabled];
+
+BB0_53:
+	and.b32  	%r127, %r245, 1;
+	setp.eq.b32	%p72, %r127, 1;
+	@!%p72 bra 	BB0_88;
+	bra.uni 	BB0_54;
+
+BB0_54:
+	mov.f32 	%f961, 0f3E666666;
+	cvt.rzi.f32.f32	%f962, %f961;
+	fma.rn.f32 	%f963, %f962, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f212, %f963;
+	abs.f32 	%f213, %f1322;
+	setp.lt.f32	%p73, %f213, 0f00800000;
+	mul.f32 	%f964, %f213, 0f4B800000;
+	selp.f32	%f965, 0fC3170000, 0fC2FE0000, %p73;
+	selp.f32	%f966, %f964, %f213, %p73;
+	mov.b32 	 %r128, %f966;
+	and.b32  	%r129, %r128, 8388607;
+	or.b32  	%r130, %r129, 1065353216;
+	mov.b32 	 %f967, %r130;
+	shr.u32 	%r131, %r128, 23;
+	cvt.rn.f32.u32	%f968, %r131;
+	add.f32 	%f969, %f965, %f968;
+	setp.gt.f32	%p74, %f967, 0f3FB504F3;
+	mul.f32 	%f970, %f967, 0f3F000000;
+	add.f32 	%f971, %f969, 0f3F800000;
+	selp.f32	%f972, %f970, %f967, %p74;
+	selp.f32	%f973, %f971, %f969, %p74;
+	add.f32 	%f974, %f972, 0fBF800000;
+	add.f32 	%f960, %f972, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f959,%f960;
+	// inline asm
+	add.f32 	%f975, %f974, %f974;
+	mul.f32 	%f976, %f959, %f975;
+	mul.f32 	%f977, %f976, %f976;
+	mov.f32 	%f978, 0f3C4CAF63;
+	mov.f32 	%f979, 0f3B18F0FE;
+	fma.rn.f32 	%f980, %f979, %f977, %f978;
+	mov.f32 	%f981, 0f3DAAAABD;
+	fma.rn.f32 	%f982, %f980, %f977, %f981;
+	mul.rn.f32 	%f983, %f982, %f977;
+	mul.rn.f32 	%f984, %f983, %f976;
+	sub.f32 	%f985, %f974, %f976;
+	neg.f32 	%f986, %f976;
+	add.f32 	%f987, %f985, %f985;
+	fma.rn.f32 	%f988, %f986, %f974, %f987;
+	mul.rn.f32 	%f989, %f959, %f988;
+	add.f32 	%f990, %f984, %f976;
+	sub.f32 	%f991, %f976, %f990;
+	add.f32 	%f992, %f984, %f991;
+	add.f32 	%f993, %f989, %f992;
+	add.f32 	%f994, %f990, %f993;
+	sub.f32 	%f995, %f990, %f994;
+	add.f32 	%f996, %f993, %f995;
+	mov.f32 	%f997, 0f3F317200;
+	mul.rn.f32 	%f998, %f973, %f997;
+	mov.f32 	%f999, 0f35BFBE8E;
+	mul.rn.f32 	%f1000, %f973, %f999;
+	add.f32 	%f1001, %f998, %f994;
+	sub.f32 	%f1002, %f998, %f1001;
+	add.f32 	%f1003, %f994, %f1002;
+	add.f32 	%f1004, %f996, %f1003;
+	add.f32 	%f1005, %f1000, %f1004;
+	add.f32 	%f1006, %f1001, %f1005;
+	sub.f32 	%f1007, %f1001, %f1006;
+	add.f32 	%f1008, %f1005, %f1007;
+	mov.f32 	%f1009, 0f3EE66666;
+	mul.rn.f32 	%f1010, %f1009, %f1006;
+	neg.f32 	%f1011, %f1010;
+	fma.rn.f32 	%f1012, %f1009, %f1006, %f1011;
+	fma.rn.f32 	%f1013, %f1009, %f1008, %f1012;
+	mov.f32 	%f1014, 0f00000000;
+	fma.rn.f32 	%f1015, %f1014, %f1006, %f1013;
+	add.rn.f32 	%f1016, %f1010, %f1015;
+	neg.f32 	%f1017, %f1016;
+	add.rn.f32 	%f1018, %f1010, %f1017;
+	add.rn.f32 	%f1019, %f1018, %f1015;
+	mov.b32 	 %r132, %f1016;
+	setp.eq.s32	%p75, %r132, 1118925336;
+	add.s32 	%r133, %r132, -1;
+	mov.b32 	 %f1020, %r133;
+	add.f32 	%f1021, %f1019, 0f37000000;
+	selp.f32	%f1022, %f1020, %f1016, %p75;
+	selp.f32	%f214, %f1021, %f1019, %p75;
+	mul.f32 	%f1023, %f1022, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f1024, %f1023;
+	mov.f32 	%f1025, 0fBF317200;
+	fma.rn.f32 	%f1026, %f1024, %f1025, %f1022;
+	mov.f32 	%f1027, 0fB5BFBE8E;
+	fma.rn.f32 	%f1028, %f1024, %f1027, %f1026;
+	mul.f32 	%f1029, %f1028, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f1030, %f1029;
+	add.f32 	%f1031, %f1024, 0f00000000;
+	ex2.approx.f32 	%f1032, %f1031;
+	mul.f32 	%f1033, %f1030, %f1032;
+	setp.lt.f32	%p76, %f1022, 0fC2D20000;
+	selp.f32	%f1034, 0f00000000, %f1033, %p76;
+	setp.gt.f32	%p77, %f1022, 0f42D20000;
+	selp.f32	%f1386, 0f7F800000, %f1034, %p77;
+	setp.eq.f32	%p78, %f1386, 0f7F800000;
+	@%p78 bra 	BB0_56;
+
+	fma.rn.f32 	%f1386, %f1386, %f214, %f1386;
+
+BB0_56:
+	setp.lt.f32	%p79, %f1322, 0f00000000;
+	setp.eq.f32	%p80, %f212, 0f3F800000;
+	and.pred  	%p5, %p79, %p80;
+	mov.b32 	 %r134, %f1386;
+	xor.b32  	%r135, %r134, -2147483648;
+	mov.b32 	 %f1035, %r135;
+	selp.f32	%f1388, %f1035, %f1386, %p5;
+	setp.eq.f32	%p81, %f1322, 0f00000000;
+	@%p81 bra 	BB0_59;
+	bra.uni 	BB0_57;
+
+BB0_59:
+	add.f32 	%f1038, %f1322, %f1322;
+	selp.f32	%f1388, %f1038, 0f00000000, %p80;
+	bra.uni 	BB0_60;
+
+BB0_57:
+	setp.geu.f32	%p82, %f1322, 0f00000000;
+	@%p82 bra 	BB0_60;
+
+	cvt.rzi.f32.f32	%f1037, %f1009;
+	setp.neu.f32	%p83, %f1037, 0f3EE66666;
+	selp.f32	%f1388, 0f7FFFFFFF, %f1388, %p83;
+
+BB0_60:
+	add.f32 	%f1039, %f213, 0f3EE66666;
+	mov.b32 	 %r136, %f1039;
+	setp.lt.s32	%p85, %r136, 2139095040;
+	@%p85 bra 	BB0_65;
+
+	setp.gtu.f32	%p86, %f213, 0f7F800000;
+	@%p86 bra 	BB0_64;
+	bra.uni 	BB0_62;
+
+BB0_64:
+	add.f32 	%f1388, %f1322, 0f3EE66666;
+	bra.uni 	BB0_65;
+
+BB0_62:
+	setp.neu.f32	%p87, %f213, 0f7F800000;
+	@%p87 bra 	BB0_65;
+
+	selp.f32	%f1388, 0fFF800000, 0f7F800000, %p5;
+
+BB0_65:
+	setp.eq.f32	%p88, %f1322, 0f3F800000;
+	selp.f32	%f225, 0f3F800000, %f1388, %p88;
+	abs.f32 	%f226, %f1321;
+	setp.lt.f32	%p89, %f226, 0f00800000;
+	mul.f32 	%f1042, %f226, 0f4B800000;
+	selp.f32	%f1043, 0fC3170000, 0fC2FE0000, %p89;
+	selp.f32	%f1044, %f1042, %f226, %p89;
+	mov.b32 	 %r137, %f1044;
+	and.b32  	%r138, %r137, 8388607;
+	or.b32  	%r139, %r138, 1065353216;
+	mov.b32 	 %f1045, %r139;
+	shr.u32 	%r140, %r137, 23;
+	cvt.rn.f32.u32	%f1046, %r140;
+	add.f32 	%f1047, %f1043, %f1046;
+	setp.gt.f32	%p90, %f1045, 0f3FB504F3;
+	mul.f32 	%f1048, %f1045, 0f3F000000;
+	add.f32 	%f1049, %f1047, 0f3F800000;
+	selp.f32	%f1050, %f1048, %f1045, %p90;
+	selp.f32	%f1051, %f1049, %f1047, %p90;
+	add.f32 	%f1052, %f1050, 0fBF800000;
+	add.f32 	%f1041, %f1050, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f1040,%f1041;
+	// inline asm
+	add.f32 	%f1053, %f1052, %f1052;
+	mul.f32 	%f1054, %f1040, %f1053;
+	mul.f32 	%f1055, %f1054, %f1054;
+	fma.rn.f32 	%f1058, %f979, %f1055, %f978;
+	fma.rn.f32 	%f1060, %f1058, %f1055, %f981;
+	mul.rn.f32 	%f1061, %f1060, %f1055;
+	mul.rn.f32 	%f1062, %f1061, %f1054;
+	sub.f32 	%f1063, %f1052, %f1054;
+	neg.f32 	%f1064, %f1054;
+	add.f32 	%f1065, %f1063, %f1063;
+	fma.rn.f32 	%f1066, %f1064, %f1052, %f1065;
+	mul.rn.f32 	%f1067, %f1040, %f1066;
+	add.f32 	%f1068, %f1062, %f1054;
+	sub.f32 	%f1069, %f1054, %f1068;
+	add.f32 	%f1070, %f1062, %f1069;
+	add.f32 	%f1071, %f1067, %f1070;
+	add.f32 	%f1072, %f1068, %f1071;
+	sub.f32 	%f1073, %f1068, %f1072;
+	add.f32 	%f1074, %f1071, %f1073;
+	mul.rn.f32 	%f1076, %f1051, %f997;
+	mul.rn.f32 	%f1078, %f1051, %f999;
+	add.f32 	%f1079, %f1076, %f1072;
+	sub.f32 	%f1080, %f1076, %f1079;
+	add.f32 	%f1081, %f1072, %f1080;
+	add.f32 	%f1082, %f1074, %f1081;
+	add.f32 	%f1083, %f1078, %f1082;
+	add.f32 	%f1084, %f1079, %f1083;
+	sub.f32 	%f1085, %f1079, %f1084;
+	add.f32 	%f1086, %f1083, %f1085;
+	mul.rn.f32 	%f1088, %f1009, %f1084;
+	neg.f32 	%f1089, %f1088;
+	fma.rn.f32 	%f1090, %f1009, %f1084, %f1089;
+	fma.rn.f32 	%f1091, %f1009, %f1086, %f1090;
+	fma.rn.f32 	%f1093, %f1014, %f1084, %f1091;
+	add.rn.f32 	%f1094, %f1088, %f1093;
+	neg.f32 	%f1095, %f1094;
+	add.rn.f32 	%f1096, %f1088, %f1095;
+	add.rn.f32 	%f1097, %f1096, %f1093;
+	mov.b32 	 %r141, %f1094;
+	setp.eq.s32	%p91, %r141, 1118925336;
+	add.s32 	%r142, %r141, -1;
+	mov.b32 	 %f1098, %r142;
+	add.f32 	%f1099, %f1097, 0f37000000;
+	selp.f32	%f1100, %f1098, %f1094, %p91;
+	selp.f32	%f227, %f1099, %f1097, %p91;
+	mul.f32 	%f1101, %f1100, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f1102, %f1101;
+	fma.rn.f32 	%f1104, %f1102, %f1025, %f1100;
+	fma.rn.f32 	%f1106, %f1102, %f1027, %f1104;
+	mul.f32 	%f1107, %f1106, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f1108, %f1107;
+	add.f32 	%f1109, %f1102, 0f00000000;
+	ex2.approx.f32 	%f1110, %f1109;
+	mul.f32 	%f1111, %f1108, %f1110;
+	setp.lt.f32	%p92, %f1100, 0fC2D20000;
+	selp.f32	%f1112, 0f00000000, %f1111, %p92;
+	setp.gt.f32	%p93, %f1100, 0f42D20000;
+	selp.f32	%f1389, 0f7F800000, %f1112, %p93;
+	setp.eq.f32	%p94, %f1389, 0f7F800000;
+	@%p94 bra 	BB0_67;
+
+	fma.rn.f32 	%f1389, %f1389, %f227, %f1389;
+
+BB0_67:
+	setp.lt.f32	%p95, %f1321, 0f00000000;
+	and.pred  	%p6, %p95, %p80;
+	mov.b32 	 %r143, %f1389;
+	xor.b32  	%r144, %r143, -2147483648;
+	mov.b32 	 %f1113, %r144;
+	selp.f32	%f1391, %f1113, %f1389, %p6;
+	setp.eq.f32	%p97, %f1321, 0f00000000;
+	@%p97 bra 	BB0_70;
+	bra.uni 	BB0_68;
+
+BB0_70:
+	add.f32 	%f1116, %f1321, %f1321;
+	selp.f32	%f1391, %f1116, 0f00000000, %p80;
+	bra.uni 	BB0_71;
+
+BB0_68:
+	setp.geu.f32	%p98, %f1321, 0f00000000;
+	@%p98 bra 	BB0_71;
+
+	cvt.rzi.f32.f32	%f1115, %f1009;
+	setp.neu.f32	%p99, %f1115, 0f3EE66666;
+	selp.f32	%f1391, 0f7FFFFFFF, %f1391, %p99;
+
+BB0_71:
+	add.f32 	%f1117, %f226, 0f3EE66666;
+	mov.b32 	 %r145, %f1117;
+	setp.lt.s32	%p101, %r145, 2139095040;
+	@%p101 bra 	BB0_76;
+
+	setp.gtu.f32	%p102, %f226, 0f7F800000;
+	@%p102 bra 	BB0_75;
+	bra.uni 	BB0_73;
+
+BB0_75:
+	add.f32 	%f1391, %f1321, 0f3EE66666;
+	bra.uni 	BB0_76;
+
+BB0_73:
+	setp.neu.f32	%p103, %f226, 0f7F800000;
+	@%p103 bra 	BB0_76;
+
+	selp.f32	%f1391, 0fFF800000, 0f7F800000, %p6;
+
+BB0_76:
+	setp.eq.f32	%p104, %f1321, 0f3F800000;
+	selp.f32	%f238, 0f3F800000, %f1391, %p104;
+	abs.f32 	%f239, %f1320;
+	setp.lt.f32	%p105, %f239, 0f00800000;
+	mul.f32 	%f1120, %f239, 0f4B800000;
+	selp.f32	%f1121, 0fC3170000, 0fC2FE0000, %p105;
+	selp.f32	%f1122, %f1120, %f239, %p105;
+	mov.b32 	 %r146, %f1122;
+	and.b32  	%r147, %r146, 8388607;
+	or.b32  	%r148, %r147, 1065353216;
+	mov.b32 	 %f1123, %r148;
+	shr.u32 	%r149, %r146, 23;
+	cvt.rn.f32.u32	%f1124, %r149;
+	add.f32 	%f1125, %f1121, %f1124;
+	setp.gt.f32	%p106, %f1123, 0f3FB504F3;
+	mul.f32 	%f1126, %f1123, 0f3F000000;
+	add.f32 	%f1127, %f1125, 0f3F800000;
+	selp.f32	%f1128, %f1126, %f1123, %p106;
+	selp.f32	%f1129, %f1127, %f1125, %p106;
+	add.f32 	%f1130, %f1128, 0fBF800000;
+	add.f32 	%f1119, %f1128, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f1118,%f1119;
+	// inline asm
+	add.f32 	%f1131, %f1130, %f1130;
+	mul.f32 	%f1132, %f1118, %f1131;
+	mul.f32 	%f1133, %f1132, %f1132;
+	fma.rn.f32 	%f1136, %f979, %f1133, %f978;
+	fma.rn.f32 	%f1138, %f1136, %f1133, %f981;
+	mul.rn.f32 	%f1139, %f1138, %f1133;
+	mul.rn.f32 	%f1140, %f1139, %f1132;
+	sub.f32 	%f1141, %f1130, %f1132;
+	neg.f32 	%f1142, %f1132;
+	add.f32 	%f1143, %f1141, %f1141;
+	fma.rn.f32 	%f1144, %f1142, %f1130, %f1143;
+	mul.rn.f32 	%f1145, %f1118, %f1144;
+	add.f32 	%f1146, %f1140, %f1132;
+	sub.f32 	%f1147, %f1132, %f1146;
+	add.f32 	%f1148, %f1140, %f1147;
+	add.f32 	%f1149, %f1145, %f1148;
+	add.f32 	%f1150, %f1146, %f1149;
+	sub.f32 	%f1151, %f1146, %f1150;
+	add.f32 	%f1152, %f1149, %f1151;
+	mul.rn.f32 	%f1154, %f1129, %f997;
+	mul.rn.f32 	%f1156, %f1129, %f999;
+	add.f32 	%f1157, %f1154, %f1150;
+	sub.f32 	%f1158, %f1154, %f1157;
+	add.f32 	%f1159, %f1150, %f1158;
+	add.f32 	%f1160, %f1152, %f1159;
+	add.f32 	%f1161, %f1156, %f1160;
+	add.f32 	%f1162, %f1157, %f1161;
+	sub.f32 	%f1163, %f1157, %f1162;
+	add.f32 	%f1164, %f1161, %f1163;
+	mul.rn.f32 	%f1166, %f1009, %f1162;
+	neg.f32 	%f1167, %f1166;
+	fma.rn.f32 	%f1168, %f1009, %f1162, %f1167;
+	fma.rn.f32 	%f1169, %f1009, %f1164, %f1168;
+	fma.rn.f32 	%f1171, %f1014, %f1162, %f1169;
+	add.rn.f32 	%f1172, %f1166, %f1171;
+	neg.f32 	%f1173, %f1172;
+	add.rn.f32 	%f1174, %f1166, %f1173;
+	add.rn.f32 	%f1175, %f1174, %f1171;
+	mov.b32 	 %r150, %f1172;
+	setp.eq.s32	%p107, %r150, 1118925336;
+	add.s32 	%r151, %r150, -1;
+	mov.b32 	 %f1176, %r151;
+	add.f32 	%f1177, %f1175, 0f37000000;
+	selp.f32	%f1178, %f1176, %f1172, %p107;
+	selp.f32	%f240, %f1177, %f1175, %p107;
+	mul.f32 	%f1179, %f1178, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f1180, %f1179;
+	fma.rn.f32 	%f1182, %f1180, %f1025, %f1178;
+	fma.rn.f32 	%f1184, %f1180, %f1027, %f1182;
+	mul.f32 	%f1185, %f1184, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f1186, %f1185;
+	add.f32 	%f1187, %f1180, 0f00000000;
+	ex2.approx.f32 	%f1188, %f1187;
+	mul.f32 	%f1189, %f1186, %f1188;
+	setp.lt.f32	%p108, %f1178, 0fC2D20000;
+	selp.f32	%f1190, 0f00000000, %f1189, %p108;
+	setp.gt.f32	%p109, %f1178, 0f42D20000;
+	selp.f32	%f1392, 0f7F800000, %f1190, %p109;
+	setp.eq.f32	%p110, %f1392, 0f7F800000;
+	@%p110 bra 	BB0_78;
+
+	fma.rn.f32 	%f1392, %f1392, %f240, %f1392;
+
+BB0_78:
+	setp.lt.f32	%p111, %f1320, 0f00000000;
+	and.pred  	%p7, %p111, %p80;
+	mov.b32 	 %r152, %f1392;
+	xor.b32  	%r153, %r152, -2147483648;
+	mov.b32 	 %f1191, %r153;
+	selp.f32	%f1394, %f1191, %f1392, %p7;
+	setp.eq.f32	%p113, %f1320, 0f00000000;
+	@%p113 bra 	BB0_81;
+	bra.uni 	BB0_79;
+
+BB0_81:
+	add.f32 	%f1194, %f1320, %f1320;
+	selp.f32	%f1394, %f1194, 0f00000000, %p80;
+	bra.uni 	BB0_82;
+
+BB0_79:
+	setp.geu.f32	%p114, %f1320, 0f00000000;
+	@%p114 bra 	BB0_82;
+
+	cvt.rzi.f32.f32	%f1193, %f1009;
+	setp.neu.f32	%p115, %f1193, 0f3EE66666;
+	selp.f32	%f1394, 0f7FFFFFFF, %f1394, %p115;
+
+BB0_82:
+	add.f32 	%f1195, %f239, 0f3EE66666;
+	mov.b32 	 %r154, %f1195;
+	setp.lt.s32	%p117, %r154, 2139095040;
+	@%p117 bra 	BB0_87;
+
+	setp.gtu.f32	%p118, %f239, 0f7F800000;
+	@%p118 bra 	BB0_86;
+	bra.uni 	BB0_84;
+
+BB0_86:
+	add.f32 	%f1394, %f1320, 0f3EE66666;
+	bra.uni 	BB0_87;
+
+BB0_84:
+	setp.neu.f32	%p119, %f239, 0f7F800000;
+	@%p119 bra 	BB0_87;
+
+	selp.f32	%f1394, 0fFF800000, 0f7F800000, %p7;
+
+BB0_87:
+	setp.eq.f32	%p120, %f1320, 0f3F800000;
+	selp.f32	%f1196, 0f3F800000, %f1394, %p120;
+	cvt.u64.u32	%rd53, %r3;
+	cvt.u64.u32	%rd52, %r2;
+	mov.u64 	%rd56, image;
+	cvta.global.u64 	%rd51, %rd56;
+	// inline asm
+	call (%rd50), _rt_buffer_get_64, (%rd51, %r27, %r28, %rd52, %rd53, %rd13, %rd13);
+	// inline asm
+	cvt.sat.f32.f32	%f1197, %f1196;
+	mul.f32 	%f1198, %f1197, 0f437FFD71;
+	cvt.rzi.u32.f32	%r157, %f1198;
+	cvt.sat.f32.f32	%f1199, %f238;
+	mul.f32 	%f1200, %f1199, 0f437FFD71;
+	cvt.rzi.u32.f32	%r158, %f1200;
+	cvt.sat.f32.f32	%f1201, %f225;
+	mul.f32 	%f1202, %f1201, 0f437FFD71;
+	cvt.rzi.u32.f32	%r159, %f1202;
+	cvt.u16.u32	%rs16, %r157;
+	cvt.u16.u32	%rs17, %r159;
+	cvt.u16.u32	%rs18, %r158;
+	mov.u16 	%rs19, 255;
+	st.v4.u8 	[%rd50], {%rs16, %rs18, %rs17, %rs19};
+	ld.global.u32 	%r245, [imageEnabled];
+
+BB0_88:
+	cvt.u64.u32	%rd4, %r2;
+	cvt.u64.u32	%rd5, %r3;
+	and.b32  	%r160, %r245, 4;
+	setp.eq.s32	%p121, %r160, 0;
+	@%p121 bra 	BB0_92;
+
+	ld.global.u32 	%r161, [additive];
+	setp.eq.s32	%p122, %r161, 0;
+	mov.f32 	%f1203, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs20, %f1203;}
+
+	// inline asm
+	@%p122 bra 	BB0_91;
+
+	mov.u64 	%rd69, image_HDR;
+	cvta.global.u64 	%rd58, %rd69;
+	mov.u32 	%r165, 8;
+	// inline asm
+	call (%rd57), _rt_buffer_get_64, (%rd58, %r27, %r165, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs27, %rs28, %rs29, %rs30}, [%rd57];
+	// inline asm
+	{  cvt.f32.f16 %f1204, %rs27;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1205, %rs28;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1206, %rs29;}
+
+	// inline asm
+	// inline asm
+	call (%rd63), _rt_buffer_get_64, (%rd58, %r27, %r165, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1207, %f1322, %f1204;
+	add.f32 	%f1208, %f1321, %f1205;
+	add.f32 	%f1209, %f1320, %f1206;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs26, %f1209;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs25, %f1208;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs24, %f1207;}
+
+	// inline asm
+	st.v4.u16 	[%rd63], {%rs24, %rs25, %rs26, %rs20};
+	bra.uni 	BB0_92;
+
+BB0_91:
+	mov.u64 	%rd76, image_HDR;
+	cvta.global.u64 	%rd71, %rd76;
+	mov.u32 	%r167, 8;
+	// inline asm
+	call (%rd70), _rt_buffer_get_64, (%rd71, %r27, %r167, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs33, %f1320;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs32, %f1321;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs31, %f1322;}
+
+	// inline asm
+	st.v4.u16 	[%rd70], {%rs31, %rs32, %rs33, %rs20};
+
+BB0_92:
+	mov.f32 	%f1214, 0f34000000;
+	max.f32 	%f1215, %f1319, %f1214;
+	div.rn.f32 	%f1216, %f1316, %f1215;
+	max.f32 	%f1217, %f1318, %f1214;
+	div.rn.f32 	%f1218, %f1315, %f1217;
+	max.f32 	%f1219, %f1317, %f1214;
+	div.rn.f32 	%f1220, %f1314, %f1219;
+	fma.rn.f32 	%f251, %f1216, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f252, %f1218, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f253, %f1220, 0f3F000000, 0f3F000000;
+	div.rn.f32 	%f1221, %f1313, %f1215;
+	div.rn.f32 	%f1222, %f1312, %f1217;
+	div.rn.f32 	%f1223, %f1311, %f1219;
+	fma.rn.f32 	%f254, %f1221, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f255, %f1222, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f256, %f1223, 0f3F000000, 0f3F000000;
+	div.rn.f32 	%f1224, %f1310, %f1215;
+	div.rn.f32 	%f1225, %f1309, %f1217;
+	div.rn.f32 	%f1226, %f1308, %f1219;
+	fma.rn.f32 	%f257, %f1224, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f258, %f1225, 0f3F000000, 0f3F000000;
+	fma.rn.f32 	%f259, %f1226, 0f3F000000, 0f3F000000;
+	ld.global.u32 	%r168, [additive];
+	setp.eq.s32	%p123, %r168, 0;
+	mov.f32 	%f1213, 0f3F800000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs34, %f1213;}
+
+	// inline asm
+	@%p123 bra 	BB0_94;
+
+	mov.u64 	%rd89, image_RNM0;
+	cvta.global.u64 	%rd78, %rd89;
+	mov.u32 	%r172, 8;
+	// inline asm
+	call (%rd77), _rt_buffer_get_64, (%rd78, %r27, %r172, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd77];
+	// inline asm
+	{  cvt.f32.f16 %f1227, %rs41;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1228, %rs42;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1229, %rs43;}
+
+	// inline asm
+	// inline asm
+	call (%rd83), _rt_buffer_get_64, (%rd78, %r27, %r172, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1230, %f1319, %f1227;
+	add.f32 	%f1231, %f1318, %f1228;
+	add.f32 	%f1232, %f1317, %f1229;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs40, %f1232;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs39, %f1231;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs38, %f1230;}
+
+	// inline asm
+	st.v4.u16 	[%rd83], {%rs38, %rs39, %rs40, %rs34};
+	bra.uni 	BB0_95;
+
+BB0_94:
+	mov.u64 	%rd96, image_RNM0;
+	cvta.global.u64 	%rd91, %rd96;
+	mov.u32 	%r174, 8;
+	// inline asm
+	call (%rd90), _rt_buffer_get_64, (%rd91, %r27, %r174, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs47, %f1317;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs46, %f1318;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs45, %f1319;}
+
+	// inline asm
+	st.v4.u16 	[%rd90], {%rs45, %rs46, %rs47, %rs34};
+
+BB0_95:
+	ld.global.u32 	%r175, [additive];
+	setp.eq.s32	%p124, %r175, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs48, %f1213;}
+
+	// inline asm
+	@%p124 bra 	BB0_97;
+
+	mov.u64 	%rd109, image_RNM1;
+	cvta.global.u64 	%rd98, %rd109;
+	mov.u32 	%r179, 8;
+	// inline asm
+	call (%rd97), _rt_buffer_get_64, (%rd98, %r27, %r179, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs55, %rs56, %rs57, %rs58}, [%rd97];
+	// inline asm
+	{  cvt.f32.f16 %f1237, %rs55;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1238, %rs56;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1239, %rs57;}
+
+	// inline asm
+	// inline asm
+	call (%rd103), _rt_buffer_get_64, (%rd98, %r27, %r179, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1240, %f251, %f1237;
+	add.f32 	%f1241, %f252, %f1238;
+	add.f32 	%f1242, %f253, %f1239;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs54, %f1242;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs53, %f1241;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs52, %f1240;}
+
+	// inline asm
+	st.v4.u16 	[%rd103], {%rs52, %rs53, %rs54, %rs48};
+	bra.uni 	BB0_98;
+
+BB0_97:
+	mov.u64 	%rd116, image_RNM1;
+	cvta.global.u64 	%rd111, %rd116;
+	mov.u32 	%r181, 8;
+	// inline asm
+	call (%rd110), _rt_buffer_get_64, (%rd111, %r27, %r181, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs61, %f253;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs60, %f252;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs59, %f251;}
+
+	// inline asm
+	st.v4.u16 	[%rd110], {%rs59, %rs60, %rs61, %rs48};
+
+BB0_98:
+	ld.global.u32 	%r182, [additive];
+	setp.eq.s32	%p125, %r182, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs62, %f1213;}
+
+	// inline asm
+	@%p125 bra 	BB0_100;
+
+	mov.u64 	%rd129, image_RNM2;
+	cvta.global.u64 	%rd118, %rd129;
+	mov.u32 	%r186, 8;
+	// inline asm
+	call (%rd117), _rt_buffer_get_64, (%rd118, %r27, %r186, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs69, %rs70, %rs71, %rs72}, [%rd117];
+	// inline asm
+	{  cvt.f32.f16 %f1247, %rs69;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1248, %rs70;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1249, %rs71;}
+
+	// inline asm
+	// inline asm
+	call (%rd123), _rt_buffer_get_64, (%rd118, %r27, %r186, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1250, %f254, %f1247;
+	add.f32 	%f1251, %f255, %f1248;
+	add.f32 	%f1252, %f256, %f1249;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs68, %f1252;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs67, %f1251;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs66, %f1250;}
+
+	// inline asm
+	st.v4.u16 	[%rd123], {%rs66, %rs67, %rs68, %rs62};
+	bra.uni 	BB0_101;
+
+BB0_100:
+	mov.u64 	%rd136, image_RNM2;
+	cvta.global.u64 	%rd131, %rd136;
+	mov.u32 	%r188, 8;
+	// inline asm
+	call (%rd130), _rt_buffer_get_64, (%rd131, %r27, %r188, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs75, %f256;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs74, %f255;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs73, %f254;}
+
+	// inline asm
+	st.v4.u16 	[%rd130], {%rs73, %rs74, %rs75, %rs62};
+
+BB0_101:
+	ld.global.u32 	%r189, [additive];
+	setp.eq.s32	%p126, %r189, 0;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs76, %f1213;}
+
+	// inline asm
+	@%p126 bra 	BB0_103;
+
+	mov.u64 	%rd149, image_RNM3;
+	cvta.global.u64 	%rd138, %rd149;
+	mov.u32 	%r193, 8;
+	// inline asm
+	call (%rd137), _rt_buffer_get_64, (%rd138, %r27, %r193, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	ld.v4.u16 	{%rs83, %rs84, %rs85, %rs86}, [%rd137];
+	// inline asm
+	{  cvt.f32.f16 %f1257, %rs83;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1258, %rs84;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f1259, %rs85;}
+
+	// inline asm
+	// inline asm
+	call (%rd143), _rt_buffer_get_64, (%rd138, %r27, %r193, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	add.f32 	%f1260, %f257, %f1257;
+	add.f32 	%f1261, %f258, %f1258;
+	add.f32 	%f1262, %f259, %f1259;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs82, %f1262;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs81, %f1261;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs80, %f1260;}
+
+	// inline asm
+	st.v4.u16 	[%rd143], {%rs80, %rs81, %rs82, %rs76};
+	bra.uni 	BB0_124;
+
+BB0_103:
+	mov.u64 	%rd156, image_RNM3;
+	cvta.global.u64 	%rd151, %rd156;
+	mov.u32 	%r195, 8;
+	// inline asm
+	call (%rd150), _rt_buffer_get_64, (%rd151, %r27, %r195, %rd4, %rd5, %rd13, %rd13);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs89, %f259;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs88, %f258;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs87, %f257;}
+
+	// inline asm
+	st.v4.u16 	[%rd150], {%rs87, %rs88, %rs89, %rs76};
+
+BB0_124:
+	ret;
+}
+
+