move to self host

1 files changed, 1888 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmAreaLightDir.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmAreaLightDir.ptx
new file mode 100644
index 00000000..1d739a9a
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmAreaLightDir.ptx
@@ -0,0 +1,1888 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 image_Dir[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 1 .b8 lightMeshBuffer[1];
+.global .align 4 .u32 lightMeshBufferSize;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightPointSize;
+.global .align 4 .b8 lightColor[12];
+.global .align 1 .b8 rnd_seeds[1];
+.global .align 4 .u32 samples;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[36];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<145>;
+	.reg .b16 	%rs<55>;
+	.reg .f32 	%f<935>;
+	.reg .b32 	%r<371>;
+	.reg .b64 	%rd<162>;
+
+
+	mov.u64 	%rd161, __local_depot0;
+	cvta.local.u64 	%SP, %rd161;
+	ld.global.u32 	%r1, [samples];
+	ld.global.v2.u32 	{%r103, %r104}, [pixelID];
+	cvt.u64.u32	%rd23, %r103;
+	cvt.u64.u32	%rd24, %r104;
+	mov.u64 	%rd27, uvnormal;
+	cvta.global.u64 	%rd22, %rd27;
+	mov.u32 	%r101, 2;
+	mov.u32 	%r102, 4;
+	mov.u64 	%rd26, 0;
+	// inline asm
+	call (%rd21), _rt_buffer_get_64, (%rd22, %r101, %r102, %rd23, %rd24, %rd26, %rd26);
+	// inline asm
+	ld.u32 	%r2, [%rd21];
+	shr.u32 	%r107, %r2, 16;
+	cvt.u16.u32	%rs1, %r107;
+	and.b16  	%rs3, %rs1, 255;
+	cvt.u16.u32	%rs4, %r2;
+	or.b16  	%rs5, %rs4, %rs3;
+	setp.eq.s16	%p7, %rs5, 0;
+	mov.f32 	%f865, 0f00000000;
+	mov.f32 	%f866, %f865;
+	mov.f32 	%f867, %f865;
+	@%p7 bra 	BB0_2;
+
+	ld.u8 	%rs6, [%rd21+1];
+	and.b16  	%rs8, %rs4, 255;
+	cvt.rn.f32.u16	%f204, %rs8;
+	div.rn.f32 	%f205, %f204, 0f437F0000;
+	fma.rn.f32 	%f206, %f205, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f207, %rs6;
+	div.rn.f32 	%f208, %f207, 0f437F0000;
+	fma.rn.f32 	%f209, %f208, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f210, %rs3;
+	div.rn.f32 	%f211, %f210, 0f437F0000;
+	fma.rn.f32 	%f212, %f211, 0f40000000, 0fBF800000;
+	mul.f32 	%f213, %f209, %f209;
+	fma.rn.f32 	%f214, %f206, %f206, %f213;
+	fma.rn.f32 	%f215, %f212, %f212, %f214;
+	sqrt.rn.f32 	%f216, %f215;
+	rcp.rn.f32 	%f217, %f216;
+	mul.f32 	%f865, %f206, %f217;
+	mul.f32 	%f866, %f209, %f217;
+	mul.f32 	%f867, %f212, %f217;
+
+BB0_2:
+	ld.global.v2.u32 	{%r108, %r109}, [pixelID];
+	ld.global.v2.u32 	{%r111, %r112}, [tileInfo];
+	add.s32 	%r3, %r108, %r111;
+	add.s32 	%r4, %r109, %r112;
+	setp.eq.f32	%p8, %f866, 0f00000000;
+	setp.eq.f32	%p9, %f865, 0f00000000;
+	and.pred  	%p10, %p9, %p8;
+	setp.eq.f32	%p11, %f867, 0f00000000;
+	and.pred  	%p12, %p10, %p11;
+	@%p12 bra 	BB0_131;
+	bra.uni 	BB0_3;
+
+BB0_131:
+	ld.global.u32 	%r370, [imageEnabled];
+	and.b32  	%r313, %r370, 1;
+	setp.eq.b32	%p139, %r313, 1;
+	@!%p139 bra 	BB0_133;
+	bra.uni 	BB0_132;
+
+BB0_132:
+	cvt.u64.u32	%rd116, %r3;
+	cvt.u64.u32	%rd117, %r4;
+	mov.u64 	%rd120, image;
+	cvta.global.u64 	%rd115, %rd120;
+	mov.u64 	%rd119, 0;
+	// inline asm
+	call (%rd114), _rt_buffer_get_64, (%rd115, %r101, %r102, %rd116, %rd117, %rd119, %rd119);
+	// inline asm
+	mov.u16 	%rs36, 0;
+	st.v4.u8 	[%rd114], {%rs36, %rs36, %rs36, %rs36};
+	ld.global.u32 	%r370, [imageEnabled];
+
+BB0_133:
+	and.b32  	%r316, %r370, 8;
+	setp.eq.s32	%p140, %r316, 0;
+	@%p140 bra 	BB0_135;
+
+	cvt.u64.u32	%rd123, %r3;
+	cvt.u64.u32	%rd124, %r4;
+	mov.u64 	%rd127, image_Mask;
+	cvta.global.u64 	%rd122, %rd127;
+	mov.u64 	%rd126, 0;
+	// inline asm
+	call (%rd121), _rt_buffer_get_64, (%rd122, %r101, %r101, %rd123, %rd124, %rd126, %rd126);
+	// inline asm
+	mov.f32 	%f848, 0f00000000;
+	cvt.rzi.u32.f32	%r319, %f848;
+	cvt.u16.u32	%rs37, %r319;
+	mov.u16 	%rs38, 0;
+	st.v2.u8 	[%rd121], {%rs37, %rs38};
+	ld.global.u32 	%r370, [imageEnabled];
+
+BB0_135:
+	and.b32  	%r320, %r370, 4;
+	setp.eq.s32	%p141, %r320, 0;
+	@%p141 bra 	BB0_139;
+
+	ld.global.u32 	%r321, [additive];
+	setp.eq.s32	%p142, %r321, 0;
+	cvt.u64.u32	%rd19, %r3;
+	cvt.u64.u32	%rd20, %r4;
+	@%p142 bra 	BB0_138;
+
+	mov.u64 	%rd140, image_HDR;
+	cvta.global.u64 	%rd129, %rd140;
+	mov.u32 	%r325, 8;
+	mov.u64 	%rd139, 0;
+	// inline asm
+	call (%rd128), _rt_buffer_get_64, (%rd129, %r101, %r325, %rd19, %rd20, %rd139, %rd139);
+	// inline asm
+	ld.v4.u16 	{%rs45, %rs46, %rs47, %rs48}, [%rd128];
+	// inline asm
+	{  cvt.f32.f16 %f849, %rs45;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f850, %rs46;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f851, %rs47;}
+
+	// inline asm
+	// inline asm
+	call (%rd134), _rt_buffer_get_64, (%rd129, %r101, %r325, %rd19, %rd20, %rd139, %rd139);
+	// inline asm
+	add.f32 	%f852, %f849, 0f00000000;
+	add.f32 	%f853, %f850, 0f00000000;
+	add.f32 	%f854, %f851, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs44, %f854;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs43, %f853;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs42, %f852;}
+
+	// inline asm
+	mov.u16 	%rs49, 0;
+	st.v4.u16 	[%rd134], {%rs42, %rs43, %rs44, %rs49};
+	bra.uni 	BB0_139;
+
+BB0_3:
+	ld.global.v2.u32 	{%r121, %r122}, [pixelID];
+	cvt.u64.u32	%rd30, %r121;
+	cvt.u64.u32	%rd31, %r122;
+	mov.u64 	%rd40, uvpos;
+	cvta.global.u64 	%rd29, %rd40;
+	mov.u32 	%r117, 12;
+	// inline asm
+	call (%rd28), _rt_buffer_get_64, (%rd29, %r101, %r117, %rd30, %rd31, %rd26, %rd26);
+	// inline asm
+	ld.f32 	%f9, [%rd28+8];
+	ld.f32 	%f8, [%rd28+4];
+	ld.f32 	%f7, [%rd28];
+	mul.f32 	%f223, %f7, 0f3456BF95;
+	mul.f32 	%f224, %f8, 0f3456BF95;
+	mul.f32 	%f225, %f9, 0f3456BF95;
+	abs.f32 	%f10, %f865;
+	div.rn.f32 	%f226, %f223, %f10;
+	abs.f32 	%f227, %f866;
+	div.rn.f32 	%f228, %f224, %f227;
+	abs.f32 	%f11, %f867;
+	div.rn.f32 	%f229, %f225, %f11;
+	abs.f32 	%f230, %f226;
+	abs.f32 	%f231, %f228;
+	abs.f32 	%f232, %f229;
+	mov.f32 	%f233, 0f38D1B717;
+	max.f32 	%f234, %f230, %f233;
+	max.f32 	%f235, %f231, %f233;
+	max.f32 	%f236, %f232, %f233;
+	fma.rn.f32 	%f12, %f865, %f234, %f7;
+	fma.rn.f32 	%f13, %f866, %f235, %f8;
+	fma.rn.f32 	%f14, %f867, %f236, %f9;
+	ld.global.v2.u32 	{%r125, %r126}, [pixelID];
+	cvt.u64.u32	%rd36, %r125;
+	cvt.u64.u32	%rd37, %r126;
+	mov.u64 	%rd41, rnd_seeds;
+	cvta.global.u64 	%rd35, %rd41;
+	// inline asm
+	call (%rd34), _rt_buffer_get_64, (%rd35, %r101, %r102, %rd36, %rd37, %rd26, %rd26);
+	// inline asm
+	ld.u32 	%r129, [%rd34];
+	mad.lo.s32 	%r5, %r129, 1664525, 1013904223;
+	ld.global.u32 	%r130, [lightMeshBufferSize];
+	setp.eq.s32	%p14, %r130, 0;
+	mov.pred 	%p13, 0;
+	mov.f32 	%f20, 0f00000000;
+	mov.u32 	%r7, 0;
+	@%p14 bra 	BB0_4;
+
+	ld.global.f32 	%f15, [lightPointSize];
+	mul.f32 	%f16, %f12, 0f3456BF95;
+	mul.f32 	%f17, %f13, 0f3456BF95;
+	mul.f32 	%f18, %f14, 0f3456BF95;
+	and.b32  	%r133, %r5, 16777215;
+	cvt.rn.f32.u32	%f242, %r133;
+	mul.f32 	%f243, %f242, 0fB3800000;
+	fma.rn.f32 	%f19, %f243, 0f3F333333, 0f3F800000;
+	mov.f32 	%f20, 0f00000000;
+	mov.u32 	%r339, 0;
+	abs.f32 	%f366, %f17;
+	abs.f32 	%f367, %f16;
+	max.f32 	%f368, %f367, %f366;
+	abs.f32 	%f369, %f18;
+	max.f32 	%f370, %f368, %f369;
+	mov.u32 	%r7, %r339;
+	mov.f32 	%f21, %f20;
+	mov.f32 	%f888, %f20;
+	mov.f32 	%f889, %f20;
+	mov.f32 	%f890, %f20;
+
+BB0_6:
+	shl.b32 	%r8, %r339, 1;
+	cvt.s64.s32	%rd44, %r8;
+	mov.u64 	%rd48, lightMeshBuffer;
+	cvta.global.u64 	%rd43, %rd48;
+	mov.u32 	%r134, 1;
+	// inline asm
+	call (%rd42), _rt_buffer_get_64, (%rd43, %r134, %r117, %rd44, %rd26, %rd26, %rd26);
+	// inline asm
+	ld.f32 	%f244, [%rd42];
+	sub.f32 	%f245, %f244, %f7;
+	ld.f32 	%f246, [%rd42+4];
+	sub.f32 	%f247, %f246, %f8;
+	ld.f32 	%f248, [%rd42+8];
+	sub.f32 	%f249, %f248, %f9;
+	mul.f32 	%f250, %f247, %f247;
+	fma.rn.f32 	%f251, %f245, %f245, %f250;
+	fma.rn.f32 	%f252, %f249, %f249, %f251;
+	sqrt.rn.f32 	%f25, %f252;
+	rcp.rn.f32 	%f253, %f25;
+	mul.f32 	%f26, %f245, %f253;
+	mul.f32 	%f27, %f247, %f253;
+	mul.f32 	%f28, %f249, %f253;
+	mul.f32 	%f254, %f866, %f27;
+	fma.rn.f32 	%f255, %f865, %f26, %f254;
+	fma.rn.f32 	%f29, %f867, %f28, %f255;
+	setp.leu.f32	%p15, %f29, 0f00000000;
+	@%p15 bra 	BB0_22;
+
+	setp.ne.s32	%p17, %r1, 0;
+	mul.f32 	%f256, %f25, %f25;
+	mul.f32 	%f257, %f256, 0f40C90FDB;
+	div.rn.f32 	%f258, %f15, %f257;
+	add.f32 	%f30, %f258, %f258;
+	setp.gt.f32	%p18, %f30, %f19;
+	and.pred  	%p19, %p17, %p18;
+	mov.pred 	%p144, -1;
+	@%p19 bra 	BB0_24;
+
+	ld.global.f32 	%f261, [lightInvCutoff];
+	mul.f32 	%f31, %f25, %f261;
+	mov.f32 	%f265, 0f40800000;
+	abs.f32 	%f33, %f31;
+	setp.lt.f32	%p20, %f33, 0f00800000;
+	mul.f32 	%f267, %f33, 0f4B800000;
+	selp.f32	%f268, 0fC3170000, 0fC2FE0000, %p20;
+	selp.f32	%f269, %f267, %f33, %p20;
+	mov.b32 	 %r136, %f269;
+	and.b32  	%r137, %r136, 8388607;
+	or.b32  	%r138, %r137, 1065353216;
+	mov.b32 	 %f270, %r138;
+	shr.u32 	%r139, %r136, 23;
+	cvt.rn.f32.u32	%f271, %r139;
+	add.f32 	%f272, %f268, %f271;
+	setp.gt.f32	%p21, %f270, 0f3FB504F3;
+	mul.f32 	%f273, %f270, 0f3F000000;
+	add.f32 	%f274, %f272, 0f3F800000;
+	selp.f32	%f275, %f273, %f270, %p21;
+	selp.f32	%f276, %f274, %f272, %p21;
+	add.f32 	%f277, %f275, 0fBF800000;
+	add.f32 	%f260, %f275, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f259,%f260;
+	// inline asm
+	add.f32 	%f278, %f277, %f277;
+	mul.f32 	%f279, %f259, %f278;
+	mul.f32 	%f280, %f279, %f279;
+	mov.f32 	%f281, 0f3C4CAF63;
+	mov.f32 	%f282, 0f3B18F0FE;
+	fma.rn.f32 	%f283, %f282, %f280, %f281;
+	mov.f32 	%f284, 0f3DAAAABD;
+	fma.rn.f32 	%f285, %f283, %f280, %f284;
+	mul.rn.f32 	%f286, %f285, %f280;
+	mul.rn.f32 	%f287, %f286, %f279;
+	sub.f32 	%f288, %f277, %f279;
+	neg.f32 	%f289, %f279;
+	add.f32 	%f290, %f288, %f288;
+	fma.rn.f32 	%f291, %f289, %f277, %f290;
+	mul.rn.f32 	%f292, %f259, %f291;
+	add.f32 	%f293, %f287, %f279;
+	sub.f32 	%f294, %f279, %f293;
+	add.f32 	%f295, %f287, %f294;
+	add.f32 	%f296, %f292, %f295;
+	add.f32 	%f297, %f293, %f296;
+	sub.f32 	%f298, %f293, %f297;
+	add.f32 	%f299, %f296, %f298;
+	mov.f32 	%f300, 0f3F317200;
+	mul.rn.f32 	%f301, %f276, %f300;
+	mov.f32 	%f302, 0f35BFBE8E;
+	mul.rn.f32 	%f303, %f276, %f302;
+	add.f32 	%f304, %f301, %f297;
+	sub.f32 	%f305, %f301, %f304;
+	add.f32 	%f306, %f297, %f305;
+	add.f32 	%f307, %f299, %f306;
+	add.f32 	%f308, %f303, %f307;
+	add.f32 	%f309, %f304, %f308;
+	sub.f32 	%f310, %f304, %f309;
+	add.f32 	%f311, %f308, %f310;
+	mul.rn.f32 	%f312, %f265, %f309;
+	neg.f32 	%f313, %f312;
+	fma.rn.f32 	%f314, %f265, %f309, %f313;
+	fma.rn.f32 	%f315, %f265, %f311, %f314;
+	mov.f32 	%f316, 0f00000000;
+	fma.rn.f32 	%f317, %f316, %f309, %f315;
+	add.rn.f32 	%f318, %f312, %f317;
+	neg.f32 	%f319, %f318;
+	add.rn.f32 	%f320, %f312, %f319;
+	add.rn.f32 	%f321, %f320, %f317;
+	mov.b32 	 %r140, %f318;
+	setp.eq.s32	%p22, %r140, 1118925336;
+	add.s32 	%r141, %r140, -1;
+	mov.b32 	 %f322, %r141;
+	add.f32 	%f323, %f321, 0f37000000;
+	selp.f32	%f324, %f322, %f318, %p22;
+	selp.f32	%f34, %f323, %f321, %p22;
+	mul.f32 	%f325, %f324, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f326, %f325;
+	mov.f32 	%f327, 0fBF317200;
+	fma.rn.f32 	%f328, %f326, %f327, %f324;
+	mov.f32 	%f329, 0fB5BFBE8E;
+	fma.rn.f32 	%f330, %f326, %f329, %f328;
+	mul.f32 	%f331, %f330, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f332, %f331;
+	add.f32 	%f333, %f326, 0f00000000;
+	ex2.approx.f32 	%f334, %f333;
+	mul.f32 	%f335, %f332, %f334;
+	setp.lt.f32	%p23, %f324, 0fC2D20000;
+	selp.f32	%f336, 0f00000000, %f335, %p23;
+	setp.gt.f32	%p24, %f324, 0f42D20000;
+	selp.f32	%f873, 0f7F800000, %f336, %p24;
+	setp.eq.f32	%p25, %f873, 0f7F800000;
+	@%p25 bra 	BB0_10;
+
+	fma.rn.f32 	%f873, %f873, %f34, %f873;
+
+BB0_10:
+	mov.f32 	%f861, 0f40000000;
+	cvt.rzi.f32.f32	%f860, %f861;
+	add.f32 	%f859, %f860, %f860;
+	mov.f32 	%f858, 0f40800000;
+	sub.f32 	%f857, %f858, %f859;
+	abs.f32 	%f856, %f857;
+	setp.lt.f32	%p26, %f31, 0f00000000;
+	setp.eq.f32	%p27, %f856, 0f3F800000;
+	and.pred  	%p1, %p26, %p27;
+	mov.b32 	 %r142, %f873;
+	xor.b32  	%r143, %r142, -2147483648;
+	mov.b32 	 %f337, %r143;
+	selp.f32	%f875, %f337, %f873, %p1;
+	setp.eq.f32	%p28, %f31, 0f00000000;
+	@%p28 bra 	BB0_13;
+	bra.uni 	BB0_11;
+
+BB0_13:
+	add.f32 	%f340, %f31, %f31;
+	selp.f32	%f875, %f340, 0f00000000, %p27;
+	bra.uni 	BB0_14;
+
+BB0_11:
+	setp.geu.f32	%p29, %f31, 0f00000000;
+	@%p29 bra 	BB0_14;
+
+	mov.f32 	%f864, 0f40800000;
+	cvt.rzi.f32.f32	%f339, %f864;
+	setp.neu.f32	%p30, %f339, 0f40800000;
+	selp.f32	%f875, 0f7FFFFFFF, %f875, %p30;
+
+BB0_14:
+	add.f32 	%f341, %f33, 0f40800000;
+	mov.b32 	 %r144, %f341;
+	setp.lt.s32	%p32, %r144, 2139095040;
+	@%p32 bra 	BB0_19;
+
+	setp.gtu.f32	%p33, %f33, 0f7F800000;
+	@%p33 bra 	BB0_18;
+	bra.uni 	BB0_16;
+
+BB0_18:
+	add.f32 	%f875, %f31, 0f40800000;
+	bra.uni 	BB0_19;
+
+BB0_16:
+	setp.neu.f32	%p34, %f33, 0f7F800000;
+	@%p34 bra 	BB0_19;
+
+	selp.f32	%f875, 0fFF800000, 0f7F800000, %p1;
+
+BB0_19:
+	mov.u32 	%r331, 1;
+	mov.u64 	%rd156, lightMeshBuffer;
+	cvta.global.u64 	%rd155, %rd156;
+	shl.b32 	%r330, %r339, 1;
+	mov.f32 	%f342, 0f3F800000;
+	sub.f32 	%f343, %f342, %f875;
+	setp.eq.f32	%p35, %f31, 0f3F800000;
+	selp.f32	%f344, 0f00000000, %f343, %p35;
+	cvt.sat.f32.f32	%f345, %f344;
+	mul.f32 	%f346, %f30, %f345;
+	add.s32 	%r147, %r330, 1;
+	cvt.s64.s32	%rd51, %r147;
+	// inline asm
+	call (%rd49), _rt_buffer_get_64, (%rd155, %r331, %r117, %rd51, %rd26, %rd26, %rd26);
+	// inline asm
+	ld.f32 	%f347, [%rd49];
+	mul.f32 	%f348, %f26, %f347;
+	ld.f32 	%f349, [%rd49+4];
+	mul.f32 	%f350, %f27, %f349;
+	neg.f32 	%f351, %f350;
+	sub.f32 	%f352, %f351, %f348;
+	ld.f32 	%f353, [%rd49+8];
+	mul.f32 	%f354, %f28, %f353;
+	sub.f32 	%f355, %f352, %f354;
+	cvt.sat.f32.f32	%f356, %f355;
+	mul.f32 	%f45, %f346, %f356;
+	cvt.sat.f32.f32	%f46, %f29;
+	mul.f32 	%f357, %f45, %f46;
+	setp.leu.f32	%p36, %f357, 0f3727C5AC;
+	@%p36 bra 	BB0_21;
+
+	mov.u32 	%r338, 1;
+	add.u64 	%rd56, %SP, 28;
+	cvta.to.local.u64 	%rd57, %rd56;
+	max.f32 	%f364, %f370, %f233;
+	sub.f32 	%f365, %f25, %f364;
+	mov.u32 	%r151, 1065353216;
+	st.local.u32 	[%rd57], %r151;
+	ld.global.u32 	%r148, [root];
+	// inline asm
+	call _rt_trace_64, (%r148, %f12, %f13, %f14, %f26, %f27, %f28, %r338, %f364, %f365, %rd56, %r102);
+	// inline asm
+	ld.local.f32 	%f372, [%rd57];
+	mul.f32 	%f373, %f45, %f372;
+	fma.rn.f32 	%f21, %f46, %f373, %f21;
+	add.f32 	%f20, %f20, %f372;
+	fma.rn.f32 	%f890, %f26, %f372, %f890;
+	fma.rn.f32 	%f889, %f27, %f372, %f889;
+	fma.rn.f32 	%f888, %f28, %f372, %f888;
+
+BB0_21:
+	add.s32 	%r7, %r7, 1;
+
+BB0_22:
+	ld.global.u32 	%r152, [lightMeshBufferSize];
+	add.s32 	%r339, %r339, 1;
+	setp.lt.u32	%p38, %r339, %r152;
+	@%p38 bra 	BB0_6;
+	bra.uni 	BB0_23;
+
+BB0_4:
+	mov.f32 	%f21, %f20;
+	mov.f32 	%f888, %f20;
+	mov.f32 	%f889, %f20;
+	mov.f32 	%f890, %f20;
+
+BB0_23:
+	mov.pred 	%p144, %p13;
+
+BB0_24:
+	cvt.rn.f32.s32	%f374, %r7;
+	mov.f32 	%f375, 0f3F800000;
+	max.f32 	%f376, %f374, %f375;
+	div.rn.f32 	%f921, %f21, %f376;
+	div.rn.f32 	%f922, %f20, %f376;
+	@!%p144 bra 	BB0_77;
+	bra.uni 	BB0_25;
+
+BB0_25:
+	abs.f32 	%f863, %f867;
+	abs.f32 	%f862, %f865;
+	setp.gt.f32	%p39, %f862, %f863;
+	neg.f32 	%f382, %f866;
+	selp.f32	%f383, %f382, 0f00000000, %p39;
+	neg.f32 	%f384, %f867;
+	selp.f32	%f385, %f865, %f384, %p39;
+	selp.f32	%f386, 0f00000000, %f866, %p39;
+	mul.f32 	%f387, %f385, %f385;
+	fma.rn.f32 	%f388, %f383, %f383, %f387;
+	fma.rn.f32 	%f389, %f386, %f386, %f388;
+	sqrt.rn.f32 	%f390, %f389;
+	rcp.rn.f32 	%f391, %f390;
+	mul.f32 	%f69, %f383, %f391;
+	mul.f32 	%f70, %f385, %f391;
+	mul.f32 	%f71, %f386, %f391;
+	mov.f32 	%f896, 0f00000000;
+	setp.lt.s32	%p40, %r1, 1;
+	mov.f32 	%f897, %f896;
+	mov.f32 	%f888, %f896;
+	mov.f32 	%f889, %f896;
+	mov.f32 	%f890, %f896;
+	@%p40 bra 	BB0_76;
+
+	mad.lo.s32 	%r346, %r129, 1664525, 1013904223;
+	cvt.rn.f32.s32	%f397, %r1;
+	rcp.rn.f32 	%f72, %f397;
+	add.u64 	%rd58, %SP, 0;
+	cvta.to.local.u64 	%rd2, %rd58;
+	mul.f32 	%f73, %f12, 0f3456BF95;
+	mul.f32 	%f74, %f13, 0f3456BF95;
+	mul.f32 	%f75, %f14, 0f3456BF95;
+	add.u64 	%rd59, %SP, 32;
+	cvta.to.local.u64 	%rd3, %rd59;
+	mul.f32 	%f398, %f865, %f70;
+	mul.f32 	%f399, %f866, %f69;
+	sub.f32 	%f76, %f399, %f398;
+	mul.f32 	%f400, %f867, %f69;
+	mul.f32 	%f401, %f865, %f71;
+	sub.f32 	%f77, %f401, %f400;
+	mul.f32 	%f402, %f866, %f71;
+	mul.f32 	%f403, %f867, %f70;
+	sub.f32 	%f78, %f403, %f402;
+	mov.f32 	%f896, 0f00000000;
+	mov.u32 	%r153, 0;
+	abs.f32 	%f404, %f74;
+	abs.f32 	%f405, %f73;
+	max.f32 	%f406, %f405, %f404;
+	abs.f32 	%f407, %f75;
+	max.f32 	%f408, %f406, %f407;
+	mov.u32 	%r343, %r153;
+	mov.f32 	%f897, %f896;
+	mov.f32 	%f888, %f896;
+	mov.f32 	%f889, %f896;
+	mov.f32 	%f890, %f896;
+
+BB0_27:
+	cvt.rn.f32.s32	%f84, %r343;
+	max.f32 	%f85, %f408, %f233;
+	mov.u32 	%r345, %r153;
+
+BB0_28:
+	mad.lo.s32 	%r155, %r346, 1664525, 1013904223;
+	and.b32  	%r156, %r155, 16777215;
+	cvt.rn.f32.u32	%f410, %r156;
+	fma.rn.f32 	%f411, %f410, 0f33800000, %f84;
+	mul.f32 	%f91, %f72, %f411;
+	mad.lo.s32 	%r346, %r155, 1664525, 1013904223;
+	and.b32  	%r157, %r346, 16777215;
+	cvt.rn.f32.u32	%f412, %r157;
+	cvt.rn.f32.s32	%f413, %r345;
+	fma.rn.f32 	%f414, %f412, 0f33800000, %f413;
+	mul.f32 	%f415, %f72, %f414;
+	mul.f32 	%f416, %f91, %f91;
+	sub.f32 	%f418, %f375, %f416;
+	mov.f32 	%f419, 0f00000000;
+	max.f32 	%f420, %f419, %f418;
+	sqrt.rn.f32 	%f92, %f420;
+	mul.f32 	%f907, %f415, 0f40C90FDB;
+	abs.f32 	%f94, %f907;
+	setp.neu.f32	%p41, %f94, 0f7F800000;
+	mov.f32 	%f901, %f907;
+	@%p41 bra 	BB0_30;
+
+	mul.rn.f32 	%f901, %f907, %f419;
+
+BB0_30:
+	mul.f32 	%f422, %f901, 0f3F22F983;
+	cvt.rni.s32.f32	%r356, %f422;
+	cvt.rn.f32.s32	%f423, %r356;
+	neg.f32 	%f424, %f423;
+	mov.f32 	%f425, 0f3FC90FDA;
+	fma.rn.f32 	%f426, %f424, %f425, %f901;
+	mov.f32 	%f427, 0f33A22168;
+	fma.rn.f32 	%f428, %f424, %f427, %f426;
+	mov.f32 	%f429, 0f27C234C5;
+	fma.rn.f32 	%f902, %f424, %f429, %f428;
+	abs.f32 	%f430, %f901;
+	setp.leu.f32	%p42, %f430, 0f47CE4780;
+	@%p42 bra 	BB0_41;
+
+	mov.b32 	 %r19, %f901;
+	shr.u32 	%r20, %r19, 23;
+	shl.b32 	%r160, %r19, 8;
+	or.b32  	%r21, %r160, -2147483648;
+	mov.u32 	%r347, 0;
+	mov.u64 	%rd158, 0;
+	mov.u64 	%rd157, %rd2;
+	mov.u32 	%r348, %r347;
+
+BB0_32:
+	.pragma "nounroll";
+	shl.b64 	%rd61, %rd158, 2;
+	mov.u64 	%rd62, __cudart_i2opi_f;
+	add.s64 	%rd63, %rd62, %rd61;
+	ld.const.u32 	%r163, [%rd63];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r161, %r163, %r21, %r348;
+	madc.hi.u32     %r348, %r163, %r21,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd157], %r161;
+	add.s32 	%r347, %r347, 1;
+	cvt.s64.s32	%rd158, %r347;
+	mul.wide.s32 	%rd64, %r347, 4;
+	add.s64 	%rd157, %rd2, %rd64;
+	setp.ne.s32	%p43, %r347, 6;
+	@%p43 bra 	BB0_32;
+
+	and.b32  	%r166, %r20, 255;
+	add.s32 	%r167, %r166, -128;
+	shr.u32 	%r168, %r167, 5;
+	and.b32  	%r26, %r19, -2147483648;
+	st.local.u32 	[%rd2+24], %r348;
+	mov.u32 	%r169, 6;
+	sub.s32 	%r170, %r169, %r168;
+	mul.wide.s32 	%rd65, %r170, 4;
+	add.s64 	%rd9, %rd2, %rd65;
+	ld.local.u32 	%r349, [%rd9];
+	ld.local.u32 	%r350, [%rd9+-4];
+	and.b32  	%r29, %r20, 31;
+	setp.eq.s32	%p44, %r29, 0;
+	@%p44 bra 	BB0_35;
+
+	mov.u32 	%r171, 32;
+	sub.s32 	%r172, %r171, %r29;
+	shr.u32 	%r173, %r350, %r172;
+	shl.b32 	%r174, %r349, %r29;
+	add.s32 	%r349, %r173, %r174;
+	ld.local.u32 	%r175, [%rd9+-8];
+	shr.u32 	%r176, %r175, %r172;
+	shl.b32 	%r177, %r350, %r29;
+	add.s32 	%r350, %r176, %r177;
+
+BB0_35:
+	shr.u32 	%r178, %r350, 30;
+	shl.b32 	%r179, %r349, 2;
+	add.s32 	%r351, %r178, %r179;
+	shl.b32 	%r35, %r350, 2;
+	shr.u32 	%r180, %r351, 31;
+	shr.u32 	%r181, %r349, 30;
+	add.s32 	%r36, %r180, %r181;
+	setp.eq.s32	%p45, %r180, 0;
+	@%p45 bra 	BB0_36;
+	bra.uni 	BB0_37;
+
+BB0_36:
+	mov.u32 	%r352, %r26;
+	mov.u32 	%r353, %r35;
+	bra.uni 	BB0_38;
+
+BB0_37:
+	not.b32 	%r182, %r351;
+	neg.s32 	%r353, %r35;
+	setp.eq.s32	%p46, %r35, 0;
+	selp.u32	%r183, 1, 0, %p46;
+	add.s32 	%r351, %r183, %r182;
+	xor.b32  	%r352, %r26, -2147483648;
+
+BB0_38:
+	clz.b32 	%r355, %r351;
+	setp.eq.s32	%p47, %r355, 0;
+	shl.b32 	%r184, %r351, %r355;
+	mov.u32 	%r185, 32;
+	sub.s32 	%r186, %r185, %r355;
+	shr.u32 	%r187, %r353, %r186;
+	add.s32 	%r188, %r187, %r184;
+	selp.b32	%r44, %r351, %r188, %p47;
+	mov.u32 	%r189, -921707870;
+	mul.hi.u32 	%r354, %r44, %r189;
+	setp.eq.s32	%p48, %r26, 0;
+	neg.s32 	%r190, %r36;
+	selp.b32	%r356, %r36, %r190, %p48;
+	setp.lt.s32	%p49, %r354, 1;
+	@%p49 bra 	BB0_40;
+
+	mul.lo.s32 	%r191, %r44, -921707870;
+	shr.u32 	%r192, %r191, 31;
+	shl.b32 	%r193, %r354, 1;
+	add.s32 	%r354, %r192, %r193;
+	add.s32 	%r355, %r355, 1;
+
+BB0_40:
+	mov.u32 	%r194, 126;
+	sub.s32 	%r195, %r194, %r355;
+	shl.b32 	%r196, %r195, 23;
+	add.s32 	%r197, %r354, 1;
+	shr.u32 	%r198, %r197, 7;
+	add.s32 	%r199, %r198, 1;
+	shr.u32 	%r200, %r199, 1;
+	add.s32 	%r201, %r200, %r196;
+	or.b32  	%r202, %r201, %r352;
+	mov.b32 	 %f902, %r202;
+
+BB0_41:
+	mul.rn.f32 	%f100, %f902, %f902;
+	add.s32 	%r52, %r356, 1;
+	and.b32  	%r53, %r52, 1;
+	setp.eq.s32	%p50, %r53, 0;
+	@%p50 bra 	BB0_43;
+	bra.uni 	BB0_42;
+
+BB0_43:
+	mov.f32 	%f433, 0f3C08839E;
+	mov.f32 	%f434, 0fB94CA1F9;
+	fma.rn.f32 	%f903, %f434, %f100, %f433;
+	bra.uni 	BB0_44;
+
+BB0_42:
+	mov.f32 	%f431, 0fBAB6061A;
+	mov.f32 	%f432, 0f37CCF5CE;
+	fma.rn.f32 	%f903, %f432, %f100, %f431;
+
+BB0_44:
+	@%p50 bra 	BB0_46;
+	bra.uni 	BB0_45;
+
+BB0_46:
+	mov.f32 	%f438, 0fBE2AAAA3;
+	fma.rn.f32 	%f439, %f903, %f100, %f438;
+	fma.rn.f32 	%f904, %f439, %f100, %f419;
+	bra.uni 	BB0_47;
+
+BB0_45:
+	mov.f32 	%f435, 0f3D2AAAA5;
+	fma.rn.f32 	%f436, %f903, %f100, %f435;
+	mov.f32 	%f437, 0fBF000000;
+	fma.rn.f32 	%f904, %f436, %f100, %f437;
+
+BB0_47:
+	fma.rn.f32 	%f905, %f904, %f902, %f902;
+	@%p50 bra 	BB0_49;
+
+	fma.rn.f32 	%f905, %f904, %f100, %f375;
+
+BB0_49:
+	and.b32  	%r203, %r52, 2;
+	setp.eq.s32	%p53, %r203, 0;
+	@%p53 bra 	BB0_51;
+
+	mov.f32 	%f443, 0fBF800000;
+	fma.rn.f32 	%f905, %f905, %f443, %f419;
+
+BB0_51:
+	@%p41 bra 	BB0_53;
+
+	mul.rn.f32 	%f907, %f907, %f419;
+
+BB0_53:
+	mul.f32 	%f445, %f907, 0f3F22F983;
+	cvt.rni.s32.f32	%r366, %f445;
+	cvt.rn.f32.s32	%f446, %r366;
+	neg.f32 	%f447, %f446;
+	fma.rn.f32 	%f449, %f447, %f425, %f907;
+	fma.rn.f32 	%f451, %f447, %f427, %f449;
+	fma.rn.f32 	%f908, %f447, %f429, %f451;
+	abs.f32 	%f453, %f907;
+	setp.leu.f32	%p55, %f453, 0f47CE4780;
+	@%p55 bra 	BB0_64;
+
+	mov.b32 	 %r55, %f907;
+	shr.u32 	%r56, %r55, 23;
+	shl.b32 	%r206, %r55, 8;
+	or.b32  	%r57, %r206, -2147483648;
+	mov.u32 	%r357, 0;
+	mov.u64 	%rd159, %rd2;
+	mov.u64 	%rd160, %rd26;
+	mov.u32 	%r358, %r357;
+
+BB0_55:
+	.pragma "nounroll";
+	shl.b64 	%rd67, %rd160, 2;
+	mov.u64 	%rd68, __cudart_i2opi_f;
+	add.s64 	%rd69, %rd68, %rd67;
+	ld.const.u32 	%r209, [%rd69];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r207, %r209, %r57, %r358;
+	madc.hi.u32     %r358, %r209, %r57,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd159], %r207;
+	add.s32 	%r357, %r357, 1;
+	cvt.s64.s32	%rd160, %r357;
+	mul.wide.s32 	%rd70, %r357, 4;
+	add.s64 	%rd159, %rd2, %rd70;
+	setp.ne.s32	%p56, %r357, 6;
+	@%p56 bra 	BB0_55;
+
+	and.b32  	%r212, %r56, 255;
+	add.s32 	%r213, %r212, -128;
+	shr.u32 	%r214, %r213, 5;
+	and.b32  	%r62, %r55, -2147483648;
+	st.local.u32 	[%rd2+24], %r358;
+	mov.u32 	%r215, 6;
+	sub.s32 	%r216, %r215, %r214;
+	mul.wide.s32 	%rd71, %r216, 4;
+	add.s64 	%rd15, %rd2, %rd71;
+	ld.local.u32 	%r359, [%rd15];
+	ld.local.u32 	%r360, [%rd15+-4];
+	and.b32  	%r65, %r56, 31;
+	setp.eq.s32	%p57, %r65, 0;
+	@%p57 bra 	BB0_58;
+
+	mov.u32 	%r217, 32;
+	sub.s32 	%r218, %r217, %r65;
+	shr.u32 	%r219, %r360, %r218;
+	shl.b32 	%r220, %r359, %r65;
+	add.s32 	%r359, %r219, %r220;
+	ld.local.u32 	%r221, [%rd15+-8];
+	shr.u32 	%r222, %r221, %r218;
+	shl.b32 	%r223, %r360, %r65;
+	add.s32 	%r360, %r222, %r223;
+
+BB0_58:
+	shr.u32 	%r224, %r360, 30;
+	shl.b32 	%r225, %r359, 2;
+	add.s32 	%r361, %r224, %r225;
+	shl.b32 	%r71, %r360, 2;
+	shr.u32 	%r226, %r361, 31;
+	shr.u32 	%r227, %r359, 30;
+	add.s32 	%r72, %r226, %r227;
+	setp.eq.s32	%p58, %r226, 0;
+	@%p58 bra 	BB0_59;
+	bra.uni 	BB0_60;
+
+BB0_59:
+	mov.u32 	%r362, %r62;
+	mov.u32 	%r363, %r71;
+	bra.uni 	BB0_61;
+
+BB0_60:
+	not.b32 	%r228, %r361;
+	neg.s32 	%r363, %r71;
+	setp.eq.s32	%p59, %r71, 0;
+	selp.u32	%r229, 1, 0, %p59;
+	add.s32 	%r361, %r229, %r228;
+	xor.b32  	%r362, %r62, -2147483648;
+
+BB0_61:
+	clz.b32 	%r365, %r361;
+	setp.eq.s32	%p60, %r365, 0;
+	shl.b32 	%r230, %r361, %r365;
+	mov.u32 	%r231, 32;
+	sub.s32 	%r232, %r231, %r365;
+	shr.u32 	%r233, %r363, %r232;
+	add.s32 	%r234, %r233, %r230;
+	selp.b32	%r80, %r361, %r234, %p60;
+	mov.u32 	%r235, -921707870;
+	mul.hi.u32 	%r364, %r80, %r235;
+	setp.eq.s32	%p61, %r62, 0;
+	neg.s32 	%r236, %r72;
+	selp.b32	%r366, %r72, %r236, %p61;
+	setp.lt.s32	%p62, %r364, 1;
+	@%p62 bra 	BB0_63;
+
+	mul.lo.s32 	%r237, %r80, -921707870;
+	shr.u32 	%r238, %r237, 31;
+	shl.b32 	%r239, %r364, 1;
+	add.s32 	%r364, %r238, %r239;
+	add.s32 	%r365, %r365, 1;
+
+BB0_63:
+	mov.u32 	%r240, 126;
+	sub.s32 	%r241, %r240, %r365;
+	shl.b32 	%r242, %r241, 23;
+	add.s32 	%r243, %r364, 1;
+	shr.u32 	%r244, %r243, 7;
+	add.s32 	%r245, %r244, 1;
+	shr.u32 	%r246, %r245, 1;
+	add.s32 	%r247, %r246, %r242;
+	or.b32  	%r248, %r247, %r362;
+	mov.b32 	 %f908, %r248;
+
+BB0_64:
+	mul.rn.f32 	%f117, %f908, %f908;
+	and.b32  	%r88, %r366, 1;
+	setp.eq.s32	%p63, %r88, 0;
+	@%p63 bra 	BB0_66;
+	bra.uni 	BB0_65;
+
+BB0_66:
+	mov.f32 	%f456, 0f3C08839E;
+	mov.f32 	%f457, 0fB94CA1F9;
+	fma.rn.f32 	%f909, %f457, %f117, %f456;
+	bra.uni 	BB0_67;
+
+BB0_65:
+	mov.f32 	%f454, 0fBAB6061A;
+	mov.f32 	%f455, 0f37CCF5CE;
+	fma.rn.f32 	%f909, %f455, %f117, %f454;
+
+BB0_67:
+	@%p63 bra 	BB0_69;
+	bra.uni 	BB0_68;
+
+BB0_69:
+	mov.f32 	%f461, 0fBE2AAAA3;
+	fma.rn.f32 	%f462, %f909, %f117, %f461;
+	fma.rn.f32 	%f910, %f462, %f117, %f419;
+	bra.uni 	BB0_70;
+
+BB0_68:
+	mov.f32 	%f458, 0f3D2AAAA5;
+	fma.rn.f32 	%f459, %f909, %f117, %f458;
+	mov.f32 	%f460, 0fBF000000;
+	fma.rn.f32 	%f910, %f459, %f117, %f460;
+
+BB0_70:
+	fma.rn.f32 	%f911, %f910, %f908, %f908;
+	@%p63 bra 	BB0_72;
+
+	fma.rn.f32 	%f911, %f910, %f117, %f375;
+
+BB0_72:
+	and.b32  	%r249, %r366, 2;
+	setp.eq.s32	%p66, %r249, 0;
+	@%p66 bra 	BB0_74;
+
+	mov.f32 	%f466, 0fBF800000;
+	fma.rn.f32 	%f911, %f911, %f466, %f419;
+
+BB0_74:
+	mul.f32 	%f475, %f92, %f905;
+	mul.f32 	%f476, %f92, %f911;
+	mul.f32 	%f477, %f69, %f476;
+	mul.f32 	%f478, %f70, %f476;
+	mul.f32 	%f479, %f71, %f476;
+	fma.rn.f32 	%f480, %f78, %f475, %f477;
+	fma.rn.f32 	%f481, %f77, %f475, %f478;
+	fma.rn.f32 	%f482, %f76, %f475, %f479;
+	fma.rn.f32 	%f470, %f865, %f91, %f480;
+	fma.rn.f32 	%f471, %f866, %f91, %f481;
+	fma.rn.f32 	%f472, %f867, %f91, %f482;
+	mov.u32 	%r251, 0;
+	st.local.u32 	[%rd3], %r251;
+	ld.global.u32 	%r250, [root];
+	mov.f32 	%f474, 0f6C4ECB8F;
+	// inline asm
+	call _rt_trace_64, (%r250, %f12, %f13, %f14, %f470, %f471, %f472, %r251, %f85, %f474, %rd59, %r102);
+	// inline asm
+	ld.local.f32 	%f483, [%rd3];
+	setp.lt.f32	%p67, %f483, 0f00000000;
+	selp.f32	%f484, 0f00000000, %f483, %p67;
+	selp.f32	%f485, 0f00000000, 0f3F800000, %p67;
+	fma.rn.f32 	%f890, %f470, %f485, %f890;
+	fma.rn.f32 	%f889, %f471, %f485, %f889;
+	fma.rn.f32 	%f888, %f472, %f485, %f888;
+	add.f32 	%f896, %f896, %f485;
+	mul.f32 	%f486, %f866, %f471;
+	fma.rn.f32 	%f487, %f865, %f470, %f486;
+	fma.rn.f32 	%f488, %f867, %f472, %f487;
+	cvt.sat.f32.f32	%f489, %f488;
+	fma.rn.f32 	%f897, %f484, %f489, %f897;
+	add.s32 	%r345, %r345, 1;
+	setp.lt.s32	%p68, %r345, %r1;
+	@%p68 bra 	BB0_28;
+
+	add.s32 	%r343, %r343, 1;
+	setp.lt.s32	%p69, %r343, %r1;
+	@%p69 bra 	BB0_27;
+
+BB0_76:
+	mul.lo.s32 	%r253, %r1, %r1;
+	cvt.rn.f32.s32	%f490, %r253;
+	div.rn.f32 	%f491, %f897, %f490;
+	div.rn.f32 	%f922, %f896, %f490;
+	add.f32 	%f921, %f491, %f491;
+
+BB0_77:
+	ld.global.u32 	%r368, [imageEnabled];
+	and.b32  	%r254, %r368, 8;
+	setp.eq.s32	%p70, %r254, 0;
+	@%p70 bra 	BB0_90;
+
+	mov.u32 	%r332, 2;
+	cvt.u64.u32	%rd75, %r3;
+	cvt.u64.u32	%rd76, %r4;
+	mov.u64 	%rd79, image_Mask;
+	cvta.global.u64 	%rd74, %rd79;
+	// inline asm
+	call (%rd73), _rt_buffer_get_64, (%rd74, %r332, %r332, %rd75, %rd76, %rd26, %rd26);
+	// inline asm
+	mov.f32 	%f494, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f495, %f494;
+	fma.rn.f32 	%f496, %f495, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f146, %f496;
+	abs.f32 	%f147, %f922;
+	setp.lt.f32	%p71, %f147, 0f00800000;
+	mul.f32 	%f497, %f147, 0f4B800000;
+	selp.f32	%f498, 0fC3170000, 0fC2FE0000, %p71;
+	selp.f32	%f499, %f497, %f147, %p71;
+	mov.b32 	 %r257, %f499;
+	and.b32  	%r258, %r257, 8388607;
+	or.b32  	%r259, %r258, 1065353216;
+	mov.b32 	 %f500, %r259;
+	shr.u32 	%r260, %r257, 23;
+	cvt.rn.f32.u32	%f501, %r260;
+	add.f32 	%f502, %f498, %f501;
+	setp.gt.f32	%p72, %f500, 0f3FB504F3;
+	mul.f32 	%f503, %f500, 0f3F000000;
+	add.f32 	%f504, %f502, 0f3F800000;
+	selp.f32	%f505, %f503, %f500, %p72;
+	selp.f32	%f506, %f504, %f502, %p72;
+	add.f32 	%f507, %f505, 0fBF800000;
+	add.f32 	%f493, %f505, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f492,%f493;
+	// inline asm
+	add.f32 	%f508, %f507, %f507;
+	mul.f32 	%f509, %f492, %f508;
+	mul.f32 	%f510, %f509, %f509;
+	mov.f32 	%f511, 0f3C4CAF63;
+	mov.f32 	%f512, 0f3B18F0FE;
+	fma.rn.f32 	%f513, %f512, %f510, %f511;
+	mov.f32 	%f514, 0f3DAAAABD;
+	fma.rn.f32 	%f515, %f513, %f510, %f514;
+	mul.rn.f32 	%f516, %f515, %f510;
+	mul.rn.f32 	%f517, %f516, %f509;
+	sub.f32 	%f518, %f507, %f509;
+	neg.f32 	%f519, %f509;
+	add.f32 	%f520, %f518, %f518;
+	fma.rn.f32 	%f521, %f519, %f507, %f520;
+	mul.rn.f32 	%f522, %f492, %f521;
+	add.f32 	%f523, %f517, %f509;
+	sub.f32 	%f524, %f509, %f523;
+	add.f32 	%f525, %f517, %f524;
+	add.f32 	%f526, %f522, %f525;
+	add.f32 	%f527, %f523, %f526;
+	sub.f32 	%f528, %f523, %f527;
+	add.f32 	%f529, %f526, %f528;
+	mov.f32 	%f530, 0f3F317200;
+	mul.rn.f32 	%f531, %f506, %f530;
+	mov.f32 	%f532, 0f35BFBE8E;
+	mul.rn.f32 	%f533, %f506, %f532;
+	add.f32 	%f534, %f531, %f527;
+	sub.f32 	%f535, %f531, %f534;
+	add.f32 	%f536, %f527, %f535;
+	add.f32 	%f537, %f529, %f536;
+	add.f32 	%f538, %f533, %f537;
+	add.f32 	%f539, %f534, %f538;
+	sub.f32 	%f540, %f534, %f539;
+	add.f32 	%f541, %f538, %f540;
+	mov.f32 	%f542, 0f3EE8BA2E;
+	mul.rn.f32 	%f543, %f542, %f539;
+	neg.f32 	%f544, %f543;
+	fma.rn.f32 	%f545, %f542, %f539, %f544;
+	fma.rn.f32 	%f546, %f542, %f541, %f545;
+	mov.f32 	%f547, 0f00000000;
+	fma.rn.f32 	%f548, %f547, %f539, %f546;
+	add.rn.f32 	%f549, %f543, %f548;
+	neg.f32 	%f550, %f549;
+	add.rn.f32 	%f551, %f543, %f550;
+	add.rn.f32 	%f552, %f551, %f548;
+	mov.b32 	 %r261, %f549;
+	setp.eq.s32	%p73, %r261, 1118925336;
+	add.s32 	%r262, %r261, -1;
+	mov.b32 	 %f553, %r262;
+	add.f32 	%f554, %f552, 0f37000000;
+	selp.f32	%f555, %f553, %f549, %p73;
+	selp.f32	%f148, %f554, %f552, %p73;
+	mul.f32 	%f556, %f555, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f557, %f556;
+	mov.f32 	%f558, 0fBF317200;
+	fma.rn.f32 	%f559, %f557, %f558, %f555;
+	mov.f32 	%f560, 0fB5BFBE8E;
+	fma.rn.f32 	%f561, %f557, %f560, %f559;
+	mul.f32 	%f562, %f561, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f563, %f562;
+	add.f32 	%f564, %f557, 0f00000000;
+	ex2.approx.f32 	%f565, %f564;
+	mul.f32 	%f566, %f563, %f565;
+	setp.lt.f32	%p74, %f555, 0fC2D20000;
+	selp.f32	%f567, 0f00000000, %f566, %p74;
+	setp.gt.f32	%p75, %f555, 0f42D20000;
+	selp.f32	%f923, 0f7F800000, %f567, %p75;
+	setp.eq.f32	%p76, %f923, 0f7F800000;
+	@%p76 bra 	BB0_80;
+
+	fma.rn.f32 	%f923, %f923, %f148, %f923;
+
+BB0_80:
+	setp.lt.f32	%p77, %f922, 0f00000000;
+	setp.eq.f32	%p78, %f146, 0f3F800000;
+	and.pred  	%p3, %p77, %p78;
+	mov.b32 	 %r263, %f923;
+	xor.b32  	%r264, %r263, -2147483648;
+	mov.b32 	 %f568, %r264;
+	selp.f32	%f925, %f568, %f923, %p3;
+	setp.eq.f32	%p79, %f922, 0f00000000;
+	@%p79 bra 	BB0_83;
+	bra.uni 	BB0_81;
+
+BB0_83:
+	add.f32 	%f571, %f922, %f922;
+	selp.f32	%f925, %f571, 0f00000000, %p78;
+	bra.uni 	BB0_84;
+
+BB0_138:
+	mov.u64 	%rd147, image_HDR;
+	cvta.global.u64 	%rd142, %rd147;
+	mov.u32 	%r327, 8;
+	mov.u64 	%rd146, 0;
+	// inline asm
+	call (%rd141), _rt_buffer_get_64, (%rd142, %r101, %r327, %rd19, %rd20, %rd146, %rd146);
+	// inline asm
+	mov.f32 	%f855, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs50, %f855;}
+
+	// inline asm
+	mov.u16 	%rs51, 0;
+	st.v4.u16 	[%rd141], {%rs50, %rs50, %rs50, %rs51};
+
+BB0_139:
+	ld.global.u8 	%rs52, [imageEnabled];
+	and.b16  	%rs53, %rs52, 64;
+	setp.eq.s16	%p143, %rs53, 0;
+	@%p143 bra 	BB0_141;
+
+	cvt.u64.u32	%rd150, %r3;
+	cvt.u64.u32	%rd151, %r4;
+	mov.u64 	%rd154, image_Dir;
+	cvta.global.u64 	%rd149, %rd154;
+	mov.u64 	%rd153, 0;
+	// inline asm
+	call (%rd148), _rt_buffer_get_64, (%rd149, %r101, %r102, %rd150, %rd151, %rd153, %rd153);
+	// inline asm
+	mov.u16 	%rs54, 0;
+	st.v4.u8 	[%rd148], {%rs54, %rs54, %rs54, %rs54};
+	bra.uni 	BB0_141;
+
+BB0_81:
+	setp.geu.f32	%p80, %f922, 0f00000000;
+	@%p80 bra 	BB0_84;
+
+	cvt.rzi.f32.f32	%f570, %f542;
+	setp.neu.f32	%p81, %f570, 0f3EE8BA2E;
+	selp.f32	%f925, 0f7FFFFFFF, %f925, %p81;
+
+BB0_84:
+	add.f32 	%f572, %f147, 0f3EE8BA2E;
+	mov.b32 	 %r265, %f572;
+	setp.lt.s32	%p83, %r265, 2139095040;
+	@%p83 bra 	BB0_89;
+
+	setp.gtu.f32	%p84, %f147, 0f7F800000;
+	@%p84 bra 	BB0_88;
+	bra.uni 	BB0_86;
+
+BB0_88:
+	add.f32 	%f925, %f922, 0f3EE8BA2E;
+	bra.uni 	BB0_89;
+
+BB0_86:
+	setp.neu.f32	%p85, %f147, 0f7F800000;
+	@%p85 bra 	BB0_89;
+
+	selp.f32	%f925, 0fFF800000, 0f7F800000, %p3;
+
+BB0_89:
+	mul.f32 	%f573, %f925, 0f437F0000;
+	setp.eq.f32	%p86, %f922, 0f3F800000;
+	selp.f32	%f574, 0f437F0000, %f573, %p86;
+	cvt.rzi.u32.f32	%r266, %f574;
+	cvt.u16.u32	%rs10, %r266;
+	mov.u16 	%rs11, 255;
+	st.v2.u8 	[%rd73], {%rs10, %rs11};
+	ld.global.u32 	%r368, [imageEnabled];
+
+BB0_90:
+	ld.global.f32 	%f575, [lightColor];
+	mul.f32 	%f159, %f921, %f575;
+	ld.global.f32 	%f576, [lightColor+4];
+	mul.f32 	%f160, %f921, %f576;
+	ld.global.f32 	%f577, [lightColor+8];
+	mul.f32 	%f161, %f921, %f577;
+	and.b32  	%r267, %r368, 1;
+	setp.eq.b32	%p87, %r267, 1;
+	@!%p87 bra 	BB0_125;
+	bra.uni 	BB0_91;
+
+BB0_91:
+	mov.f32 	%f580, 0f3E666666;
+	cvt.rzi.f32.f32	%f581, %f580;
+	fma.rn.f32 	%f582, %f581, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f162, %f582;
+	abs.f32 	%f163, %f159;
+	setp.lt.f32	%p88, %f163, 0f00800000;
+	mul.f32 	%f583, %f163, 0f4B800000;
+	selp.f32	%f584, 0fC3170000, 0fC2FE0000, %p88;
+	selp.f32	%f585, %f583, %f163, %p88;
+	mov.b32 	 %r268, %f585;
+	and.b32  	%r269, %r268, 8388607;
+	or.b32  	%r270, %r269, 1065353216;
+	mov.b32 	 %f586, %r270;
+	shr.u32 	%r271, %r268, 23;
+	cvt.rn.f32.u32	%f587, %r271;
+	add.f32 	%f588, %f584, %f587;
+	setp.gt.f32	%p89, %f586, 0f3FB504F3;
+	mul.f32 	%f589, %f586, 0f3F000000;
+	add.f32 	%f590, %f588, 0f3F800000;
+	selp.f32	%f591, %f589, %f586, %p89;
+	selp.f32	%f592, %f590, %f588, %p89;
+	add.f32 	%f593, %f591, 0fBF800000;
+	add.f32 	%f579, %f591, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f578,%f579;
+	// inline asm
+	add.f32 	%f594, %f593, %f593;
+	mul.f32 	%f595, %f578, %f594;
+	mul.f32 	%f596, %f595, %f595;
+	mov.f32 	%f597, 0f3C4CAF63;
+	mov.f32 	%f598, 0f3B18F0FE;
+	fma.rn.f32 	%f599, %f598, %f596, %f597;
+	mov.f32 	%f600, 0f3DAAAABD;
+	fma.rn.f32 	%f601, %f599, %f596, %f600;
+	mul.rn.f32 	%f602, %f601, %f596;
+	mul.rn.f32 	%f603, %f602, %f595;
+	sub.f32 	%f604, %f593, %f595;
+	neg.f32 	%f605, %f595;
+	add.f32 	%f606, %f604, %f604;
+	fma.rn.f32 	%f607, %f605, %f593, %f606;
+	mul.rn.f32 	%f608, %f578, %f607;
+	add.f32 	%f609, %f603, %f595;
+	sub.f32 	%f610, %f595, %f609;
+	add.f32 	%f611, %f603, %f610;
+	add.f32 	%f612, %f608, %f611;
+	add.f32 	%f613, %f609, %f612;
+	sub.f32 	%f614, %f609, %f613;
+	add.f32 	%f615, %f612, %f614;
+	mov.f32 	%f616, 0f3F317200;
+	mul.rn.f32 	%f617, %f592, %f616;
+	mov.f32 	%f618, 0f35BFBE8E;
+	mul.rn.f32 	%f619, %f592, %f618;
+	add.f32 	%f620, %f617, %f613;
+	sub.f32 	%f621, %f617, %f620;
+	add.f32 	%f622, %f613, %f621;
+	add.f32 	%f623, %f615, %f622;
+	add.f32 	%f624, %f619, %f623;
+	add.f32 	%f625, %f620, %f624;
+	sub.f32 	%f626, %f620, %f625;
+	add.f32 	%f627, %f624, %f626;
+	mov.f32 	%f628, 0f3EE66666;
+	mul.rn.f32 	%f629, %f628, %f625;
+	neg.f32 	%f630, %f629;
+	fma.rn.f32 	%f631, %f628, %f625, %f630;
+	fma.rn.f32 	%f632, %f628, %f627, %f631;
+	mov.f32 	%f633, 0f00000000;
+	fma.rn.f32 	%f634, %f633, %f625, %f632;
+	add.rn.f32 	%f635, %f629, %f634;
+	neg.f32 	%f636, %f635;
+	add.rn.f32 	%f637, %f629, %f636;
+	add.rn.f32 	%f638, %f637, %f634;
+	mov.b32 	 %r272, %f635;
+	setp.eq.s32	%p90, %r272, 1118925336;
+	add.s32 	%r273, %r272, -1;
+	mov.b32 	 %f639, %r273;
+	add.f32 	%f640, %f638, 0f37000000;
+	selp.f32	%f641, %f639, %f635, %p90;
+	selp.f32	%f164, %f640, %f638, %p90;
+	mul.f32 	%f642, %f641, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f643, %f642;
+	mov.f32 	%f644, 0fBF317200;
+	fma.rn.f32 	%f645, %f643, %f644, %f641;
+	mov.f32 	%f646, 0fB5BFBE8E;
+	fma.rn.f32 	%f647, %f643, %f646, %f645;
+	mul.f32 	%f648, %f647, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f649, %f648;
+	add.f32 	%f650, %f643, 0f00000000;
+	ex2.approx.f32 	%f651, %f650;
+	mul.f32 	%f652, %f649, %f651;
+	setp.lt.f32	%p91, %f641, 0fC2D20000;
+	selp.f32	%f653, 0f00000000, %f652, %p91;
+	setp.gt.f32	%p92, %f641, 0f42D20000;
+	selp.f32	%f926, 0f7F800000, %f653, %p92;
+	setp.eq.f32	%p93, %f926, 0f7F800000;
+	@%p93 bra 	BB0_93;
+
+	fma.rn.f32 	%f926, %f926, %f164, %f926;
+
+BB0_93:
+	setp.lt.f32	%p94, %f159, 0f00000000;
+	setp.eq.f32	%p95, %f162, 0f3F800000;
+	and.pred  	%p4, %p94, %p95;
+	mov.b32 	 %r274, %f926;
+	xor.b32  	%r275, %r274, -2147483648;
+	mov.b32 	 %f654, %r275;
+	selp.f32	%f928, %f654, %f926, %p4;
+	setp.eq.f32	%p96, %f159, 0f00000000;
+	@%p96 bra 	BB0_96;
+	bra.uni 	BB0_94;
+
+BB0_96:
+	add.f32 	%f657, %f159, %f159;
+	selp.f32	%f928, %f657, 0f00000000, %p95;
+	bra.uni 	BB0_97;
+
+BB0_94:
+	setp.geu.f32	%p97, %f159, 0f00000000;
+	@%p97 bra 	BB0_97;
+
+	cvt.rzi.f32.f32	%f656, %f628;
+	setp.neu.f32	%p98, %f656, 0f3EE66666;
+	selp.f32	%f928, 0f7FFFFFFF, %f928, %p98;
+
+BB0_97:
+	add.f32 	%f658, %f163, 0f3EE66666;
+	mov.b32 	 %r276, %f658;
+	setp.lt.s32	%p100, %r276, 2139095040;
+	@%p100 bra 	BB0_102;
+
+	setp.gtu.f32	%p101, %f163, 0f7F800000;
+	@%p101 bra 	BB0_101;
+	bra.uni 	BB0_99;
+
+BB0_101:
+	add.f32 	%f928, %f159, 0f3EE66666;
+	bra.uni 	BB0_102;
+
+BB0_99:
+	setp.neu.f32	%p102, %f163, 0f7F800000;
+	@%p102 bra 	BB0_102;
+
+	selp.f32	%f928, 0fFF800000, 0f7F800000, %p4;
+
+BB0_102:
+	setp.eq.f32	%p103, %f159, 0f3F800000;
+	selp.f32	%f175, 0f3F800000, %f928, %p103;
+	abs.f32 	%f176, %f160;
+	setp.lt.f32	%p104, %f176, 0f00800000;
+	mul.f32 	%f661, %f176, 0f4B800000;
+	selp.f32	%f662, 0fC3170000, 0fC2FE0000, %p104;
+	selp.f32	%f663, %f661, %f176, %p104;
+	mov.b32 	 %r277, %f663;
+	and.b32  	%r278, %r277, 8388607;
+	or.b32  	%r279, %r278, 1065353216;
+	mov.b32 	 %f664, %r279;
+	shr.u32 	%r280, %r277, 23;
+	cvt.rn.f32.u32	%f665, %r280;
+	add.f32 	%f666, %f662, %f665;
+	setp.gt.f32	%p105, %f664, 0f3FB504F3;
+	mul.f32 	%f667, %f664, 0f3F000000;
+	add.f32 	%f668, %f666, 0f3F800000;
+	selp.f32	%f669, %f667, %f664, %p105;
+	selp.f32	%f670, %f668, %f666, %p105;
+	add.f32 	%f671, %f669, 0fBF800000;
+	add.f32 	%f660, %f669, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f659,%f660;
+	// inline asm
+	add.f32 	%f672, %f671, %f671;
+	mul.f32 	%f673, %f659, %f672;
+	mul.f32 	%f674, %f673, %f673;
+	fma.rn.f32 	%f677, %f598, %f674, %f597;
+	fma.rn.f32 	%f679, %f677, %f674, %f600;
+	mul.rn.f32 	%f680, %f679, %f674;
+	mul.rn.f32 	%f681, %f680, %f673;
+	sub.f32 	%f682, %f671, %f673;
+	neg.f32 	%f683, %f673;
+	add.f32 	%f684, %f682, %f682;
+	fma.rn.f32 	%f685, %f683, %f671, %f684;
+	mul.rn.f32 	%f686, %f659, %f685;
+	add.f32 	%f687, %f681, %f673;
+	sub.f32 	%f688, %f673, %f687;
+	add.f32 	%f689, %f681, %f688;
+	add.f32 	%f690, %f686, %f689;
+	add.f32 	%f691, %f687, %f690;
+	sub.f32 	%f692, %f687, %f691;
+	add.f32 	%f693, %f690, %f692;
+	mul.rn.f32 	%f695, %f670, %f616;
+	mul.rn.f32 	%f697, %f670, %f618;
+	add.f32 	%f698, %f695, %f691;
+	sub.f32 	%f699, %f695, %f698;
+	add.f32 	%f700, %f691, %f699;
+	add.f32 	%f701, %f693, %f700;
+	add.f32 	%f702, %f697, %f701;
+	add.f32 	%f703, %f698, %f702;
+	sub.f32 	%f704, %f698, %f703;
+	add.f32 	%f705, %f702, %f704;
+	mul.rn.f32 	%f707, %f628, %f703;
+	neg.f32 	%f708, %f707;
+	fma.rn.f32 	%f709, %f628, %f703, %f708;
+	fma.rn.f32 	%f710, %f628, %f705, %f709;
+	fma.rn.f32 	%f712, %f633, %f703, %f710;
+	add.rn.f32 	%f713, %f707, %f712;
+	neg.f32 	%f714, %f713;
+	add.rn.f32 	%f715, %f707, %f714;
+	add.rn.f32 	%f716, %f715, %f712;
+	mov.b32 	 %r281, %f713;
+	setp.eq.s32	%p106, %r281, 1118925336;
+	add.s32 	%r282, %r281, -1;
+	mov.b32 	 %f717, %r282;
+	add.f32 	%f718, %f716, 0f37000000;
+	selp.f32	%f719, %f717, %f713, %p106;
+	selp.f32	%f177, %f718, %f716, %p106;
+	mul.f32 	%f720, %f719, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f721, %f720;
+	fma.rn.f32 	%f723, %f721, %f644, %f719;
+	fma.rn.f32 	%f725, %f721, %f646, %f723;
+	mul.f32 	%f726, %f725, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f727, %f726;
+	add.f32 	%f728, %f721, 0f00000000;
+	ex2.approx.f32 	%f729, %f728;
+	mul.f32 	%f730, %f727, %f729;
+	setp.lt.f32	%p107, %f719, 0fC2D20000;
+	selp.f32	%f731, 0f00000000, %f730, %p107;
+	setp.gt.f32	%p108, %f719, 0f42D20000;
+	selp.f32	%f929, 0f7F800000, %f731, %p108;
+	setp.eq.f32	%p109, %f929, 0f7F800000;
+	@%p109 bra 	BB0_104;
+
+	fma.rn.f32 	%f929, %f929, %f177, %f929;
+
+BB0_104:
+	setp.lt.f32	%p110, %f160, 0f00000000;
+	and.pred  	%p5, %p110, %p95;
+	mov.b32 	 %r283, %f929;
+	xor.b32  	%r284, %r283, -2147483648;
+	mov.b32 	 %f732, %r284;
+	selp.f32	%f931, %f732, %f929, %p5;
+	setp.eq.f32	%p112, %f160, 0f00000000;
+	@%p112 bra 	BB0_107;
+	bra.uni 	BB0_105;
+
+BB0_107:
+	add.f32 	%f735, %f160, %f160;
+	selp.f32	%f931, %f735, 0f00000000, %p95;
+	bra.uni 	BB0_108;
+
+BB0_105:
+	setp.geu.f32	%p113, %f160, 0f00000000;
+	@%p113 bra 	BB0_108;
+
+	cvt.rzi.f32.f32	%f734, %f628;
+	setp.neu.f32	%p114, %f734, 0f3EE66666;
+	selp.f32	%f931, 0f7FFFFFFF, %f931, %p114;
+
+BB0_108:
+	add.f32 	%f736, %f176, 0f3EE66666;
+	mov.b32 	 %r285, %f736;
+	setp.lt.s32	%p116, %r285, 2139095040;
+	@%p116 bra 	BB0_113;
+
+	setp.gtu.f32	%p117, %f176, 0f7F800000;
+	@%p117 bra 	BB0_112;
+	bra.uni 	BB0_110;
+
+BB0_112:
+	add.f32 	%f931, %f160, 0f3EE66666;
+	bra.uni 	BB0_113;
+
+BB0_110:
+	setp.neu.f32	%p118, %f176, 0f7F800000;
+	@%p118 bra 	BB0_113;
+
+	selp.f32	%f931, 0fFF800000, 0f7F800000, %p5;
+
+BB0_113:
+	setp.eq.f32	%p119, %f160, 0f3F800000;
+	selp.f32	%f188, 0f3F800000, %f931, %p119;
+	abs.f32 	%f189, %f161;
+	setp.lt.f32	%p120, %f189, 0f00800000;
+	mul.f32 	%f739, %f189, 0f4B800000;
+	selp.f32	%f740, 0fC3170000, 0fC2FE0000, %p120;
+	selp.f32	%f741, %f739, %f189, %p120;
+	mov.b32 	 %r286, %f741;
+	and.b32  	%r287, %r286, 8388607;
+	or.b32  	%r288, %r287, 1065353216;
+	mov.b32 	 %f742, %r288;
+	shr.u32 	%r289, %r286, 23;
+	cvt.rn.f32.u32	%f743, %r289;
+	add.f32 	%f744, %f740, %f743;
+	setp.gt.f32	%p121, %f742, 0f3FB504F3;
+	mul.f32 	%f745, %f742, 0f3F000000;
+	add.f32 	%f746, %f744, 0f3F800000;
+	selp.f32	%f747, %f745, %f742, %p121;
+	selp.f32	%f748, %f746, %f744, %p121;
+	add.f32 	%f749, %f747, 0fBF800000;
+	add.f32 	%f738, %f747, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f737,%f738;
+	// inline asm
+	add.f32 	%f750, %f749, %f749;
+	mul.f32 	%f751, %f737, %f750;
+	mul.f32 	%f752, %f751, %f751;
+	fma.rn.f32 	%f755, %f598, %f752, %f597;
+	fma.rn.f32 	%f757, %f755, %f752, %f600;
+	mul.rn.f32 	%f758, %f757, %f752;
+	mul.rn.f32 	%f759, %f758, %f751;
+	sub.f32 	%f760, %f749, %f751;
+	neg.f32 	%f761, %f751;
+	add.f32 	%f762, %f760, %f760;
+	fma.rn.f32 	%f763, %f761, %f749, %f762;
+	mul.rn.f32 	%f764, %f737, %f763;
+	add.f32 	%f765, %f759, %f751;
+	sub.f32 	%f766, %f751, %f765;
+	add.f32 	%f767, %f759, %f766;
+	add.f32 	%f768, %f764, %f767;
+	add.f32 	%f769, %f765, %f768;
+	sub.f32 	%f770, %f765, %f769;
+	add.f32 	%f771, %f768, %f770;
+	mul.rn.f32 	%f773, %f748, %f616;
+	mul.rn.f32 	%f775, %f748, %f618;
+	add.f32 	%f776, %f773, %f769;
+	sub.f32 	%f777, %f773, %f776;
+	add.f32 	%f778, %f769, %f777;
+	add.f32 	%f779, %f771, %f778;
+	add.f32 	%f780, %f775, %f779;
+	add.f32 	%f781, %f776, %f780;
+	sub.f32 	%f782, %f776, %f781;
+	add.f32 	%f783, %f780, %f782;
+	mul.rn.f32 	%f785, %f628, %f781;
+	neg.f32 	%f786, %f785;
+	fma.rn.f32 	%f787, %f628, %f781, %f786;
+	fma.rn.f32 	%f788, %f628, %f783, %f787;
+	fma.rn.f32 	%f790, %f633, %f781, %f788;
+	add.rn.f32 	%f791, %f785, %f790;
+	neg.f32 	%f792, %f791;
+	add.rn.f32 	%f793, %f785, %f792;
+	add.rn.f32 	%f794, %f793, %f790;
+	mov.b32 	 %r290, %f791;
+	setp.eq.s32	%p122, %r290, 1118925336;
+	add.s32 	%r291, %r290, -1;
+	mov.b32 	 %f795, %r291;
+	add.f32 	%f796, %f794, 0f37000000;
+	selp.f32	%f797, %f795, %f791, %p122;
+	selp.f32	%f190, %f796, %f794, %p122;
+	mul.f32 	%f798, %f797, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f799, %f798;
+	fma.rn.f32 	%f801, %f799, %f644, %f797;
+	fma.rn.f32 	%f803, %f799, %f646, %f801;
+	mul.f32 	%f804, %f803, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f805, %f804;
+	add.f32 	%f806, %f799, 0f00000000;
+	ex2.approx.f32 	%f807, %f806;
+	mul.f32 	%f808, %f805, %f807;
+	setp.lt.f32	%p123, %f797, 0fC2D20000;
+	selp.f32	%f809, 0f00000000, %f808, %p123;
+	setp.gt.f32	%p124, %f797, 0f42D20000;
+	selp.f32	%f932, 0f7F800000, %f809, %p124;
+	setp.eq.f32	%p125, %f932, 0f7F800000;
+	@%p125 bra 	BB0_115;
+
+	fma.rn.f32 	%f932, %f932, %f190, %f932;
+
+BB0_115:
+	setp.lt.f32	%p126, %f161, 0f00000000;
+	and.pred  	%p6, %p126, %p95;
+	mov.b32 	 %r292, %f932;
+	xor.b32  	%r293, %r292, -2147483648;
+	mov.b32 	 %f810, %r293;
+	selp.f32	%f934, %f810, %f932, %p6;
+	setp.eq.f32	%p128, %f161, 0f00000000;
+	@%p128 bra 	BB0_118;
+	bra.uni 	BB0_116;
+
+BB0_118:
+	add.f32 	%f813, %f161, %f161;
+	selp.f32	%f934, %f813, 0f00000000, %p95;
+	bra.uni 	BB0_119;
+
+BB0_116:
+	setp.geu.f32	%p129, %f161, 0f00000000;
+	@%p129 bra 	BB0_119;
+
+	cvt.rzi.f32.f32	%f812, %f628;
+	setp.neu.f32	%p130, %f812, 0f3EE66666;
+	selp.f32	%f934, 0f7FFFFFFF, %f934, %p130;
+
+BB0_119:
+	add.f32 	%f814, %f189, 0f3EE66666;
+	mov.b32 	 %r294, %f814;
+	setp.lt.s32	%p132, %r294, 2139095040;
+	@%p132 bra 	BB0_124;
+
+	setp.gtu.f32	%p133, %f189, 0f7F800000;
+	@%p133 bra 	BB0_123;
+	bra.uni 	BB0_121;
+
+BB0_123:
+	add.f32 	%f934, %f161, 0f3EE66666;
+	bra.uni 	BB0_124;
+
+BB0_121:
+	setp.neu.f32	%p134, %f189, 0f7F800000;
+	@%p134 bra 	BB0_124;
+
+	selp.f32	%f934, 0fFF800000, 0f7F800000, %p6;
+
+BB0_124:
+	mov.u32 	%r333, 2;
+	setp.eq.f32	%p135, %f161, 0f3F800000;
+	selp.f32	%f815, 0f3F800000, %f934, %p135;
+	cvt.u64.u32	%rd83, %r4;
+	cvt.u64.u32	%rd82, %r3;
+	mov.u64 	%rd86, image;
+	cvta.global.u64 	%rd81, %rd86;
+	// inline asm
+	call (%rd80), _rt_buffer_get_64, (%rd81, %r333, %r102, %rd82, %rd83, %rd26, %rd26);
+	// inline asm
+	cvt.sat.f32.f32	%f816, %f815;
+	mul.f32 	%f817, %f816, 0f437FFD71;
+	cvt.rzi.u32.f32	%r297, %f817;
+	cvt.sat.f32.f32	%f818, %f188;
+	mul.f32 	%f819, %f818, 0f437FFD71;
+	cvt.rzi.u32.f32	%r298, %f819;
+	cvt.sat.f32.f32	%f820, %f175;
+	mul.f32 	%f821, %f820, 0f437FFD71;
+	cvt.rzi.u32.f32	%r299, %f821;
+	cvt.u16.u32	%rs12, %r297;
+	cvt.u16.u32	%rs13, %r299;
+	cvt.u16.u32	%rs14, %r298;
+	mov.u16 	%rs15, 255;
+	st.v4.u8 	[%rd80], {%rs12, %rs14, %rs13, %rs15};
+	ld.global.u32 	%r368, [imageEnabled];
+
+BB0_125:
+	and.b32  	%r300, %r368, 4;
+	setp.eq.s32	%p136, %r300, 0;
+	@%p136 bra 	BB0_129;
+
+	ld.global.u32 	%r301, [additive];
+	setp.eq.s32	%p137, %r301, 0;
+	cvt.u64.u32	%rd17, %r3;
+	cvt.u64.u32	%rd18, %r4;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs16, %f375;}
+
+	// inline asm
+	@%p137 bra 	BB0_128;
+
+	mov.u32 	%r334, 2;
+	mov.u64 	%rd99, image_HDR;
+	cvta.global.u64 	%rd88, %rd99;
+	mov.u32 	%r305, 8;
+	// inline asm
+	call (%rd87), _rt_buffer_get_64, (%rd88, %r334, %r305, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	ld.v4.u16 	{%rs23, %rs24, %rs25, %rs26}, [%rd87];
+	// inline asm
+	{  cvt.f32.f16 %f823, %rs23;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f824, %rs24;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f825, %rs25;}
+
+	// inline asm
+	// inline asm
+	call (%rd93), _rt_buffer_get_64, (%rd88, %r334, %r305, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	add.f32 	%f826, %f159, %f823;
+	add.f32 	%f827, %f160, %f824;
+	add.f32 	%f828, %f161, %f825;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs22, %f828;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs21, %f827;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs20, %f826;}
+
+	// inline asm
+	st.v4.u16 	[%rd93], {%rs20, %rs21, %rs22, %rs16};
+	bra.uni 	BB0_129;
+
+BB0_128:
+	mov.u32 	%r335, 2;
+	mov.u64 	%rd106, image_HDR;
+	cvta.global.u64 	%rd101, %rd106;
+	mov.u32 	%r307, 8;
+	// inline asm
+	call (%rd100), _rt_buffer_get_64, (%rd101, %r335, %r307, %rd17, %rd18, %rd26, %rd26);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs29, %f161;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs28, %f160;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs27, %f159;}
+
+	// inline asm
+	st.v4.u16 	[%rd100], {%rs27, %rs28, %rs29, %rs16};
+
+BB0_129:
+	ld.global.u8 	%rs30, [imageEnabled];
+	and.b16  	%rs31, %rs30, 64;
+	setp.eq.s16	%p138, %rs31, 0;
+	@%p138 bra 	BB0_141;
+
+	mov.u32 	%r336, 2;
+	mul.f32 	%f832, %f889, %f889;
+	fma.rn.f32 	%f833, %f890, %f890, %f832;
+	fma.rn.f32 	%f834, %f888, %f888, %f833;
+	sqrt.rn.f32 	%f835, %f834;
+	rcp.rn.f32 	%f836, %f835;
+	mul.f32 	%f837, %f890, %f836;
+	mul.f32 	%f838, %f889, %f836;
+	mul.f32 	%f839, %f888, %f836;
+	cvt.u64.u32	%rd110, %r4;
+	cvt.u64.u32	%rd109, %r3;
+	mov.u64 	%rd113, image_Dir;
+	cvta.global.u64 	%rd108, %rd113;
+	// inline asm
+	call (%rd107), _rt_buffer_get_64, (%rd108, %r336, %r102, %rd109, %rd110, %rd26, %rd26);
+	// inline asm
+	fma.rn.f32 	%f840, %f837, 0f3F000000, 0f3F000000;
+	mul.f32 	%f841, %f840, 0f437F0000;
+	cvt.rzi.u32.f32	%r310, %f841;
+	fma.rn.f32 	%f842, %f838, 0f3F000000, 0f3F000000;
+	mul.f32 	%f843, %f842, 0f437F0000;
+	cvt.rzi.u32.f32	%r311, %f843;
+	fma.rn.f32 	%f844, %f839, 0f3F000000, 0f3F000000;
+	mul.f32 	%f845, %f844, 0f437F0000;
+	cvt.rzi.u32.f32	%r312, %f845;
+	cvt.u16.u32	%rs32, %r312;
+	cvt.u16.u32	%rs33, %r311;
+	cvt.u16.u32	%rs34, %r310;
+	mov.u16 	%rs35, 255;
+	st.v4.u8 	[%rd107], {%rs34, %rs33, %rs32, %rs35};
+
+BB0_141:
+	ret;
+}
+
+