move to self host

1 files changed, 1807 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmAreaLight.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmAreaLight.ptx
new file mode 100644
index 00000000..465c62a5
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmAreaLight.ptx
@@ -0,0 +1,1807 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 image[1];
+.global .align 1 .b8 image_HDR[1];
+.global .align 1 .b8 image_HDR2[1];
+.global .align 1 .b8 image_Mask[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvnormal[1];
+.global .align 1 .b8 lightMeshBuffer[1];
+.global .align 4 .u32 lightMeshBufferSize;
+.global .align 4 .f32 lightInvCutoff;
+.global .align 4 .f32 lightPointSize;
+.global .align 4 .b8 lightColor[12];
+.global .align 1 .b8 rnd_seeds[1];
+.global .align 4 .u32 samples;
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
+.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[36];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<143>;
+	.reg .b16 	%rs<46>;
+	.reg .f32 	%f<853>;
+	.reg .b32 	%r<363>;
+	.reg .b64 	%rd<138>;
+
+
+	mov.u64 	%rd137, __local_depot0;
+	cvta.local.u64 	%SP, %rd137;
+	ld.global.u32 	%r1, [samples];
+	ld.global.v2.u32 	{%r103, %r104}, [pixelID];
+	cvt.u64.u32	%rd21, %r103;
+	cvt.u64.u32	%rd22, %r104;
+	mov.u64 	%rd25, uvnormal;
+	cvta.global.u64 	%rd20, %rd25;
+	mov.u32 	%r101, 2;
+	mov.u32 	%r102, 4;
+	mov.u64 	%rd24, 0;
+	// inline asm
+	call (%rd19), _rt_buffer_get_64, (%rd20, %r101, %r102, %rd21, %rd22, %rd24, %rd24);
+	// inline asm
+	ld.u32 	%r2, [%rd19];
+	shr.u32 	%r107, %r2, 16;
+	cvt.u16.u32	%rs1, %r107;
+	and.b16  	%rs3, %rs1, 255;
+	cvt.u16.u32	%rs4, %r2;
+	or.b16  	%rs5, %rs4, %rs3;
+	setp.eq.s16	%p7, %rs5, 0;
+	mov.f32 	%f807, 0f00000000;
+	mov.f32 	%f808, %f807;
+	mov.f32 	%f809, %f807;
+	@%p7 bra 	BB0_2;
+
+	ld.u8 	%rs6, [%rd19+1];
+	and.b16  	%rs8, %rs4, 255;
+	cvt.rn.f32.u16	%f173, %rs8;
+	div.rn.f32 	%f174, %f173, 0f437F0000;
+	fma.rn.f32 	%f175, %f174, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f176, %rs6;
+	div.rn.f32 	%f177, %f176, 0f437F0000;
+	fma.rn.f32 	%f178, %f177, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f179, %rs3;
+	div.rn.f32 	%f180, %f179, 0f437F0000;
+	fma.rn.f32 	%f181, %f180, 0f40000000, 0fBF800000;
+	mul.f32 	%f182, %f178, %f178;
+	fma.rn.f32 	%f183, %f175, %f175, %f182;
+	fma.rn.f32 	%f184, %f181, %f181, %f183;
+	sqrt.rn.f32 	%f185, %f184;
+	rcp.rn.f32 	%f186, %f185;
+	mul.f32 	%f807, %f175, %f186;
+	mul.f32 	%f808, %f178, %f186;
+	mul.f32 	%f809, %f181, %f186;
+
+BB0_2:
+	ld.global.v2.u32 	{%r108, %r109}, [pixelID];
+	ld.global.v2.u32 	{%r111, %r112}, [tileInfo];
+	add.s32 	%r3, %r108, %r111;
+	add.s32 	%r4, %r109, %r112;
+	setp.eq.f32	%p8, %f808, 0f00000000;
+	setp.eq.f32	%p9, %f807, 0f00000000;
+	and.pred  	%p10, %p9, %p8;
+	setp.eq.f32	%p11, %f809, 0f00000000;
+	and.pred  	%p12, %p10, %p11;
+	@%p12 bra 	BB0_129;
+	bra.uni 	BB0_3;
+
+BB0_129:
+	ld.global.u32 	%r362, [imageEnabled];
+	and.b32  	%r308, %r362, 1;
+	setp.eq.b32	%p138, %r308, 1;
+	@!%p138 bra 	BB0_131;
+	bra.uni 	BB0_130;
+
+BB0_130:
+	cvt.u64.u32	%rd99, %r3;
+	cvt.u64.u32	%rd100, %r4;
+	mov.u64 	%rd103, image;
+	cvta.global.u64 	%rd98, %rd103;
+	// inline asm
+	call (%rd97), _rt_buffer_get_64, (%rd98, %r101, %r102, %rd99, %rd100, %rd24, %rd24);
+	// inline asm
+	mov.u16 	%rs30, 0;
+	st.v4.u8 	[%rd97], {%rs30, %rs30, %rs30, %rs30};
+	ld.global.u32 	%r362, [imageEnabled];
+
+BB0_131:
+	and.b32  	%r311, %r362, 8;
+	setp.eq.s32	%p139, %r311, 0;
+	@%p139 bra 	BB0_133;
+
+	cvt.u64.u32	%rd106, %r3;
+	cvt.u64.u32	%rd107, %r4;
+	mov.u64 	%rd110, image_Mask;
+	cvta.global.u64 	%rd105, %rd110;
+	// inline asm
+	call (%rd104), _rt_buffer_get_64, (%rd105, %r101, %r101, %rd106, %rd107, %rd24, %rd24);
+	// inline asm
+	mov.f32 	%f790, 0f00000000;
+	cvt.rzi.u32.f32	%r314, %f790;
+	cvt.u16.u32	%rs31, %r314;
+	mov.u16 	%rs32, 0;
+	st.v2.u8 	[%rd104], {%rs31, %rs32};
+	ld.global.u32 	%r362, [imageEnabled];
+
+BB0_133:
+	and.b32  	%r315, %r362, 4;
+	setp.eq.s32	%p140, %r315, 0;
+	@%p140 bra 	BB0_137;
+
+	ld.global.u32 	%r316, [additive];
+	setp.eq.s32	%p141, %r316, 0;
+	cvt.u64.u32	%rd17, %r3;
+	cvt.u64.u32	%rd18, %r4;
+	@%p141 bra 	BB0_136;
+
+	mov.u64 	%rd123, image_HDR;
+	cvta.global.u64 	%rd112, %rd123;
+	mov.u32 	%r320, 8;
+	// inline asm
+	call (%rd111), _rt_buffer_get_64, (%rd112, %r101, %r320, %rd17, %rd18, %rd24, %rd24);
+	// inline asm
+	ld.v4.u16 	{%rs39, %rs40, %rs41, %rs42}, [%rd111];
+	// inline asm
+	{  cvt.f32.f16 %f791, %rs39;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f792, %rs40;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f793, %rs41;}
+
+	// inline asm
+	// inline asm
+	call (%rd117), _rt_buffer_get_64, (%rd112, %r101, %r320, %rd17, %rd18, %rd24, %rd24);
+	// inline asm
+	add.f32 	%f794, %f791, 0f00000000;
+	add.f32 	%f795, %f792, 0f00000000;
+	add.f32 	%f796, %f793, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs38, %f796;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs37, %f795;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs36, %f794;}
+
+	// inline asm
+	mov.u16 	%rs43, 0;
+	st.v4.u16 	[%rd117], {%rs36, %rs37, %rs38, %rs43};
+	bra.uni 	BB0_137;
+
+BB0_3:
+	ld.global.v2.u32 	{%r121, %r122}, [pixelID];
+	cvt.u64.u32	%rd28, %r121;
+	cvt.u64.u32	%rd29, %r122;
+	mov.u64 	%rd38, uvpos;
+	cvta.global.u64 	%rd27, %rd38;
+	mov.u32 	%r117, 12;
+	// inline asm
+	call (%rd26), _rt_buffer_get_64, (%rd27, %r101, %r117, %rd28, %rd29, %rd24, %rd24);
+	// inline asm
+	ld.f32 	%f9, [%rd26+8];
+	ld.f32 	%f8, [%rd26+4];
+	ld.f32 	%f7, [%rd26];
+	mul.f32 	%f189, %f7, 0f3456BF95;
+	mul.f32 	%f190, %f8, 0f3456BF95;
+	mul.f32 	%f191, %f9, 0f3456BF95;
+	abs.f32 	%f10, %f807;
+	div.rn.f32 	%f192, %f189, %f10;
+	abs.f32 	%f193, %f808;
+	div.rn.f32 	%f194, %f190, %f193;
+	abs.f32 	%f11, %f809;
+	div.rn.f32 	%f195, %f191, %f11;
+	abs.f32 	%f196, %f192;
+	abs.f32 	%f197, %f194;
+	abs.f32 	%f198, %f195;
+	mov.f32 	%f199, 0f38D1B717;
+	max.f32 	%f200, %f196, %f199;
+	max.f32 	%f201, %f197, %f199;
+	max.f32 	%f202, %f198, %f199;
+	fma.rn.f32 	%f12, %f807, %f200, %f7;
+	fma.rn.f32 	%f13, %f808, %f201, %f8;
+	fma.rn.f32 	%f14, %f809, %f202, %f9;
+	ld.global.v2.u32 	{%r125, %r126}, [pixelID];
+	cvt.u64.u32	%rd34, %r125;
+	cvt.u64.u32	%rd35, %r126;
+	mov.u64 	%rd39, rnd_seeds;
+	cvta.global.u64 	%rd33, %rd39;
+	// inline asm
+	call (%rd32), _rt_buffer_get_64, (%rd33, %r101, %r102, %rd34, %rd35, %rd24, %rd24);
+	// inline asm
+	ld.u32 	%r129, [%rd32];
+	mad.lo.s32 	%r5, %r129, 1664525, 1013904223;
+	ld.global.u32 	%r130, [lightMeshBufferSize];
+	setp.eq.s32	%p14, %r130, 0;
+	mov.pred 	%p13, 0;
+	mov.f32 	%f20, 0f00000000;
+	mov.u32 	%r7, 0;
+	@%p14 bra 	BB0_4;
+
+	ld.global.f32 	%f15, [lightPointSize];
+	mul.f32 	%f16, %f12, 0f3456BF95;
+	mul.f32 	%f17, %f13, 0f3456BF95;
+	mul.f32 	%f18, %f14, 0f3456BF95;
+	and.b32  	%r133, %r5, 16777215;
+	cvt.rn.f32.u32	%f205, %r133;
+	mul.f32 	%f206, %f205, 0fB3800000;
+	fma.rn.f32 	%f19, %f206, 0f3F333333, 0f3F800000;
+	mov.f32 	%f20, 0f00000000;
+	mov.u32 	%r331, 0;
+	abs.f32 	%f329, %f17;
+	abs.f32 	%f330, %f16;
+	max.f32 	%f331, %f330, %f329;
+	abs.f32 	%f332, %f18;
+	max.f32 	%f333, %f331, %f332;
+	mov.u32 	%r7, %r331;
+	mov.f32 	%f21, %f20;
+
+BB0_6:
+	shl.b32 	%r8, %r331, 1;
+	cvt.s64.s32	%rd42, %r8;
+	mov.u64 	%rd46, lightMeshBuffer;
+	cvta.global.u64 	%rd41, %rd46;
+	mov.u32 	%r134, 1;
+	// inline asm
+	call (%rd40), _rt_buffer_get_64, (%rd41, %r134, %r117, %rd42, %rd24, %rd24, %rd24);
+	// inline asm
+	ld.f32 	%f207, [%rd40];
+	sub.f32 	%f208, %f207, %f7;
+	ld.f32 	%f209, [%rd40+4];
+	sub.f32 	%f210, %f209, %f8;
+	ld.f32 	%f211, [%rd40+8];
+	sub.f32 	%f212, %f211, %f9;
+	mul.f32 	%f213, %f210, %f210;
+	fma.rn.f32 	%f214, %f208, %f208, %f213;
+	fma.rn.f32 	%f215, %f212, %f212, %f214;
+	sqrt.rn.f32 	%f22, %f215;
+	rcp.rn.f32 	%f216, %f22;
+	mul.f32 	%f23, %f208, %f216;
+	mul.f32 	%f24, %f210, %f216;
+	mul.f32 	%f25, %f212, %f216;
+	mul.f32 	%f217, %f808, %f24;
+	fma.rn.f32 	%f218, %f807, %f23, %f217;
+	fma.rn.f32 	%f26, %f809, %f25, %f218;
+	setp.leu.f32	%p15, %f26, 0f00000000;
+	@%p15 bra 	BB0_22;
+
+	setp.ne.s32	%p17, %r1, 0;
+	mul.f32 	%f219, %f22, %f22;
+	mul.f32 	%f220, %f219, 0f40C90FDB;
+	div.rn.f32 	%f221, %f15, %f220;
+	add.f32 	%f27, %f221, %f221;
+	setp.gt.f32	%p18, %f27, %f19;
+	and.pred  	%p19, %p17, %p18;
+	mov.pred 	%p142, -1;
+	@%p19 bra 	BB0_24;
+
+	ld.global.f32 	%f224, [lightInvCutoff];
+	mul.f32 	%f28, %f22, %f224;
+	mov.f32 	%f228, 0f40800000;
+	abs.f32 	%f30, %f28;
+	setp.lt.f32	%p20, %f30, 0f00800000;
+	mul.f32 	%f230, %f30, 0f4B800000;
+	selp.f32	%f231, 0fC3170000, 0fC2FE0000, %p20;
+	selp.f32	%f232, %f230, %f30, %p20;
+	mov.b32 	 %r136, %f232;
+	and.b32  	%r137, %r136, 8388607;
+	or.b32  	%r138, %r137, 1065353216;
+	mov.b32 	 %f233, %r138;
+	shr.u32 	%r139, %r136, 23;
+	cvt.rn.f32.u32	%f234, %r139;
+	add.f32 	%f235, %f231, %f234;
+	setp.gt.f32	%p21, %f233, 0f3FB504F3;
+	mul.f32 	%f236, %f233, 0f3F000000;
+	add.f32 	%f237, %f235, 0f3F800000;
+	selp.f32	%f238, %f236, %f233, %p21;
+	selp.f32	%f239, %f237, %f235, %p21;
+	add.f32 	%f240, %f238, 0fBF800000;
+	add.f32 	%f223, %f238, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f222,%f223;
+	// inline asm
+	add.f32 	%f241, %f240, %f240;
+	mul.f32 	%f242, %f222, %f241;
+	mul.f32 	%f243, %f242, %f242;
+	mov.f32 	%f244, 0f3C4CAF63;
+	mov.f32 	%f245, 0f3B18F0FE;
+	fma.rn.f32 	%f246, %f245, %f243, %f244;
+	mov.f32 	%f247, 0f3DAAAABD;
+	fma.rn.f32 	%f248, %f246, %f243, %f247;
+	mul.rn.f32 	%f249, %f248, %f243;
+	mul.rn.f32 	%f250, %f249, %f242;
+	sub.f32 	%f251, %f240, %f242;
+	neg.f32 	%f252, %f242;
+	add.f32 	%f253, %f251, %f251;
+	fma.rn.f32 	%f254, %f252, %f240, %f253;
+	mul.rn.f32 	%f255, %f222, %f254;
+	add.f32 	%f256, %f250, %f242;
+	sub.f32 	%f257, %f242, %f256;
+	add.f32 	%f258, %f250, %f257;
+	add.f32 	%f259, %f255, %f258;
+	add.f32 	%f260, %f256, %f259;
+	sub.f32 	%f261, %f256, %f260;
+	add.f32 	%f262, %f259, %f261;
+	mov.f32 	%f263, 0f3F317200;
+	mul.rn.f32 	%f264, %f239, %f263;
+	mov.f32 	%f265, 0f35BFBE8E;
+	mul.rn.f32 	%f266, %f239, %f265;
+	add.f32 	%f267, %f264, %f260;
+	sub.f32 	%f268, %f264, %f267;
+	add.f32 	%f269, %f260, %f268;
+	add.f32 	%f270, %f262, %f269;
+	add.f32 	%f271, %f266, %f270;
+	add.f32 	%f272, %f267, %f271;
+	sub.f32 	%f273, %f267, %f272;
+	add.f32 	%f274, %f271, %f273;
+	mul.rn.f32 	%f275, %f228, %f272;
+	neg.f32 	%f276, %f275;
+	fma.rn.f32 	%f277, %f228, %f272, %f276;
+	fma.rn.f32 	%f278, %f228, %f274, %f277;
+	mov.f32 	%f279, 0f00000000;
+	fma.rn.f32 	%f280, %f279, %f272, %f278;
+	add.rn.f32 	%f281, %f275, %f280;
+	neg.f32 	%f282, %f281;
+	add.rn.f32 	%f283, %f275, %f282;
+	add.rn.f32 	%f284, %f283, %f280;
+	mov.b32 	 %r140, %f281;
+	setp.eq.s32	%p22, %r140, 1118925336;
+	add.s32 	%r141, %r140, -1;
+	mov.b32 	 %f285, %r141;
+	add.f32 	%f286, %f284, 0f37000000;
+	selp.f32	%f287, %f285, %f281, %p22;
+	selp.f32	%f31, %f286, %f284, %p22;
+	mul.f32 	%f288, %f287, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f289, %f288;
+	mov.f32 	%f290, 0fBF317200;
+	fma.rn.f32 	%f291, %f289, %f290, %f287;
+	mov.f32 	%f292, 0fB5BFBE8E;
+	fma.rn.f32 	%f293, %f289, %f292, %f291;
+	mul.f32 	%f294, %f293, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f295, %f294;
+	add.f32 	%f296, %f289, 0f00000000;
+	ex2.approx.f32 	%f297, %f296;
+	mul.f32 	%f298, %f295, %f297;
+	setp.lt.f32	%p23, %f287, 0fC2D20000;
+	selp.f32	%f299, 0f00000000, %f298, %p23;
+	setp.gt.f32	%p24, %f287, 0f42D20000;
+	selp.f32	%f812, 0f7F800000, %f299, %p24;
+	setp.eq.f32	%p25, %f812, 0f7F800000;
+	@%p25 bra 	BB0_10;
+
+	fma.rn.f32 	%f812, %f812, %f31, %f812;
+
+BB0_10:
+	mov.f32 	%f803, 0f40000000;
+	cvt.rzi.f32.f32	%f802, %f803;
+	add.f32 	%f801, %f802, %f802;
+	mov.f32 	%f800, 0f40800000;
+	sub.f32 	%f799, %f800, %f801;
+	abs.f32 	%f798, %f799;
+	setp.lt.f32	%p26, %f28, 0f00000000;
+	setp.eq.f32	%p27, %f798, 0f3F800000;
+	and.pred  	%p1, %p26, %p27;
+	mov.b32 	 %r142, %f812;
+	xor.b32  	%r143, %r142, -2147483648;
+	mov.b32 	 %f300, %r143;
+	selp.f32	%f814, %f300, %f812, %p1;
+	setp.eq.f32	%p28, %f28, 0f00000000;
+	@%p28 bra 	BB0_13;
+	bra.uni 	BB0_11;
+
+BB0_13:
+	add.f32 	%f303, %f28, %f28;
+	selp.f32	%f814, %f303, 0f00000000, %p27;
+	bra.uni 	BB0_14;
+
+BB0_11:
+	setp.geu.f32	%p29, %f28, 0f00000000;
+	@%p29 bra 	BB0_14;
+
+	mov.f32 	%f806, 0f40800000;
+	cvt.rzi.f32.f32	%f302, %f806;
+	setp.neu.f32	%p30, %f302, 0f40800000;
+	selp.f32	%f814, 0f7FFFFFFF, %f814, %p30;
+
+BB0_14:
+	add.f32 	%f304, %f30, 0f40800000;
+	mov.b32 	 %r144, %f304;
+	setp.lt.s32	%p32, %r144, 2139095040;
+	@%p32 bra 	BB0_19;
+
+	setp.gtu.f32	%p33, %f30, 0f7F800000;
+	@%p33 bra 	BB0_18;
+	bra.uni 	BB0_16;
+
+BB0_18:
+	add.f32 	%f814, %f28, 0f40800000;
+	bra.uni 	BB0_19;
+
+BB0_16:
+	setp.neu.f32	%p34, %f30, 0f7F800000;
+	@%p34 bra 	BB0_19;
+
+	selp.f32	%f814, 0fFF800000, 0f7F800000, %p1;
+
+BB0_19:
+	mov.u32 	%r324, 1;
+	mov.u64 	%rd132, lightMeshBuffer;
+	cvta.global.u64 	%rd131, %rd132;
+	shl.b32 	%r323, %r331, 1;
+	mov.f32 	%f305, 0f3F800000;
+	sub.f32 	%f306, %f305, %f814;
+	setp.eq.f32	%p35, %f28, 0f3F800000;
+	selp.f32	%f307, 0f00000000, %f306, %p35;
+	cvt.sat.f32.f32	%f308, %f307;
+	mul.f32 	%f309, %f27, %f308;
+	add.s32 	%r147, %r323, 1;
+	cvt.s64.s32	%rd49, %r147;
+	// inline asm
+	call (%rd47), _rt_buffer_get_64, (%rd131, %r324, %r117, %rd49, %rd24, %rd24, %rd24);
+	// inline asm
+	ld.f32 	%f310, [%rd47];
+	mul.f32 	%f311, %f23, %f310;
+	ld.f32 	%f312, [%rd47+4];
+	mul.f32 	%f313, %f24, %f312;
+	neg.f32 	%f314, %f313;
+	sub.f32 	%f315, %f314, %f311;
+	ld.f32 	%f316, [%rd47+8];
+	mul.f32 	%f317, %f25, %f316;
+	sub.f32 	%f318, %f315, %f317;
+	cvt.sat.f32.f32	%f319, %f318;
+	mul.f32 	%f42, %f309, %f319;
+	cvt.sat.f32.f32	%f43, %f26;
+	mul.f32 	%f320, %f42, %f43;
+	setp.leu.f32	%p36, %f320, 0f3727C5AC;
+	@%p36 bra 	BB0_21;
+
+	mov.u32 	%r330, 1;
+	add.u64 	%rd54, %SP, 28;
+	cvta.to.local.u64 	%rd55, %rd54;
+	max.f32 	%f327, %f333, %f199;
+	sub.f32 	%f328, %f22, %f327;
+	mov.u32 	%r151, 1065353216;
+	st.local.u32 	[%rd55], %r151;
+	ld.global.u32 	%r148, [root];
+	// inline asm
+	call _rt_trace_64, (%r148, %f12, %f13, %f14, %f23, %f24, %f25, %r330, %f327, %f328, %rd54, %r102);
+	// inline asm
+	ld.local.f32 	%f335, [%rd55];
+	mul.f32 	%f336, %f42, %f335;
+	fma.rn.f32 	%f21, %f43, %f336, %f21;
+	add.f32 	%f20, %f20, %f335;
+
+BB0_21:
+	add.s32 	%r7, %r7, 1;
+
+BB0_22:
+	ld.global.u32 	%r152, [lightMeshBufferSize];
+	add.s32 	%r331, %r331, 1;
+	setp.lt.u32	%p38, %r331, %r152;
+	@%p38 bra 	BB0_6;
+	bra.uni 	BB0_23;
+
+BB0_4:
+	mov.f32 	%f21, %f20;
+
+BB0_23:
+	mov.pred 	%p142, %p13;
+
+BB0_24:
+	cvt.rn.f32.s32	%f337, %r7;
+	mov.f32 	%f338, 0f3F800000;
+	max.f32 	%f339, %f337, %f338;
+	div.rn.f32 	%f839, %f21, %f339;
+	div.rn.f32 	%f840, %f20, %f339;
+	@!%p142 bra 	BB0_77;
+	bra.uni 	BB0_25;
+
+BB0_25:
+	abs.f32 	%f805, %f809;
+	abs.f32 	%f804, %f807;
+	setp.gt.f32	%p39, %f804, %f805;
+	neg.f32 	%f342, %f808;
+	selp.f32	%f343, %f342, 0f00000000, %p39;
+	neg.f32 	%f344, %f809;
+	selp.f32	%f345, %f807, %f344, %p39;
+	selp.f32	%f346, 0f00000000, %f808, %p39;
+	mul.f32 	%f347, %f345, %f345;
+	fma.rn.f32 	%f348, %f343, %f343, %f347;
+	fma.rn.f32 	%f349, %f346, %f346, %f348;
+	sqrt.rn.f32 	%f350, %f349;
+	rcp.rn.f32 	%f351, %f350;
+	mul.f32 	%f54, %f343, %f351;
+	mul.f32 	%f55, %f345, %f351;
+	mul.f32 	%f56, %f346, %f351;
+	mov.f32 	%f823, 0f00000000;
+	setp.lt.s32	%p40, %r1, 1;
+	mov.f32 	%f824, %f823;
+	@%p40 bra 	BB0_76;
+
+	mad.lo.s32 	%r338, %r129, 1664525, 1013904223;
+	cvt.rn.f32.s32	%f354, %r1;
+	rcp.rn.f32 	%f57, %f354;
+	add.u64 	%rd56, %SP, 0;
+	cvta.to.local.u64 	%rd2, %rd56;
+	mul.f32 	%f58, %f12, 0f3456BF95;
+	mul.f32 	%f59, %f13, 0f3456BF95;
+	mul.f32 	%f60, %f14, 0f3456BF95;
+	add.u64 	%rd57, %SP, 32;
+	cvta.to.local.u64 	%rd3, %rd57;
+	mul.f32 	%f355, %f807, %f55;
+	mul.f32 	%f356, %f808, %f54;
+	sub.f32 	%f61, %f356, %f355;
+	mul.f32 	%f357, %f809, %f54;
+	mul.f32 	%f358, %f807, %f56;
+	sub.f32 	%f62, %f358, %f357;
+	mul.f32 	%f359, %f808, %f56;
+	mul.f32 	%f360, %f809, %f55;
+	sub.f32 	%f63, %f360, %f359;
+	mov.f32 	%f823, 0f00000000;
+	mov.u32 	%r153, 0;
+	abs.f32 	%f361, %f59;
+	abs.f32 	%f362, %f58;
+	max.f32 	%f363, %f362, %f361;
+	abs.f32 	%f364, %f60;
+	max.f32 	%f365, %f363, %f364;
+	mov.u32 	%r335, %r153;
+	mov.f32 	%f824, %f823;
+
+BB0_27:
+	cvt.rn.f32.s32	%f66, %r335;
+	max.f32 	%f67, %f365, %f199;
+	mov.u32 	%r337, %r153;
+
+BB0_28:
+	mad.lo.s32 	%r155, %r338, 1664525, 1013904223;
+	and.b32  	%r156, %r155, 16777215;
+	cvt.rn.f32.u32	%f367, %r156;
+	fma.rn.f32 	%f368, %f367, 0f33800000, %f66;
+	mul.f32 	%f369, %f57, %f368;
+	mad.lo.s32 	%r338, %r155, 1664525, 1013904223;
+	and.b32  	%r157, %r338, 16777215;
+	cvt.rn.f32.u32	%f370, %r157;
+	cvt.rn.f32.s32	%f371, %r337;
+	fma.rn.f32 	%f372, %f370, 0f33800000, %f371;
+	mul.f32 	%f373, %f57, %f372;
+	sqrt.rn.f32 	%f70, %f369;
+	mul.f32 	%f831, %f373, 0f40C90FDB;
+	abs.f32 	%f72, %f831;
+	setp.neu.f32	%p41, %f72, 0f7F800000;
+	mov.f32 	%f825, %f831;
+	@%p41 bra 	BB0_30;
+
+	mov.f32 	%f374, 0f00000000;
+	mul.rn.f32 	%f825, %f831, %f374;
+
+BB0_30:
+	mul.f32 	%f375, %f825, 0f3F22F983;
+	cvt.rni.s32.f32	%r348, %f375;
+	cvt.rn.f32.s32	%f376, %r348;
+	neg.f32 	%f377, %f376;
+	mov.f32 	%f378, 0f3FC90FDA;
+	fma.rn.f32 	%f379, %f377, %f378, %f825;
+	mov.f32 	%f380, 0f33A22168;
+	fma.rn.f32 	%f381, %f377, %f380, %f379;
+	mov.f32 	%f382, 0f27C234C5;
+	fma.rn.f32 	%f826, %f377, %f382, %f381;
+	abs.f32 	%f383, %f825;
+	setp.leu.f32	%p42, %f383, 0f47CE4780;
+	@%p42 bra 	BB0_41;
+
+	mov.b32 	 %r19, %f825;
+	shr.u32 	%r20, %r19, 23;
+	shl.b32 	%r160, %r19, 8;
+	or.b32  	%r21, %r160, -2147483648;
+	mov.u32 	%r340, 0;
+	mov.u64 	%rd133, __cudart_i2opi_f;
+	mov.u32 	%r339, -6;
+	mov.u64 	%rd134, %rd2;
+
+BB0_32:
+	.pragma "nounroll";
+	ld.const.u32 	%r163, [%rd133];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r161, %r163, %r21, %r340;
+	madc.hi.u32     %r340, %r163, %r21,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd134], %r161;
+	add.s64 	%rd134, %rd134, 4;
+	add.s64 	%rd133, %rd133, 4;
+	add.s32 	%r339, %r339, 1;
+	setp.ne.s32	%p43, %r339, 0;
+	@%p43 bra 	BB0_32;
+
+	and.b32  	%r166, %r20, 255;
+	add.s32 	%r167, %r166, -128;
+	shr.u32 	%r168, %r167, 5;
+	and.b32  	%r26, %r19, -2147483648;
+	st.local.u32 	[%rd2+24], %r340;
+	mov.u32 	%r169, 6;
+	sub.s32 	%r170, %r169, %r168;
+	mul.wide.s32 	%rd59, %r170, 4;
+	add.s64 	%rd8, %rd2, %rd59;
+	ld.local.u32 	%r341, [%rd8];
+	ld.local.u32 	%r342, [%rd8+-4];
+	and.b32  	%r29, %r20, 31;
+	setp.eq.s32	%p44, %r29, 0;
+	@%p44 bra 	BB0_35;
+
+	mov.u32 	%r171, 32;
+	sub.s32 	%r172, %r171, %r29;
+	shr.u32 	%r173, %r342, %r172;
+	shl.b32 	%r174, %r341, %r29;
+	add.s32 	%r341, %r173, %r174;
+	ld.local.u32 	%r175, [%rd8+-8];
+	shr.u32 	%r176, %r175, %r172;
+	shl.b32 	%r177, %r342, %r29;
+	add.s32 	%r342, %r176, %r177;
+
+BB0_35:
+	shr.u32 	%r178, %r342, 30;
+	shl.b32 	%r179, %r341, 2;
+	add.s32 	%r343, %r178, %r179;
+	shl.b32 	%r35, %r342, 2;
+	shr.u32 	%r180, %r343, 31;
+	shr.u32 	%r181, %r341, 30;
+	add.s32 	%r36, %r180, %r181;
+	setp.eq.s32	%p45, %r180, 0;
+	@%p45 bra 	BB0_36;
+	bra.uni 	BB0_37;
+
+BB0_36:
+	mov.u32 	%r344, %r26;
+	mov.u32 	%r345, %r35;
+	bra.uni 	BB0_38;
+
+BB0_37:
+	not.b32 	%r182, %r343;
+	neg.s32 	%r345, %r35;
+	setp.eq.s32	%p46, %r35, 0;
+	selp.u32	%r183, 1, 0, %p46;
+	add.s32 	%r343, %r183, %r182;
+	xor.b32  	%r344, %r26, -2147483648;
+
+BB0_38:
+	clz.b32 	%r347, %r343;
+	setp.eq.s32	%p47, %r347, 0;
+	shl.b32 	%r184, %r343, %r347;
+	mov.u32 	%r185, 32;
+	sub.s32 	%r186, %r185, %r347;
+	shr.u32 	%r187, %r345, %r186;
+	add.s32 	%r188, %r187, %r184;
+	selp.b32	%r44, %r343, %r188, %p47;
+	mov.u32 	%r189, -921707870;
+	mul.hi.u32 	%r346, %r44, %r189;
+	setp.eq.s32	%p48, %r26, 0;
+	neg.s32 	%r190, %r36;
+	selp.b32	%r348, %r36, %r190, %p48;
+	setp.lt.s32	%p49, %r346, 1;
+	@%p49 bra 	BB0_40;
+
+	mul.lo.s32 	%r191, %r44, -921707870;
+	shr.u32 	%r192, %r191, 31;
+	shl.b32 	%r193, %r346, 1;
+	add.s32 	%r346, %r192, %r193;
+	add.s32 	%r347, %r347, 1;
+
+BB0_40:
+	mov.u32 	%r194, 126;
+	sub.s32 	%r195, %r194, %r347;
+	shl.b32 	%r196, %r195, 23;
+	add.s32 	%r197, %r346, 1;
+	shr.u32 	%r198, %r197, 7;
+	add.s32 	%r199, %r198, 1;
+	shr.u32 	%r200, %r199, 1;
+	add.s32 	%r201, %r200, %r196;
+	or.b32  	%r202, %r201, %r344;
+	mov.b32 	 %f826, %r202;
+
+BB0_41:
+	mul.rn.f32 	%f78, %f826, %f826;
+	add.s32 	%r52, %r348, 1;
+	and.b32  	%r53, %r52, 1;
+	setp.eq.s32	%p50, %r53, 0;
+	@%p50 bra 	BB0_43;
+	bra.uni 	BB0_42;
+
+BB0_43:
+	mov.f32 	%f386, 0f3C08839E;
+	mov.f32 	%f387, 0fB94CA1F9;
+	fma.rn.f32 	%f827, %f387, %f78, %f386;
+	bra.uni 	BB0_44;
+
+BB0_42:
+	mov.f32 	%f384, 0fBAB6061A;
+	mov.f32 	%f385, 0f37CCF5CE;
+	fma.rn.f32 	%f827, %f385, %f78, %f384;
+
+BB0_44:
+	@%p50 bra 	BB0_46;
+	bra.uni 	BB0_45;
+
+BB0_46:
+	mov.f32 	%f391, 0fBE2AAAA3;
+	fma.rn.f32 	%f392, %f827, %f78, %f391;
+	mov.f32 	%f393, 0f00000000;
+	fma.rn.f32 	%f828, %f392, %f78, %f393;
+	bra.uni 	BB0_47;
+
+BB0_45:
+	mov.f32 	%f388, 0f3D2AAAA5;
+	fma.rn.f32 	%f389, %f827, %f78, %f388;
+	mov.f32 	%f390, 0fBF000000;
+	fma.rn.f32 	%f828, %f389, %f78, %f390;
+
+BB0_47:
+	fma.rn.f32 	%f829, %f828, %f826, %f826;
+	@%p50 bra 	BB0_49;
+
+	fma.rn.f32 	%f829, %f828, %f78, %f338;
+
+BB0_49:
+	and.b32  	%r203, %r52, 2;
+	setp.eq.s32	%p53, %r203, 0;
+	@%p53 bra 	BB0_51;
+
+	mov.f32 	%f395, 0f00000000;
+	mov.f32 	%f396, 0fBF800000;
+	fma.rn.f32 	%f829, %f829, %f396, %f395;
+
+BB0_51:
+	@%p41 bra 	BB0_53;
+
+	mov.f32 	%f397, 0f00000000;
+	mul.rn.f32 	%f831, %f831, %f397;
+
+BB0_53:
+	mul.f32 	%f398, %f831, 0f3F22F983;
+	cvt.rni.s32.f32	%r358, %f398;
+	cvt.rn.f32.s32	%f399, %r358;
+	neg.f32 	%f400, %f399;
+	fma.rn.f32 	%f402, %f400, %f378, %f831;
+	fma.rn.f32 	%f404, %f400, %f380, %f402;
+	fma.rn.f32 	%f832, %f400, %f382, %f404;
+	abs.f32 	%f406, %f831;
+	setp.leu.f32	%p55, %f406, 0f47CE4780;
+	@%p55 bra 	BB0_64;
+
+	mov.b32 	 %r55, %f831;
+	shr.u32 	%r56, %r55, 23;
+	shl.b32 	%r206, %r55, 8;
+	or.b32  	%r57, %r206, -2147483648;
+	mov.u32 	%r350, 0;
+	mov.u64 	%rd135, __cudart_i2opi_f;
+	mov.u32 	%r349, -6;
+	mov.u64 	%rd136, %rd2;
+
+BB0_55:
+	.pragma "nounroll";
+	ld.const.u32 	%r209, [%rd135];
+	// inline asm
+	{
+	mad.lo.cc.u32   %r207, %r209, %r57, %r350;
+	madc.hi.u32     %r350, %r209, %r57,  0;
+	}
+	// inline asm
+	st.local.u32 	[%rd136], %r207;
+	add.s64 	%rd136, %rd136, 4;
+	add.s64 	%rd135, %rd135, 4;
+	add.s32 	%r349, %r349, 1;
+	setp.ne.s32	%p56, %r349, 0;
+	@%p56 bra 	BB0_55;
+
+	and.b32  	%r212, %r56, 255;
+	add.s32 	%r213, %r212, -128;
+	shr.u32 	%r214, %r213, 5;
+	and.b32  	%r62, %r55, -2147483648;
+	st.local.u32 	[%rd2+24], %r350;
+	mov.u32 	%r215, 6;
+	sub.s32 	%r216, %r215, %r214;
+	mul.wide.s32 	%rd61, %r216, 4;
+	add.s64 	%rd13, %rd2, %rd61;
+	ld.local.u32 	%r351, [%rd13];
+	ld.local.u32 	%r352, [%rd13+-4];
+	and.b32  	%r65, %r56, 31;
+	setp.eq.s32	%p57, %r65, 0;
+	@%p57 bra 	BB0_58;
+
+	mov.u32 	%r217, 32;
+	sub.s32 	%r218, %r217, %r65;
+	shr.u32 	%r219, %r352, %r218;
+	shl.b32 	%r220, %r351, %r65;
+	add.s32 	%r351, %r219, %r220;
+	ld.local.u32 	%r221, [%rd13+-8];
+	shr.u32 	%r222, %r221, %r218;
+	shl.b32 	%r223, %r352, %r65;
+	add.s32 	%r352, %r222, %r223;
+
+BB0_58:
+	shr.u32 	%r224, %r352, 30;
+	shl.b32 	%r225, %r351, 2;
+	add.s32 	%r353, %r224, %r225;
+	shl.b32 	%r71, %r352, 2;
+	shr.u32 	%r226, %r353, 31;
+	shr.u32 	%r227, %r351, 30;
+	add.s32 	%r72, %r226, %r227;
+	setp.eq.s32	%p58, %r226, 0;
+	@%p58 bra 	BB0_59;
+	bra.uni 	BB0_60;
+
+BB0_59:
+	mov.u32 	%r354, %r62;
+	mov.u32 	%r355, %r71;
+	bra.uni 	BB0_61;
+
+BB0_60:
+	not.b32 	%r228, %r353;
+	neg.s32 	%r355, %r71;
+	setp.eq.s32	%p59, %r71, 0;
+	selp.u32	%r229, 1, 0, %p59;
+	add.s32 	%r353, %r229, %r228;
+	xor.b32  	%r354, %r62, -2147483648;
+
+BB0_61:
+	clz.b32 	%r357, %r353;
+	setp.eq.s32	%p60, %r357, 0;
+	shl.b32 	%r230, %r353, %r357;
+	mov.u32 	%r231, 32;
+	sub.s32 	%r232, %r231, %r357;
+	shr.u32 	%r233, %r355, %r232;
+	add.s32 	%r234, %r233, %r230;
+	selp.b32	%r80, %r353, %r234, %p60;
+	mov.u32 	%r235, -921707870;
+	mul.hi.u32 	%r356, %r80, %r235;
+	setp.eq.s32	%p61, %r62, 0;
+	neg.s32 	%r236, %r72;
+	selp.b32	%r358, %r72, %r236, %p61;
+	setp.lt.s32	%p62, %r356, 1;
+	@%p62 bra 	BB0_63;
+
+	mul.lo.s32 	%r237, %r80, -921707870;
+	shr.u32 	%r238, %r237, 31;
+	shl.b32 	%r239, %r356, 1;
+	add.s32 	%r356, %r238, %r239;
+	add.s32 	%r357, %r357, 1;
+
+BB0_63:
+	mov.u32 	%r240, 126;
+	sub.s32 	%r241, %r240, %r357;
+	shl.b32 	%r242, %r241, 23;
+	add.s32 	%r243, %r356, 1;
+	shr.u32 	%r244, %r243, 7;
+	add.s32 	%r245, %r244, 1;
+	shr.u32 	%r246, %r245, 1;
+	add.s32 	%r247, %r246, %r242;
+	or.b32  	%r248, %r247, %r354;
+	mov.b32 	 %f832, %r248;
+
+BB0_64:
+	mul.rn.f32 	%f95, %f832, %f832;
+	and.b32  	%r88, %r358, 1;
+	setp.eq.s32	%p63, %r88, 0;
+	@%p63 bra 	BB0_66;
+	bra.uni 	BB0_65;
+
+BB0_66:
+	mov.f32 	%f409, 0f3C08839E;
+	mov.f32 	%f410, 0fB94CA1F9;
+	fma.rn.f32 	%f833, %f410, %f95, %f409;
+	bra.uni 	BB0_67;
+
+BB0_65:
+	mov.f32 	%f407, 0fBAB6061A;
+	mov.f32 	%f408, 0f37CCF5CE;
+	fma.rn.f32 	%f833, %f408, %f95, %f407;
+
+BB0_67:
+	@%p63 bra 	BB0_69;
+	bra.uni 	BB0_68;
+
+BB0_69:
+	mov.f32 	%f414, 0fBE2AAAA3;
+	fma.rn.f32 	%f415, %f833, %f95, %f414;
+	mov.f32 	%f416, 0f00000000;
+	fma.rn.f32 	%f834, %f415, %f95, %f416;
+	bra.uni 	BB0_70;
+
+BB0_68:
+	mov.f32 	%f411, 0f3D2AAAA5;
+	fma.rn.f32 	%f412, %f833, %f95, %f411;
+	mov.f32 	%f413, 0fBF000000;
+	fma.rn.f32 	%f834, %f412, %f95, %f413;
+
+BB0_70:
+	fma.rn.f32 	%f835, %f834, %f832, %f832;
+	@%p63 bra 	BB0_72;
+
+	fma.rn.f32 	%f835, %f834, %f95, %f338;
+
+BB0_72:
+	and.b32  	%r249, %r358, 2;
+	setp.eq.s32	%p66, %r249, 0;
+	@%p66 bra 	BB0_74;
+
+	mov.f32 	%f418, 0f00000000;
+	mov.f32 	%f419, 0fBF800000;
+	fma.rn.f32 	%f835, %f835, %f419, %f418;
+
+BB0_74:
+	mul.f32 	%f428, %f70, %f829;
+	mul.f32 	%f429, %f428, %f428;
+	sub.f32 	%f431, %f338, %f429;
+	mul.f32 	%f432, %f70, %f835;
+	mul.f32 	%f433, %f432, %f432;
+	sub.f32 	%f434, %f431, %f433;
+	mov.f32 	%f435, 0f00000000;
+	max.f32 	%f436, %f435, %f434;
+	sqrt.rn.f32 	%f437, %f436;
+	mul.f32 	%f438, %f54, %f432;
+	mul.f32 	%f439, %f55, %f432;
+	mul.f32 	%f440, %f56, %f432;
+	fma.rn.f32 	%f441, %f63, %f428, %f438;
+	fma.rn.f32 	%f442, %f62, %f428, %f439;
+	fma.rn.f32 	%f443, %f61, %f428, %f440;
+	fma.rn.f32 	%f423, %f807, %f437, %f441;
+	fma.rn.f32 	%f424, %f808, %f437, %f442;
+	fma.rn.f32 	%f425, %f809, %f437, %f443;
+	mov.u32 	%r251, 0;
+	st.local.u32 	[%rd3], %r251;
+	ld.global.u32 	%r250, [root];
+	mov.f32 	%f427, 0f6C4ECB8F;
+	// inline asm
+	call _rt_trace_64, (%r250, %f12, %f13, %f14, %f423, %f424, %f425, %r251, %f67, %f427, %rd57, %r102);
+	// inline asm
+	ld.local.f32 	%f444, [%rd3];
+	setp.lt.f32	%p67, %f444, 0f00000000;
+	selp.f32	%f445, 0f00000000, %f444, %p67;
+	selp.f32	%f446, 0f00000000, 0f3F800000, %p67;
+	add.f32 	%f823, %f823, %f446;
+	add.f32 	%f824, %f824, %f445;
+	add.s32 	%r337, %r337, 1;
+	setp.lt.s32	%p68, %r337, %r1;
+	@%p68 bra 	BB0_28;
+
+	add.s32 	%r335, %r335, 1;
+	setp.lt.s32	%p69, %r335, %r1;
+	@%p69 bra 	BB0_27;
+
+BB0_76:
+	mul.lo.s32 	%r253, %r1, %r1;
+	cvt.rn.f32.s32	%f447, %r253;
+	div.rn.f32 	%f839, %f824, %f447;
+	div.rn.f32 	%f840, %f823, %f447;
+
+BB0_77:
+	ld.global.u32 	%r360, [imageEnabled];
+	and.b32  	%r254, %r360, 8;
+	setp.eq.s32	%p70, %r254, 0;
+	@%p70 bra 	BB0_90;
+
+	mov.u32 	%r325, 2;
+	cvt.u64.u32	%rd65, %r3;
+	cvt.u64.u32	%rd66, %r4;
+	mov.u64 	%rd69, image_Mask;
+	cvta.global.u64 	%rd64, %rd69;
+	// inline asm
+	call (%rd63), _rt_buffer_get_64, (%rd64, %r325, %r325, %rd65, %rd66, %rd24, %rd24);
+	// inline asm
+	mov.f32 	%f450, 0f3E68BA2E;
+	cvt.rzi.f32.f32	%f451, %f450;
+	fma.rn.f32 	%f452, %f451, 0fC0000000, 0f3EE8BA2E;
+	abs.f32 	%f115, %f452;
+	abs.f32 	%f116, %f840;
+	setp.lt.f32	%p71, %f116, 0f00800000;
+	mul.f32 	%f453, %f116, 0f4B800000;
+	selp.f32	%f454, 0fC3170000, 0fC2FE0000, %p71;
+	selp.f32	%f455, %f453, %f116, %p71;
+	mov.b32 	 %r257, %f455;
+	and.b32  	%r258, %r257, 8388607;
+	or.b32  	%r259, %r258, 1065353216;
+	mov.b32 	 %f456, %r259;
+	shr.u32 	%r260, %r257, 23;
+	cvt.rn.f32.u32	%f457, %r260;
+	add.f32 	%f458, %f454, %f457;
+	setp.gt.f32	%p72, %f456, 0f3FB504F3;
+	mul.f32 	%f459, %f456, 0f3F000000;
+	add.f32 	%f460, %f458, 0f3F800000;
+	selp.f32	%f461, %f459, %f456, %p72;
+	selp.f32	%f462, %f460, %f458, %p72;
+	add.f32 	%f463, %f461, 0fBF800000;
+	add.f32 	%f449, %f461, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f448,%f449;
+	// inline asm
+	add.f32 	%f464, %f463, %f463;
+	mul.f32 	%f465, %f448, %f464;
+	mul.f32 	%f466, %f465, %f465;
+	mov.f32 	%f467, 0f3C4CAF63;
+	mov.f32 	%f468, 0f3B18F0FE;
+	fma.rn.f32 	%f469, %f468, %f466, %f467;
+	mov.f32 	%f470, 0f3DAAAABD;
+	fma.rn.f32 	%f471, %f469, %f466, %f470;
+	mul.rn.f32 	%f472, %f471, %f466;
+	mul.rn.f32 	%f473, %f472, %f465;
+	sub.f32 	%f474, %f463, %f465;
+	neg.f32 	%f475, %f465;
+	add.f32 	%f476, %f474, %f474;
+	fma.rn.f32 	%f477, %f475, %f463, %f476;
+	mul.rn.f32 	%f478, %f448, %f477;
+	add.f32 	%f479, %f473, %f465;
+	sub.f32 	%f480, %f465, %f479;
+	add.f32 	%f481, %f473, %f480;
+	add.f32 	%f482, %f478, %f481;
+	add.f32 	%f483, %f479, %f482;
+	sub.f32 	%f484, %f479, %f483;
+	add.f32 	%f485, %f482, %f484;
+	mov.f32 	%f486, 0f3F317200;
+	mul.rn.f32 	%f487, %f462, %f486;
+	mov.f32 	%f488, 0f35BFBE8E;
+	mul.rn.f32 	%f489, %f462, %f488;
+	add.f32 	%f490, %f487, %f483;
+	sub.f32 	%f491, %f487, %f490;
+	add.f32 	%f492, %f483, %f491;
+	add.f32 	%f493, %f485, %f492;
+	add.f32 	%f494, %f489, %f493;
+	add.f32 	%f495, %f490, %f494;
+	sub.f32 	%f496, %f490, %f495;
+	add.f32 	%f497, %f494, %f496;
+	mov.f32 	%f498, 0f3EE8BA2E;
+	mul.rn.f32 	%f499, %f498, %f495;
+	neg.f32 	%f500, %f499;
+	fma.rn.f32 	%f501, %f498, %f495, %f500;
+	fma.rn.f32 	%f502, %f498, %f497, %f501;
+	mov.f32 	%f503, 0f00000000;
+	fma.rn.f32 	%f504, %f503, %f495, %f502;
+	add.rn.f32 	%f505, %f499, %f504;
+	neg.f32 	%f506, %f505;
+	add.rn.f32 	%f507, %f499, %f506;
+	add.rn.f32 	%f508, %f507, %f504;
+	mov.b32 	 %r261, %f505;
+	setp.eq.s32	%p73, %r261, 1118925336;
+	add.s32 	%r262, %r261, -1;
+	mov.b32 	 %f509, %r262;
+	add.f32 	%f510, %f508, 0f37000000;
+	selp.f32	%f511, %f509, %f505, %p73;
+	selp.f32	%f117, %f510, %f508, %p73;
+	mul.f32 	%f512, %f511, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f513, %f512;
+	mov.f32 	%f514, 0fBF317200;
+	fma.rn.f32 	%f515, %f513, %f514, %f511;
+	mov.f32 	%f516, 0fB5BFBE8E;
+	fma.rn.f32 	%f517, %f513, %f516, %f515;
+	mul.f32 	%f518, %f517, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f519, %f518;
+	add.f32 	%f520, %f513, 0f00000000;
+	ex2.approx.f32 	%f521, %f520;
+	mul.f32 	%f522, %f519, %f521;
+	setp.lt.f32	%p74, %f511, 0fC2D20000;
+	selp.f32	%f523, 0f00000000, %f522, %p74;
+	setp.gt.f32	%p75, %f511, 0f42D20000;
+	selp.f32	%f841, 0f7F800000, %f523, %p75;
+	setp.eq.f32	%p76, %f841, 0f7F800000;
+	@%p76 bra 	BB0_80;
+
+	fma.rn.f32 	%f841, %f841, %f117, %f841;
+
+BB0_80:
+	setp.lt.f32	%p77, %f840, 0f00000000;
+	setp.eq.f32	%p78, %f115, 0f3F800000;
+	and.pred  	%p3, %p77, %p78;
+	mov.b32 	 %r263, %f841;
+	xor.b32  	%r264, %r263, -2147483648;
+	mov.b32 	 %f524, %r264;
+	selp.f32	%f843, %f524, %f841, %p3;
+	setp.eq.f32	%p79, %f840, 0f00000000;
+	@%p79 bra 	BB0_83;
+	bra.uni 	BB0_81;
+
+BB0_83:
+	add.f32 	%f527, %f840, %f840;
+	selp.f32	%f843, %f527, 0f00000000, %p78;
+	bra.uni 	BB0_84;
+
+BB0_136:
+	mov.u64 	%rd130, image_HDR;
+	cvta.global.u64 	%rd125, %rd130;
+	mov.u32 	%r322, 8;
+	// inline asm
+	call (%rd124), _rt_buffer_get_64, (%rd125, %r101, %r322, %rd17, %rd18, %rd24, %rd24);
+	// inline asm
+	mov.f32 	%f797, 0f00000000;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs44, %f797;}
+
+	// inline asm
+	mov.u16 	%rs45, 0;
+	st.v4.u16 	[%rd124], {%rs44, %rs44, %rs44, %rs45};
+	bra.uni 	BB0_137;
+
+BB0_81:
+	setp.geu.f32	%p80, %f840, 0f00000000;
+	@%p80 bra 	BB0_84;
+
+	cvt.rzi.f32.f32	%f526, %f498;
+	setp.neu.f32	%p81, %f526, 0f3EE8BA2E;
+	selp.f32	%f843, 0f7FFFFFFF, %f843, %p81;
+
+BB0_84:
+	add.f32 	%f528, %f116, 0f3EE8BA2E;
+	mov.b32 	 %r265, %f528;
+	setp.lt.s32	%p83, %r265, 2139095040;
+	@%p83 bra 	BB0_89;
+
+	setp.gtu.f32	%p84, %f116, 0f7F800000;
+	@%p84 bra 	BB0_88;
+	bra.uni 	BB0_86;
+
+BB0_88:
+	add.f32 	%f843, %f840, 0f3EE8BA2E;
+	bra.uni 	BB0_89;
+
+BB0_86:
+	setp.neu.f32	%p85, %f116, 0f7F800000;
+	@%p85 bra 	BB0_89;
+
+	selp.f32	%f843, 0fFF800000, 0f7F800000, %p3;
+
+BB0_89:
+	mul.f32 	%f529, %f843, 0f437F0000;
+	setp.eq.f32	%p86, %f840, 0f3F800000;
+	selp.f32	%f530, 0f437F0000, %f529, %p86;
+	cvt.rzi.u32.f32	%r266, %f530;
+	cvt.u16.u32	%rs10, %r266;
+	mov.u16 	%rs11, 255;
+	st.v2.u8 	[%rd63], {%rs10, %rs11};
+	ld.global.u32 	%r360, [imageEnabled];
+
+BB0_90:
+	ld.global.f32 	%f531, [lightColor];
+	mul.f32 	%f128, %f839, %f531;
+	ld.global.f32 	%f532, [lightColor+4];
+	mul.f32 	%f129, %f839, %f532;
+	ld.global.f32 	%f533, [lightColor+8];
+	mul.f32 	%f130, %f839, %f533;
+	and.b32  	%r267, %r360, 1;
+	setp.eq.b32	%p87, %r267, 1;
+	@!%p87 bra 	BB0_125;
+	bra.uni 	BB0_91;
+
+BB0_91:
+	mov.f32 	%f536, 0f3E666666;
+	cvt.rzi.f32.f32	%f537, %f536;
+	fma.rn.f32 	%f538, %f537, 0fC0000000, 0f3EE66666;
+	abs.f32 	%f131, %f538;
+	abs.f32 	%f132, %f128;
+	setp.lt.f32	%p88, %f132, 0f00800000;
+	mul.f32 	%f539, %f132, 0f4B800000;
+	selp.f32	%f540, 0fC3170000, 0fC2FE0000, %p88;
+	selp.f32	%f541, %f539, %f132, %p88;
+	mov.b32 	 %r268, %f541;
+	and.b32  	%r269, %r268, 8388607;
+	or.b32  	%r270, %r269, 1065353216;
+	mov.b32 	 %f542, %r270;
+	shr.u32 	%r271, %r268, 23;
+	cvt.rn.f32.u32	%f543, %r271;
+	add.f32 	%f544, %f540, %f543;
+	setp.gt.f32	%p89, %f542, 0f3FB504F3;
+	mul.f32 	%f545, %f542, 0f3F000000;
+	add.f32 	%f546, %f544, 0f3F800000;
+	selp.f32	%f547, %f545, %f542, %p89;
+	selp.f32	%f548, %f546, %f544, %p89;
+	add.f32 	%f549, %f547, 0fBF800000;
+	add.f32 	%f535, %f547, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f534,%f535;
+	// inline asm
+	add.f32 	%f550, %f549, %f549;
+	mul.f32 	%f551, %f534, %f550;
+	mul.f32 	%f552, %f551, %f551;
+	mov.f32 	%f553, 0f3C4CAF63;
+	mov.f32 	%f554, 0f3B18F0FE;
+	fma.rn.f32 	%f555, %f554, %f552, %f553;
+	mov.f32 	%f556, 0f3DAAAABD;
+	fma.rn.f32 	%f557, %f555, %f552, %f556;
+	mul.rn.f32 	%f558, %f557, %f552;
+	mul.rn.f32 	%f559, %f558, %f551;
+	sub.f32 	%f560, %f549, %f551;
+	neg.f32 	%f561, %f551;
+	add.f32 	%f562, %f560, %f560;
+	fma.rn.f32 	%f563, %f561, %f549, %f562;
+	mul.rn.f32 	%f564, %f534, %f563;
+	add.f32 	%f565, %f559, %f551;
+	sub.f32 	%f566, %f551, %f565;
+	add.f32 	%f567, %f559, %f566;
+	add.f32 	%f568, %f564, %f567;
+	add.f32 	%f569, %f565, %f568;
+	sub.f32 	%f570, %f565, %f569;
+	add.f32 	%f571, %f568, %f570;
+	mov.f32 	%f572, 0f3F317200;
+	mul.rn.f32 	%f573, %f548, %f572;
+	mov.f32 	%f574, 0f35BFBE8E;
+	mul.rn.f32 	%f575, %f548, %f574;
+	add.f32 	%f576, %f573, %f569;
+	sub.f32 	%f577, %f573, %f576;
+	add.f32 	%f578, %f569, %f577;
+	add.f32 	%f579, %f571, %f578;
+	add.f32 	%f580, %f575, %f579;
+	add.f32 	%f581, %f576, %f580;
+	sub.f32 	%f582, %f576, %f581;
+	add.f32 	%f583, %f580, %f582;
+	mov.f32 	%f584, 0f3EE66666;
+	mul.rn.f32 	%f585, %f584, %f581;
+	neg.f32 	%f586, %f585;
+	fma.rn.f32 	%f587, %f584, %f581, %f586;
+	fma.rn.f32 	%f588, %f584, %f583, %f587;
+	mov.f32 	%f589, 0f00000000;
+	fma.rn.f32 	%f590, %f589, %f581, %f588;
+	add.rn.f32 	%f591, %f585, %f590;
+	neg.f32 	%f592, %f591;
+	add.rn.f32 	%f593, %f585, %f592;
+	add.rn.f32 	%f594, %f593, %f590;
+	mov.b32 	 %r272, %f591;
+	setp.eq.s32	%p90, %r272, 1118925336;
+	add.s32 	%r273, %r272, -1;
+	mov.b32 	 %f595, %r273;
+	add.f32 	%f596, %f594, 0f37000000;
+	selp.f32	%f597, %f595, %f591, %p90;
+	selp.f32	%f133, %f596, %f594, %p90;
+	mul.f32 	%f598, %f597, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f599, %f598;
+	mov.f32 	%f600, 0fBF317200;
+	fma.rn.f32 	%f601, %f599, %f600, %f597;
+	mov.f32 	%f602, 0fB5BFBE8E;
+	fma.rn.f32 	%f603, %f599, %f602, %f601;
+	mul.f32 	%f604, %f603, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f605, %f604;
+	add.f32 	%f606, %f599, 0f00000000;
+	ex2.approx.f32 	%f607, %f606;
+	mul.f32 	%f608, %f605, %f607;
+	setp.lt.f32	%p91, %f597, 0fC2D20000;
+	selp.f32	%f609, 0f00000000, %f608, %p91;
+	setp.gt.f32	%p92, %f597, 0f42D20000;
+	selp.f32	%f844, 0f7F800000, %f609, %p92;
+	setp.eq.f32	%p93, %f844, 0f7F800000;
+	@%p93 bra 	BB0_93;
+
+	fma.rn.f32 	%f844, %f844, %f133, %f844;
+
+BB0_93:
+	setp.lt.f32	%p94, %f128, 0f00000000;
+	setp.eq.f32	%p95, %f131, 0f3F800000;
+	and.pred  	%p4, %p94, %p95;
+	mov.b32 	 %r274, %f844;
+	xor.b32  	%r275, %r274, -2147483648;
+	mov.b32 	 %f610, %r275;
+	selp.f32	%f846, %f610, %f844, %p4;
+	setp.eq.f32	%p96, %f128, 0f00000000;
+	@%p96 bra 	BB0_96;
+	bra.uni 	BB0_94;
+
+BB0_96:
+	add.f32 	%f613, %f128, %f128;
+	selp.f32	%f846, %f613, 0f00000000, %p95;
+	bra.uni 	BB0_97;
+
+BB0_94:
+	setp.geu.f32	%p97, %f128, 0f00000000;
+	@%p97 bra 	BB0_97;
+
+	cvt.rzi.f32.f32	%f612, %f584;
+	setp.neu.f32	%p98, %f612, 0f3EE66666;
+	selp.f32	%f846, 0f7FFFFFFF, %f846, %p98;
+
+BB0_97:
+	add.f32 	%f614, %f132, 0f3EE66666;
+	mov.b32 	 %r276, %f614;
+	setp.lt.s32	%p100, %r276, 2139095040;
+	@%p100 bra 	BB0_102;
+
+	setp.gtu.f32	%p101, %f132, 0f7F800000;
+	@%p101 bra 	BB0_101;
+	bra.uni 	BB0_99;
+
+BB0_101:
+	add.f32 	%f846, %f128, 0f3EE66666;
+	bra.uni 	BB0_102;
+
+BB0_99:
+	setp.neu.f32	%p102, %f132, 0f7F800000;
+	@%p102 bra 	BB0_102;
+
+	selp.f32	%f846, 0fFF800000, 0f7F800000, %p4;
+
+BB0_102:
+	setp.eq.f32	%p103, %f128, 0f3F800000;
+	selp.f32	%f144, 0f3F800000, %f846, %p103;
+	abs.f32 	%f145, %f129;
+	setp.lt.f32	%p104, %f145, 0f00800000;
+	mul.f32 	%f617, %f145, 0f4B800000;
+	selp.f32	%f618, 0fC3170000, 0fC2FE0000, %p104;
+	selp.f32	%f619, %f617, %f145, %p104;
+	mov.b32 	 %r277, %f619;
+	and.b32  	%r278, %r277, 8388607;
+	or.b32  	%r279, %r278, 1065353216;
+	mov.b32 	 %f620, %r279;
+	shr.u32 	%r280, %r277, 23;
+	cvt.rn.f32.u32	%f621, %r280;
+	add.f32 	%f622, %f618, %f621;
+	setp.gt.f32	%p105, %f620, 0f3FB504F3;
+	mul.f32 	%f623, %f620, 0f3F000000;
+	add.f32 	%f624, %f622, 0f3F800000;
+	selp.f32	%f625, %f623, %f620, %p105;
+	selp.f32	%f626, %f624, %f622, %p105;
+	add.f32 	%f627, %f625, 0fBF800000;
+	add.f32 	%f616, %f625, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f615,%f616;
+	// inline asm
+	add.f32 	%f628, %f627, %f627;
+	mul.f32 	%f629, %f615, %f628;
+	mul.f32 	%f630, %f629, %f629;
+	fma.rn.f32 	%f633, %f554, %f630, %f553;
+	fma.rn.f32 	%f635, %f633, %f630, %f556;
+	mul.rn.f32 	%f636, %f635, %f630;
+	mul.rn.f32 	%f637, %f636, %f629;
+	sub.f32 	%f638, %f627, %f629;
+	neg.f32 	%f639, %f629;
+	add.f32 	%f640, %f638, %f638;
+	fma.rn.f32 	%f641, %f639, %f627, %f640;
+	mul.rn.f32 	%f642, %f615, %f641;
+	add.f32 	%f643, %f637, %f629;
+	sub.f32 	%f644, %f629, %f643;
+	add.f32 	%f645, %f637, %f644;
+	add.f32 	%f646, %f642, %f645;
+	add.f32 	%f647, %f643, %f646;
+	sub.f32 	%f648, %f643, %f647;
+	add.f32 	%f649, %f646, %f648;
+	mul.rn.f32 	%f651, %f626, %f572;
+	mul.rn.f32 	%f653, %f626, %f574;
+	add.f32 	%f654, %f651, %f647;
+	sub.f32 	%f655, %f651, %f654;
+	add.f32 	%f656, %f647, %f655;
+	add.f32 	%f657, %f649, %f656;
+	add.f32 	%f658, %f653, %f657;
+	add.f32 	%f659, %f654, %f658;
+	sub.f32 	%f660, %f654, %f659;
+	add.f32 	%f661, %f658, %f660;
+	mul.rn.f32 	%f663, %f584, %f659;
+	neg.f32 	%f664, %f663;
+	fma.rn.f32 	%f665, %f584, %f659, %f664;
+	fma.rn.f32 	%f666, %f584, %f661, %f665;
+	fma.rn.f32 	%f668, %f589, %f659, %f666;
+	add.rn.f32 	%f669, %f663, %f668;
+	neg.f32 	%f670, %f669;
+	add.rn.f32 	%f671, %f663, %f670;
+	add.rn.f32 	%f672, %f671, %f668;
+	mov.b32 	 %r281, %f669;
+	setp.eq.s32	%p106, %r281, 1118925336;
+	add.s32 	%r282, %r281, -1;
+	mov.b32 	 %f673, %r282;
+	add.f32 	%f674, %f672, 0f37000000;
+	selp.f32	%f675, %f673, %f669, %p106;
+	selp.f32	%f146, %f674, %f672, %p106;
+	mul.f32 	%f676, %f675, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f677, %f676;
+	fma.rn.f32 	%f679, %f677, %f600, %f675;
+	fma.rn.f32 	%f681, %f677, %f602, %f679;
+	mul.f32 	%f682, %f681, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f683, %f682;
+	add.f32 	%f684, %f677, 0f00000000;
+	ex2.approx.f32 	%f685, %f684;
+	mul.f32 	%f686, %f683, %f685;
+	setp.lt.f32	%p107, %f675, 0fC2D20000;
+	selp.f32	%f687, 0f00000000, %f686, %p107;
+	setp.gt.f32	%p108, %f675, 0f42D20000;
+	selp.f32	%f847, 0f7F800000, %f687, %p108;
+	setp.eq.f32	%p109, %f847, 0f7F800000;
+	@%p109 bra 	BB0_104;
+
+	fma.rn.f32 	%f847, %f847, %f146, %f847;
+
+BB0_104:
+	setp.lt.f32	%p110, %f129, 0f00000000;
+	and.pred  	%p5, %p110, %p95;
+	mov.b32 	 %r283, %f847;
+	xor.b32  	%r284, %r283, -2147483648;
+	mov.b32 	 %f688, %r284;
+	selp.f32	%f849, %f688, %f847, %p5;
+	setp.eq.f32	%p112, %f129, 0f00000000;
+	@%p112 bra 	BB0_107;
+	bra.uni 	BB0_105;
+
+BB0_107:
+	add.f32 	%f691, %f129, %f129;
+	selp.f32	%f849, %f691, 0f00000000, %p95;
+	bra.uni 	BB0_108;
+
+BB0_105:
+	setp.geu.f32	%p113, %f129, 0f00000000;
+	@%p113 bra 	BB0_108;
+
+	cvt.rzi.f32.f32	%f690, %f584;
+	setp.neu.f32	%p114, %f690, 0f3EE66666;
+	selp.f32	%f849, 0f7FFFFFFF, %f849, %p114;
+
+BB0_108:
+	add.f32 	%f692, %f145, 0f3EE66666;
+	mov.b32 	 %r285, %f692;
+	setp.lt.s32	%p116, %r285, 2139095040;
+	@%p116 bra 	BB0_113;
+
+	setp.gtu.f32	%p117, %f145, 0f7F800000;
+	@%p117 bra 	BB0_112;
+	bra.uni 	BB0_110;
+
+BB0_112:
+	add.f32 	%f849, %f129, 0f3EE66666;
+	bra.uni 	BB0_113;
+
+BB0_110:
+	setp.neu.f32	%p118, %f145, 0f7F800000;
+	@%p118 bra 	BB0_113;
+
+	selp.f32	%f849, 0fFF800000, 0f7F800000, %p5;
+
+BB0_113:
+	setp.eq.f32	%p119, %f129, 0f3F800000;
+	selp.f32	%f157, 0f3F800000, %f849, %p119;
+	abs.f32 	%f158, %f130;
+	setp.lt.f32	%p120, %f158, 0f00800000;
+	mul.f32 	%f695, %f158, 0f4B800000;
+	selp.f32	%f696, 0fC3170000, 0fC2FE0000, %p120;
+	selp.f32	%f697, %f695, %f158, %p120;
+	mov.b32 	 %r286, %f697;
+	and.b32  	%r287, %r286, 8388607;
+	or.b32  	%r288, %r287, 1065353216;
+	mov.b32 	 %f698, %r288;
+	shr.u32 	%r289, %r286, 23;
+	cvt.rn.f32.u32	%f699, %r289;
+	add.f32 	%f700, %f696, %f699;
+	setp.gt.f32	%p121, %f698, 0f3FB504F3;
+	mul.f32 	%f701, %f698, 0f3F000000;
+	add.f32 	%f702, %f700, 0f3F800000;
+	selp.f32	%f703, %f701, %f698, %p121;
+	selp.f32	%f704, %f702, %f700, %p121;
+	add.f32 	%f705, %f703, 0fBF800000;
+	add.f32 	%f694, %f703, 0f3F800000;
+	// inline asm
+	rcp.approx.ftz.f32 %f693,%f694;
+	// inline asm
+	add.f32 	%f706, %f705, %f705;
+	mul.f32 	%f707, %f693, %f706;
+	mul.f32 	%f708, %f707, %f707;
+	fma.rn.f32 	%f711, %f554, %f708, %f553;
+	fma.rn.f32 	%f713, %f711, %f708, %f556;
+	mul.rn.f32 	%f714, %f713, %f708;
+	mul.rn.f32 	%f715, %f714, %f707;
+	sub.f32 	%f716, %f705, %f707;
+	neg.f32 	%f717, %f707;
+	add.f32 	%f718, %f716, %f716;
+	fma.rn.f32 	%f719, %f717, %f705, %f718;
+	mul.rn.f32 	%f720, %f693, %f719;
+	add.f32 	%f721, %f715, %f707;
+	sub.f32 	%f722, %f707, %f721;
+	add.f32 	%f723, %f715, %f722;
+	add.f32 	%f724, %f720, %f723;
+	add.f32 	%f725, %f721, %f724;
+	sub.f32 	%f726, %f721, %f725;
+	add.f32 	%f727, %f724, %f726;
+	mul.rn.f32 	%f729, %f704, %f572;
+	mul.rn.f32 	%f731, %f704, %f574;
+	add.f32 	%f732, %f729, %f725;
+	sub.f32 	%f733, %f729, %f732;
+	add.f32 	%f734, %f725, %f733;
+	add.f32 	%f735, %f727, %f734;
+	add.f32 	%f736, %f731, %f735;
+	add.f32 	%f737, %f732, %f736;
+	sub.f32 	%f738, %f732, %f737;
+	add.f32 	%f739, %f736, %f738;
+	mul.rn.f32 	%f741, %f584, %f737;
+	neg.f32 	%f742, %f741;
+	fma.rn.f32 	%f743, %f584, %f737, %f742;
+	fma.rn.f32 	%f744, %f584, %f739, %f743;
+	fma.rn.f32 	%f746, %f589, %f737, %f744;
+	add.rn.f32 	%f747, %f741, %f746;
+	neg.f32 	%f748, %f747;
+	add.rn.f32 	%f749, %f741, %f748;
+	add.rn.f32 	%f750, %f749, %f746;
+	mov.b32 	 %r290, %f747;
+	setp.eq.s32	%p122, %r290, 1118925336;
+	add.s32 	%r291, %r290, -1;
+	mov.b32 	 %f751, %r291;
+	add.f32 	%f752, %f750, 0f37000000;
+	selp.f32	%f753, %f751, %f747, %p122;
+	selp.f32	%f159, %f752, %f750, %p122;
+	mul.f32 	%f754, %f753, 0f3FB8AA3B;
+	cvt.rzi.f32.f32	%f755, %f754;
+	fma.rn.f32 	%f757, %f755, %f600, %f753;
+	fma.rn.f32 	%f759, %f755, %f602, %f757;
+	mul.f32 	%f760, %f759, 0f3FB8AA3B;
+	ex2.approx.ftz.f32 	%f761, %f760;
+	add.f32 	%f762, %f755, 0f00000000;
+	ex2.approx.f32 	%f763, %f762;
+	mul.f32 	%f764, %f761, %f763;
+	setp.lt.f32	%p123, %f753, 0fC2D20000;
+	selp.f32	%f765, 0f00000000, %f764, %p123;
+	setp.gt.f32	%p124, %f753, 0f42D20000;
+	selp.f32	%f850, 0f7F800000, %f765, %p124;
+	setp.eq.f32	%p125, %f850, 0f7F800000;
+	@%p125 bra 	BB0_115;
+
+	fma.rn.f32 	%f850, %f850, %f159, %f850;
+
+BB0_115:
+	setp.lt.f32	%p126, %f130, 0f00000000;
+	and.pred  	%p6, %p126, %p95;
+	mov.b32 	 %r292, %f850;
+	xor.b32  	%r293, %r292, -2147483648;
+	mov.b32 	 %f766, %r293;
+	selp.f32	%f852, %f766, %f850, %p6;
+	setp.eq.f32	%p128, %f130, 0f00000000;
+	@%p128 bra 	BB0_118;
+	bra.uni 	BB0_116;
+
+BB0_118:
+	add.f32 	%f769, %f130, %f130;
+	selp.f32	%f852, %f769, 0f00000000, %p95;
+	bra.uni 	BB0_119;
+
+BB0_116:
+	setp.geu.f32	%p129, %f130, 0f00000000;
+	@%p129 bra 	BB0_119;
+
+	cvt.rzi.f32.f32	%f768, %f584;
+	setp.neu.f32	%p130, %f768, 0f3EE66666;
+	selp.f32	%f852, 0f7FFFFFFF, %f852, %p130;
+
+BB0_119:
+	add.f32 	%f770, %f158, 0f3EE66666;
+	mov.b32 	 %r294, %f770;
+	setp.lt.s32	%p132, %r294, 2139095040;
+	@%p132 bra 	BB0_124;
+
+	setp.gtu.f32	%p133, %f158, 0f7F800000;
+	@%p133 bra 	BB0_123;
+	bra.uni 	BB0_121;
+
+BB0_123:
+	add.f32 	%f852, %f130, 0f3EE66666;
+	bra.uni 	BB0_124;
+
+BB0_121:
+	setp.neu.f32	%p134, %f158, 0f7F800000;
+	@%p134 bra 	BB0_124;
+
+	selp.f32	%f852, 0fFF800000, 0f7F800000, %p6;
+
+BB0_124:
+	mov.u32 	%r326, 2;
+	setp.eq.f32	%p135, %f130, 0f3F800000;
+	selp.f32	%f771, 0f3F800000, %f852, %p135;
+	cvt.u64.u32	%rd73, %r4;
+	cvt.u64.u32	%rd72, %r3;
+	mov.u64 	%rd76, image;
+	cvta.global.u64 	%rd71, %rd76;
+	// inline asm
+	call (%rd70), _rt_buffer_get_64, (%rd71, %r326, %r102, %rd72, %rd73, %rd24, %rd24);
+	// inline asm
+	cvt.sat.f32.f32	%f772, %f771;
+	mul.f32 	%f773, %f772, 0f437FFD71;
+	cvt.rzi.u32.f32	%r297, %f773;
+	cvt.sat.f32.f32	%f774, %f157;
+	mul.f32 	%f775, %f774, 0f437FFD71;
+	cvt.rzi.u32.f32	%r298, %f775;
+	cvt.sat.f32.f32	%f776, %f144;
+	mul.f32 	%f777, %f776, 0f437FFD71;
+	cvt.rzi.u32.f32	%r299, %f777;
+	cvt.u16.u32	%rs12, %r297;
+	cvt.u16.u32	%rs13, %r299;
+	cvt.u16.u32	%rs14, %r298;
+	mov.u16 	%rs15, 255;
+	st.v4.u8 	[%rd70], {%rs12, %rs14, %rs13, %rs15};
+	ld.global.u32 	%r360, [imageEnabled];
+
+BB0_125:
+	and.b32  	%r300, %r360, 4;
+	setp.eq.s32	%p136, %r300, 0;
+	@%p136 bra 	BB0_137;
+
+	ld.global.u32 	%r301, [additive];
+	setp.eq.s32	%p137, %r301, 0;
+	cvt.u64.u32	%rd15, %r3;
+	cvt.u64.u32	%rd16, %r4;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs16, %f338;}
+
+	// inline asm
+	@%p137 bra 	BB0_128;
+
+	mov.u32 	%r327, 2;
+	mov.u64 	%rd89, image_HDR;
+	cvta.global.u64 	%rd78, %rd89;
+	mov.u32 	%r305, 8;
+	// inline asm
+	call (%rd77), _rt_buffer_get_64, (%rd78, %r327, %r305, %rd15, %rd16, %rd24, %rd24);
+	// inline asm
+	ld.v4.u16 	{%rs23, %rs24, %rs25, %rs26}, [%rd77];
+	// inline asm
+	{  cvt.f32.f16 %f779, %rs23;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f780, %rs24;}
+
+	// inline asm
+	// inline asm
+	{  cvt.f32.f16 %f781, %rs25;}
+
+	// inline asm
+	// inline asm
+	call (%rd83), _rt_buffer_get_64, (%rd78, %r327, %r305, %rd15, %rd16, %rd24, %rd24);
+	// inline asm
+	add.f32 	%f782, %f128, %f779;
+	add.f32 	%f783, %f129, %f780;
+	add.f32 	%f784, %f130, %f781;
+	// inline asm
+	{  cvt.rn.f16.f32 %rs22, %f784;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs21, %f783;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs20, %f782;}
+
+	// inline asm
+	st.v4.u16 	[%rd83], {%rs20, %rs21, %rs22, %rs16};
+	bra.uni 	BB0_137;
+
+BB0_128:
+	mov.u32 	%r328, 2;
+	mov.u64 	%rd96, image_HDR;
+	cvta.global.u64 	%rd91, %rd96;
+	mov.u32 	%r307, 8;
+	// inline asm
+	call (%rd90), _rt_buffer_get_64, (%rd91, %r328, %r307, %rd15, %rd16, %rd24, %rd24);
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs29, %f130;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs28, %f129;}
+
+	// inline asm
+	// inline asm
+	{  cvt.rn.f16.f32 %rs27, %f128;}
+
+	// inline asm
+	st.v4.u16 	[%rd90], {%rs27, %rs28, %rs29, %rs16};
+
+BB0_137:
+	ret;
+}
+
+