move to self host

1 files changed, 245 insertions, 0 deletions

diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/fixPos1.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/fixPos1.ptx
new file mode 100644
index 00000000..f91be368
--- /dev/null
+++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/fixPos1.ptx
@@ -0,0 +1,245 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: CL-23083092
+// Cuda compilation tools, release 9.1, V9.1.85
+// Based on LLVM 3.4svn
+//
+
+.version 6.1
+.target sm_30
+.address_size 64
+
+	// .globl	_Z6oxMainv
+.global .align 8 .b8 pixelID[8];
+.global .align 8 .b8 resolution[8];
+.global .align 4 .b8 normal[12];
+.global .align 4 .b8 camPos[12];
+.global .align 4 .b8 root[4];
+.global .align 4 .u32 imageEnabled;
+.global .texref lightmap;
+.global .align 16 .b8 tileInfo[16];
+.global .align 4 .u32 additive;
+.global .align 1 .b8 uvfacenormal[1];
+.global .align 1 .b8 uvpos[1];
+.global .align 1 .b8 uvsmoothpos[1];
+.global .align 1 .b8 triangleMarks[1];
+.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
+.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
+.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
+.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
+.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
+.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
+.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
+.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
+.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
+.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
+.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
+.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
+.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
+.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
+.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
+.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
+.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
+
+.visible .entry _Z6oxMainv(
+
+)
+{
+	.local .align 4 .b8 	__local_depot0[4];
+	.reg .b64 	%SP;
+	.reg .b64 	%SPL;
+	.reg .pred 	%p<8>;
+	.reg .b16 	%rs<10>;
+	.reg .f32 	%f<50>;
+	.reg .b32 	%r<46>;
+	.reg .b64 	%rd<51>;
+
+
+	mov.u64 	%rd50, __local_depot0;
+	cvta.local.u64 	%SP, %rd50;
+	ld.global.v2.u32 	{%r4, %r5}, [pixelID];
+	cvt.u64.u32	%rd4, %r4;
+	cvt.u64.u32	%rd5, %r5;
+	mov.u64 	%rd8, uvfacenormal;
+	cvta.global.u64 	%rd3, %rd8;
+	mov.u32 	%r2, 2;
+	mov.u32 	%r3, 4;
+	mov.u64 	%rd7, 0;
+	// inline asm
+	call (%rd2), _rt_buffer_get_64, (%rd3, %r2, %r3, %rd4, %rd5, %rd7, %rd7);
+	// inline asm
+	ld.u32 	%r1, [%rd2];
+	shr.u32 	%r8, %r1, 16;
+	cvt.u16.u32	%rs1, %r8;
+	and.b16  	%rs2, %rs1, 255;
+	cvt.u16.u32	%rs3, %r1;
+	or.b16  	%rs4, %rs3, %rs2;
+	setp.eq.s16	%p1, %rs4, 0;
+	mov.f32 	%f47, 0f00000000;
+	mov.f32 	%f48, %f47;
+	mov.f32 	%f49, %f47;
+	@%p1 bra 	BB0_2;
+
+	ld.u8 	%rs5, [%rd2+1];
+	and.b16  	%rs7, %rs3, 255;
+	cvt.rn.f32.u16	%f11, %rs7;
+	div.rn.f32 	%f12, %f11, 0f437F0000;
+	fma.rn.f32 	%f13, %f12, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f14, %rs5;
+	div.rn.f32 	%f15, %f14, 0f437F0000;
+	fma.rn.f32 	%f16, %f15, 0f40000000, 0fBF800000;
+	cvt.rn.f32.u16	%f17, %rs2;
+	div.rn.f32 	%f18, %f17, 0f437F0000;
+	fma.rn.f32 	%f19, %f18, 0f40000000, 0fBF800000;
+	mul.f32 	%f20, %f16, %f16;
+	fma.rn.f32 	%f21, %f13, %f13, %f20;
+	fma.rn.f32 	%f22, %f19, %f19, %f21;
+	sqrt.rn.f32 	%f23, %f22;
+	rcp.rn.f32 	%f24, %f23;
+	mul.f32 	%f47, %f13, %f24;
+	mul.f32 	%f48, %f16, %f24;
+	mul.f32 	%f49, %f19, %f24;
+
+BB0_2:
+	setp.eq.f32	%p2, %f48, 0f00000000;
+	setp.eq.f32	%p3, %f47, 0f00000000;
+	and.pred  	%p4, %p3, %p2;
+	setp.eq.f32	%p5, %f49, 0f00000000;
+	and.pred  	%p6, %p4, %p5;
+	@%p6 bra 	BB0_5;
+
+	ld.global.v2.u32 	{%r22, %r23}, [pixelID];
+	cvt.u64.u32	%rd11, %r22;
+	cvt.u64.u32	%rd12, %r23;
+	mov.u64 	%rd40, uvpos;
+	cvta.global.u64 	%rd10, %rd40;
+	mov.u32 	%r10, 12;
+	// inline asm
+	call (%rd9), _rt_buffer_get_64, (%rd10, %r2, %r10, %rd11, %rd12, %rd7, %rd7);
+	// inline asm
+	ld.f32 	%f33, [%rd9+8];
+	ld.f32 	%f34, [%rd9+4];
+	ld.f32 	%f35, [%rd9];
+	fma.rn.f32 	%f25, %f47, 0f38D1B717, %f35;
+	fma.rn.f32 	%f26, %f48, 0f38D1B717, %f34;
+	fma.rn.f32 	%f27, %f49, 0f38D1B717, %f33;
+	ld.global.v2.u32 	{%r26, %r27}, [pixelID];
+	cvt.u64.u32	%rd17, %r26;
+	cvt.u64.u32	%rd18, %r27;
+	mov.u64 	%rd41, uvsmoothpos;
+	cvta.global.u64 	%rd16, %rd41;
+	mov.u32 	%r18, 16;
+	// inline asm
+	call (%rd15), _rt_buffer_get_64, (%rd16, %r2, %r18, %rd17, %rd18, %rd7, %rd7);
+	// inline asm
+	ld.f32 	%f36, [%rd15];
+	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
+	cvt.u64.u32	%rd23, %r30;
+	cvt.u64.u32	%rd24, %r31;
+	// inline asm
+	call (%rd21), _rt_buffer_get_64, (%rd16, %r2, %r18, %rd23, %rd24, %rd7, %rd7);
+	// inline asm
+	ld.f32 	%f37, [%rd21+4];
+	ld.global.v2.u32 	{%r34, %r35}, [pixelID];
+	cvt.u64.u32	%rd29, %r34;
+	cvt.u64.u32	%rd30, %r35;
+	// inline asm
+	call (%rd27), _rt_buffer_get_64, (%rd16, %r2, %r18, %rd29, %rd30, %rd7, %rd7);
+	// inline asm
+	ld.f32 	%f38, [%rd27+8];
+	ld.global.v2.u32 	{%r38, %r39}, [pixelID];
+	cvt.u64.u32	%rd35, %r38;
+	cvt.u64.u32	%rd36, %r39;
+	// inline asm
+	call (%rd33), _rt_buffer_get_64, (%rd16, %r2, %r18, %rd35, %rd36, %rd7, %rd7);
+	// inline asm
+	ld.f32 	%f7, [%rd33+12];
+	sub.f32 	%f39, %f36, %f35;
+	sub.f32 	%f40, %f37, %f34;
+	sub.f32 	%f41, %f38, %f33;
+	mul.f32 	%f42, %f40, %f40;
+	fma.rn.f32 	%f43, %f39, %f39, %f42;
+	fma.rn.f32 	%f44, %f41, %f41, %f43;
+	sqrt.rn.f32 	%f32, %f44;
+	rcp.rn.f32 	%f45, %f32;
+	mul.f32 	%f28, %f39, %f45;
+	mul.f32 	%f29, %f40, %f45;
+	mul.f32 	%f30, %f41, %f45;
+	add.u64 	%rd39, %SP, 0;
+	cvta.to.local.u64 	%rd42, %rd39;
+	mov.u32 	%r42, -1082130432;
+	st.local.u32 	[%rd42], %r42;
+	ld.global.u32 	%r19, [root];
+	mov.u32 	%r20, 0;
+	mov.f32 	%f31, 0f38D1B717;
+	// inline asm
+	call _rt_trace_64, (%r19, %f25, %f26, %f27, %f28, %f29, %f30, %r20, %f31, %f32, %rd39, %r3);
+	// inline asm
+	ld.local.f32 	%f46, [%rd42];
+	setp.ltu.f32	%p7, %f46, 0f00000000;
+	@%p7 bra 	BB0_5;
+
+	cvt.rzi.u32.f32	%r45, %f7;
+	cvt.u64.u32	%rd45, %r45;
+	mov.u64 	%rd49, triangleMarks;
+	cvta.global.u64 	%rd44, %rd49;
+	mov.u32 	%r44, 1;
+	// inline asm
+	call (%rd43), _rt_buffer_get_64, (%rd44, %r44, %r44, %rd45, %rd7, %rd7, %rd7);
+	// inline asm
+	mov.u16 	%rs9, 255;
+	st.u8 	[%rd43], %rs9;
+
+BB0_5:
+	ret;
+}
+
+