diff options
Diffstat (limited to 'src/arch/x86_common/drivers')
| -rw-r--r-- | src/arch/x86_common/drivers/bochs.c | 72 | ||||
| -rw-r--r-- | src/arch/x86_common/drivers/pci.c | 57 | ||||
| -rw-r--r-- | src/arch/x86_common/drivers/pic.c | 89 | ||||
| -rw-r--r-- | src/arch/x86_common/drivers/serial.c | 47 |
4 files changed, 265 insertions, 0 deletions
diff --git a/src/arch/x86_common/drivers/bochs.c b/src/arch/x86_common/drivers/bochs.c new file mode 100644 index 0000000..8e9ca2b --- /dev/null +++ b/src/arch/x86_common/drivers/bochs.c @@ -0,0 +1,72 @@ +#include <lib.h> +#include <memory.h> +#include <stdint.h> +#include <panic.h> +#include <pci.h> +#include <bochs.h> +#include <bindings.h> + +#define INDEX 0x1CE +#define DATA 0x1CF + +#define INDEX_ID 0 +#define INDEX_XRES 1 +#define INDEX_YRES 2 +#define INDEX_BPP 3 +#define INDEX_ENABLE 4 +#define INDEX_BANK 5 +#define INDEX_VIRT_WIDTH 6 +#define INDEX_VIRT_HEIGHT 7 +#define INDEX_X_OFFSET 8 +#define INDEX_Y_OFFSET 9 + +#define DATA_DISP_DISABLE 0x00 +#define DATA_DISP_ENABLE 0x01 +#define DATA_LFB_ENABLE 0x40 +#define DATA_NO_CLEAR_MEM 0x80 + +#define BOCHS_PCI_VENDOR 0x1234 +#define BOCHS_PCI_DEVICE 0x1111 + +static void write(uint16_t index, uint16_t data) { + outw(INDEX, index); + outw(DATA, data); +} + +static uint16_t read(uint16_t value) { + outw(INDEX, value); + return inw(DATA); +} + +static int is_available(void) { + return (read(INDEX_ID) == 0xB0C5); +} + +static void set_mode(uint16_t width, uint16_t height, uint16_t bit_depth, int lfb, int clear) { + write(INDEX_ENABLE, DATA_DISP_DISABLE); + write(INDEX_XRES, width); + write(INDEX_YRES, height); + write(INDEX_BPP, bit_depth); + write(INDEX_ENABLE, DATA_DISP_ENABLE | + (lfb ? DATA_LFB_ENABLE : 0) | + (clear ? 0 : DATA_NO_CLEAR_MEM)); +} + +volatile uint32_t *bochs_init(uint16_t width, uint16_t height, uint8_t bit_depth) { + + set_mode(width, height, bit_depth, true, true); + + if (!is_available()) + return NULL; + + struct pci_device bochs = {0}; + bool found = pci_findby_id(&bochs, BOCHS_PCI_DEVICE, BOCHS_PCI_VENDOR, NULL); + if (!found) + return NULL; + + uint32_t bar0 = pci_rcfg_d(bochs, PCI_BAR0_D); + uint32_t *addr = (uint32_t *) (uintptr_t) bar0; + addr = mmap(addr, width * height * bit_depth); + + return addr; +} diff --git a/src/arch/x86_common/drivers/pci.c b/src/arch/x86_common/drivers/pci.c new file mode 100644 index 0000000..579562a --- /dev/null +++ b/src/arch/x86_common/drivers/pci.c @@ -0,0 +1,57 @@ +#include <pci.h> +#include <bindings.h> + +#define PCI_INTERNAL +#include <sys/pci.h> + +#define CONF_ADDR 0xCF8 +#define CONF_DATA 0xCFC + +uint32_t pci_sys_rcfg_d(struct pci_device dev, uint8_t offset) { + uint32_t addr = 0x80000000; + addr |= ((uint32_t)dev.bus) << 16; + addr |= ((uint32_t)dev.device) << 11; + addr |= ((uint32_t)dev.function) << 8; + addr |= offset & 0xFC; + + outl(CONF_ADDR, addr); + uint32_t in = inl(CONF_DATA); + return in; +} + +uint16_t pci_sys_rcfg_w(struct pci_device dev, uint8_t offset) { + uint32_t dword = pci_sys_rcfg_d(dev, offset); + return (uint16_t)((dword >> ((offset & 2) * 8)) & 0xFFFF); +} + +uint8_t pci_sys_rcfg_b(struct pci_device dev, uint8_t offset) { + uint32_t dword = pci_sys_rcfg_d(dev, offset); + return (uint8_t)((dword >> ((offset & 3) * 8)) & 0xFF); +} + +void pci_sys_wcfg_d(struct pci_device dev, uint8_t offset, uint32_t dword) { + uint32_t addr = 0x80000000; + addr |= ((uint32_t)dev.bus) << 16; + addr |= ((uint32_t)dev.device) << 11; + addr |= ((uint32_t)dev.function) << 8; + addr |= offset & 0xFC; + + outl(CONF_ADDR, addr); + outl(CONF_DATA, dword); +} + +void pci_sys_wcfg_w(struct pci_device dev, uint8_t offset, uint16_t word) { + size_t shift = (offset & 2) * 8; + uint32_t dword = pci_sys_rcfg_d(dev, offset); + dword &= ~(0xFFFF << shift); + dword |= word << shift; + pci_sys_wcfg_d(dev, offset, dword); +} + +void pci_sys_wcfg_b(struct pci_device dev, uint8_t offset, uint8_t byte) { + size_t shift = (offset & 3) * 8; + uint32_t dword = pci_sys_rcfg_d(dev, offset); + dword &= ~(0xFF << shift); + dword |= byte << shift; + pci_sys_wcfg_d(dev, offset, dword); +} diff --git a/src/arch/x86_common/drivers/pic.c b/src/arch/x86_common/drivers/pic.c new file mode 100644 index 0000000..d911648 --- /dev/null +++ b/src/arch/x86_common/drivers/pic.c @@ -0,0 +1,89 @@ +#include <bindings.h> +#include <pic.h> + +#define PIC1 0x20 /* IO base address for master PIC */ +#define PIC2 0xA0 /* IO base address for slave PIC */ +#define PIC1_COMMAND PIC1 +#define PIC1_DATA (PIC1+1) +#define PIC2_COMMAND PIC2 +#define PIC2_DATA (PIC2+1) + +#define PIC_EOI 0x20 /* End-of-interrupt command code */ + +#define ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */ +#define ICW1_SINGLE 0x02 /* Single (cascade) mode */ +#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */ +#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */ +#define ICW1_INIT 0x10 /* Initialization - required! */ + +#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */ +#define ICW4_AUTO 0x02 /* Auto (normal) EOI */ +#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */ +#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */ +#define ICW4_SFNM 0x10 /* Special fully nested (not) */ + +void pic_remap(void) { + uint8_t a1, a2; + + a1 = inb(PIC1_DATA); // save masks + a2 = inb(PIC2_DATA); + + outb(PIC1_COMMAND, ICW1_INIT | ICW1_ICW4); // starts the initialization sequence (in cascade mode) + io_wait(); + outb(PIC2_COMMAND, ICW1_INIT | ICW1_ICW4); + io_wait(); + outb(PIC1_DATA, PIC_REMAP_OFFSET); // ICW2: Master PIC vector offset + io_wait(); + outb(PIC2_DATA, PIC_REMAP_OFFSET + 8); // ICW2: Slave PIC vector offset + io_wait(); + outb(PIC1_DATA, 4); // ICW3: tell Master PIC that there is a slave PIC at IRQ2 (0000 0100) + io_wait(); + outb(PIC2_DATA, 2); // ICW3: tell Slave PIC its cascade identity (0000 0010) + io_wait(); + + outb(PIC1_DATA, ICW4_8086); // ICW4: have the PICs use 8086 mode (and not 8080 mode) + io_wait(); + outb(PIC2_DATA, ICW4_8086); + io_wait(); + + outb(PIC1_DATA, a1); // restore saved masks. + outb(PIC2_DATA, a2); +} + +void pic_mask(int irq) { + uint16_t port; + uint8_t mask; + if (irq < 8) { + port = PIC1_DATA; + } else { + port = PIC2_DATA; + irq -= 8; + } + mask = inb(port) | (1 << irq); + outb(port, mask); +} + +void pic_unmask(int irq) { + uint16_t port; + uint8_t mask; + if (irq < 8) { + port = PIC1_DATA; + } else { + irq -= 8; + port = PIC2_DATA; + } + mask = inb(port) & ~(1 << irq); + outb(port, mask); +} + +void pic_disable(void) { + outb(PIC1_DATA, 0xff); + outb(PIC2_DATA, 0xff); +} + +void pic_eoi(int irq) { + if (irq >= 8) { + outb(PIC2_COMMAND, PIC_EOI); + } + outb(PIC1_COMMAND, PIC_EOI); +} diff --git a/src/arch/x86_common/drivers/serial.c b/src/arch/x86_common/drivers/serial.c new file mode 100644 index 0000000..255f8fc --- /dev/null +++ b/src/arch/x86_common/drivers/serial.c @@ -0,0 +1,47 @@ +#include <serial.h> +#include <bindings.h> + +#define PORT 0x3F8 + +// initialize the specified COM port for serial +// see https://wiki.osdev.org/Serial_Ports +// and https://en.wikibooks.org/wiki/Serial_Programming/8250_UART_Programming +int serial_init(void) { + outb(PORT + 1, 0x00); // disable interrupts + outb(PORT + 3, 0x80); // enable DLAB (divisor latch access bit) + outb(PORT + 0, 0x03); // (lo) Set baud divisor to 3 38400 baud + outb(PORT + 1, 0x00); // (hi) + outb(PORT + 3, 0x03); // disable DLAB, set 8 bits per word, one stop bit, no parity + outb(PORT + 2, 0xC7); // enable and clear FIFOs, set to maximum threshold + // outb(port + 4, 0x0B); // TODO copied this from osdev wiki but i don't think you need it here + outb(PORT + 4, 0x1E); // set in loopback mode for test + outb(PORT + 0, 0xAE); // test by sending 0xAE + + uint8_t response = inb(PORT + 0); + if (response != 0xAE) { + // TODO panic here? + return -1; + } + + // disable loopback, enable IRQs + outb(PORT + 4, 0x0F); + return 0; +} + +uint8_t serial_in(void) { + // wait for data to be available + while ((inb(PORT + 5) & 0x01) == 0); + return inb(PORT); +} + +void serial_out(uint8_t ch) { + // wait for output to be free + while ((inb(PORT + 5) & 0x20) == 0); + outb(PORT, ch); +} + +void serial_out_str(const char *str) { + for (; *str != '\0'; str++) { + serial_out(*str); + } +} |