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| author | Freya Murphy <freya@freyacat.org> | 2024-01-31 13:11:47 -0500 |
|---|---|---|
| committer | Freya Murphy <freya@freyacat.org> | 2024-01-31 13:11:47 -0500 |
| commit | 690210c944abe7605e53cf760f4e6b360919838c (patch) | |
| tree | e5678280df939fa0ef892779678fc7488caa1fc1 /src/arch/amd64/boot.S | |
| parent | better mboot and kalloc (diff) | |
| download | corn-690210c944abe7605e53cf760f4e6b360919838c.tar.gz corn-690210c944abe7605e53cf760f4e6b360919838c.tar.bz2 corn-690210c944abe7605e53cf760f4e6b360919838c.zip | |
fix whitespace
Diffstat (limited to 'src/arch/amd64/boot.S')
| -rw-r--r-- | src/arch/amd64/boot.S | 58 |
1 files changed, 29 insertions, 29 deletions
diff --git a/src/arch/amd64/boot.S b/src/arch/amd64/boot.S index 6768beb..55d942b 100644 --- a/src/arch/amd64/boot.S +++ b/src/arch/amd64/boot.S @@ -26,17 +26,17 @@ mb_end: section .bss align 4096 -kernel_pml4: ; reserve memory for initial 512 pml4 entires +kernel_pml4: ; reserve memory for initial 512 pml4 entires resb 4096 -kernel_pdpt_0: ; reserve memory for initial 512 pdpt entires +kernel_pdpt_0: ; reserve memory for initial 512 pdpt entires resb 4096 -kernel_pd_0: ; reserve memory for initial 512 pd entries +kernel_pd_0: ; reserve memory for initial 512 pd entries resb 4096 -kernel_pt_0: ; reserve memory for initial 512 pt entries +kernel_pt_0: ; reserve memory for initial 512 pt entries resb 4096 -paging_pt: ; reserve pages for pager mappings +paging_pt: ; reserve pages for pager mappings resb 4096 -bootstrap_pt: ; reserve pages to bootstrap pager +bootstrap_pt: ; reserve pages to bootstrap pager resb 4096 align 16 @@ -53,33 +53,33 @@ EXEC equ 1 << 3 DC equ 1 << 2 RW equ 1 << 1 ACCESSED equ 1 << 0 - + ; Flags bits GRAN_4K equ 1 << 7 SZ_32 equ 1 << 6 LONG_MODE equ 1 << 5 - + GDT: - .Null: equ $ - GDT - dq 0 - .Code: equ $ - GDT - dd 0xFFFF ; Limit & Base (low, bits 0-15) - db 0 ; Base (mid, bits 16-23) - db PRESENT | NOT_SYS | EXEC | RW ; Access - db GRAN_4K | LONG_MODE | 0xF ; Flags & Limit (high, bits 16-19) - db 0 ; Base (high, bits 24-31) - .Data: equ $ - GDT - dd 0xFFFF ; Limit & Base (low, bits 0-15) - db 0 ; Base (mid, bits 16-23) - db PRESENT | NOT_SYS | RW ; Access - db GRAN_4K | SZ_32 | 0xF ; Flags & Limit (high, bits 16-19) - db 0 ; Base (high, bits 24-31) - .TSS: equ $ - GDT - dd 0x00000068 - dd 0x00CF8900 - .Pointer: - dw $ - GDT - 1 - dq GDT + .Null: equ $ - GDT + dq 0 + .Code: equ $ - GDT + dd 0xFFFF ; Limit & Base (low, bits 0-15) + db 0 ; Base (mid, bits 16-23) + db PRESENT | NOT_SYS | EXEC | RW ; Access + db GRAN_4K | LONG_MODE | 0xF ; Flags & Limit (high, bits 16-19) + db 0 ; Base (high, bits 24-31) + .Data: equ $ - GDT + dd 0xFFFF ; Limit & Base (low, bits 0-15) + db 0 ; Base (mid, bits 16-23) + db PRESENT | NOT_SYS | RW ; Access + db GRAN_4K | SZ_32 | 0xF ; Flags & Limit (high, bits 16-19) + db 0 ; Base (high, bits 24-31) + .TSS: equ $ - GDT + dd 0x00000068 + dd 0x00CF8900 + .Pointer: + dw $ - GDT - 1 + dq GDT section .text align 8 @@ -107,7 +107,7 @@ start: mov ebx, 0x00000003 ; Set the B-register to 0x00000003. mov ecx, 512 ; Set the C-register to 512. - + .SetEntry: mov DWORD [edi], ebx ; Set the uint32_t at the destination index to the B-register. add ebx, 0x1000 ; Add 0x1000 to the B-register. |