diff options
Diffstat (limited to 'boot')
| -rw-r--r-- | boot/include/arch.h | 347 | ||||
| -rw-r--r-- | boot/include/bios.h | 66 | ||||
| -rw-r--r-- | boot/include/bootstrap.h | 100 |
3 files changed, 255 insertions, 258 deletions
diff --git a/boot/include/arch.h b/boot/include/arch.h index 113c76b..a0a0b45 100644 --- a/boot/include/arch.h +++ b/boot/include/arch.h @@ -15,25 +15,25 @@ /* ** Video stuff */ -#define VID_BASE_ADDR 0xB8000 +#define VID_BASE_ADDR 0xB8000 /* ** Memory management */ -#define SEG_PRESENT 0x80 -#define SEG_PL_0 0x00 -#define SEG_PL_1 0x20 -#define SEG_PL_2 0x40 -#define SEG_PL_3 0x50 -#define SEG_SYSTEM 0x00 -#define SEG_NON_SYSTEM 0x10 -#define SEG_32BIT 0x04 -#define DESC_IGATE 0x06 +#define SEG_PRESENT 0x80 +#define SEG_PL_0 0x00 +#define SEG_PL_1 0x20 +#define SEG_PL_2 0x40 +#define SEG_PL_3 0x50 +#define SEG_SYSTEM 0x00 +#define SEG_NON_SYSTEM 0x10 +#define SEG_32BIT 0x04 +#define DESC_IGATE 0x06 /* ** Exceptions */ -#define N_EXCEPTIONS 256 +#define N_EXCEPTIONS 256 /* ** Bit definitions in registers @@ -45,91 +45,91 @@ /* ** EFLAGS */ -#define EFL_RSVD 0xffc00000 /* reserved */ -#define EFL_MB0 0x00008020 /* must be zero */ -#define EFL_MB1 0x00000002 /* must be 1 */ +#define EFL_RSVD 0xffc00000 /* reserved */ +#define EFL_MB0 0x00008020 /* must be zero */ +#define EFL_MB1 0x00000002 /* must be 1 */ -#define EFL_ID 0x00200000 -#define EFL_VIP 0x00100000 -#define EFL_VIF 0x00080000 -#define EFL_AC 0x00040000 -#define EFL_VM 0x00020000 -#define EFL_RF 0x00010000 -#define EFL_NT 0x00004000 +#define EFL_ID 0x00200000 +#define EFL_VIP 0x00100000 +#define EFL_VIF 0x00080000 +#define EFL_AC 0x00040000 +#define EFL_VM 0x00020000 +#define EFL_RF 0x00010000 +#define EFL_NT 0x00004000 #define EFL_IOPL 0x00003000 -#define EFL_OF 0x00000800 -#define EFL_DF 0x00000400 -#define EFL_IF 0x00000200 -#define EFL_TF 0x00000100 -#define EFL_SF 0x00000080 -#define EFL_ZF 0x00000040 -#define EFL_AF 0x00000010 -#define EFL_PF 0x00000004 -#define EFL_CF 0x00000001 +#define EFL_OF 0x00000800 +#define EFL_DF 0x00000400 +#define EFL_IF 0x00000200 +#define EFL_TF 0x00000100 +#define EFL_SF 0x00000080 +#define EFL_ZF 0x00000040 +#define EFL_AF 0x00000010 +#define EFL_PF 0x00000004 +#define EFL_CF 0x00000001 /* ** CR0, CR1, CR2, CR3, CR4 ** ** IA-32 V3, page 2-12. */ -#define CR0_RSVD 0x1ffaffc0 -#define CR0_PG 0x80000000 -#define CR0_CD 0x40000000 -#define CR0_NW 0x20000000 -#define CR0_AM 0x00040000 -#define CR0_WP 0x00010000 -#define CR0_NE 0x00000020 -#define CR0_ET 0x00000010 -#define CR0_TS 0x00000008 -#define CR0_EM 0x00000004 -#define CR0_MP 0x00000002 -#define CR0_PE 0x00000001 +#define CR0_RSVD 0x1ffaffc0 +#define CR0_PG 0x80000000 +#define CR0_CD 0x40000000 +#define CR0_NW 0x20000000 +#define CR0_AM 0x00040000 +#define CR0_WP 0x00010000 +#define CR0_NE 0x00000020 +#define CR0_ET 0x00000010 +#define CR0_TS 0x00000008 +#define CR0_EM 0x00000004 +#define CR0_MP 0x00000002 +#define CR0_PE 0x00000001 -#define CR1_RSVD 0xffffffff +#define CR1_RSVD 0xffffffff -#define CR2_RSVD 0x00000000 +#define CR2_RSVD 0x00000000 #define CR2_PF_LIN_ADDR 0xffffffff -#define CR3_RSVD 0x00000fe7 -#define CR3_PD_BASE 0xfffff000 -#define CR3_PCD 0x00000010 -#define CR3_PWT 0x00000008 +#define CR3_RSVD 0x00000fe7 +#define CR3_PD_BASE 0xfffff000 +#define CR3_PCD 0x00000010 +#define CR3_PWT 0x00000008 -#define CR4_RSVD 0xfd001000 -#define CR4_UINT 0x02000000 -#define CR4_PKS 0x01000000 -#define CR4_CET 0x00800000 -#define CR4_PKE 0x00400000 -#define CR4_SMAP 0x00200000 -#define CR4_SMEP 0x00100000 -#define CR4_KL 0x00080000 -#define CR4_OSXS 0x00040000 -#define CR4_PCID 0x00020000 -#define CR4_FSGS 0x00010000 -#define CR4_SMXE 0x00004000 -#define CR4_VMXE 0x00002000 -#define CR4_LA57 0x00001000 -#define CR4_UMIP 0x00000800 -#define CR4_OSXMMEXCPT 0x00000400 -#define CR4_OSFXSR 0x00000200 -#define CR4_PCE 0x00000100 -#define CR4_PGE 0x00000080 -#define CR4_MCE 0x00000040 -#define CR4_PAE 0x00000020 -#define CR4_PSE 0x00000010 -#define CR4_DE 0x00000008 -#define CR4_TSD 0x00000004 -#define CR4_PVI 0x00000002 -#define CR4_VME 0x00000001 +#define CR4_RSVD 0xfd001000 +#define CR4_UINT 0x02000000 +#define CR4_PKS 0x01000000 +#define CR4_CET 0x00800000 +#define CR4_PKE 0x00400000 +#define CR4_SMAP 0x00200000 +#define CR4_SMEP 0x00100000 +#define CR4_KL 0x00080000 +#define CR4_OSXS 0x00040000 +#define CR4_PCID 0x00020000 +#define CR4_FSGS 0x00010000 +#define CR4_SMXE 0x00004000 +#define CR4_VMXE 0x00002000 +#define CR4_LA57 0x00001000 +#define CR4_UMIP 0x00000800 +#define CR4_OSXMMEXCPT 0x00000400 +#define CR4_OSFXSR 0x00000200 +#define CR4_PCE 0x00000100 +#define CR4_PGE 0x00000080 +#define CR4_MCE 0x00000040 +#define CR4_PAE 0x00000020 +#define CR4_PSE 0x00000010 +#define CR4_DE 0x00000008 +#define CR4_TSD 0x00000004 +#define CR4_PVI 0x00000002 +#define CR4_VME 0x00000001 /* ** PMode segment selector field masks ** ** IA-32 V3, page 3-8. */ -#define SEG_SEL_IX_MASK 0xfff8 -#define SEG_SEL_TI_MASK 0x0004 -#define SEG_SEL_RPL_MASK 0x0003 +#define SEG_SEL_IX_MASK 0xfff8 +#define SEG_SEL_TI_MASK 0x0004 +#define SEG_SEL_RPL_MASK 0x0003 /* ** Segment descriptor bytes @@ -150,43 +150,43 @@ ** 4: system/user ** 3-0: type */ -#define SEG_ACCESS_P_MASK 0x80 -# define SEG_PRESENT 0x80 -# define SEG_NOT_PRESENT 0x00 +#define SEG_ACCESS_P_MASK 0x80 +#define SEG_PRESENT 0x80 +#define SEG_NOT_PRESENT 0x00 -#define SEG_ACCESS_DPL_MASK 0x60 -# define SEG_DPL_0 0x00 -# define SEG_DPL_1 0x20 -# define SEG_DPL_2 0x40 -# define SEG_DPL_3 0x60 +#define SEG_ACCESS_DPL_MASK 0x60 +#define SEG_DPL_0 0x00 +#define SEG_DPL_1 0x20 +#define SEG_DPL_2 0x40 +#define SEG_DPL_3 0x60 -#define SEG_ACCESS_S_MASK 0x10 -# define SEG_SYSTEM 0x00 -# define SEG_NON_SYSTEM 0x10 +#define SEG_ACCESS_S_MASK 0x10 +#define SEG_SYSTEM 0x00 +#define SEG_NON_SYSTEM 0x10 -#define SEG_TYPE_MASK 0x0f -# define SEG_DATA_A_BIT 0x1 -# define SEG_DATA_W_BIT 0x2 -# define SEG_DATA_E_BIT 0x4 -# define SEG_CODE_A_BIT 0x1 -# define SEG_CODE_R_BIT 0x2 -# define SEG_CODE_C_BIT 0x4 -# define SEG_DATA_RO 0x0 -# define SEG_DATA_ROA 0x1 -# define SEG_DATA_RW 0x2 -# define SEG_DATA_RWA 0x3 -# define SEG_DATA_RO_XD 0x4 -# define SEG_DATA_RO_XDA 0x5 -# define SEG_DATA_RW_XW 0x6 -# define SEG_DATA_RW_XWA 0x7 -# define SEG_CODE_XO 0x8 -# define SEG_CODE_XOA 0x9 -# define SEG_CODE_XR 0xa -# define SEG_CODE_XRA 0xb -# define SEG_CODE_XO_C 0xc -# define SEG_CODE_XO_CA 0xd -# define SEG_CODE_XR_C 0xe -# define SEG_CODE_XR_CA 0xf +#define SEG_TYPE_MASK 0x0f +#define SEG_DATA_A_BIT 0x1 +#define SEG_DATA_W_BIT 0x2 +#define SEG_DATA_E_BIT 0x4 +#define SEG_CODE_A_BIT 0x1 +#define SEG_CODE_R_BIT 0x2 +#define SEG_CODE_C_BIT 0x4 +#define SEG_DATA_RO 0x0 +#define SEG_DATA_ROA 0x1 +#define SEG_DATA_RW 0x2 +#define SEG_DATA_RWA 0x3 +#define SEG_DATA_RO_XD 0x4 +#define SEG_DATA_RO_XDA 0x5 +#define SEG_DATA_RW_XW 0x6 +#define SEG_DATA_RW_XWA 0x7 +#define SEG_CODE_XO 0x8 +#define SEG_CODE_XOA 0x9 +#define SEG_CODE_XR 0xa +#define SEG_CODE_XRA 0xb +#define SEG_CODE_XO_C 0xc +#define SEG_CODE_XO_CA 0xd +#define SEG_CODE_XR_C 0xe +#define SEG_CODE_XR_CA 0xf /* ** Byte 6: sizes @@ -197,48 +197,47 @@ ** 3-0: upper 4 bits of limit ** 7: base address 31:24 */ -#define SEG_SIZE_G_MASK 0x80 -# define SEG_GRAN_BYTE 0x00 -# define SEG_GRAN_4KBYTE 0x80 +#define SEG_SIZE_G_MASK 0x80 +#define SEG_GRAN_BYTE 0x00 +#define SEG_GRAN_4KBYTE 0x80 -#define SEG_SIZE_D_B_MASK 0x40 -# define SEG_DB_16BIT 0x00 -# define SEG_DB_32BIT 0x40 +#define SEG_SIZE_D_B_MASK 0x40 +#define SEG_DB_16BIT 0x00 +#define SEG_DB_32BIT 0x40 -#define SEG_SIZE_L_MASK 0x20 -# define SEG_L_64BIT 0x20 -# define SEG_L_32BIT 0x00 +#define SEG_SIZE_L_MASK 0x20 +#define SEG_L_64BIT 0x20 +#define SEG_L_32BIT 0x00 -#define SEG_SIZE_AVL_MASK 0x10 +#define SEG_SIZE_AVL_MASK 0x10 #define SEG_SIZE_LIM_19_16_MASK 0x0f - /* ** System-segment and gate-descriptor types ** ** IA-32 V3, page 3-15. */ - // type 0: reserved +// type 0: reserved #define SEG_SYS_16BIT_TSS_AVAIL 0x1 -#define SEG_SYS_LDT 0x2 -#define SEG_SYS_16BIT_TSS_BUSY 0x3 +#define SEG_SYS_LDT 0x2 +#define SEG_SYS_16BIT_TSS_BUSY 0x3 #define SEG_SYS_16BIT_CALL_GATE 0x4 -#define SEG_SYS_TASK_GATE 0x5 -#define SEG_SYS_16BIT_INT_GATE 0x6 +#define SEG_SYS_TASK_GATE 0x5 +#define SEG_SYS_16BIT_INT_GATE 0x6 #define SEG_SYS_16BIT_TRAP_GATE 0x7 - // type 8: reserved +// type 8: reserved #define SEG_SYS_32BIT_TSS_AVAIL 0x9 - // type A: reserved -#define SEG_SYS_32BIT_TSS_BUSY 0xb +// type A: reserved +#define SEG_SYS_32BIT_TSS_BUSY 0xb #define SEG_SYS_32BIT_CALL_GATE 0xc - // type D: reserved -#define SEG_SYS_32BIT_INT_GATE 0xe +// type D: reserved +#define SEG_SYS_32BIT_INT_GATE 0xe #define SEG_SYS_32BIT_TRAP_GATE 0xf /* ** IDT Descriptors -** +** ** IA-32 V3, page 5-13. ** ** All have a segment selector in bytes 2 and 3; Task Gate descriptors @@ -246,58 +245,58 @@ ** and 7 devoted to the 16 bits of the Offset, with the low nybble of ** byte 4 reserved. */ -#define IDT_PRESENT 0x8000 -#define IDT_DPL_MASK 0x6000 -# define IDT_DPL_0 0x0000 -# define IDT_DPL_1 0x2000 -# define IDT_DPL_2 0x4000 -# define IDT_DPL_3 0x6000 -#define IDT_GATE_TYPE 0x0f00 -# define IDT_TASK_GATE 0x0500 -# define IDT_INT16_GATE 0x0600 -# define IDT_INT32_GATE 0x0e00 -# define IDT_TRAP16_GATE 0x0700 -# define IDT_TRAP32_GATE 0x0f00 +#define IDT_PRESENT 0x8000 +#define IDT_DPL_MASK 0x6000 +#define IDT_DPL_0 0x0000 +#define IDT_DPL_1 0x2000 +#define IDT_DPL_2 0x4000 +#define IDT_DPL_3 0x6000 +#define IDT_GATE_TYPE 0x0f00 +#define IDT_TASK_GATE 0x0500 +#define IDT_INT16_GATE 0x0600 +#define IDT_INT32_GATE 0x0e00 +#define IDT_TRAP16_GATE 0x0700 +#define IDT_TRAP32_GATE 0x0f00 /* ** Interrupt vectors */ // predefined by the architecture -#define VEC_DIVIDE_ERROR 0x00 -#define VEC_DEBUG_EXCEPTION 0x01 -#define VEC_NMI_INTERRUPT 0x02 -#define VEC_BREAKPOINT 0x03 -#define VEC_OVERFLOW 0x04 -#define VEC_BOUND_RANGE_EXCEEDED 0x05 -#define VEC_INVALID_OPCODE 0x06 -#define VEC_DEVICE_NOT_AVAILABLE 0x07 -#define VEC_DOUBLE_FAULT 0x08 -#define VEC_COPROCESSOR_OVERRUN 0x09 -#define VEC_INVALID_TSS 0x0a -#define VEC_SEGMENT_NOT_PRESENT 0x0b -#define VEC_STACK_FAULT 0x0c -#define VEC_GENERAL_PROTECTION 0x0d -#define VEC_PAGE_FAULT 0x0e +#define VEC_DIVIDE_ERROR 0x00 +#define VEC_DEBUG_EXCEPTION 0x01 +#define VEC_NMI_INTERRUPT 0x02 +#define VEC_BREAKPOINT 0x03 +#define VEC_OVERFLOW 0x04 +#define VEC_BOUND_RANGE_EXCEEDED 0x05 +#define VEC_INVALID_OPCODE 0x06 +#define VEC_DEVICE_NOT_AVAILABLE 0x07 +#define VEC_DOUBLE_FAULT 0x08 +#define VEC_COPROCESSOR_OVERRUN 0x09 +#define VEC_INVALID_TSS 0x0a +#define VEC_SEGMENT_NOT_PRESENT 0x0b +#define VEC_STACK_FAULT 0x0c +#define VEC_GENERAL_PROTECTION 0x0d +#define VEC_PAGE_FAULT 0x0e // 0x0f is reserved - unused -#define VEC_FPU_ERROR 0x10 -#define VEC_ALIGNMENT_CHECK 0x11 -#define VEC_MACHINE_CHECK 0x12 -#define VEC_SIMD_FP_EXCEPTION 0x13 -#define VEC_VIRT_EXCEPTION 0x14 -#define VEC_CTRL_PROT_EXCEPTION 0x15 +#define VEC_FPU_ERROR 0x10 +#define VEC_ALIGNMENT_CHECK 0x11 +#define VEC_MACHINE_CHECK 0x12 +#define VEC_SIMD_FP_EXCEPTION 0x13 +#define VEC_VIRT_EXCEPTION 0x14 +#define VEC_CTRL_PROT_EXCEPTION 0x15 // 0x16 through 0x1f are reserved // 0x20 through 0xff are user-defined, non-reserved // IRQ0 through IRQ15 will use vectors 0x20 through 0x2f -#define VEC_TIMER 0x20 -#define VEC_KBD 0x21 -#define VEC_COM2 0x23 -#define VEC_COM1 0x24 -#define VEC_PARALLEL 0x25 -#define VEC_FLOPPY 0x26 -#define VEC_MYSTERY 0x27 -#define VEC_MOUSE 0x2c +#define VEC_TIMER 0x20 +#define VEC_KBD 0x21 +#define VEC_COM2 0x23 +#define VEC_COM1 0x24 +#define VEC_PARALLEL 0x25 +#define VEC_FLOPPY 0x26 +#define VEC_MYSTERY 0x27 +#define VEC_MOUSE 0x2c #endif diff --git a/boot/include/bios.h b/boot/include/bios.h index a19e570..cf9f8ec 100644 --- a/boot/include/bios.h +++ b/boot/include/bios.h @@ -13,61 +13,61 @@ ** BIOS-related memory addresses */ -#define BIOS_BDA 0x0400 +#define BIOS_BDA 0x0400 /* ** Selected BIOS interrupt numbers */ -#define BIOS_TIMER 0x08 -#define BIOS_KBD 0x09 -#define BIOS_VIDEO 0x10 -#define BIOS_EQUIP 0x11 -#define BIOS_MSIZ 0x12 -#define BIOS_DISK 0x13 -#define BIOS_SERIAL 0x14 -#define BIOS_MISC 0x15 -#define BIOS_KBDSVC 0x16 -#define BIOS_PRTSVC 0x17 -#define BIOS_BOOT 0x19 -#define BIOS_RTCPCI 0x1a +#define BIOS_TIMER 0x08 +#define BIOS_KBD 0x09 +#define BIOS_VIDEO 0x10 +#define BIOS_EQUIP 0x11 +#define BIOS_MSIZ 0x12 +#define BIOS_DISK 0x13 +#define BIOS_SERIAL 0x14 +#define BIOS_MISC 0x15 +#define BIOS_KBDSVC 0x16 +#define BIOS_PRTSVC 0x17 +#define BIOS_BOOT 0x19 +#define BIOS_RTCPCI 0x1a // BIOS video commands (AH) -#define BV_W_ADV 0x0e +#define BV_W_ADV 0x0e // BIOS disk commands (AH) -#define BD_RESET 0x00 -#define BD_CHECK 0x01 -#define BD_RDSECT 0x02 -#define BD_WRSECT 0x03 -#define BD_PARAMS 0x08 +#define BD_RESET 0x00 +#define BD_CHECK 0x01 +#define BD_RDSECT 0x02 +#define BD_WRSECT 0x03 +#define BD_PARAMS 0x08 // BIOS disk commands with parameters (AX) -#define BD_READ(n) ((BD_RDSECT << 8) | (n)) -#define BD_READ1 0x0201 +#define BD_READ(n) ((BD_RDSECT << 8) | (n)) +#define BD_READ1 0x0201 // CMOS ports (used for masking NMIs) -#define CMOS_ADDR 0x70 -#define CMOS_DATA 0x71 +#define CMOS_ADDR 0x70 +#define CMOS_DATA 0x71 // important related commands -#define NMI_ENABLE 0x00 -#define NMI_DISABLE 0x80 +#define NMI_ENABLE 0x00 +#define NMI_DISABLE 0x80 /* ** Physical Memory Map Table (0000:2D00 - 0000:7c00) ** ** Primarily used with the BIOS_MISC interrupt */ -#define MMAP_SEG 0x02D0 -#define MMAP_DISP 0x0000 -#define MMAP_ADDR ((MMAP_SEG << 4) + MMAP_DISP) -#define MMAP_SECTORS 0x0a +#define MMAP_SEG 0x02D0 +#define MMAP_DISP 0x0000 +#define MMAP_ADDR ((MMAP_SEG << 4) + MMAP_DISP) +#define MMAP_SECTORS 0x0a -#define MMAP_ENT 24 /* bytes per entry */ -#define MMAP_MAX_ENTS (BOOT_ADDR - MMAP_ADDR - 4) / 24 +#define MMAP_ENT 24 /* bytes per entry */ +#define MMAP_MAX_ENTS (BOOT_ADDR - MMAP_ADDR - 4) / 24 -#define MMAP_CODE 0xE820 /* int 0x15 code */ -#define MMAP_MAGIC_NUM 0x534D4150 /* for 0xE820 interrupt */ +#define MMAP_CODE 0xE820 /* int 0x15 code */ +#define MMAP_MAGIC_NUM 0x534D4150 /* for 0xE820 interrupt */ #endif diff --git a/boot/include/bootstrap.h b/boot/include/bootstrap.h index 856d4eb..103c14f 100644 --- a/boot/include/bootstrap.h +++ b/boot/include/bootstrap.h @@ -9,86 +9,85 @@ ** Addresses where various stuff goes in memory. */ -#ifndef BOOTSTRAP_H_ -#define BOOTSTRAP_H_ +#ifndef BOOTSTRAP_H_ +#define BOOTSTRAP_H_ /* ** The boot device */ -#define BDEV_FLOPPY 0x00 -#define BDEV_USB 0x80 /* hard drive */ +#define BDEV_FLOPPY 0x00 +#define BDEV_USB 0x80 /* hard drive */ -#define BDEV BDEV_USB /* default */ +#define BDEV BDEV_USB /* default */ /* ** Bootstrap definitions */ -#define BOOT_SEG 0x07c0 /* 07c0:0000 */ -#define BOOT_DISP 0x0000 -#define BOOT_ADDR (BOOT_SEG << 4 + BOOT_DISP) +#define BOOT_SEG 0x07c0 /* 07c0:0000 */ +#define BOOT_DISP 0x0000 +#define BOOT_ADDR (BOOT_SEG << 4 + BOOT_DISP) -#define PART2_DISP 0x0200 /* 07c0:0200 */ -#define PART2_ADDR (BOOT_SEG << 4 + PART2_DISP) +#define PART2_DISP 0x0200 /* 07c0:0200 */ +#define PART2_ADDR (BOOT_SEG << 4 + PART2_DISP) -#define SECTOR_SIZE 0x200 /* 512 bytes */ +#define SECTOR_SIZE 0x200 /* 512 bytes */ /* Note: this assumes the bootstrap is two sectors long! */ -#define BOOT_SIZE (SECTOR_SIZE + SECTOR_SIZE) +#define BOOT_SIZE (SECTOR_SIZE + SECTOR_SIZE) -#define OFFSET_LIMIT (0x10000 - SECTOR_SIZE) +#define OFFSET_LIMIT (0x10000 - SECTOR_SIZE) -#define BOOT_SP_DISP 0x4000 /* stack pointer 07c0:4000, or 0xbc00 */ -#define BOOT_SP_ADDR (BOOT_SEG << 4 + BOOT_SP_DISP) - -#define SECTOR1_END (BOOT_ADDR + SECTOR_SIZE) -#define SECTOR2_END (BOOT_ADDR + BOOT_SIZE) +#define BOOT_SP_DISP 0x4000 /* stack pointer 07c0:4000, or 0xbc00 */ +#define BOOT_SP_ADDR (BOOT_SEG << 4 + BOOT_SP_DISP) +#define SECTOR1_END (BOOT_ADDR + SECTOR_SIZE) +#define SECTOR2_END (BOOT_ADDR + BOOT_SIZE) /* ** The target program itself */ -#define TARGET_SEG 0x00001000 /* 1000:0000 */ -#define TARGET_ADDR 0x00010000 /* and upward */ -#define TARGET_STACK 0x00010000 /* and downward */ +#define TARGET_SEG 0x00001000 /* 1000:0000 */ +#define TARGET_ADDR 0x00010000 /* and upward */ +#define TARGET_STACK 0x00010000 /* and downward */ /* ** The Global Descriptor Table (0000:0500 - 0000:2500) */ -#define GDT_SEG 0x00000050 -#define GDT_ADDR 0x00000500 +#define GDT_SEG 0x00000050 +#define GDT_ADDR 0x00000500 - /* segment register values */ -#define GDT_LINEAR 0x0008 /* All of memory, R/W */ -#define GDT_CODE 0x0010 /* All of memory, R/E */ -#define GDT_DATA 0x0018 /* All of memory, R/W */ -#define GDT_STACK 0x0020 /* All of memory, R/W */ +/* segment register values */ +#define GDT_LINEAR 0x0008 /* All of memory, R/W */ +#define GDT_CODE 0x0010 /* All of memory, R/E */ +#define GDT_DATA 0x0018 /* All of memory, R/W */ +#define GDT_STACK 0x0020 /* All of memory, R/W */ /* ** The Interrupt Descriptor Table (0000:2500 - 0000:2D00) */ -#define IDT_SEG 0x00000250 -#define IDT_ADDR 0x00002500 +#define IDT_SEG 0x00000250 +#define IDT_ADDR 0x00002500 /* ** Additional I/O ports used by the bootstrap code */ // keyboard controller -#define KBD_DATA 0x60 -#define KBD_CMD 0x64 -#define KBD_STAT 0x64 +#define KBD_DATA 0x60 +#define KBD_CMD 0x64 +#define KBD_STAT 0x64 // status register bits -#define KBD_OBSTAT 0x01 -#define KBD_IBSTAT 0x02 -#define KBD_SYSFLAG 0x04 -#define KBD_CMDDAT 0x08 +#define KBD_OBSTAT 0x01 +#define KBD_IBSTAT 0x02 +#define KBD_SYSFLAG 0x04 +#define KBD_CMDDAT 0x08 // commands -#define KBD_P1_DISABLE 0xad -#define KBD_P1_ENABLE 0xae -#define KBD_RD_OPORT 0xd0 -#define KBD_WT_OPORT 0xd1 +#define KBD_P1_DISABLE 0xad +#define KBD_P1_ENABLE 0xae +#define KBD_RD_OPORT 0xd0 +#define KBD_WT_OPORT 0xd1 #ifdef ASM_SRC @@ -101,17 +100,16 @@ // .byte granularity byte // .byte upper 8 bits of base // we use 4K units, so we ignore the lower 12 bits of the limit -#define SEGNULL \ - .word 0, 0, 0, 0 +#define SEGNULL .word 0, 0, 0, 0 -#define SEGMENT(base,limit,dpl,type) \ - .word (((limit) >> 12) & 0xffff); \ - .word ((base) & 0xffff) ; \ - .byte (((base) >> 16) & 0xff) ; \ - .byte (SEG_PRESENT | (dpl) | SEG_NON_SYSTEM | (type)) ; \ - .byte (SEG_GRAN_4KBYTE | SEG_DB_32BIT | (((limit) >> 28) & 0xf)) ; \ - .byte (((base) >> 24) & 0xff) +#define SEGMENT(base, limit, dpl, type) \ + .word(((limit) >> 12) & 0xffff); \ + .word((base) & 0xffff); \ + .byte(((base) >> 16) & 0xff); \ + .byte(SEG_PRESENT | (dpl) | SEG_NON_SYSTEM | (type)); \ + .byte(SEG_GRAN_4KBYTE | SEG_DB_32BIT | (((limit) >> 28) & 0xf)); \ + .byte(((base) >> 24) & 0xff) -#endif /* ASM_SRC */ +#endif /* ASM_SRC */ #endif |