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authorFreya Murphy <freya@freyacat.org>2025-04-24 11:32:03 -0400
committerFreya Murphy <freya@freyacat.org>2025-04-24 11:32:03 -0400
commit65f10ab06b9918ee971ec14a3d18db9f27da99c9 (patch)
tree3cae3fbc19d6122da2edc5b069f304d89f7932f4 /kernel/cpu
parentadd tss (diff)
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make 0x80 ring3, add kernel mem ctx switch in idt handler
Diffstat (limited to 'kernel/cpu')
-rw-r--r--kernel/cpu/idt.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/kernel/cpu/idt.c b/kernel/cpu/idt.c
index bf4b499..8bddc21 100644
--- a/kernel/cpu/idt.c
+++ b/kernel/cpu/idt.c
@@ -3,6 +3,7 @@
#include <comus/asm.h>
#include <comus/cpu.h>
#include <comus/drivers/pit.h>
+#include <comus/memory.h>
#include "idt.h"
#include "pic.h"
@@ -66,6 +67,9 @@ void idt_init(void)
entry->isr_mid = (isr >> 16) & 0xffff;
entry->isr_high = (isr >> 32) & 0xffffffff;
entry->reserved = 0;
+
+ if (vector == 0x80)
+ entry->flags |= RING3;
}
__asm__ volatile("lidt %0" : : "m"(idtr));
@@ -116,6 +120,9 @@ void idt_exception_handler(uint64_t exception, uint64_t code,
{
uint64_t cr2;
+ // make sure were in the kernel memory context
+ mem_ctx_switch(kernel_mem_ctx);
+
switch (exception) {
case EX_PAGE_FAULT:
// page faults store the offending address in cr2