From eb84bb298d2b95aec7b2ae12cbf25ac64f25379a Mon Sep 17 00:00:00 2001 From: tylermurphy534 Date: Sun, 6 Nov 2022 15:12:42 -0500 Subject: move to self host --- .../Assets/Editor/x64/Bakery/lmTexAreaLightSH.ptx | 2535 ++++++++++++++++++++ 1 file changed, 2535 insertions(+) create mode 100644 VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightSH.ptx (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightSH.ptx') diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightSH.ptx new file mode 100644 index 00000000..e51b7c9a --- /dev/null +++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmTexAreaLightSH.ptx @@ -0,0 +1,2535 @@ +// +// Generated by NVIDIA NVVM Compiler +// +// Compiler Build ID: CL-23083092 +// Cuda compilation tools, release 9.1, V9.1.85 +// Based on LLVM 3.4svn +// + +.version 6.1 +.target sm_30 +.address_size 64 + + // .globl _Z6oxMainv +.global .align 8 .b8 pixelID[8]; +.global .align 8 .b8 resolution[8]; +.global .align 4 .b8 normal[12]; +.global .align 4 .b8 camPos[12]; +.global .align 4 .b8 root[4]; +.global .align 4 .u32 imageEnabled; +.global .texref lightmap; +.global .align 16 .b8 tileInfo[16]; +.global .align 4 .u32 additive; +.global .align 1 .b8 image[1]; +.global .align 1 .b8 image_HDR[1]; +.global .align 1 .b8 image_HDR2[1]; +.global .align 1 .b8 image_Mask[1]; +.global .align 1 .b8 image_RNM0[1]; +.global .align 1 .b8 image_RNM1[1]; +.global .align 1 .b8 image_RNM2[1]; +.global .align 1 .b8 image_RNM3[1]; +.global .align 1 .b8 uvpos[1]; +.global .align 1 .b8 uvnormal[1]; +.global .align 1 .b8 lightMeshBuffer[1]; +.global .align 4 .u32 lightMeshBufferSize; +.global .align 4 .f32 lightInvCutoff; +.global .align 4 .f32 lightPointSize; +.global .align 4 .b8 lightColor[12]; +.global .align 1 .b8 rnd_seeds[1]; +.global .align 4 .u32 samples; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; +.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; +.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; +.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; +.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; +.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162}; + +.visible .entry _Z6oxMainv( + +) +{ + .local .align 4 .b8 __local_depot0[44]; + .reg .b64 %SP; + .reg .b64 %SPL; + .reg .pred %p<150>; + .reg .b16 %rs<158>; + .reg .f32 %f<1321>; + .reg .b32 %r<419>; + .reg .b64 %rd<317>; + + + mov.u64 %rd316, __local_depot0; + cvta.local.u64 %SP, %rd316; + ld.global.u32 %r1, [samples]; + ld.global.v2.u32 {%r103, %r104}, [pixelID]; + cvt.u64.u32 %rd23, %r103; + cvt.u64.u32 %rd24, %r104; + mov.u64 %rd27, uvnormal; + cvta.global.u64 %rd22, %rd27; + mov.u32 %r101, 2; + mov.u32 %r102, 4; + mov.u64 %rd26, 0; + // inline asm + call (%rd21), _rt_buffer_get_64, (%rd22, %r101, %r102, %rd23, %rd24, %rd26, %rd26); + // inline asm + ld.u32 %r2, [%rd21]; + shr.u32 %r107, %r2, 16; + cvt.u16.u32 %rs1, %r107; + and.b16 %rs7, %rs1, 255; + cvt.u16.u32 %rs8, %r2; + or.b16 %rs9, %rs8, %rs7; + setp.eq.s16 %p7, %rs9, 0; + mov.f32 %f1166, 0f00000000; + mov.f32 %f1167, %f1166; + mov.f32 %f1168, %f1166; + @%p7 bra BB0_2; + + ld.u8 %rs10, [%rd21+1]; + and.b16 %rs12, %rs8, 255; + cvt.rn.f32.u16 %f358, %rs12; + div.rn.f32 %f359, %f358, 0f437F0000; + fma.rn.f32 %f360, %f359, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f361, %rs10; + div.rn.f32 %f362, %f361, 0f437F0000; + fma.rn.f32 %f363, %f362, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f364, %rs7; + div.rn.f32 %f365, %f364, 0f437F0000; + fma.rn.f32 %f366, %f365, 0f40000000, 0fBF800000; + mul.f32 %f367, %f363, %f363; + fma.rn.f32 %f368, %f360, %f360, %f367; + fma.rn.f32 %f369, %f366, %f366, %f368; + sqrt.rn.f32 %f370, %f369; + rcp.rn.f32 %f371, %f370; + mul.f32 %f1166, %f360, %f371; + mul.f32 %f1167, %f363, %f371; + mul.f32 %f1168, %f366, %f371; + +BB0_2: + ld.global.v2.u32 {%r108, %r109}, [pixelID]; + ld.global.v2.u32 {%r111, %r112}, [tileInfo]; + add.s32 %r3, %r108, %r111; + add.s32 %r4, %r109, %r112; + setp.eq.f32 %p8, %f1167, 0f00000000; + setp.eq.f32 %p9, %f1166, 0f00000000; + and.pred %p10, %p9, %p8; + setp.eq.f32 %p11, %f1168, 0f00000000; + and.pred %p12, %p10, %p11; + @%p12 bra BB0_141; + bra.uni BB0_3; + +BB0_141: + ld.global.u32 %r418, [imageEnabled]; + and.b32 %r339, %r418, 1; + setp.eq.b32 %p141, %r339, 1; + @!%p141 bra BB0_143; + bra.uni BB0_142; + +BB0_142: + cvt.u64.u32 %rd196, %r3; + cvt.u64.u32 %rd197, %r4; + mov.u64 %rd200, image; + cvta.global.u64 %rd195, %rd200; + mov.u64 %rd199, 0; + // inline asm + call (%rd194), _rt_buffer_get_64, (%rd195, %r101, %r102, %rd196, %rd197, %rd199, %rd199); + // inline asm + mov.u16 %rs90, 0; + st.v4.u8 [%rd194], {%rs90, %rs90, %rs90, %rs90}; + ld.global.u32 %r418, [imageEnabled]; + +BB0_143: + and.b32 %r342, %r418, 8; + setp.eq.s32 %p142, %r342, 0; + @%p142 bra BB0_145; + + cvt.u64.u32 %rd204, %r4; + cvt.u64.u32 %rd203, %r3; + mov.u64 %rd207, image_Mask; + cvta.global.u64 %rd202, %rd207; + mov.u64 %rd206, 0; + // inline asm + call (%rd201), _rt_buffer_get_64, (%rd202, %r101, %r101, %rd203, %rd204, %rd206, %rd206); + // inline asm + mov.f32 %f1121, 0f00000000; + cvt.rzi.u32.f32 %r345, %f1121; + cvt.u16.u32 %rs91, %r345; + mov.u16 %rs92, 0; + st.v2.u8 [%rd201], {%rs91, %rs92}; + ld.global.u32 %r418, [imageEnabled]; + +BB0_145: + cvt.u64.u32 %rd19, %r3; + cvt.u64.u32 %rd20, %r4; + and.b32 %r346, %r418, 4; + setp.eq.s32 %p143, %r346, 0; + @%p143 bra BB0_149; + + ld.global.u32 %r347, [additive]; + setp.eq.s32 %p144, %r347, 0; + @%p144 bra BB0_148; + + mov.u64 %rd220, image_HDR; + cvta.global.u64 %rd209, %rd220; + mov.u32 %r351, 8; + mov.u64 %rd219, 0; + // inline asm + call (%rd208), _rt_buffer_get_64, (%rd209, %r101, %r351, %rd19, %rd20, %rd219, %rd219); + // inline asm + ld.v4.u16 {%rs99, %rs100, %rs101, %rs102}, [%rd208]; + // inline asm + { cvt.f32.f16 %f1122, %rs99;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1123, %rs100;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1124, %rs101;} + + // inline asm + // inline asm + call (%rd214), _rt_buffer_get_64, (%rd209, %r101, %r351, %rd19, %rd20, %rd219, %rd219); + // inline asm + add.f32 %f1125, %f1122, 0f00000000; + add.f32 %f1126, %f1123, 0f00000000; + add.f32 %f1127, %f1124, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs98, %f1127;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs97, %f1126;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs96, %f1125;} + + // inline asm + mov.u16 %rs103, 0; + st.v4.u16 [%rd214], {%rs96, %rs97, %rs98, %rs103}; + bra.uni BB0_149; + +BB0_3: + ld.global.v2.u32 {%r121, %r122}, [pixelID]; + cvt.u64.u32 %rd30, %r121; + cvt.u64.u32 %rd31, %r122; + mov.u64 %rd40, uvpos; + cvta.global.u64 %rd29, %rd40; + mov.u32 %r117, 12; + // inline asm + call (%rd28), _rt_buffer_get_64, (%rd29, %r101, %r117, %rd30, %rd31, %rd26, %rd26); + // inline asm + ld.f32 %f9, [%rd28+8]; + ld.f32 %f8, [%rd28+4]; + ld.f32 %f7, [%rd28]; + mul.f32 %f388, %f7, 0f3456BF95; + mul.f32 %f389, %f8, 0f3456BF95; + mul.f32 %f390, %f9, 0f3456BF95; + abs.f32 %f10, %f1166; + div.rn.f32 %f391, %f388, %f10; + abs.f32 %f392, %f1167; + div.rn.f32 %f393, %f389, %f392; + abs.f32 %f11, %f1168; + div.rn.f32 %f394, %f390, %f11; + abs.f32 %f395, %f391; + abs.f32 %f396, %f393; + abs.f32 %f397, %f394; + mov.f32 %f398, 0f38D1B717; + max.f32 %f399, %f395, %f398; + max.f32 %f400, %f396, %f398; + max.f32 %f401, %f397, %f398; + fma.rn.f32 %f12, %f1166, %f399, %f7; + fma.rn.f32 %f13, %f1167, %f400, %f8; + fma.rn.f32 %f14, %f1168, %f401, %f9; + ld.global.v2.u32 {%r125, %r126}, [pixelID]; + cvt.u64.u32 %rd36, %r125; + cvt.u64.u32 %rd37, %r126; + mov.u64 %rd41, rnd_seeds; + cvta.global.u64 %rd35, %rd41; + // inline asm + call (%rd34), _rt_buffer_get_64, (%rd35, %r101, %r102, %rd36, %rd37, %rd26, %rd26); + // inline asm + ld.u32 %r129, [%rd34]; + mad.lo.s32 %r5, %r129, 1664525, 1013904223; + ld.global.u32 %r130, [lightMeshBufferSize]; + setp.eq.s32 %p14, %r130, 0; + mov.pred %p13, 0; + mov.f32 %f20, 0f00000000; + mov.u32 %r7, 0; + @%p14 bra BB0_4; + + ld.global.f32 %f15, [lightPointSize]; + mul.f32 %f16, %f12, 0f3456BF95; + mul.f32 %f17, %f13, 0f3456BF95; + mul.f32 %f18, %f14, 0f3456BF95; + and.b32 %r133, %r5, 16777215; + cvt.rn.f32.u32 %f418, %r133; + mul.f32 %f419, %f418, 0fB3800000; + fma.rn.f32 %f19, %f419, 0f3F333333, 0f3F800000; + mov.f32 %f20, 0f00000000; + mov.u32 %r387, 0; + abs.f32 %f542, %f17; + abs.f32 %f543, %f16; + max.f32 %f544, %f543, %f542; + abs.f32 %f545, %f18; + max.f32 %f546, %f544, %f545; + mov.u32 %r7, %r387; + mov.f32 %f21, %f20; + mov.f32 %f22, %f20; + mov.f32 %f23, %f20; + mov.f32 %f24, %f20; + mov.f32 %f25, %f20; + mov.f32 %f26, %f20; + mov.f32 %f27, %f20; + mov.f32 %f28, %f20; + mov.f32 %f29, %f20; + mov.f32 %f30, %f20; + mov.f32 %f31, %f20; + mov.f32 %f32, %f20; + mov.f32 %f33, %f20; + mov.f32 %f34, %f20; + mov.f32 %f35, %f20; + +BB0_6: + mul.lo.s32 %r8, %r387, 3; + cvt.s64.s32 %rd44, %r8; + mov.u64 %rd48, lightMeshBuffer; + cvta.global.u64 %rd43, %rd48; + mov.u32 %r134, 1; + // inline asm + call (%rd42), _rt_buffer_get_64, (%rd43, %r134, %r117, %rd44, %rd26, %rd26, %rd26); + // inline asm + ld.f32 %f420, [%rd42]; + sub.f32 %f421, %f420, %f7; + ld.f32 %f422, [%rd42+4]; + sub.f32 %f423, %f422, %f8; + ld.f32 %f424, [%rd42+8]; + sub.f32 %f425, %f424, %f9; + mul.f32 %f426, %f423, %f423; + fma.rn.f32 %f427, %f421, %f421, %f426; + fma.rn.f32 %f428, %f425, %f425, %f427; + sqrt.rn.f32 %f36, %f428; + rcp.rn.f32 %f429, %f36; + mul.f32 %f37, %f421, %f429; + mul.f32 %f38, %f423, %f429; + mul.f32 %f39, %f425, %f429; + mul.f32 %f430, %f1167, %f38; + fma.rn.f32 %f431, %f1166, %f37, %f430; + fma.rn.f32 %f40, %f1168, %f39, %f431; + setp.leu.f32 %p15, %f40, 0f00000000; + @%p15 bra BB0_22; + + setp.ne.s32 %p17, %r1, 0; + mul.f32 %f432, %f36, %f36; + mul.f32 %f433, %f432, 0f40C90FDB; + div.rn.f32 %f434, %f15, %f433; + add.f32 %f41, %f434, %f434; + setp.gt.f32 %p18, %f41, %f19; + and.pred %p19, %p17, %p18; + mov.pred %p149, -1; + @%p19 bra BB0_24; + + ld.global.f32 %f437, [lightInvCutoff]; + mul.f32 %f42, %f36, %f437; + mov.f32 %f441, 0f40800000; + abs.f32 %f44, %f42; + setp.lt.f32 %p20, %f44, 0f00800000; + mul.f32 %f443, %f44, 0f4B800000; + selp.f32 %f444, 0fC3170000, 0fC2FE0000, %p20; + selp.f32 %f445, %f443, %f44, %p20; + mov.b32 %r136, %f445; + and.b32 %r137, %r136, 8388607; + or.b32 %r138, %r137, 1065353216; + mov.b32 %f446, %r138; + shr.u32 %r139, %r136, 23; + cvt.rn.f32.u32 %f447, %r139; + add.f32 %f448, %f444, %f447; + setp.gt.f32 %p21, %f446, 0f3FB504F3; + mul.f32 %f449, %f446, 0f3F000000; + add.f32 %f450, %f448, 0f3F800000; + selp.f32 %f451, %f449, %f446, %p21; + selp.f32 %f452, %f450, %f448, %p21; + add.f32 %f453, %f451, 0fBF800000; + add.f32 %f436, %f451, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f435,%f436; + // inline asm + add.f32 %f454, %f453, %f453; + mul.f32 %f455, %f435, %f454; + mul.f32 %f456, %f455, %f455; + mov.f32 %f457, 0f3C4CAF63; + mov.f32 %f458, 0f3B18F0FE; + fma.rn.f32 %f459, %f458, %f456, %f457; + mov.f32 %f460, 0f3DAAAABD; + fma.rn.f32 %f461, %f459, %f456, %f460; + mul.rn.f32 %f462, %f461, %f456; + mul.rn.f32 %f463, %f462, %f455; + sub.f32 %f464, %f453, %f455; + neg.f32 %f465, %f455; + add.f32 %f466, %f464, %f464; + fma.rn.f32 %f467, %f465, %f453, %f466; + mul.rn.f32 %f468, %f435, %f467; + add.f32 %f469, %f463, %f455; + sub.f32 %f470, %f455, %f469; + add.f32 %f471, %f463, %f470; + add.f32 %f472, %f468, %f471; + add.f32 %f473, %f469, %f472; + sub.f32 %f474, %f469, %f473; + add.f32 %f475, %f472, %f474; + mov.f32 %f476, 0f3F317200; + mul.rn.f32 %f477, %f452, %f476; + mov.f32 %f478, 0f35BFBE8E; + mul.rn.f32 %f479, %f452, %f478; + add.f32 %f480, %f477, %f473; + sub.f32 %f481, %f477, %f480; + add.f32 %f482, %f473, %f481; + add.f32 %f483, %f475, %f482; + add.f32 %f484, %f479, %f483; + add.f32 %f485, %f480, %f484; + sub.f32 %f486, %f480, %f485; + add.f32 %f487, %f484, %f486; + mul.rn.f32 %f488, %f441, %f485; + neg.f32 %f489, %f488; + fma.rn.f32 %f490, %f441, %f485, %f489; + fma.rn.f32 %f491, %f441, %f487, %f490; + mov.f32 %f492, 0f00000000; + fma.rn.f32 %f493, %f492, %f485, %f491; + add.rn.f32 %f494, %f488, %f493; + neg.f32 %f495, %f494; + add.rn.f32 %f496, %f488, %f495; + add.rn.f32 %f497, %f496, %f493; + mov.b32 %r140, %f494; + setp.eq.s32 %p22, %r140, 1118925336; + add.s32 %r141, %r140, -1; + mov.b32 %f498, %r141; + add.f32 %f499, %f497, 0f37000000; + selp.f32 %f500, %f498, %f494, %p22; + selp.f32 %f45, %f499, %f497, %p22; + mul.f32 %f501, %f500, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f502, %f501; + mov.f32 %f503, 0fBF317200; + fma.rn.f32 %f504, %f502, %f503, %f500; + mov.f32 %f505, 0fB5BFBE8E; + fma.rn.f32 %f506, %f502, %f505, %f504; + mul.f32 %f507, %f506, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f508, %f507; + add.f32 %f509, %f502, 0f00000000; + ex2.approx.f32 %f510, %f509; + mul.f32 %f511, %f508, %f510; + setp.lt.f32 %p23, %f500, 0fC2D20000; + selp.f32 %f512, 0f00000000, %f511, %p23; + setp.gt.f32 %p24, %f500, 0f42D20000; + selp.f32 %f1185, 0f7F800000, %f512, %p24; + setp.eq.f32 %p25, %f1185, 0f7F800000; + @%p25 bra BB0_10; + + fma.rn.f32 %f1185, %f1185, %f45, %f1185; + +BB0_10: + mov.f32 %f1162, 0f40000000; + cvt.rzi.f32.f32 %f1161, %f1162; + add.f32 %f1160, %f1161, %f1161; + mov.f32 %f1159, 0f40800000; + sub.f32 %f1158, %f1159, %f1160; + abs.f32 %f1157, %f1158; + setp.lt.f32 %p26, %f42, 0f00000000; + setp.eq.f32 %p27, %f1157, 0f3F800000; + and.pred %p1, %p26, %p27; + mov.b32 %r142, %f1185; + xor.b32 %r143, %r142, -2147483648; + mov.b32 %f513, %r143; + selp.f32 %f1187, %f513, %f1185, %p1; + setp.eq.f32 %p28, %f42, 0f00000000; + @%p28 bra BB0_13; + bra.uni BB0_11; + +BB0_13: + add.f32 %f516, %f42, %f42; + selp.f32 %f1187, %f516, 0f00000000, %p27; + bra.uni BB0_14; + +BB0_11: + setp.geu.f32 %p29, %f42, 0f00000000; + @%p29 bra BB0_14; + + mov.f32 %f1165, 0f40800000; + cvt.rzi.f32.f32 %f515, %f1165; + setp.neu.f32 %p30, %f515, 0f40800000; + selp.f32 %f1187, 0f7FFFFFFF, %f1187, %p30; + +BB0_14: + add.f32 %f517, %f44, 0f40800000; + mov.b32 %r144, %f517; + setp.lt.s32 %p32, %r144, 2139095040; + @%p32 bra BB0_19; + + setp.gtu.f32 %p33, %f44, 0f7F800000; + @%p33 bra BB0_18; + bra.uni BB0_16; + +BB0_18: + add.f32 %f1187, %f42, 0f40800000; + bra.uni BB0_19; + +BB0_16: + setp.neu.f32 %p34, %f44, 0f7F800000; + @%p34 bra BB0_19; + + selp.f32 %f1187, 0fFF800000, 0f7F800000, %p1; + +BB0_19: + mov.u32 %r383, 1; + mov.u64 %rd309, lightMeshBuffer; + cvta.global.u64 %rd308, %rd309; + mul.lo.s32 %r382, %r387, 3; + mov.f32 %f518, 0f3F800000; + sub.f32 %f519, %f518, %f1187; + setp.eq.f32 %p35, %f42, 0f3F800000; + selp.f32 %f520, 0f00000000, %f519, %p35; + cvt.sat.f32.f32 %f521, %f520; + mul.f32 %f522, %f41, %f521; + add.s32 %r147, %r382, 1; + cvt.s64.s32 %rd51, %r147; + // inline asm + call (%rd49), _rt_buffer_get_64, (%rd308, %r383, %r117, %rd51, %rd26, %rd26, %rd26); + // inline asm + ld.f32 %f523, [%rd49]; + mul.f32 %f524, %f37, %f523; + ld.f32 %f525, [%rd49+4]; + mul.f32 %f526, %f38, %f525; + neg.f32 %f527, %f526; + sub.f32 %f528, %f527, %f524; + ld.f32 %f529, [%rd49+8]; + mul.f32 %f530, %f39, %f529; + sub.f32 %f531, %f528, %f530; + cvt.sat.f32.f32 %f532, %f531; + mul.f32 %f56, %f522, %f532; + setp.leu.f32 %p36, %f56, 0f3727C5AC; + @%p36 bra BB0_21; + + mov.u32 %r386, 1; + mov.u64 %rd311, lightMeshBuffer; + cvta.global.u64 %rd310, %rd311; + mul.lo.s32 %r385, %r387, 3; + cvt.sat.f32.f32 %f541, %f40; + add.u64 %rd56, %SP, 12; + cvta.to.local.u64 %rd63, %rd56; + max.f32 %f539, %f546, %f398; + sub.f32 %f540, %f36, %f539; + mov.u32 %r153, 1065353216; + st.local.u32 [%rd63], %r153; + ld.global.u32 %r148, [root]; + // inline asm + call _rt_trace_64, (%r148, %f12, %f13, %f14, %f37, %f38, %f39, %r386, %f539, %f540, %rd56, %r102); + // inline asm + add.s32 %r154, %r385, 2; + cvt.s64.s32 %rd59, %r154; + // inline asm + call (%rd57), _rt_buffer_get_64, (%rd310, %r386, %r117, %rd59, %rd26, %rd26, %rd26); + // inline asm + ld.f32 %f548, [%rd57]; + ld.local.f32 %f549, [%rd63]; + mul.f32 %f550, %f549, %f548; + ld.f32 %f551, [%rd57+4]; + mul.f32 %f552, %f549, %f551; + ld.f32 %f553, [%rd57+8]; + mul.f32 %f554, %f549, %f553; + mul.f32 %f555, %f56, %f550; + mul.f32 %f556, %f56, %f552; + mul.f32 %f557, %f56, %f554; + fma.rn.f32 %f23, %f541, %f555, %f23; + fma.rn.f32 %f22, %f541, %f556, %f22; + fma.rn.f32 %f21, %f541, %f557, %f21; + mul.f32 %f558, %f40, 0f40800000; + cvt.sat.f32.f32 %f559, %f558; + mul.f32 %f560, %f555, %f559; + mul.f32 %f561, %f556, %f559; + mul.f32 %f562, %f559, %f557; + fma.rn.f32 %f29, %f37, %f560, %f29; + fma.rn.f32 %f28, %f37, %f561, %f28; + fma.rn.f32 %f27, %f37, %f562, %f27; + fma.rn.f32 %f32, %f38, %f560, %f32; + fma.rn.f32 %f31, %f38, %f561, %f31; + fma.rn.f32 %f30, %f38, %f562, %f30; + fma.rn.f32 %f35, %f39, %f560, %f35; + fma.rn.f32 %f34, %f39, %f561, %f34; + fma.rn.f32 %f33, %f39, %f562, %f33; + add.f32 %f26, %f26, %f560; + add.f32 %f25, %f25, %f561; + add.f32 %f24, %f24, %f562; + add.f32 %f20, %f20, %f549; + +BB0_21: + add.s32 %r7, %r7, 1; + +BB0_22: + ld.global.u32 %r155, [lightMeshBufferSize]; + add.s32 %r387, %r387, 1; + setp.lt.u32 %p38, %r387, %r155; + @%p38 bra BB0_6; + bra.uni BB0_23; + +BB0_4: + mov.f32 %f21, %f20; + mov.f32 %f22, %f20; + mov.f32 %f23, %f20; + mov.f32 %f24, %f20; + mov.f32 %f25, %f20; + mov.f32 %f26, %f20; + mov.f32 %f27, %f20; + mov.f32 %f28, %f20; + mov.f32 %f29, %f20; + mov.f32 %f30, %f20; + mov.f32 %f31, %f20; + mov.f32 %f32, %f20; + mov.f32 %f33, %f20; + mov.f32 %f34, %f20; + mov.f32 %f35, %f20; + +BB0_23: + mov.pred %p149, %p13; + +BB0_24: + cvt.rn.f32.s32 %f563, %r7; + mov.f32 %f564, 0f3F800000; + max.f32 %f565, %f563, %f564; + rcp.rn.f32 %f566, %f565; + mul.f32 %f1305, %f23, %f566; + mul.f32 %f1306, %f22, %f566; + mul.f32 %f1307, %f21, %f566; + div.rn.f32 %f1308, %f20, %f565; + mul.f32 %f1302, %f26, %f566; + mul.f32 %f1303, %f25, %f566; + mul.f32 %f1304, %f24, %f566; + mul.f32 %f1299, %f29, %f566; + mul.f32 %f1300, %f28, %f566; + mul.f32 %f1301, %f27, %f566; + mul.f32 %f1296, %f32, %f566; + mul.f32 %f1297, %f31, %f566; + mul.f32 %f1298, %f30, %f566; + mul.f32 %f1293, %f35, %f566; + mul.f32 %f1294, %f34, %f566; + mul.f32 %f1295, %f33, %f566; + @!%p149 bra BB0_77; + bra.uni BB0_25; + +BB0_25: + abs.f32 %f1164, %f1168; + abs.f32 %f1163, %f1166; + setp.gt.f32 %p39, %f1163, %f1164; + neg.f32 %f582, %f1167; + selp.f32 %f583, %f582, 0f00000000, %p39; + neg.f32 %f584, %f1168; + selp.f32 %f585, %f1166, %f584, %p39; + selp.f32 %f586, 0f00000000, %f1167, %p39; + mul.f32 %f587, %f585, %f585; + fma.rn.f32 %f588, %f583, %f583, %f587; + fma.rn.f32 %f589, %f586, %f586, %f588; + sqrt.rn.f32 %f590, %f589; + rcp.rn.f32 %f591, %f590; + mul.f32 %f137, %f583, %f591; + mul.f32 %f138, %f585, %f591; + mul.f32 %f139, %f586, %f591; + mov.f32 %f581, 0f00000000; + setp.lt.s32 %p40, %r1, 1; + mov.f32 %f1251, %f581; + mov.f32 %f1252, %f581; + mov.f32 %f1253, %f581; + mov.f32 %f1254, %f581; + mov.f32 %f1255, %f581; + mov.f32 %f1256, %f581; + mov.f32 %f1257, %f581; + mov.f32 %f1258, %f581; + mov.f32 %f1259, %f581; + mov.f32 %f1260, %f581; + mov.f32 %f1261, %f581; + mov.f32 %f1262, %f581; + mov.f32 %f1263, %f581; + mov.f32 %f1264, %f581; + mov.f32 %f1265, %f581; + @%p40 bra BB0_76; + + mad.lo.s32 %r394, %r129, 1664525, 1013904223; + cvt.rn.f32.s32 %f607, %r1; + rcp.rn.f32 %f140, %f607; + add.u64 %rd65, %SP, 16; + cvta.to.local.u64 %rd2, %rd65; + mul.f32 %f141, %f12, 0f3456BF95; + mul.f32 %f142, %f13, 0f3456BF95; + mul.f32 %f143, %f14, 0f3456BF95; + add.u64 %rd66, %SP, 0; + cvta.to.local.u64 %rd3, %rd66; + mul.f32 %f608, %f1166, %f138; + mul.f32 %f609, %f1167, %f137; + sub.f32 %f144, %f609, %f608; + mul.f32 %f610, %f1168, %f137; + mul.f32 %f611, %f1166, %f139; + sub.f32 %f145, %f611, %f610; + mul.f32 %f612, %f1167, %f139; + mul.f32 %f613, %f1168, %f138; + sub.f32 %f146, %f613, %f612; + mov.f32 %f1251, 0f00000000; + mov.u32 %r156, 0; + abs.f32 %f614, %f142; + abs.f32 %f615, %f141; + max.f32 %f616, %f615, %f614; + abs.f32 %f617, %f143; + max.f32 %f618, %f616, %f617; + mov.u32 %r391, %r156; + mov.f32 %f1252, %f1251; + mov.f32 %f1253, %f1251; + mov.f32 %f1254, %f1251; + mov.f32 %f1255, %f1251; + mov.f32 %f1256, %f1251; + mov.f32 %f1257, %f1251; + mov.f32 %f1258, %f1251; + mov.f32 %f1259, %f1251; + mov.f32 %f1260, %f1251; + mov.f32 %f1261, %f1251; + mov.f32 %f1262, %f1251; + mov.f32 %f1263, %f1251; + mov.f32 %f1264, %f1251; + mov.f32 %f1265, %f1251; + +BB0_27: + cvt.rn.f32.s32 %f162, %r391; + max.f32 %f163, %f618, %f398; + mov.u32 %r393, %r156; + +BB0_28: + mad.lo.s32 %r158, %r394, 1664525, 1013904223; + and.b32 %r159, %r158, 16777215; + cvt.rn.f32.u32 %f620, %r159; + fma.rn.f32 %f621, %f620, 0f33800000, %f162; + mul.f32 %f179, %f140, %f621; + mad.lo.s32 %r394, %r158, 1664525, 1013904223; + and.b32 %r160, %r394, 16777215; + cvt.rn.f32.u32 %f622, %r160; + cvt.rn.f32.s32 %f623, %r393; + fma.rn.f32 %f624, %f622, 0f33800000, %f623; + mul.f32 %f625, %f140, %f624; + mul.f32 %f626, %f179, %f179; + sub.f32 %f628, %f564, %f626; + mov.f32 %f629, 0f00000000; + max.f32 %f630, %f629, %f628; + sqrt.rn.f32 %f180, %f630; + mul.f32 %f1272, %f625, 0f40C90FDB; + abs.f32 %f182, %f1272; + setp.neu.f32 %p41, %f182, 0f7F800000; + mov.f32 %f1266, %f1272; + @%p41 bra BB0_30; + + mul.rn.f32 %f1266, %f1272, %f629; + +BB0_30: + mul.f32 %f632, %f1266, 0f3F22F983; + cvt.rni.s32.f32 %r404, %f632; + cvt.rn.f32.s32 %f633, %r404; + neg.f32 %f634, %f633; + mov.f32 %f635, 0f3FC90FDA; + fma.rn.f32 %f636, %f634, %f635, %f1266; + mov.f32 %f637, 0f33A22168; + fma.rn.f32 %f638, %f634, %f637, %f636; + mov.f32 %f639, 0f27C234C5; + fma.rn.f32 %f1267, %f634, %f639, %f638; + abs.f32 %f640, %f1266; + setp.leu.f32 %p42, %f640, 0f47CE4780; + @%p42 bra BB0_41; + + mov.b32 %r19, %f1266; + shr.u32 %r20, %r19, 23; + shl.b32 %r163, %r19, 8; + or.b32 %r21, %r163, -2147483648; + mov.u32 %r395, 0; + mov.u64 %rd313, 0; + mov.u64 %rd312, %rd2; + mov.u32 %r396, %r395; + +BB0_32: + .pragma "nounroll"; + shl.b64 %rd68, %rd313, 2; + mov.u64 %rd69, __cudart_i2opi_f; + add.s64 %rd70, %rd69, %rd68; + ld.const.u32 %r166, [%rd70]; + // inline asm + { + mad.lo.cc.u32 %r164, %r166, %r21, %r396; + madc.hi.u32 %r396, %r166, %r21, 0; + } + // inline asm + st.local.u32 [%rd312], %r164; + add.s32 %r395, %r395, 1; + cvt.s64.s32 %rd313, %r395; + mul.wide.s32 %rd71, %r395, 4; + add.s64 %rd312, %rd2, %rd71; + setp.ne.s32 %p43, %r395, 6; + @%p43 bra BB0_32; + + and.b32 %r169, %r20, 255; + add.s32 %r170, %r169, -128; + shr.u32 %r171, %r170, 5; + and.b32 %r26, %r19, -2147483648; + st.local.u32 [%rd2+24], %r396; + mov.u32 %r172, 6; + sub.s32 %r173, %r172, %r171; + mul.wide.s32 %rd72, %r173, 4; + add.s64 %rd9, %rd2, %rd72; + ld.local.u32 %r397, [%rd9]; + ld.local.u32 %r398, [%rd9+-4]; + and.b32 %r29, %r20, 31; + setp.eq.s32 %p44, %r29, 0; + @%p44 bra BB0_35; + + mov.u32 %r174, 32; + sub.s32 %r175, %r174, %r29; + shr.u32 %r176, %r398, %r175; + shl.b32 %r177, %r397, %r29; + add.s32 %r397, %r176, %r177; + ld.local.u32 %r178, [%rd9+-8]; + shr.u32 %r179, %r178, %r175; + shl.b32 %r180, %r398, %r29; + add.s32 %r398, %r179, %r180; + +BB0_35: + shr.u32 %r181, %r398, 30; + shl.b32 %r182, %r397, 2; + add.s32 %r399, %r181, %r182; + shl.b32 %r35, %r398, 2; + shr.u32 %r183, %r399, 31; + shr.u32 %r184, %r397, 30; + add.s32 %r36, %r183, %r184; + setp.eq.s32 %p45, %r183, 0; + @%p45 bra BB0_36; + bra.uni BB0_37; + +BB0_36: + mov.u32 %r400, %r26; + mov.u32 %r401, %r35; + bra.uni BB0_38; + +BB0_37: + not.b32 %r185, %r399; + neg.s32 %r401, %r35; + setp.eq.s32 %p46, %r35, 0; + selp.u32 %r186, 1, 0, %p46; + add.s32 %r399, %r186, %r185; + xor.b32 %r400, %r26, -2147483648; + +BB0_38: + clz.b32 %r403, %r399; + setp.eq.s32 %p47, %r403, 0; + shl.b32 %r187, %r399, %r403; + mov.u32 %r188, 32; + sub.s32 %r189, %r188, %r403; + shr.u32 %r190, %r401, %r189; + add.s32 %r191, %r190, %r187; + selp.b32 %r44, %r399, %r191, %p47; + mov.u32 %r192, -921707870; + mul.hi.u32 %r402, %r44, %r192; + setp.eq.s32 %p48, %r26, 0; + neg.s32 %r193, %r36; + selp.b32 %r404, %r36, %r193, %p48; + setp.lt.s32 %p49, %r402, 1; + @%p49 bra BB0_40; + + mul.lo.s32 %r194, %r44, -921707870; + shr.u32 %r195, %r194, 31; + shl.b32 %r196, %r402, 1; + add.s32 %r402, %r195, %r196; + add.s32 %r403, %r403, 1; + +BB0_40: + mov.u32 %r197, 126; + sub.s32 %r198, %r197, %r403; + shl.b32 %r199, %r198, 23; + add.s32 %r200, %r402, 1; + shr.u32 %r201, %r200, 7; + add.s32 %r202, %r201, 1; + shr.u32 %r203, %r202, 1; + add.s32 %r204, %r203, %r199; + or.b32 %r205, %r204, %r400; + mov.b32 %f1267, %r205; + +BB0_41: + mul.rn.f32 %f188, %f1267, %f1267; + add.s32 %r52, %r404, 1; + and.b32 %r53, %r52, 1; + setp.eq.s32 %p50, %r53, 0; + @%p50 bra BB0_43; + bra.uni BB0_42; + +BB0_43: + mov.f32 %f643, 0f3C08839E; + mov.f32 %f644, 0fB94CA1F9; + fma.rn.f32 %f1268, %f644, %f188, %f643; + bra.uni BB0_44; + +BB0_42: + mov.f32 %f641, 0fBAB6061A; + mov.f32 %f642, 0f37CCF5CE; + fma.rn.f32 %f1268, %f642, %f188, %f641; + +BB0_44: + @%p50 bra BB0_46; + bra.uni BB0_45; + +BB0_46: + mov.f32 %f648, 0fBE2AAAA3; + fma.rn.f32 %f649, %f1268, %f188, %f648; + fma.rn.f32 %f1269, %f649, %f188, %f629; + bra.uni BB0_47; + +BB0_45: + mov.f32 %f645, 0f3D2AAAA5; + fma.rn.f32 %f646, %f1268, %f188, %f645; + mov.f32 %f647, 0fBF000000; + fma.rn.f32 %f1269, %f646, %f188, %f647; + +BB0_47: + fma.rn.f32 %f1270, %f1269, %f1267, %f1267; + @%p50 bra BB0_49; + + fma.rn.f32 %f1270, %f1269, %f188, %f564; + +BB0_49: + and.b32 %r206, %r52, 2; + setp.eq.s32 %p53, %r206, 0; + @%p53 bra BB0_51; + + mov.f32 %f653, 0fBF800000; + fma.rn.f32 %f1270, %f1270, %f653, %f629; + +BB0_51: + @%p41 bra BB0_53; + + mul.rn.f32 %f1272, %f1272, %f629; + +BB0_53: + mul.f32 %f655, %f1272, 0f3F22F983; + cvt.rni.s32.f32 %r414, %f655; + cvt.rn.f32.s32 %f656, %r414; + neg.f32 %f657, %f656; + fma.rn.f32 %f659, %f657, %f635, %f1272; + fma.rn.f32 %f661, %f657, %f637, %f659; + fma.rn.f32 %f1273, %f657, %f639, %f661; + abs.f32 %f663, %f1272; + setp.leu.f32 %p55, %f663, 0f47CE4780; + @%p55 bra BB0_64; + + mov.b32 %r55, %f1272; + shr.u32 %r56, %r55, 23; + shl.b32 %r209, %r55, 8; + or.b32 %r57, %r209, -2147483648; + mov.u32 %r405, 0; + mov.u64 %rd314, %rd2; + mov.u64 %rd315, %rd26; + mov.u32 %r406, %r405; + +BB0_55: + .pragma "nounroll"; + shl.b64 %rd74, %rd315, 2; + mov.u64 %rd75, __cudart_i2opi_f; + add.s64 %rd76, %rd75, %rd74; + ld.const.u32 %r212, [%rd76]; + // inline asm + { + mad.lo.cc.u32 %r210, %r212, %r57, %r406; + madc.hi.u32 %r406, %r212, %r57, 0; + } + // inline asm + st.local.u32 [%rd314], %r210; + add.s32 %r405, %r405, 1; + cvt.s64.s32 %rd315, %r405; + mul.wide.s32 %rd77, %r405, 4; + add.s64 %rd314, %rd2, %rd77; + setp.ne.s32 %p56, %r405, 6; + @%p56 bra BB0_55; + + and.b32 %r215, %r56, 255; + add.s32 %r216, %r215, -128; + shr.u32 %r217, %r216, 5; + and.b32 %r62, %r55, -2147483648; + st.local.u32 [%rd2+24], %r406; + mov.u32 %r218, 6; + sub.s32 %r219, %r218, %r217; + mul.wide.s32 %rd78, %r219, 4; + add.s64 %rd15, %rd2, %rd78; + ld.local.u32 %r407, [%rd15]; + ld.local.u32 %r408, [%rd15+-4]; + and.b32 %r65, %r56, 31; + setp.eq.s32 %p57, %r65, 0; + @%p57 bra BB0_58; + + mov.u32 %r220, 32; + sub.s32 %r221, %r220, %r65; + shr.u32 %r222, %r408, %r221; + shl.b32 %r223, %r407, %r65; + add.s32 %r407, %r222, %r223; + ld.local.u32 %r224, [%rd15+-8]; + shr.u32 %r225, %r224, %r221; + shl.b32 %r226, %r408, %r65; + add.s32 %r408, %r225, %r226; + +BB0_58: + shr.u32 %r227, %r408, 30; + shl.b32 %r228, %r407, 2; + add.s32 %r409, %r227, %r228; + shl.b32 %r71, %r408, 2; + shr.u32 %r229, %r409, 31; + shr.u32 %r230, %r407, 30; + add.s32 %r72, %r229, %r230; + setp.eq.s32 %p58, %r229, 0; + @%p58 bra BB0_59; + bra.uni BB0_60; + +BB0_59: + mov.u32 %r410, %r62; + mov.u32 %r411, %r71; + bra.uni BB0_61; + +BB0_60: + not.b32 %r231, %r409; + neg.s32 %r411, %r71; + setp.eq.s32 %p59, %r71, 0; + selp.u32 %r232, 1, 0, %p59; + add.s32 %r409, %r232, %r231; + xor.b32 %r410, %r62, -2147483648; + +BB0_61: + clz.b32 %r413, %r409; + setp.eq.s32 %p60, %r413, 0; + shl.b32 %r233, %r409, %r413; + mov.u32 %r234, 32; + sub.s32 %r235, %r234, %r413; + shr.u32 %r236, %r411, %r235; + add.s32 %r237, %r236, %r233; + selp.b32 %r80, %r409, %r237, %p60; + mov.u32 %r238, -921707870; + mul.hi.u32 %r412, %r80, %r238; + setp.eq.s32 %p61, %r62, 0; + neg.s32 %r239, %r72; + selp.b32 %r414, %r72, %r239, %p61; + setp.lt.s32 %p62, %r412, 1; + @%p62 bra BB0_63; + + mul.lo.s32 %r240, %r80, -921707870; + shr.u32 %r241, %r240, 31; + shl.b32 %r242, %r412, 1; + add.s32 %r412, %r241, %r242; + add.s32 %r413, %r413, 1; + +BB0_63: + mov.u32 %r243, 126; + sub.s32 %r244, %r243, %r413; + shl.b32 %r245, %r244, 23; + add.s32 %r246, %r412, 1; + shr.u32 %r247, %r246, 7; + add.s32 %r248, %r247, 1; + shr.u32 %r249, %r248, 1; + add.s32 %r250, %r249, %r245; + or.b32 %r251, %r250, %r410; + mov.b32 %f1273, %r251; + +BB0_64: + mul.rn.f32 %f205, %f1273, %f1273; + and.b32 %r88, %r414, 1; + setp.eq.s32 %p63, %r88, 0; + @%p63 bra BB0_66; + bra.uni BB0_65; + +BB0_66: + mov.f32 %f666, 0f3C08839E; + mov.f32 %f667, 0fB94CA1F9; + fma.rn.f32 %f1274, %f667, %f205, %f666; + bra.uni BB0_67; + +BB0_65: + mov.f32 %f664, 0fBAB6061A; + mov.f32 %f665, 0f37CCF5CE; + fma.rn.f32 %f1274, %f665, %f205, %f664; + +BB0_67: + @%p63 bra BB0_69; + bra.uni BB0_68; + +BB0_69: + mov.f32 %f671, 0fBE2AAAA3; + fma.rn.f32 %f672, %f1274, %f205, %f671; + fma.rn.f32 %f1275, %f672, %f205, %f629; + bra.uni BB0_70; + +BB0_68: + mov.f32 %f668, 0f3D2AAAA5; + fma.rn.f32 %f669, %f1274, %f205, %f668; + mov.f32 %f670, 0fBF000000; + fma.rn.f32 %f1275, %f669, %f205, %f670; + +BB0_70: + fma.rn.f32 %f1276, %f1275, %f1273, %f1273; + @%p63 bra BB0_72; + + fma.rn.f32 %f1276, %f1275, %f205, %f564; + +BB0_72: + and.b32 %r252, %r414, 2; + setp.eq.s32 %p66, %r252, 0; + @%p66 bra BB0_74; + + mov.f32 %f676, 0fBF800000; + fma.rn.f32 %f1276, %f1276, %f676, %f629; + +BB0_74: + mul.f32 %f685, %f180, %f1270; + mul.f32 %f686, %f180, %f1276; + mul.f32 %f687, %f137, %f686; + mul.f32 %f688, %f138, %f686; + mul.f32 %f689, %f139, %f686; + fma.rn.f32 %f690, %f146, %f685, %f687; + fma.rn.f32 %f691, %f145, %f685, %f688; + fma.rn.f32 %f692, %f144, %f685, %f689; + fma.rn.f32 %f680, %f1166, %f179, %f690; + fma.rn.f32 %f681, %f1167, %f179, %f691; + fma.rn.f32 %f682, %f1168, %f179, %f692; + mov.u32 %r254, 0; + st.local.u32 [%rd3+8], %r254; + st.local.u32 [%rd3+4], %r254; + st.local.u32 [%rd3], %r254; + ld.global.u32 %r253, [root]; + mov.f32 %f684, 0f6C4ECB8F; + // inline asm + call _rt_trace_64, (%r253, %f12, %f13, %f14, %f680, %f681, %f682, %r254, %f163, %f684, %rd66, %r117); + // inline asm + ld.local.f32 %f693, [%rd3]; + max.f32 %f695, %f693, %f629; + ld.local.f32 %f696, [%rd3+4]; + max.f32 %f697, %f696, %f629; + ld.local.f32 %f698, [%rd3+8]; + max.f32 %f699, %f698, %f629; + fma.rn.f32 %f1259, %f680, %f695, %f1259; + fma.rn.f32 %f1258, %f680, %f697, %f1258; + fma.rn.f32 %f1257, %f680, %f699, %f1257; + fma.rn.f32 %f1262, %f681, %f695, %f1262; + fma.rn.f32 %f1261, %f681, %f697, %f1261; + fma.rn.f32 %f1260, %f681, %f699, %f1260; + fma.rn.f32 %f1265, %f682, %f695, %f1265; + fma.rn.f32 %f1264, %f682, %f697, %f1264; + fma.rn.f32 %f1263, %f682, %f699, %f1263; + add.f32 %f1256, %f1256, %f695; + add.f32 %f1255, %f1255, %f697; + add.f32 %f1254, %f1254, %f699; + mul.f32 %f700, %f1167, %f681; + fma.rn.f32 %f701, %f1166, %f680, %f700; + fma.rn.f32 %f702, %f1168, %f682, %f701; + cvt.sat.f32.f32 %f703, %f702; + fma.rn.f32 %f1253, %f695, %f703, %f1253; + fma.rn.f32 %f1252, %f697, %f703, %f1252; + fma.rn.f32 %f1251, %f699, %f703, %f1251; + add.s32 %r393, %r393, 1; + setp.lt.s32 %p67, %r393, %r1; + @%p67 bra BB0_28; + + add.s32 %r391, %r391, 1; + setp.lt.s32 %p68, %r391, %r1; + @%p68 bra BB0_27; + +BB0_76: + mul.lo.s32 %r256, %r1, %r1; + cvt.rn.f32.s32 %f704, %r256; + rcp.rn.f32 %f705, %f704; + mul.f32 %f706, %f1253, %f705; + mul.f32 %f707, %f1252, %f705; + mul.f32 %f708, %f1251, %f705; + div.rn.f32 %f1308, %f581, %f704; + mul.f32 %f1302, %f1256, %f705; + mul.f32 %f1303, %f1255, %f705; + mul.f32 %f1304, %f1254, %f705; + mul.f32 %f1299, %f1259, %f705; + mul.f32 %f1300, %f1258, %f705; + mul.f32 %f1301, %f1257, %f705; + mul.f32 %f1296, %f1262, %f705; + mul.f32 %f1297, %f1261, %f705; + mul.f32 %f1298, %f1260, %f705; + mul.f32 %f1293, %f1265, %f705; + mul.f32 %f1294, %f1264, %f705; + mul.f32 %f1295, %f1263, %f705; + fma.rn.f32 %f1305, %f1253, %f705, %f706; + fma.rn.f32 %f1306, %f1252, %f705, %f707; + fma.rn.f32 %f1307, %f1251, %f705, %f708; + +BB0_77: + ld.global.u32 %r416, [imageEnabled]; + and.b32 %r257, %r416, 8; + setp.eq.s32 %p69, %r257, 0; + @%p69 bra BB0_90; + + cvt.u64.u32 %rd82, %r3; + cvt.u64.u32 %rd83, %r4; + mov.u64 %rd86, image_Mask; + cvta.global.u64 %rd81, %rd86; + // inline asm + call (%rd80), _rt_buffer_get_64, (%rd81, %r101, %r101, %rd82, %rd83, %rd26, %rd26); + // inline asm + mov.f32 %f712, 0f3E68BA2E; + cvt.rzi.f32.f32 %f713, %f712; + fma.rn.f32 %f714, %f713, 0fC0000000, 0f3EE8BA2E; + abs.f32 %f279, %f714; + abs.f32 %f280, %f1308; + setp.lt.f32 %p70, %f280, 0f00800000; + mul.f32 %f715, %f280, 0f4B800000; + selp.f32 %f716, 0fC3170000, 0fC2FE0000, %p70; + selp.f32 %f717, %f715, %f280, %p70; + mov.b32 %r260, %f717; + and.b32 %r261, %r260, 8388607; + or.b32 %r262, %r261, 1065353216; + mov.b32 %f718, %r262; + shr.u32 %r263, %r260, 23; + cvt.rn.f32.u32 %f719, %r263; + add.f32 %f720, %f716, %f719; + setp.gt.f32 %p71, %f718, 0f3FB504F3; + mul.f32 %f721, %f718, 0f3F000000; + add.f32 %f722, %f720, 0f3F800000; + selp.f32 %f723, %f721, %f718, %p71; + selp.f32 %f724, %f722, %f720, %p71; + add.f32 %f725, %f723, 0fBF800000; + add.f32 %f711, %f723, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f710,%f711; + // inline asm + add.f32 %f726, %f725, %f725; + mul.f32 %f727, %f710, %f726; + mul.f32 %f728, %f727, %f727; + mov.f32 %f729, 0f3C4CAF63; + mov.f32 %f730, 0f3B18F0FE; + fma.rn.f32 %f731, %f730, %f728, %f729; + mov.f32 %f732, 0f3DAAAABD; + fma.rn.f32 %f733, %f731, %f728, %f732; + mul.rn.f32 %f734, %f733, %f728; + mul.rn.f32 %f735, %f734, %f727; + sub.f32 %f736, %f725, %f727; + neg.f32 %f737, %f727; + add.f32 %f738, %f736, %f736; + fma.rn.f32 %f739, %f737, %f725, %f738; + mul.rn.f32 %f740, %f710, %f739; + add.f32 %f741, %f735, %f727; + sub.f32 %f742, %f727, %f741; + add.f32 %f743, %f735, %f742; + add.f32 %f744, %f740, %f743; + add.f32 %f745, %f741, %f744; + sub.f32 %f746, %f741, %f745; + add.f32 %f747, %f744, %f746; + mov.f32 %f748, 0f3F317200; + mul.rn.f32 %f749, %f724, %f748; + mov.f32 %f750, 0f35BFBE8E; + mul.rn.f32 %f751, %f724, %f750; + add.f32 %f752, %f749, %f745; + sub.f32 %f753, %f749, %f752; + add.f32 %f754, %f745, %f753; + add.f32 %f755, %f747, %f754; + add.f32 %f756, %f751, %f755; + add.f32 %f757, %f752, %f756; + sub.f32 %f758, %f752, %f757; + add.f32 %f759, %f756, %f758; + mov.f32 %f760, 0f3EE8BA2E; + mul.rn.f32 %f761, %f760, %f757; + neg.f32 %f762, %f761; + fma.rn.f32 %f763, %f760, %f757, %f762; + fma.rn.f32 %f764, %f760, %f759, %f763; + mov.f32 %f765, 0f00000000; + fma.rn.f32 %f766, %f765, %f757, %f764; + add.rn.f32 %f767, %f761, %f766; + neg.f32 %f768, %f767; + add.rn.f32 %f769, %f761, %f768; + add.rn.f32 %f770, %f769, %f766; + mov.b32 %r264, %f767; + setp.eq.s32 %p72, %r264, 1118925336; + add.s32 %r265, %r264, -1; + mov.b32 %f771, %r265; + add.f32 %f772, %f770, 0f37000000; + selp.f32 %f773, %f771, %f767, %p72; + selp.f32 %f281, %f772, %f770, %p72; + mul.f32 %f774, %f773, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f775, %f774; + mov.f32 %f776, 0fBF317200; + fma.rn.f32 %f777, %f775, %f776, %f773; + mov.f32 %f778, 0fB5BFBE8E; + fma.rn.f32 %f779, %f775, %f778, %f777; + mul.f32 %f780, %f779, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f781, %f780; + add.f32 %f782, %f775, 0f00000000; + ex2.approx.f32 %f783, %f782; + mul.f32 %f784, %f781, %f783; + setp.lt.f32 %p73, %f773, 0fC2D20000; + selp.f32 %f785, 0f00000000, %f784, %p73; + setp.gt.f32 %p74, %f773, 0f42D20000; + selp.f32 %f1309, 0f7F800000, %f785, %p74; + setp.eq.f32 %p75, %f1309, 0f7F800000; + @%p75 bra BB0_80; + + fma.rn.f32 %f1309, %f1309, %f281, %f1309; + +BB0_80: + setp.lt.f32 %p76, %f1308, 0f00000000; + setp.eq.f32 %p77, %f279, 0f3F800000; + and.pred %p3, %p76, %p77; + mov.b32 %r266, %f1309; + xor.b32 %r267, %r266, -2147483648; + mov.b32 %f786, %r267; + selp.f32 %f1311, %f786, %f1309, %p3; + setp.eq.f32 %p78, %f1308, 0f00000000; + @%p78 bra BB0_83; + bra.uni BB0_81; + +BB0_83: + add.f32 %f789, %f1308, %f1308; + selp.f32 %f1311, %f789, 0f00000000, %p77; + bra.uni BB0_84; + +BB0_148: + mov.u64 %rd227, image_HDR; + cvta.global.u64 %rd222, %rd227; + mov.u32 %r353, 8; + mov.u64 %rd226, 0; + // inline asm + call (%rd221), _rt_buffer_get_64, (%rd222, %r101, %r353, %rd19, %rd20, %rd226, %rd226); + // inline asm + mov.f32 %f1128, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs104, %f1128;} + + // inline asm + mov.u16 %rs105, 0; + st.v4.u16 [%rd221], {%rs104, %rs104, %rs104, %rs105}; + +BB0_149: + ld.global.u32 %r354, [additive]; + setp.eq.s32 %p145, %r354, 0; + @%p145 bra BB0_151; + + mov.u64 %rd240, image_RNM0; + cvta.global.u64 %rd229, %rd240; + mov.u32 %r358, 8; + mov.u64 %rd239, 0; + // inline asm + call (%rd228), _rt_buffer_get_64, (%rd229, %r101, %r358, %rd19, %rd20, %rd239, %rd239); + // inline asm + ld.v4.u16 {%rs112, %rs113, %rs114, %rs115}, [%rd228]; + // inline asm + { cvt.f32.f16 %f1129, %rs112;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1130, %rs113;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1131, %rs114;} + + // inline asm + // inline asm + call (%rd234), _rt_buffer_get_64, (%rd229, %r101, %r358, %rd19, %rd20, %rd239, %rd239); + // inline asm + add.f32 %f1132, %f1129, 0f00000000; + add.f32 %f1133, %f1130, 0f00000000; + add.f32 %f1134, %f1131, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs111, %f1134;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs110, %f1133;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs109, %f1132;} + + // inline asm + mov.u16 %rs116, 0; + st.v4.u16 [%rd234], {%rs109, %rs110, %rs111, %rs116}; + bra.uni BB0_152; + +BB0_151: + mov.u64 %rd247, image_RNM0; + cvta.global.u64 %rd242, %rd247; + mov.u32 %r360, 8; + mov.u64 %rd246, 0; + // inline asm + call (%rd241), _rt_buffer_get_64, (%rd242, %r101, %r360, %rd19, %rd20, %rd246, %rd246); + // inline asm + mov.f32 %f1135, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs117, %f1135;} + + // inline asm + mov.u16 %rs118, 0; + st.v4.u16 [%rd241], {%rs117, %rs117, %rs117, %rs118}; + +BB0_152: + ld.global.u32 %r361, [additive]; + setp.eq.s32 %p146, %r361, 0; + @%p146 bra BB0_154; + + mov.u64 %rd260, image_RNM1; + cvta.global.u64 %rd249, %rd260; + mov.u32 %r365, 8; + mov.u64 %rd259, 0; + // inline asm + call (%rd248), _rt_buffer_get_64, (%rd249, %r101, %r365, %rd19, %rd20, %rd259, %rd259); + // inline asm + ld.v4.u16 {%rs125, %rs126, %rs127, %rs128}, [%rd248]; + // inline asm + { cvt.f32.f16 %f1136, %rs125;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1137, %rs126;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1138, %rs127;} + + // inline asm + // inline asm + call (%rd254), _rt_buffer_get_64, (%rd249, %r101, %r365, %rd19, %rd20, %rd259, %rd259); + // inline asm + add.f32 %f1139, %f1136, 0f00000000; + add.f32 %f1140, %f1137, 0f00000000; + add.f32 %f1141, %f1138, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs124, %f1141;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs123, %f1140;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs122, %f1139;} + + // inline asm + mov.u16 %rs129, 0; + st.v4.u16 [%rd254], {%rs122, %rs123, %rs124, %rs129}; + bra.uni BB0_155; + +BB0_154: + mov.u64 %rd267, image_RNM1; + cvta.global.u64 %rd262, %rd267; + mov.u32 %r367, 8; + mov.u64 %rd266, 0; + // inline asm + call (%rd261), _rt_buffer_get_64, (%rd262, %r101, %r367, %rd19, %rd20, %rd266, %rd266); + // inline asm + mov.f32 %f1142, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs130, %f1142;} + + // inline asm + mov.u16 %rs131, 0; + st.v4.u16 [%rd261], {%rs130, %rs130, %rs130, %rs131}; + +BB0_155: + ld.global.u32 %r368, [additive]; + setp.eq.s32 %p147, %r368, 0; + @%p147 bra BB0_157; + + mov.u64 %rd280, image_RNM2; + cvta.global.u64 %rd269, %rd280; + mov.u32 %r372, 8; + mov.u64 %rd279, 0; + // inline asm + call (%rd268), _rt_buffer_get_64, (%rd269, %r101, %r372, %rd19, %rd20, %rd279, %rd279); + // inline asm + ld.v4.u16 {%rs138, %rs139, %rs140, %rs141}, [%rd268]; + // inline asm + { cvt.f32.f16 %f1143, %rs138;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1144, %rs139;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1145, %rs140;} + + // inline asm + // inline asm + call (%rd274), _rt_buffer_get_64, (%rd269, %r101, %r372, %rd19, %rd20, %rd279, %rd279); + // inline asm + add.f32 %f1146, %f1143, 0f00000000; + add.f32 %f1147, %f1144, 0f00000000; + add.f32 %f1148, %f1145, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs137, %f1148;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs136, %f1147;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs135, %f1146;} + + // inline asm + mov.u16 %rs142, 0; + st.v4.u16 [%rd274], {%rs135, %rs136, %rs137, %rs142}; + bra.uni BB0_158; + +BB0_157: + mov.u64 %rd287, image_RNM2; + cvta.global.u64 %rd282, %rd287; + mov.u32 %r374, 8; + mov.u64 %rd286, 0; + // inline asm + call (%rd281), _rt_buffer_get_64, (%rd282, %r101, %r374, %rd19, %rd20, %rd286, %rd286); + // inline asm + mov.f32 %f1149, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs143, %f1149;} + + // inline asm + mov.u16 %rs144, 0; + st.v4.u16 [%rd281], {%rs143, %rs143, %rs143, %rs144}; + +BB0_158: + ld.global.u32 %r375, [additive]; + setp.eq.s32 %p148, %r375, 0; + @%p148 bra BB0_160; + + mov.u64 %rd300, image_RNM3; + cvta.global.u64 %rd289, %rd300; + mov.u32 %r379, 8; + mov.u64 %rd299, 0; + // inline asm + call (%rd288), _rt_buffer_get_64, (%rd289, %r101, %r379, %rd19, %rd20, %rd299, %rd299); + // inline asm + ld.v4.u16 {%rs151, %rs152, %rs153, %rs154}, [%rd288]; + // inline asm + { cvt.f32.f16 %f1150, %rs151;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1151, %rs152;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1152, %rs153;} + + // inline asm + // inline asm + call (%rd294), _rt_buffer_get_64, (%rd289, %r101, %r379, %rd19, %rd20, %rd299, %rd299); + // inline asm + add.f32 %f1153, %f1150, 0f00000000; + add.f32 %f1154, %f1151, 0f00000000; + add.f32 %f1155, %f1152, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs150, %f1155;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs149, %f1154;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs148, %f1153;} + + // inline asm + mov.u16 %rs155, 0; + st.v4.u16 [%rd294], {%rs148, %rs149, %rs150, %rs155}; + bra.uni BB0_161; + +BB0_160: + mov.u64 %rd307, image_RNM3; + cvta.global.u64 %rd302, %rd307; + mov.u32 %r381, 8; + mov.u64 %rd306, 0; + // inline asm + call (%rd301), _rt_buffer_get_64, (%rd302, %r101, %r381, %rd19, %rd20, %rd306, %rd306); + // inline asm + mov.f32 %f1156, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs156, %f1156;} + + // inline asm + mov.u16 %rs157, 0; + st.v4.u16 [%rd301], {%rs156, %rs156, %rs156, %rs157}; + bra.uni BB0_161; + +BB0_81: + setp.geu.f32 %p79, %f1308, 0f00000000; + @%p79 bra BB0_84; + + cvt.rzi.f32.f32 %f788, %f760; + setp.neu.f32 %p80, %f788, 0f3EE8BA2E; + selp.f32 %f1311, 0f7FFFFFFF, %f1311, %p80; + +BB0_84: + add.f32 %f790, %f280, 0f3EE8BA2E; + mov.b32 %r268, %f790; + setp.lt.s32 %p82, %r268, 2139095040; + @%p82 bra BB0_89; + + setp.gtu.f32 %p83, %f280, 0f7F800000; + @%p83 bra BB0_88; + bra.uni BB0_86; + +BB0_88: + add.f32 %f1311, %f1308, 0f3EE8BA2E; + bra.uni BB0_89; + +BB0_86: + setp.neu.f32 %p84, %f280, 0f7F800000; + @%p84 bra BB0_89; + + selp.f32 %f1311, 0fFF800000, 0f7F800000, %p3; + +BB0_89: + mul.f32 %f791, %f1311, 0f437F0000; + setp.eq.f32 %p85, %f1308, 0f3F800000; + selp.f32 %f792, 0f437F0000, %f791, %p85; + cvt.rzi.u32.f32 %r269, %f792; + cvt.u16.u32 %rs14, %r269; + mov.u16 %rs15, 255; + st.v2.u8 [%rd80], {%rs14, %rs15}; + ld.global.u32 %r416, [imageEnabled]; + +BB0_90: + ld.global.f32 %f793, [lightColor]; + mul.f32 %f292, %f1305, %f793; + ld.global.f32 %f794, [lightColor+4]; + mul.f32 %f293, %f1306, %f794; + ld.global.f32 %f795, [lightColor+8]; + mul.f32 %f294, %f1307, %f795; + and.b32 %r270, %r416, 1; + setp.eq.b32 %p86, %r270, 1; + @!%p86 bra BB0_125; + bra.uni BB0_91; + +BB0_91: + mov.f32 %f798, 0f3E666666; + cvt.rzi.f32.f32 %f799, %f798; + fma.rn.f32 %f800, %f799, 0fC0000000, 0f3EE66666; + abs.f32 %f295, %f800; + abs.f32 %f296, %f292; + setp.lt.f32 %p87, %f296, 0f00800000; + mul.f32 %f801, %f296, 0f4B800000; + selp.f32 %f802, 0fC3170000, 0fC2FE0000, %p87; + selp.f32 %f803, %f801, %f296, %p87; + mov.b32 %r271, %f803; + and.b32 %r272, %r271, 8388607; + or.b32 %r273, %r272, 1065353216; + mov.b32 %f804, %r273; + shr.u32 %r274, %r271, 23; + cvt.rn.f32.u32 %f805, %r274; + add.f32 %f806, %f802, %f805; + setp.gt.f32 %p88, %f804, 0f3FB504F3; + mul.f32 %f807, %f804, 0f3F000000; + add.f32 %f808, %f806, 0f3F800000; + selp.f32 %f809, %f807, %f804, %p88; + selp.f32 %f810, %f808, %f806, %p88; + add.f32 %f811, %f809, 0fBF800000; + add.f32 %f797, %f809, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f796,%f797; + // inline asm + add.f32 %f812, %f811, %f811; + mul.f32 %f813, %f796, %f812; + mul.f32 %f814, %f813, %f813; + mov.f32 %f815, 0f3C4CAF63; + mov.f32 %f816, 0f3B18F0FE; + fma.rn.f32 %f817, %f816, %f814, %f815; + mov.f32 %f818, 0f3DAAAABD; + fma.rn.f32 %f819, %f817, %f814, %f818; + mul.rn.f32 %f820, %f819, %f814; + mul.rn.f32 %f821, %f820, %f813; + sub.f32 %f822, %f811, %f813; + neg.f32 %f823, %f813; + add.f32 %f824, %f822, %f822; + fma.rn.f32 %f825, %f823, %f811, %f824; + mul.rn.f32 %f826, %f796, %f825; + add.f32 %f827, %f821, %f813; + sub.f32 %f828, %f813, %f827; + add.f32 %f829, %f821, %f828; + add.f32 %f830, %f826, %f829; + add.f32 %f831, %f827, %f830; + sub.f32 %f832, %f827, %f831; + add.f32 %f833, %f830, %f832; + mov.f32 %f834, 0f3F317200; + mul.rn.f32 %f835, %f810, %f834; + mov.f32 %f836, 0f35BFBE8E; + mul.rn.f32 %f837, %f810, %f836; + add.f32 %f838, %f835, %f831; + sub.f32 %f839, %f835, %f838; + add.f32 %f840, %f831, %f839; + add.f32 %f841, %f833, %f840; + add.f32 %f842, %f837, %f841; + add.f32 %f843, %f838, %f842; + sub.f32 %f844, %f838, %f843; + add.f32 %f845, %f842, %f844; + mov.f32 %f846, 0f3EE66666; + mul.rn.f32 %f847, %f846, %f843; + neg.f32 %f848, %f847; + fma.rn.f32 %f849, %f846, %f843, %f848; + fma.rn.f32 %f850, %f846, %f845, %f849; + mov.f32 %f851, 0f00000000; + fma.rn.f32 %f852, %f851, %f843, %f850; + add.rn.f32 %f853, %f847, %f852; + neg.f32 %f854, %f853; + add.rn.f32 %f855, %f847, %f854; + add.rn.f32 %f856, %f855, %f852; + mov.b32 %r275, %f853; + setp.eq.s32 %p89, %r275, 1118925336; + add.s32 %r276, %r275, -1; + mov.b32 %f857, %r276; + add.f32 %f858, %f856, 0f37000000; + selp.f32 %f859, %f857, %f853, %p89; + selp.f32 %f297, %f858, %f856, %p89; + mul.f32 %f860, %f859, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f861, %f860; + mov.f32 %f862, 0fBF317200; + fma.rn.f32 %f863, %f861, %f862, %f859; + mov.f32 %f864, 0fB5BFBE8E; + fma.rn.f32 %f865, %f861, %f864, %f863; + mul.f32 %f866, %f865, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f867, %f866; + add.f32 %f868, %f861, 0f00000000; + ex2.approx.f32 %f869, %f868; + mul.f32 %f870, %f867, %f869; + setp.lt.f32 %p90, %f859, 0fC2D20000; + selp.f32 %f871, 0f00000000, %f870, %p90; + setp.gt.f32 %p91, %f859, 0f42D20000; + selp.f32 %f1312, 0f7F800000, %f871, %p91; + setp.eq.f32 %p92, %f1312, 0f7F800000; + @%p92 bra BB0_93; + + fma.rn.f32 %f1312, %f1312, %f297, %f1312; + +BB0_93: + setp.lt.f32 %p93, %f292, 0f00000000; + setp.eq.f32 %p94, %f295, 0f3F800000; + and.pred %p4, %p93, %p94; + mov.b32 %r277, %f1312; + xor.b32 %r278, %r277, -2147483648; + mov.b32 %f872, %r278; + selp.f32 %f1314, %f872, %f1312, %p4; + setp.eq.f32 %p95, %f292, 0f00000000; + @%p95 bra BB0_96; + bra.uni BB0_94; + +BB0_96: + add.f32 %f875, %f292, %f292; + selp.f32 %f1314, %f875, 0f00000000, %p94; + bra.uni BB0_97; + +BB0_94: + setp.geu.f32 %p96, %f292, 0f00000000; + @%p96 bra BB0_97; + + cvt.rzi.f32.f32 %f874, %f846; + setp.neu.f32 %p97, %f874, 0f3EE66666; + selp.f32 %f1314, 0f7FFFFFFF, %f1314, %p97; + +BB0_97: + add.f32 %f876, %f296, 0f3EE66666; + mov.b32 %r279, %f876; + setp.lt.s32 %p99, %r279, 2139095040; + @%p99 bra BB0_102; + + setp.gtu.f32 %p100, %f296, 0f7F800000; + @%p100 bra BB0_101; + bra.uni BB0_99; + +BB0_101: + add.f32 %f1314, %f292, 0f3EE66666; + bra.uni BB0_102; + +BB0_99: + setp.neu.f32 %p101, %f296, 0f7F800000; + @%p101 bra BB0_102; + + selp.f32 %f1314, 0fFF800000, 0f7F800000, %p4; + +BB0_102: + setp.eq.f32 %p102, %f292, 0f3F800000; + selp.f32 %f308, 0f3F800000, %f1314, %p102; + abs.f32 %f309, %f293; + setp.lt.f32 %p103, %f309, 0f00800000; + mul.f32 %f879, %f309, 0f4B800000; + selp.f32 %f880, 0fC3170000, 0fC2FE0000, %p103; + selp.f32 %f881, %f879, %f309, %p103; + mov.b32 %r280, %f881; + and.b32 %r281, %r280, 8388607; + or.b32 %r282, %r281, 1065353216; + mov.b32 %f882, %r282; + shr.u32 %r283, %r280, 23; + cvt.rn.f32.u32 %f883, %r283; + add.f32 %f884, %f880, %f883; + setp.gt.f32 %p104, %f882, 0f3FB504F3; + mul.f32 %f885, %f882, 0f3F000000; + add.f32 %f886, %f884, 0f3F800000; + selp.f32 %f887, %f885, %f882, %p104; + selp.f32 %f888, %f886, %f884, %p104; + add.f32 %f889, %f887, 0fBF800000; + add.f32 %f878, %f887, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f877,%f878; + // inline asm + add.f32 %f890, %f889, %f889; + mul.f32 %f891, %f877, %f890; + mul.f32 %f892, %f891, %f891; + fma.rn.f32 %f895, %f816, %f892, %f815; + fma.rn.f32 %f897, %f895, %f892, %f818; + mul.rn.f32 %f898, %f897, %f892; + mul.rn.f32 %f899, %f898, %f891; + sub.f32 %f900, %f889, %f891; + neg.f32 %f901, %f891; + add.f32 %f902, %f900, %f900; + fma.rn.f32 %f903, %f901, %f889, %f902; + mul.rn.f32 %f904, %f877, %f903; + add.f32 %f905, %f899, %f891; + sub.f32 %f906, %f891, %f905; + add.f32 %f907, %f899, %f906; + add.f32 %f908, %f904, %f907; + add.f32 %f909, %f905, %f908; + sub.f32 %f910, %f905, %f909; + add.f32 %f911, %f908, %f910; + mul.rn.f32 %f913, %f888, %f834; + mul.rn.f32 %f915, %f888, %f836; + add.f32 %f916, %f913, %f909; + sub.f32 %f917, %f913, %f916; + add.f32 %f918, %f909, %f917; + add.f32 %f919, %f911, %f918; + add.f32 %f920, %f915, %f919; + add.f32 %f921, %f916, %f920; + sub.f32 %f922, %f916, %f921; + add.f32 %f923, %f920, %f922; + mul.rn.f32 %f925, %f846, %f921; + neg.f32 %f926, %f925; + fma.rn.f32 %f927, %f846, %f921, %f926; + fma.rn.f32 %f928, %f846, %f923, %f927; + fma.rn.f32 %f930, %f851, %f921, %f928; + add.rn.f32 %f931, %f925, %f930; + neg.f32 %f932, %f931; + add.rn.f32 %f933, %f925, %f932; + add.rn.f32 %f934, %f933, %f930; + mov.b32 %r284, %f931; + setp.eq.s32 %p105, %r284, 1118925336; + add.s32 %r285, %r284, -1; + mov.b32 %f935, %r285; + add.f32 %f936, %f934, 0f37000000; + selp.f32 %f937, %f935, %f931, %p105; + selp.f32 %f310, %f936, %f934, %p105; + mul.f32 %f938, %f937, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f939, %f938; + fma.rn.f32 %f941, %f939, %f862, %f937; + fma.rn.f32 %f943, %f939, %f864, %f941; + mul.f32 %f944, %f943, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f945, %f944; + add.f32 %f946, %f939, 0f00000000; + ex2.approx.f32 %f947, %f946; + mul.f32 %f948, %f945, %f947; + setp.lt.f32 %p106, %f937, 0fC2D20000; + selp.f32 %f949, 0f00000000, %f948, %p106; + setp.gt.f32 %p107, %f937, 0f42D20000; + selp.f32 %f1315, 0f7F800000, %f949, %p107; + setp.eq.f32 %p108, %f1315, 0f7F800000; + @%p108 bra BB0_104; + + fma.rn.f32 %f1315, %f1315, %f310, %f1315; + +BB0_104: + setp.lt.f32 %p109, %f293, 0f00000000; + and.pred %p5, %p109, %p94; + mov.b32 %r286, %f1315; + xor.b32 %r287, %r286, -2147483648; + mov.b32 %f950, %r287; + selp.f32 %f1317, %f950, %f1315, %p5; + setp.eq.f32 %p111, %f293, 0f00000000; + @%p111 bra BB0_107; + bra.uni BB0_105; + +BB0_107: + add.f32 %f953, %f293, %f293; + selp.f32 %f1317, %f953, 0f00000000, %p94; + bra.uni BB0_108; + +BB0_105: + setp.geu.f32 %p112, %f293, 0f00000000; + @%p112 bra BB0_108; + + cvt.rzi.f32.f32 %f952, %f846; + setp.neu.f32 %p113, %f952, 0f3EE66666; + selp.f32 %f1317, 0f7FFFFFFF, %f1317, %p113; + +BB0_108: + add.f32 %f954, %f309, 0f3EE66666; + mov.b32 %r288, %f954; + setp.lt.s32 %p115, %r288, 2139095040; + @%p115 bra BB0_113; + + setp.gtu.f32 %p116, %f309, 0f7F800000; + @%p116 bra BB0_112; + bra.uni BB0_110; + +BB0_112: + add.f32 %f1317, %f293, 0f3EE66666; + bra.uni BB0_113; + +BB0_110: + setp.neu.f32 %p117, %f309, 0f7F800000; + @%p117 bra BB0_113; + + selp.f32 %f1317, 0fFF800000, 0f7F800000, %p5; + +BB0_113: + setp.eq.f32 %p118, %f293, 0f3F800000; + selp.f32 %f321, 0f3F800000, %f1317, %p118; + abs.f32 %f322, %f294; + setp.lt.f32 %p119, %f322, 0f00800000; + mul.f32 %f957, %f322, 0f4B800000; + selp.f32 %f958, 0fC3170000, 0fC2FE0000, %p119; + selp.f32 %f959, %f957, %f322, %p119; + mov.b32 %r289, %f959; + and.b32 %r290, %r289, 8388607; + or.b32 %r291, %r290, 1065353216; + mov.b32 %f960, %r291; + shr.u32 %r292, %r289, 23; + cvt.rn.f32.u32 %f961, %r292; + add.f32 %f962, %f958, %f961; + setp.gt.f32 %p120, %f960, 0f3FB504F3; + mul.f32 %f963, %f960, 0f3F000000; + add.f32 %f964, %f962, 0f3F800000; + selp.f32 %f965, %f963, %f960, %p120; + selp.f32 %f966, %f964, %f962, %p120; + add.f32 %f967, %f965, 0fBF800000; + add.f32 %f956, %f965, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f955,%f956; + // inline asm + add.f32 %f968, %f967, %f967; + mul.f32 %f969, %f955, %f968; + mul.f32 %f970, %f969, %f969; + fma.rn.f32 %f973, %f816, %f970, %f815; + fma.rn.f32 %f975, %f973, %f970, %f818; + mul.rn.f32 %f976, %f975, %f970; + mul.rn.f32 %f977, %f976, %f969; + sub.f32 %f978, %f967, %f969; + neg.f32 %f979, %f969; + add.f32 %f980, %f978, %f978; + fma.rn.f32 %f981, %f979, %f967, %f980; + mul.rn.f32 %f982, %f955, %f981; + add.f32 %f983, %f977, %f969; + sub.f32 %f984, %f969, %f983; + add.f32 %f985, %f977, %f984; + add.f32 %f986, %f982, %f985; + add.f32 %f987, %f983, %f986; + sub.f32 %f988, %f983, %f987; + add.f32 %f989, %f986, %f988; + mul.rn.f32 %f991, %f966, %f834; + mul.rn.f32 %f993, %f966, %f836; + add.f32 %f994, %f991, %f987; + sub.f32 %f995, %f991, %f994; + add.f32 %f996, %f987, %f995; + add.f32 %f997, %f989, %f996; + add.f32 %f998, %f993, %f997; + add.f32 %f999, %f994, %f998; + sub.f32 %f1000, %f994, %f999; + add.f32 %f1001, %f998, %f1000; + mul.rn.f32 %f1003, %f846, %f999; + neg.f32 %f1004, %f1003; + fma.rn.f32 %f1005, %f846, %f999, %f1004; + fma.rn.f32 %f1006, %f846, %f1001, %f1005; + fma.rn.f32 %f1008, %f851, %f999, %f1006; + add.rn.f32 %f1009, %f1003, %f1008; + neg.f32 %f1010, %f1009; + add.rn.f32 %f1011, %f1003, %f1010; + add.rn.f32 %f1012, %f1011, %f1008; + mov.b32 %r293, %f1009; + setp.eq.s32 %p121, %r293, 1118925336; + add.s32 %r294, %r293, -1; + mov.b32 %f1013, %r294; + add.f32 %f1014, %f1012, 0f37000000; + selp.f32 %f1015, %f1013, %f1009, %p121; + selp.f32 %f323, %f1014, %f1012, %p121; + mul.f32 %f1016, %f1015, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f1017, %f1016; + fma.rn.f32 %f1019, %f1017, %f862, %f1015; + fma.rn.f32 %f1021, %f1017, %f864, %f1019; + mul.f32 %f1022, %f1021, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f1023, %f1022; + add.f32 %f1024, %f1017, 0f00000000; + ex2.approx.f32 %f1025, %f1024; + mul.f32 %f1026, %f1023, %f1025; + setp.lt.f32 %p122, %f1015, 0fC2D20000; + selp.f32 %f1027, 0f00000000, %f1026, %p122; + setp.gt.f32 %p123, %f1015, 0f42D20000; + selp.f32 %f1318, 0f7F800000, %f1027, %p123; + setp.eq.f32 %p124, %f1318, 0f7F800000; + @%p124 bra BB0_115; + + fma.rn.f32 %f1318, %f1318, %f323, %f1318; + +BB0_115: + setp.lt.f32 %p125, %f294, 0f00000000; + and.pred %p6, %p125, %p94; + mov.b32 %r295, %f1318; + xor.b32 %r296, %r295, -2147483648; + mov.b32 %f1028, %r296; + selp.f32 %f1320, %f1028, %f1318, %p6; + setp.eq.f32 %p127, %f294, 0f00000000; + @%p127 bra BB0_118; + bra.uni BB0_116; + +BB0_118: + add.f32 %f1031, %f294, %f294; + selp.f32 %f1320, %f1031, 0f00000000, %p94; + bra.uni BB0_119; + +BB0_116: + setp.geu.f32 %p128, %f294, 0f00000000; + @%p128 bra BB0_119; + + cvt.rzi.f32.f32 %f1030, %f846; + setp.neu.f32 %p129, %f1030, 0f3EE66666; + selp.f32 %f1320, 0f7FFFFFFF, %f1320, %p129; + +BB0_119: + add.f32 %f1032, %f322, 0f3EE66666; + mov.b32 %r297, %f1032; + setp.lt.s32 %p131, %r297, 2139095040; + @%p131 bra BB0_124; + + setp.gtu.f32 %p132, %f322, 0f7F800000; + @%p132 bra BB0_123; + bra.uni BB0_121; + +BB0_123: + add.f32 %f1320, %f294, 0f3EE66666; + bra.uni BB0_124; + +BB0_121: + setp.neu.f32 %p133, %f322, 0f7F800000; + @%p133 bra BB0_124; + + selp.f32 %f1320, 0fFF800000, 0f7F800000, %p6; + +BB0_124: + setp.eq.f32 %p134, %f294, 0f3F800000; + selp.f32 %f1033, 0f3F800000, %f1320, %p134; + cvt.u64.u32 %rd90, %r4; + cvt.u64.u32 %rd89, %r3; + mov.u64 %rd93, image; + cvta.global.u64 %rd88, %rd93; + // inline asm + call (%rd87), _rt_buffer_get_64, (%rd88, %r101, %r102, %rd89, %rd90, %rd26, %rd26); + // inline asm + cvt.sat.f32.f32 %f1034, %f1033; + mul.f32 %f1035, %f1034, 0f437FFD71; + cvt.rzi.u32.f32 %r300, %f1035; + cvt.sat.f32.f32 %f1036, %f321; + mul.f32 %f1037, %f1036, 0f437FFD71; + cvt.rzi.u32.f32 %r301, %f1037; + cvt.sat.f32.f32 %f1038, %f308; + mul.f32 %f1039, %f1038, 0f437FFD71; + cvt.rzi.u32.f32 %r302, %f1039; + cvt.u16.u32 %rs16, %r300; + cvt.u16.u32 %rs17, %r302; + cvt.u16.u32 %rs18, %r301; + mov.u16 %rs19, 255; + st.v4.u8 [%rd87], {%rs16, %rs18, %rs17, %rs19}; + ld.global.u32 %r416, [imageEnabled]; + +BB0_125: + cvt.u64.u32 %rd17, %r3; + cvt.u64.u32 %rd18, %r4; + and.b32 %r303, %r416, 4; + setp.eq.s32 %p135, %r303, 0; + @%p135 bra BB0_129; + + ld.global.u32 %r304, [additive]; + setp.eq.s32 %p136, %r304, 0; + // inline asm + { cvt.rn.f16.f32 %rs20, %f564;} + + // inline asm + @%p136 bra BB0_128; + + mov.u64 %rd106, image_HDR; + cvta.global.u64 %rd95, %rd106; + mov.u32 %r308, 8; + // inline asm + call (%rd94), _rt_buffer_get_64, (%rd95, %r101, %r308, %rd17, %rd18, %rd26, %rd26); + // inline asm + ld.v4.u16 {%rs27, %rs28, %rs29, %rs30}, [%rd94]; + // inline asm + { cvt.f32.f16 %f1041, %rs27;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1042, %rs28;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1043, %rs29;} + + // inline asm + // inline asm + call (%rd100), _rt_buffer_get_64, (%rd95, %r101, %r308, %rd17, %rd18, %rd26, %rd26); + // inline asm + add.f32 %f1044, %f292, %f1041; + add.f32 %f1045, %f293, %f1042; + add.f32 %f1046, %f294, %f1043; + // inline asm + { cvt.rn.f16.f32 %rs26, %f1046;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs25, %f1045;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs24, %f1044;} + + // inline asm + st.v4.u16 [%rd100], {%rs24, %rs25, %rs26, %rs20}; + bra.uni BB0_129; + +BB0_128: + mov.u64 %rd113, image_HDR; + cvta.global.u64 %rd108, %rd113; + mov.u32 %r310, 8; + // inline asm + call (%rd107), _rt_buffer_get_64, (%rd108, %r101, %r310, %rd17, %rd18, %rd26, %rd26); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs33, %f294;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs32, %f293;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs31, %f292;} + + // inline asm + st.v4.u16 [%rd107], {%rs31, %rs32, %rs33, %rs20}; + +BB0_129: + selp.f32 %f1051, 0f3F000000, 0f3E800000, %p149; + mul.f32 %f1052, %f1051, %f1302; + mul.f32 %f1053, %f1051, %f1303; + mul.f32 %f1054, %f1051, %f1304; + mul.f32 %f1055, %f1051, %f1299; + mul.f32 %f1056, %f1051, %f1300; + mul.f32 %f1057, %f1051, %f1301; + mul.f32 %f1058, %f1051, %f1296; + mul.f32 %f1059, %f1051, %f1297; + mul.f32 %f1060, %f1051, %f1298; + mul.f32 %f1061, %f1051, %f1293; + mul.f32 %f1062, %f1051, %f1294; + mul.f32 %f1063, %f1051, %f1295; + ld.global.f32 %f1064, [lightColor]; + mul.f32 %f334, %f1052, %f1064; + ld.global.f32 %f1065, [lightColor+4]; + mul.f32 %f335, %f1053, %f1065; + ld.global.f32 %f1066, [lightColor+8]; + mul.f32 %f336, %f1054, %f1066; + mul.f32 %f337, %f1055, %f1064; + mul.f32 %f338, %f1056, %f1065; + mul.f32 %f339, %f1057, %f1066; + mul.f32 %f340, %f1058, %f1064; + mul.f32 %f341, %f1059, %f1065; + mul.f32 %f342, %f1060, %f1066; + mul.f32 %f343, %f1061, %f1064; + mul.f32 %f344, %f1062, %f1065; + mul.f32 %f345, %f1063, %f1066; + ld.global.u32 %r311, [additive]; + setp.eq.s32 %p137, %r311, 0; + // inline asm + { cvt.rn.f16.f32 %rs34, %f564;} + + // inline asm + @%p137 bra BB0_131; + + mov.u64 %rd126, image_RNM0; + cvta.global.u64 %rd115, %rd126; + mov.u32 %r315, 8; + // inline asm + call (%rd114), _rt_buffer_get_64, (%rd115, %r101, %r315, %rd17, %rd18, %rd26, %rd26); + // inline asm + ld.v4.u16 {%rs41, %rs42, %rs43, %rs44}, [%rd114]; + // inline asm + { cvt.f32.f16 %f1067, %rs41;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1068, %rs42;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1069, %rs43;} + + // inline asm + // inline asm + call (%rd120), _rt_buffer_get_64, (%rd115, %r101, %r315, %rd17, %rd18, %rd26, %rd26); + // inline asm + add.f32 %f1070, %f334, %f1067; + add.f32 %f1071, %f335, %f1068; + add.f32 %f1072, %f336, %f1069; + // inline asm + { cvt.rn.f16.f32 %rs40, %f1072;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs39, %f1071;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs38, %f1070;} + + // inline asm + st.v4.u16 [%rd120], {%rs38, %rs39, %rs40, %rs34}; + bra.uni BB0_132; + +BB0_131: + mov.u64 %rd133, image_RNM0; + cvta.global.u64 %rd128, %rd133; + mov.u32 %r317, 8; + // inline asm + call (%rd127), _rt_buffer_get_64, (%rd128, %r101, %r317, %rd17, %rd18, %rd26, %rd26); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs47, %f336;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs46, %f335;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs45, %f334;} + + // inline asm + st.v4.u16 [%rd127], {%rs45, %rs46, %rs47, %rs34}; + +BB0_132: + mov.f32 %f1077, 0f34000000; + max.f32 %f1078, %f334, %f1077; + div.rn.f32 %f1079, %f337, %f1078; + max.f32 %f1080, %f335, %f1077; + div.rn.f32 %f1081, %f338, %f1080; + max.f32 %f1082, %f336, %f1077; + div.rn.f32 %f1083, %f339, %f1082; + fma.rn.f32 %f346, %f1079, 0f3F000000, 0f3F000000; + fma.rn.f32 %f347, %f1081, 0f3F000000, 0f3F000000; + fma.rn.f32 %f348, %f1083, 0f3F000000, 0f3F000000; + div.rn.f32 %f1084, %f340, %f1078; + div.rn.f32 %f1085, %f341, %f1080; + div.rn.f32 %f1086, %f342, %f1082; + fma.rn.f32 %f349, %f1084, 0f3F000000, 0f3F000000; + fma.rn.f32 %f350, %f1085, 0f3F000000, 0f3F000000; + fma.rn.f32 %f351, %f1086, 0f3F000000, 0f3F000000; + div.rn.f32 %f1087, %f343, %f1078; + div.rn.f32 %f1088, %f344, %f1080; + div.rn.f32 %f1089, %f345, %f1082; + fma.rn.f32 %f352, %f1087, 0f3F000000, 0f3F000000; + fma.rn.f32 %f353, %f1088, 0f3F000000, 0f3F000000; + fma.rn.f32 %f354, %f1089, 0f3F000000, 0f3F000000; + ld.global.u32 %r318, [additive]; + setp.eq.s32 %p138, %r318, 0; + // inline asm + { cvt.rn.f16.f32 %rs48, %f564;} + + // inline asm + @%p138 bra BB0_134; + + mov.u64 %rd146, image_RNM1; + cvta.global.u64 %rd135, %rd146; + mov.u32 %r322, 8; + // inline asm + call (%rd134), _rt_buffer_get_64, (%rd135, %r101, %r322, %rd17, %rd18, %rd26, %rd26); + // inline asm + ld.v4.u16 {%rs55, %rs56, %rs57, %rs58}, [%rd134]; + // inline asm + { cvt.f32.f16 %f1090, %rs55;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1091, %rs56;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1092, %rs57;} + + // inline asm + // inline asm + call (%rd140), _rt_buffer_get_64, (%rd135, %r101, %r322, %rd17, %rd18, %rd26, %rd26); + // inline asm + add.f32 %f1093, %f346, %f1090; + add.f32 %f1094, %f347, %f1091; + add.f32 %f1095, %f348, %f1092; + // inline asm + { cvt.rn.f16.f32 %rs54, %f1095;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs53, %f1094;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs52, %f1093;} + + // inline asm + st.v4.u16 [%rd140], {%rs52, %rs53, %rs54, %rs48}; + bra.uni BB0_135; + +BB0_134: + mov.u64 %rd153, image_RNM1; + cvta.global.u64 %rd148, %rd153; + mov.u32 %r324, 8; + // inline asm + call (%rd147), _rt_buffer_get_64, (%rd148, %r101, %r324, %rd17, %rd18, %rd26, %rd26); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs61, %f348;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs60, %f347;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs59, %f346;} + + // inline asm + st.v4.u16 [%rd147], {%rs59, %rs60, %rs61, %rs48}; + +BB0_135: + ld.global.u32 %r325, [additive]; + setp.eq.s32 %p139, %r325, 0; + // inline asm + { cvt.rn.f16.f32 %rs62, %f564;} + + // inline asm + @%p139 bra BB0_137; + + mov.u64 %rd166, image_RNM2; + cvta.global.u64 %rd155, %rd166; + mov.u32 %r329, 8; + // inline asm + call (%rd154), _rt_buffer_get_64, (%rd155, %r101, %r329, %rd17, %rd18, %rd26, %rd26); + // inline asm + ld.v4.u16 {%rs69, %rs70, %rs71, %rs72}, [%rd154]; + // inline asm + { cvt.f32.f16 %f1100, %rs69;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1101, %rs70;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1102, %rs71;} + + // inline asm + // inline asm + call (%rd160), _rt_buffer_get_64, (%rd155, %r101, %r329, %rd17, %rd18, %rd26, %rd26); + // inline asm + add.f32 %f1103, %f349, %f1100; + add.f32 %f1104, %f350, %f1101; + add.f32 %f1105, %f351, %f1102; + // inline asm + { cvt.rn.f16.f32 %rs68, %f1105;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs67, %f1104;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs66, %f1103;} + + // inline asm + st.v4.u16 [%rd160], {%rs66, %rs67, %rs68, %rs62}; + bra.uni BB0_138; + +BB0_137: + mov.u64 %rd173, image_RNM2; + cvta.global.u64 %rd168, %rd173; + mov.u32 %r331, 8; + // inline asm + call (%rd167), _rt_buffer_get_64, (%rd168, %r101, %r331, %rd17, %rd18, %rd26, %rd26); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs75, %f351;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs74, %f350;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs73, %f349;} + + // inline asm + st.v4.u16 [%rd167], {%rs73, %rs74, %rs75, %rs62}; + +BB0_138: + ld.global.u32 %r332, [additive]; + setp.eq.s32 %p140, %r332, 0; + // inline asm + { cvt.rn.f16.f32 %rs76, %f564;} + + // inline asm + @%p140 bra BB0_140; + + mov.u64 %rd186, image_RNM3; + cvta.global.u64 %rd175, %rd186; + mov.u32 %r336, 8; + // inline asm + call (%rd174), _rt_buffer_get_64, (%rd175, %r101, %r336, %rd17, %rd18, %rd26, %rd26); + // inline asm + ld.v4.u16 {%rs83, %rs84, %rs85, %rs86}, [%rd174]; + // inline asm + { cvt.f32.f16 %f1110, %rs83;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1111, %rs84;} + + // inline asm + // inline asm + { cvt.f32.f16 %f1112, %rs85;} + + // inline asm + // inline asm + call (%rd180), _rt_buffer_get_64, (%rd175, %r101, %r336, %rd17, %rd18, %rd26, %rd26); + // inline asm + add.f32 %f1113, %f352, %f1110; + add.f32 %f1114, %f353, %f1111; + add.f32 %f1115, %f354, %f1112; + // inline asm + { cvt.rn.f16.f32 %rs82, %f1115;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs81, %f1114;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs80, %f1113;} + + // inline asm + st.v4.u16 [%rd180], {%rs80, %rs81, %rs82, %rs76}; + bra.uni BB0_161; + +BB0_140: + mov.u64 %rd193, image_RNM3; + cvta.global.u64 %rd188, %rd193; + mov.u32 %r338, 8; + // inline asm + call (%rd187), _rt_buffer_get_64, (%rd188, %r101, %r338, %rd17, %rd18, %rd26, %rd26); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs89, %f354;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs88, %f353;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs87, %f352;} + + // inline asm + st.v4.u16 [%rd187], {%rs87, %rs88, %rs89, %rs76}; + +BB0_161: + ret; +} + + -- cgit v1.2.3-freya