From eb84bb298d2b95aec7b2ae12cbf25ac64f25379a Mon Sep 17 00:00:00 2001 From: tylermurphy534 Date: Sun, 6 Nov 2022 15:12:42 -0500 Subject: move to self host --- .../Assets/Editor/x64/Bakery/lmPointLightSH.ptx | 2408 ++++++++++++++++++++ 1 file changed, 2408 insertions(+) create mode 100644 VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmPointLightSH.ptx (limited to 'VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmPointLightSH.ptx') diff --git a/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmPointLightSH.ptx b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmPointLightSH.ptx new file mode 100644 index 00000000..525980e0 --- /dev/null +++ b/VRCSDK3Worlds/Assets/Editor/x64/Bakery/lmPointLightSH.ptx @@ -0,0 +1,2408 @@ +// +// Generated by NVIDIA NVVM Compiler +// +// Compiler Build ID: CL-23083092 +// Cuda compilation tools, release 9.1, V9.1.85 +// Based on LLVM 3.4svn +// + +.version 6.1 +.target sm_30 +.address_size 64 + + // .globl _Z6oxMainv +.global .align 8 .b8 pixelID[8]; +.global .align 8 .b8 resolution[8]; +.global .align 4 .b8 normal[12]; +.global .align 4 .b8 camPos[12]; +.global .align 4 .b8 root[4]; +.global .align 4 .u32 imageEnabled; +.global .texref lightmap; +.global .align 16 .b8 tileInfo[16]; +.global .align 4 .u32 additive; +.global .align 1 .b8 image[1]; +.global .align 1 .b8 image_HDR[1]; +.global .align 1 .b8 image_HDR2[1]; +.global .align 1 .b8 image_Mask[1]; +.global .align 1 .b8 image_RNM0[1]; +.global .align 1 .b8 image_RNM1[1]; +.global .align 1 .b8 image_RNM2[1]; +.global .align 1 .b8 image_RNM3[1]; +.global .align 1 .b8 uvpos[1]; +.global .align 1 .b8 uvnormal[1]; +.global .align 4 .u32 samples; +.global .align 4 .f32 lightInvCutoff; +.global .align 4 .f32 lightRadius; +.global .align 4 .b8 lightPos[12]; +.global .align 4 .b8 lightColor[12]; +.global .align 4 .u32 ignoreNormal; +.global .align 4 .f32 lightFalloffFakeDistanceMult; +.global .align 4 .f32 lightFalloffMinRadiusSq; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; +.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; +.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; +.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; +.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; +.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0}; +.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0}; +.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919; +.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919; +.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; +.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; +.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1]; +.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1]; +.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1]; + +.visible .entry _Z6oxMainv( + +) +{ + .local .align 4 .b8 __local_depot0[4]; + .reg .b64 %SP; + .reg .b64 %SPL; + .reg .pred %p<139>; + .reg .b16 %rs<221>; + .reg .f32 %f<979>; + .reg .b32 %r<251>; + .reg .b64 %rd<369>; + + + mov.u64 %rd368, __local_depot0; + cvta.local.u64 %SP, %rd368; + ld.global.v2.u32 {%r28, %r29}, [pixelID]; + cvt.u64.u32 %rd12, %r28; + cvt.u64.u32 %rd13, %r29; + mov.u64 %rd16, uvnormal; + cvta.global.u64 %rd11, %rd16; + mov.u32 %r26, 2; + mov.u32 %r27, 4; + mov.u64 %rd15, 0; + // inline asm + call (%rd10), _rt_buffer_get_64, (%rd11, %r26, %r27, %rd12, %rd13, %rd15, %rd15); + // inline asm + ld.u32 %r1, [%rd10]; + shr.u32 %r32, %r1, 16; + cvt.u16.u32 %rs1, %r32; + and.b16 %rs12, %rs1, 255; + cvt.u16.u32 %rs13, %r1; + or.b16 %rs14, %rs13, %rs12; + setp.eq.s16 %p7, %rs14, 0; + mov.f32 %f952, 0f00000000; + mov.f32 %f953, %f952; + mov.f32 %f954, %f952; + @%p7 bra BB0_2; + + ld.u8 %rs15, [%rd10+1]; + and.b16 %rs17, %rs13, 255; + cvt.rn.f32.u16 %f128, %rs17; + div.rn.f32 %f129, %f128, 0f437F0000; + fma.rn.f32 %f130, %f129, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f131, %rs15; + div.rn.f32 %f132, %f131, 0f437F0000; + fma.rn.f32 %f133, %f132, 0f40000000, 0fBF800000; + cvt.rn.f32.u16 %f134, %rs12; + div.rn.f32 %f135, %f134, 0f437F0000; + fma.rn.f32 %f136, %f135, 0f40000000, 0fBF800000; + mul.f32 %f137, %f133, %f133; + fma.rn.f32 %f138, %f130, %f130, %f137; + fma.rn.f32 %f139, %f136, %f136, %f138; + sqrt.rn.f32 %f140, %f139; + rcp.rn.f32 %f141, %f140; + mul.f32 %f952, %f130, %f141; + mul.f32 %f953, %f133, %f141; + mul.f32 %f954, %f136, %f141; + +BB0_2: + ld.global.v2.u32 {%r33, %r34}, [pixelID]; + ld.global.v2.u32 {%r36, %r37}, [tileInfo]; + add.s32 %r2, %r33, %r36; + add.s32 %r3, %r34, %r37; + setp.eq.f32 %p8, %f953, 0f00000000; + setp.eq.f32 %p9, %f952, 0f00000000; + and.pred %p10, %p9, %p8; + setp.eq.f32 %p11, %f954, 0f00000000; + and.pred %p12, %p10, %p11; + @%p12 bra BB0_116; + bra.uni BB0_3; + +BB0_116: + ld.global.u32 %r250, [imageEnabled]; + and.b32 %r199, %r250, 1; + setp.eq.b32 %p131, %r199, 1; + @!%p131 bra BB0_118; + bra.uni BB0_117; + +BB0_117: + cvt.u64.u32 %rd256, %r2; + cvt.u64.u32 %rd257, %r3; + mov.u64 %rd260, image; + cvta.global.u64 %rd255, %rd260; + // inline asm + call (%rd254), _rt_buffer_get_64, (%rd255, %r26, %r27, %rd256, %rd257, %rd15, %rd15); + // inline asm + mov.u16 %rs153, 0; + st.v4.u8 [%rd254], {%rs153, %rs153, %rs153, %rs153}; + ld.global.u32 %r250, [imageEnabled]; + +BB0_118: + and.b32 %r202, %r250, 8; + setp.eq.s32 %p132, %r202, 0; + @%p132 bra BB0_120; + + cvt.u64.u32 %rd264, %r3; + cvt.u64.u32 %rd263, %r2; + mov.u64 %rd267, image_Mask; + cvta.global.u64 %rd262, %rd267; + // inline asm + call (%rd261), _rt_buffer_get_64, (%rd262, %r26, %r26, %rd263, %rd264, %rd15, %rd15); + // inline asm + mov.f32 %f849, 0f00000000; + cvt.rzi.u32.f32 %r205, %f849; + cvt.u16.u32 %rs154, %r205; + mov.u16 %rs155, 0; + st.v2.u8 [%rd261], {%rs154, %rs155}; + ld.global.u32 %r250, [imageEnabled]; + +BB0_120: + cvt.u64.u32 %rd8, %r2; + cvt.u64.u32 %rd9, %r3; + and.b32 %r206, %r250, 4; + setp.eq.s32 %p133, %r206, 0; + @%p133 bra BB0_124; + + ld.global.u32 %r207, [additive]; + setp.eq.s32 %p134, %r207, 0; + @%p134 bra BB0_123; + + mov.u64 %rd280, image_HDR; + cvta.global.u64 %rd269, %rd280; + mov.u32 %r211, 8; + // inline asm + call (%rd268), _rt_buffer_get_64, (%rd269, %r26, %r211, %rd8, %rd9, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs162, %rs163, %rs164, %rs165}, [%rd268]; + // inline asm + { cvt.f32.f16 %f850, %rs162;} + + // inline asm + // inline asm + { cvt.f32.f16 %f851, %rs163;} + + // inline asm + // inline asm + { cvt.f32.f16 %f852, %rs164;} + + // inline asm + // inline asm + call (%rd274), _rt_buffer_get_64, (%rd269, %r26, %r211, %rd8, %rd9, %rd15, %rd15); + // inline asm + add.f32 %f853, %f850, 0f00000000; + add.f32 %f854, %f851, 0f00000000; + add.f32 %f855, %f852, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs161, %f855;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs160, %f854;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs159, %f853;} + + // inline asm + mov.u16 %rs166, 0; + st.v4.u16 [%rd274], {%rs159, %rs160, %rs161, %rs166}; + bra.uni BB0_124; + +BB0_3: + ld.global.v2.u32 {%r43, %r44}, [pixelID]; + cvt.u64.u32 %rd19, %r43; + cvt.u64.u32 %rd20, %r44; + mov.u64 %rd23, uvpos; + cvta.global.u64 %rd18, %rd23; + mov.u32 %r42, 12; + // inline asm + call (%rd17), _rt_buffer_get_64, (%rd18, %r26, %r42, %rd19, %rd20, %rd15, %rd15); + // inline asm + ld.global.f32 %f7, [lightPos]; + ld.f32 %f12, [%rd17+8]; + ld.f32 %f10, [%rd17+4]; + ld.f32 %f8, [%rd17]; + sub.f32 %f144, %f7, %f8; + ld.global.f32 %f9, [lightPos+4]; + sub.f32 %f145, %f9, %f10; + ld.global.f32 %f11, [lightPos+8]; + sub.f32 %f146, %f11, %f12; + mul.f32 %f147, %f145, %f145; + fma.rn.f32 %f148, %f144, %f144, %f147; + fma.rn.f32 %f149, %f146, %f146, %f148; + sqrt.rn.f32 %f150, %f149; + rcp.rn.f32 %f151, %f150; + ld.global.f32 %f152, [lightFalloffFakeDistanceMult]; + mul.f32 %f16, %f150, %f152; + ld.global.f32 %f153, [lightInvCutoff]; + mul.f32 %f17, %f150, %f153; + mov.f32 %f157, 0f40800000; + abs.f32 %f19, %f17; + setp.lt.f32 %p13, %f19, 0f00800000; + mul.f32 %f159, %f19, 0f4B800000; + selp.f32 %f160, 0fC3170000, 0fC2FE0000, %p13; + selp.f32 %f161, %f159, %f19, %p13; + mov.b32 %r47, %f161; + and.b32 %r48, %r47, 8388607; + or.b32 %r49, %r48, 1065353216; + mov.b32 %f162, %r49; + shr.u32 %r50, %r47, 23; + cvt.rn.f32.u32 %f163, %r50; + add.f32 %f164, %f160, %f163; + setp.gt.f32 %p14, %f162, 0f3FB504F3; + mul.f32 %f165, %f162, 0f3F000000; + add.f32 %f166, %f164, 0f3F800000; + selp.f32 %f167, %f165, %f162, %p14; + selp.f32 %f168, %f166, %f164, %p14; + add.f32 %f169, %f167, 0fBF800000; + add.f32 %f143, %f167, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f142,%f143; + // inline asm + add.f32 %f170, %f169, %f169; + mul.f32 %f171, %f142, %f170; + mul.f32 %f172, %f171, %f171; + mov.f32 %f173, 0f3C4CAF63; + mov.f32 %f174, 0f3B18F0FE; + fma.rn.f32 %f175, %f174, %f172, %f173; + mov.f32 %f176, 0f3DAAAABD; + fma.rn.f32 %f177, %f175, %f172, %f176; + mul.rn.f32 %f178, %f177, %f172; + mul.rn.f32 %f179, %f178, %f171; + sub.f32 %f180, %f169, %f171; + neg.f32 %f181, %f171; + add.f32 %f182, %f180, %f180; + fma.rn.f32 %f183, %f181, %f169, %f182; + mul.rn.f32 %f184, %f142, %f183; + add.f32 %f185, %f179, %f171; + sub.f32 %f186, %f171, %f185; + add.f32 %f187, %f179, %f186; + add.f32 %f188, %f184, %f187; + add.f32 %f189, %f185, %f188; + sub.f32 %f190, %f185, %f189; + add.f32 %f191, %f188, %f190; + mov.f32 %f192, 0f3F317200; + mul.rn.f32 %f193, %f168, %f192; + mov.f32 %f194, 0f35BFBE8E; + mul.rn.f32 %f195, %f168, %f194; + add.f32 %f196, %f193, %f189; + sub.f32 %f197, %f193, %f196; + add.f32 %f198, %f189, %f197; + add.f32 %f199, %f191, %f198; + add.f32 %f200, %f195, %f199; + add.f32 %f201, %f196, %f200; + sub.f32 %f202, %f196, %f201; + add.f32 %f203, %f200, %f202; + mul.rn.f32 %f204, %f157, %f201; + neg.f32 %f205, %f204; + fma.rn.f32 %f206, %f157, %f201, %f205; + fma.rn.f32 %f207, %f157, %f203, %f206; + mov.f32 %f208, 0f00000000; + fma.rn.f32 %f209, %f208, %f201, %f207; + add.rn.f32 %f210, %f204, %f209; + neg.f32 %f211, %f210; + add.rn.f32 %f212, %f204, %f211; + add.rn.f32 %f213, %f212, %f209; + mov.b32 %r51, %f210; + setp.eq.s32 %p15, %r51, 1118925336; + add.s32 %r52, %r51, -1; + mov.b32 %f214, %r52; + add.f32 %f215, %f213, 0f37000000; + selp.f32 %f216, %f214, %f210, %p15; + selp.f32 %f20, %f215, %f213, %p15; + mul.f32 %f217, %f216, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f218, %f217; + mov.f32 %f219, 0fBF317200; + fma.rn.f32 %f220, %f218, %f219, %f216; + mov.f32 %f221, 0fB5BFBE8E; + fma.rn.f32 %f222, %f218, %f221, %f220; + mul.f32 %f223, %f222, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f224, %f223; + add.f32 %f225, %f218, 0f00000000; + ex2.approx.f32 %f226, %f225; + mul.f32 %f227, %f224, %f226; + setp.lt.f32 %p16, %f216, 0fC2D20000; + selp.f32 %f228, 0f00000000, %f227, %p16; + setp.gt.f32 %p17, %f216, 0f42D20000; + selp.f32 %f955, 0f7F800000, %f228, %p17; + setp.eq.f32 %p18, %f955, 0f7F800000; + @%p18 bra BB0_5; + + fma.rn.f32 %f955, %f955, %f20, %f955; + +BB0_5: + mov.f32 %f890, 0f40000000; + cvt.rzi.f32.f32 %f889, %f890; + add.f32 %f888, %f889, %f889; + mov.f32 %f887, 0f40800000; + sub.f32 %f886, %f887, %f888; + abs.f32 %f885, %f886; + setp.lt.f32 %p19, %f17, 0f00000000; + setp.eq.f32 %p20, %f885, 0f3F800000; + and.pred %p1, %p19, %p20; + mov.b32 %r53, %f955; + xor.b32 %r54, %r53, -2147483648; + mov.b32 %f229, %r54; + selp.f32 %f957, %f229, %f955, %p1; + setp.eq.f32 %p21, %f17, 0f00000000; + @%p21 bra BB0_8; + bra.uni BB0_6; + +BB0_8: + add.f32 %f232, %f17, %f17; + selp.f32 %f957, %f232, 0f00000000, %p20; + bra.uni BB0_9; + +BB0_6: + setp.geu.f32 %p22, %f17, 0f00000000; + @%p22 bra BB0_9; + + mov.f32 %f943, 0f40800000; + cvt.rzi.f32.f32 %f231, %f943; + setp.neu.f32 %p23, %f231, 0f40800000; + selp.f32 %f957, 0f7FFFFFFF, %f957, %p23; + +BB0_9: + abs.f32 %f891, %f17; + add.f32 %f233, %f891, 0f40800000; + mov.b32 %r55, %f233; + setp.lt.s32 %p25, %r55, 2139095040; + @%p25 bra BB0_14; + + abs.f32 %f941, %f17; + setp.gtu.f32 %p26, %f941, 0f7F800000; + @%p26 bra BB0_13; + bra.uni BB0_11; + +BB0_13: + add.f32 %f957, %f17, 0f40800000; + bra.uni BB0_14; + +BB0_11: + abs.f32 %f942, %f17; + setp.neu.f32 %p27, %f942, 0f7F800000; + @%p27 bra BB0_14; + + selp.f32 %f957, 0fFF800000, 0f7F800000, %p1; + +BB0_14: + sub.f32 %f905, %f11, %f12; + mul.f32 %f904, %f905, %f151; + sub.f32 %f903, %f7, %f8; + mul.f32 %f902, %f903, %f151; + sub.f32 %f901, %f9, %f10; + mul.f32 %f900, %f901, %f151; + mov.f32 %f899, 0fB5BFBE8E; + mov.f32 %f898, 0fBF317200; + mov.f32 %f897, 0f00000000; + mov.f32 %f896, 0f35BFBE8E; + mov.f32 %f895, 0f3F317200; + mov.f32 %f894, 0f3DAAAABD; + mov.f32 %f893, 0f3C4CAF63; + mov.f32 %f892, 0f3B18F0FE; + mov.f32 %f236, 0f3F800000; + sub.f32 %f237, %f236, %f957; + setp.eq.f32 %p28, %f17, 0f3F800000; + selp.f32 %f238, 0f00000000, %f237, %p28; + cvt.sat.f32.f32 %f239, %f238; + ld.global.f32 %f240, [lightFalloffMinRadiusSq]; + fma.rn.f32 %f241, %f16, %f16, %f240; + div.rn.f32 %f31, %f239, %f241; + mul.f32 %f242, %f953, %f900; + fma.rn.f32 %f243, %f952, %f902, %f242; + fma.rn.f32 %f244, %f954, %f904, %f243; + ld.global.u32 %r248, [imageEnabled]; + and.b32 %r56, %r248, 32; + ld.global.u32 %r57, [ignoreNormal]; + or.b32 %r58, %r56, %r57; + setp.eq.s32 %p29, %r58, 0; + selp.f32 %f32, %f244, 0f3F800000, %p29; + fma.rn.f32 %f245, %f32, 0f3F000000, 0f3F000000; + cvt.sat.f32.f32 %f246, %f245; + add.f32 %f33, %f246, %f246; + mov.f32 %f250, 0f41A00000; + abs.f32 %f35, %f33; + setp.lt.f32 %p30, %f35, 0f00800000; + mul.f32 %f252, %f35, 0f4B800000; + selp.f32 %f253, 0fC3170000, 0fC2FE0000, %p30; + selp.f32 %f254, %f252, %f35, %p30; + mov.b32 %r59, %f254; + and.b32 %r60, %r59, 8388607; + or.b32 %r61, %r60, 1065353216; + mov.b32 %f255, %r61; + shr.u32 %r62, %r59, 23; + cvt.rn.f32.u32 %f256, %r62; + add.f32 %f257, %f253, %f256; + setp.gt.f32 %p31, %f255, 0f3FB504F3; + mul.f32 %f258, %f255, 0f3F000000; + add.f32 %f259, %f257, 0f3F800000; + selp.f32 %f260, %f258, %f255, %p31; + selp.f32 %f261, %f259, %f257, %p31; + add.f32 %f262, %f260, 0fBF800000; + add.f32 %f235, %f260, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f234,%f235; + // inline asm + add.f32 %f263, %f262, %f262; + mul.f32 %f264, %f234, %f263; + mul.f32 %f265, %f264, %f264; + fma.rn.f32 %f268, %f892, %f265, %f893; + fma.rn.f32 %f270, %f268, %f265, %f894; + mul.rn.f32 %f271, %f270, %f265; + mul.rn.f32 %f272, %f271, %f264; + sub.f32 %f273, %f262, %f264; + neg.f32 %f274, %f264; + add.f32 %f275, %f273, %f273; + fma.rn.f32 %f276, %f274, %f262, %f275; + mul.rn.f32 %f277, %f234, %f276; + add.f32 %f278, %f272, %f264; + sub.f32 %f279, %f264, %f278; + add.f32 %f280, %f272, %f279; + add.f32 %f281, %f277, %f280; + add.f32 %f282, %f278, %f281; + sub.f32 %f283, %f278, %f282; + add.f32 %f284, %f281, %f283; + mul.rn.f32 %f286, %f261, %f895; + mul.rn.f32 %f288, %f261, %f896; + add.f32 %f289, %f286, %f282; + sub.f32 %f290, %f286, %f289; + add.f32 %f291, %f282, %f290; + add.f32 %f292, %f284, %f291; + add.f32 %f293, %f288, %f292; + add.f32 %f294, %f289, %f293; + sub.f32 %f295, %f289, %f294; + add.f32 %f296, %f293, %f295; + mul.rn.f32 %f297, %f250, %f294; + neg.f32 %f298, %f297; + fma.rn.f32 %f299, %f250, %f294, %f298; + fma.rn.f32 %f300, %f250, %f296, %f299; + fma.rn.f32 %f302, %f897, %f294, %f300; + add.rn.f32 %f303, %f297, %f302; + neg.f32 %f304, %f303; + add.rn.f32 %f305, %f297, %f304; + add.rn.f32 %f306, %f305, %f302; + mov.b32 %r63, %f303; + setp.eq.s32 %p32, %r63, 1118925336; + add.s32 %r64, %r63, -1; + mov.b32 %f307, %r64; + add.f32 %f308, %f306, 0f37000000; + selp.f32 %f309, %f307, %f303, %p32; + selp.f32 %f36, %f308, %f306, %p32; + mul.f32 %f310, %f309, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f311, %f310; + fma.rn.f32 %f313, %f311, %f898, %f309; + fma.rn.f32 %f315, %f311, %f899, %f313; + mul.f32 %f316, %f315, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f317, %f316; + add.f32 %f318, %f311, 0f00000000; + ex2.approx.f32 %f319, %f318; + mul.f32 %f320, %f317, %f319; + setp.lt.f32 %p33, %f309, 0fC2D20000; + selp.f32 %f321, 0f00000000, %f320, %p33; + setp.gt.f32 %p34, %f309, 0f42D20000; + selp.f32 %f958, 0f7F800000, %f321, %p34; + setp.eq.f32 %p35, %f958, 0f7F800000; + @%p35 bra BB0_16; + + fma.rn.f32 %f958, %f958, %f36, %f958; + +BB0_16: + mov.f32 %f949, 0f41200000; + cvt.rzi.f32.f32 %f948, %f949; + add.f32 %f947, %f948, %f948; + mov.f32 %f946, 0f41A00000; + sub.f32 %f945, %f946, %f947; + abs.f32 %f944, %f945; + setp.lt.f32 %p36, %f33, 0f00000000; + setp.eq.f32 %p37, %f944, 0f3F800000; + and.pred %p2, %p36, %p37; + mov.b32 %r65, %f958; + xor.b32 %r66, %r65, -2147483648; + mov.b32 %f322, %r66; + selp.f32 %f960, %f322, %f958, %p2; + setp.eq.f32 %p38, %f33, 0f00000000; + @%p38 bra BB0_19; + bra.uni BB0_17; + +BB0_19: + add.f32 %f325, %f33, %f33; + selp.f32 %f960, %f325, 0f00000000, %p37; + bra.uni BB0_20; + +BB0_17: + setp.geu.f32 %p39, %f33, 0f00000000; + @%p39 bra BB0_20; + + mov.f32 %f951, 0f41A00000; + cvt.rzi.f32.f32 %f324, %f951; + setp.neu.f32 %p40, %f324, 0f41A00000; + selp.f32 %f960, 0f7FFFFFFF, %f960, %p40; + +BB0_20: + add.f32 %f326, %f35, 0f41A00000; + mov.b32 %r67, %f326; + setp.lt.s32 %p42, %r67, 2139095040; + @%p42 bra BB0_25; + + setp.gtu.f32 %p43, %f35, 0f7F800000; + @%p43 bra BB0_24; + bra.uni BB0_22; + +BB0_24: + add.f32 %f960, %f33, 0f41A00000; + bra.uni BB0_25; + +BB0_22: + setp.neu.f32 %p44, %f35, 0f7F800000; + @%p44 bra BB0_25; + + selp.f32 %f960, 0fFF800000, 0f7F800000, %p2; + +BB0_25: + setp.eq.f32 %p45, %f33, 0f3F800000; + selp.f32 %f327, 0f3F800000, %f960, %p45; + cvt.sat.f32.f32 %f328, %f327; + mul.f32 %f47, %f31, %f328; + mul.f32 %f329, %f32, 0f40800000; + cvt.sat.f32.f32 %f48, %f329; + mul.f32 %f330, %f47, %f48; + ld.global.f32 %f331, [lightColor+4]; + ld.global.f32 %f332, [lightColor]; + max.f32 %f333, %f332, %f331; + ld.global.f32 %f334, [lightColor+8]; + max.f32 %f335, %f333, %f334; + mul.f32 %f336, %f330, %f335; + setp.lt.f32 %p46, %f336, 0f3727C5AC; + @%p46 bra BB0_96; + bra.uni BB0_26; + +BB0_96: + and.b32 %r156, %r248, 1; + setp.eq.b32 %p123, %r156, 1; + @!%p123 bra BB0_98; + bra.uni BB0_97; + +BB0_97: + cvt.u64.u32 %rd142, %r2; + cvt.u64.u32 %rd143, %r3; + mov.u64 %rd146, image; + cvta.global.u64 %rd141, %rd146; + // inline asm + call (%rd140), _rt_buffer_get_64, (%rd141, %r26, %r27, %rd142, %rd143, %rd15, %rd15); + // inline asm + mov.u16 %rs89, 1; + mov.u16 %rs90, 0; + st.v4.u8 [%rd140], {%rs90, %rs90, %rs90, %rs89}; + ld.global.u32 %r248, [imageEnabled]; + +BB0_98: + and.b32 %r159, %r248, 8; + setp.eq.s32 %p124, %r159, 0; + @%p124 bra BB0_100; + + cvt.u64.u32 %rd150, %r3; + cvt.u64.u32 %rd149, %r2; + mov.u64 %rd153, image_Mask; + cvta.global.u64 %rd148, %rd153; + // inline asm + call (%rd147), _rt_buffer_get_64, (%rd148, %r26, %r26, %rd149, %rd150, %rd15, %rd15); + // inline asm + mov.f32 %f806, 0f00000000; + cvt.rzi.u32.f32 %r162, %f806; + cvt.u16.u32 %rs91, %r162; + mov.u16 %rs92, 255; + st.v2.u8 [%rd147], {%rs91, %rs92}; + ld.global.u32 %r248, [imageEnabled]; + +BB0_100: + cvt.u64.u32 %rd6, %r2; + cvt.u64.u32 %rd7, %r3; + and.b32 %r163, %r248, 4; + setp.eq.s32 %p125, %r163, 0; + @%p125 bra BB0_104; + + ld.global.u32 %r164, [additive]; + setp.eq.s32 %p126, %r164, 0; + mov.f32 %f807, 0f3F800000; + // inline asm + { cvt.rn.f16.f32 %rs93, %f807;} + + // inline asm + @%p126 bra BB0_103; + + mov.u64 %rd166, image_HDR; + cvta.global.u64 %rd155, %rd166; + mov.u32 %r168, 8; + // inline asm + call (%rd154), _rt_buffer_get_64, (%rd155, %r26, %r168, %rd6, %rd7, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs100, %rs101, %rs102, %rs103}, [%rd154]; + // inline asm + { cvt.f32.f16 %f808, %rs100;} + + // inline asm + // inline asm + { cvt.f32.f16 %f809, %rs101;} + + // inline asm + // inline asm + { cvt.f32.f16 %f810, %rs102;} + + // inline asm + // inline asm + call (%rd160), _rt_buffer_get_64, (%rd155, %r26, %r168, %rd6, %rd7, %rd15, %rd15); + // inline asm + add.f32 %f811, %f808, 0f00000000; + add.f32 %f812, %f809, 0f00000000; + add.f32 %f813, %f810, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs99, %f813;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs98, %f812;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs97, %f811;} + + // inline asm + st.v4.u16 [%rd160], {%rs97, %rs98, %rs99, %rs93}; + bra.uni BB0_104; + +BB0_26: + mov.f32 %f964, 0f00000000; + mul.f32 %f338, %f8, 0f3456BF95; + abs.f32 %f339, %f952; + div.rn.f32 %f340, %f338, %f339; + abs.f32 %f341, %f953; + mul.f32 %f342, %f10, 0f3456BF95; + div.rn.f32 %f343, %f342, %f341; + abs.f32 %f344, %f954; + mul.f32 %f345, %f12, 0f3456BF95; + div.rn.f32 %f346, %f345, %f344; + abs.f32 %f347, %f340; + abs.f32 %f348, %f343; + abs.f32 %f349, %f346; + mov.f32 %f350, 0f38D1B717; + max.f32 %f351, %f347, %f350; + max.f32 %f352, %f348, %f350; + max.f32 %f353, %f349, %f350; + fma.rn.f32 %f49, %f952, %f351, %f8; + fma.rn.f32 %f50, %f953, %f352, %f10; + fma.rn.f32 %f51, %f954, %f353, %f12; + ld.global.u32 %r244, [samples]; + setp.lt.s32 %p47, %r244, 1; + @%p47 bra BB0_29; + + mul.f32 %f355, %f49, 0f3456BF95; + abs.f32 %f356, %f355; + mul.f32 %f357, %f50, 0f3456BF95; + abs.f32 %f358, %f357; + mul.f32 %f359, %f51, 0f3456BF95; + abs.f32 %f360, %f359; + max.f32 %f361, %f356, %f358; + max.f32 %f362, %f361, %f360; + max.f32 %f52, %f362, %f350; + add.u64 %rd24, %SP, 0; + cvta.to.local.u64 %rd2, %rd24; + mov.f32 %f964, 0f00000000; + mov.u32 %r243, 0; + mov.f32 %f961, %f11; + mov.f32 %f962, %f9; + mov.f32 %f963, %f7; + bra.uni BB0_28; + +BB0_95: + ld.global.f32 %f963, [lightPos]; + ld.global.f32 %f962, [lightPos+4]; + ld.global.f32 %f961, [lightPos+8]; + ld.global.u32 %r248, [imageEnabled]; + +BB0_28: + cvt.rn.f32.s32 %f372, %r243; + mul.f32 %f373, %f372, 0f3DD32618; + cvt.rmi.f32.f32 %f374, %f373; + sub.f32 %f375, %f373, %f374; + mul.f32 %f376, %f372, 0f3DD2F1AA; + cvt.rmi.f32.f32 %f377, %f376; + sub.f32 %f378, %f376, %f377; + mul.f32 %f379, %f372, 0f3DC74539; + cvt.rmi.f32.f32 %f380, %f379; + sub.f32 %f381, %f379, %f380; + add.f32 %f382, %f378, 0f4199851F; + add.f32 %f383, %f381, 0f4199851F; + add.f32 %f384, %f375, 0f4199851F; + mul.f32 %f385, %f378, %f383; + fma.rn.f32 %f386, %f375, %f382, %f385; + fma.rn.f32 %f387, %f384, %f381, %f386; + add.f32 %f388, %f375, %f387; + add.f32 %f389, %f378, %f387; + add.f32 %f390, %f381, %f387; + add.f32 %f391, %f388, %f389; + mul.f32 %f392, %f390, %f391; + cvt.rmi.f32.f32 %f393, %f392; + sub.f32 %f394, %f392, %f393; + add.f32 %f395, %f388, %f390; + mul.f32 %f396, %f389, %f395; + cvt.rmi.f32.f32 %f397, %f396; + sub.f32 %f398, %f396, %f397; + add.f32 %f399, %f389, %f390; + mul.f32 %f400, %f388, %f399; + cvt.rmi.f32.f32 %f401, %f400; + sub.f32 %f402, %f400, %f401; + fma.rn.f32 %f403, %f394, 0f40000000, 0fBF800000; + fma.rn.f32 %f404, %f398, 0f40000000, 0fBF800000; + fma.rn.f32 %f405, %f402, 0f40000000, 0fBF800000; + ld.global.f32 %f406, [lightRadius]; + fma.rn.f32 %f407, %f406, %f403, %f963; + fma.rn.f32 %f408, %f406, %f404, %f962; + fma.rn.f32 %f409, %f406, %f405, %f961; + sub.f32 %f410, %f407, %f8; + sub.f32 %f411, %f408, %f10; + sub.f32 %f412, %f409, %f12; + mul.f32 %f413, %f411, %f411; + fma.rn.f32 %f414, %f410, %f410, %f413; + fma.rn.f32 %f415, %f412, %f412, %f414; + sqrt.rn.f32 %f371, %f415; + rcp.rn.f32 %f416, %f371; + mul.f32 %f367, %f416, %f410; + mul.f32 %f368, %f416, %f411; + mul.f32 %f369, %f416, %f412; + and.b32 %r72, %r248, 32; + setp.eq.s32 %p48, %r72, 0; + selp.f32 %f417, 0f3F800000, 0f41200000, %p48; + mul.f32 %f370, %f417, %f52; + mov.u32 %r73, 1065353216; + st.local.u32 [%rd2], %r73; + ld.global.u32 %r69, [root]; + mov.u32 %r70, 1; + // inline asm + call _rt_trace_64, (%r69, %f49, %f50, %f51, %f367, %f368, %f369, %r70, %f370, %f371, %rd24, %r27); + // inline asm + ld.local.f32 %f418, [%rd2]; + add.f32 %f964, %f964, %f418; + ld.global.u32 %r244, [samples]; + add.s32 %r243, %r243, 1; + setp.lt.s32 %p49, %r243, %r244; + @%p49 bra BB0_95; + +BB0_29: + mov.f32 %f966, 0f3F800000; + setp.eq.s32 %p50, %r244, 0; + @%p50 bra BB0_31; + + cvt.rn.f32.s32 %f420, %r244; + div.rn.f32 %f966, %f964, %f420; + +BB0_31: + cvt.sat.f32.f32 %f421, %f32; + mul.f32 %f422, %f47, %f421; + mul.f32 %f423, %f966, %f422; + ld.global.f32 %f424, [lightColor]; + mul.f32 %f61, %f424, %f423; + ld.global.f32 %f425, [lightColor+4]; + mul.f32 %f62, %f425, %f423; + ld.global.f32 %f426, [lightColor+8]; + mul.f32 %f63, %f423, %f426; + ld.global.u32 %r246, [imageEnabled]; + and.b32 %r74, %r246, 8; + setp.eq.s32 %p51, %r74, 0; + @%p51 bra BB0_44; + + mov.f32 %f913, 0fB5BFBE8E; + mov.f32 %f912, 0fBF317200; + mov.f32 %f911, 0f35BFBE8E; + mov.f32 %f910, 0f3F317200; + mov.f32 %f909, 0f3DAAAABD; + mov.f32 %f908, 0f3C4CAF63; + mov.f32 %f907, 0f3B18F0FE; + cvt.u64.u32 %rd28, %r2; + cvt.u64.u32 %rd29, %r3; + mov.u64 %rd32, image_Mask; + cvta.global.u64 %rd27, %rd32; + // inline asm + call (%rd26), _rt_buffer_get_64, (%rd27, %r26, %r26, %rd28, %rd29, %rd15, %rd15); + // inline asm + mov.f32 %f429, 0f3E68BA2E; + cvt.rzi.f32.f32 %f430, %f429; + fma.rn.f32 %f431, %f430, 0fC0000000, 0f3EE8BA2E; + abs.f32 %f64, %f431; + abs.f32 %f65, %f966; + setp.lt.f32 %p52, %f65, 0f00800000; + mul.f32 %f432, %f65, 0f4B800000; + selp.f32 %f433, 0fC3170000, 0fC2FE0000, %p52; + selp.f32 %f434, %f432, %f65, %p52; + mov.b32 %r77, %f434; + and.b32 %r78, %r77, 8388607; + or.b32 %r79, %r78, 1065353216; + mov.b32 %f435, %r79; + shr.u32 %r80, %r77, 23; + cvt.rn.f32.u32 %f436, %r80; + add.f32 %f437, %f433, %f436; + setp.gt.f32 %p53, %f435, 0f3FB504F3; + mul.f32 %f438, %f435, 0f3F000000; + add.f32 %f439, %f437, 0f3F800000; + selp.f32 %f440, %f438, %f435, %p53; + selp.f32 %f441, %f439, %f437, %p53; + add.f32 %f442, %f440, 0fBF800000; + add.f32 %f428, %f440, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f427,%f428; + // inline asm + add.f32 %f443, %f442, %f442; + mul.f32 %f444, %f427, %f443; + mul.f32 %f445, %f444, %f444; + fma.rn.f32 %f448, %f907, %f445, %f908; + fma.rn.f32 %f450, %f448, %f445, %f909; + mul.rn.f32 %f451, %f450, %f445; + mul.rn.f32 %f452, %f451, %f444; + sub.f32 %f453, %f442, %f444; + neg.f32 %f454, %f444; + add.f32 %f455, %f453, %f453; + fma.rn.f32 %f456, %f454, %f442, %f455; + mul.rn.f32 %f457, %f427, %f456; + add.f32 %f458, %f452, %f444; + sub.f32 %f459, %f444, %f458; + add.f32 %f460, %f452, %f459; + add.f32 %f461, %f457, %f460; + add.f32 %f462, %f458, %f461; + sub.f32 %f463, %f458, %f462; + add.f32 %f464, %f461, %f463; + mul.rn.f32 %f466, %f441, %f910; + mul.rn.f32 %f468, %f441, %f911; + add.f32 %f469, %f466, %f462; + sub.f32 %f470, %f466, %f469; + add.f32 %f471, %f462, %f470; + add.f32 %f472, %f464, %f471; + add.f32 %f473, %f468, %f472; + add.f32 %f474, %f469, %f473; + sub.f32 %f475, %f469, %f474; + add.f32 %f476, %f473, %f475; + mov.f32 %f477, 0f3EE8BA2E; + mul.rn.f32 %f478, %f477, %f474; + neg.f32 %f479, %f478; + fma.rn.f32 %f480, %f477, %f474, %f479; + fma.rn.f32 %f481, %f477, %f476, %f480; + mov.f32 %f482, 0f00000000; + fma.rn.f32 %f483, %f482, %f474, %f481; + add.rn.f32 %f484, %f478, %f483; + neg.f32 %f485, %f484; + add.rn.f32 %f486, %f478, %f485; + add.rn.f32 %f487, %f486, %f483; + mov.b32 %r81, %f484; + setp.eq.s32 %p54, %r81, 1118925336; + add.s32 %r82, %r81, -1; + mov.b32 %f488, %r82; + add.f32 %f489, %f487, 0f37000000; + selp.f32 %f490, %f488, %f484, %p54; + selp.f32 %f66, %f489, %f487, %p54; + mul.f32 %f491, %f490, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f492, %f491; + fma.rn.f32 %f494, %f492, %f912, %f490; + fma.rn.f32 %f496, %f492, %f913, %f494; + mul.f32 %f497, %f496, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f498, %f497; + add.f32 %f499, %f492, 0f00000000; + ex2.approx.f32 %f500, %f499; + mul.f32 %f501, %f498, %f500; + setp.lt.f32 %p55, %f490, 0fC2D20000; + selp.f32 %f502, 0f00000000, %f501, %p55; + setp.gt.f32 %p56, %f490, 0f42D20000; + selp.f32 %f967, 0f7F800000, %f502, %p56; + setp.eq.f32 %p57, %f967, 0f7F800000; + @%p57 bra BB0_34; + + fma.rn.f32 %f967, %f967, %f66, %f967; + +BB0_34: + setp.lt.f32 %p58, %f966, 0f00000000; + setp.eq.f32 %p59, %f64, 0f3F800000; + and.pred %p3, %p58, %p59; + mov.b32 %r83, %f967; + xor.b32 %r84, %r83, -2147483648; + mov.b32 %f503, %r84; + selp.f32 %f969, %f503, %f967, %p3; + setp.eq.f32 %p60, %f966, 0f00000000; + @%p60 bra BB0_37; + bra.uni BB0_35; + +BB0_37: + add.f32 %f506, %f966, %f966; + selp.f32 %f969, %f506, 0f00000000, %p59; + bra.uni BB0_38; + +BB0_123: + mov.u64 %rd287, image_HDR; + cvta.global.u64 %rd282, %rd287; + mov.u32 %r213, 8; + // inline asm + call (%rd281), _rt_buffer_get_64, (%rd282, %r26, %r213, %rd8, %rd9, %rd15, %rd15); + // inline asm + mov.f32 %f856, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs167, %f856;} + + // inline asm + mov.u16 %rs168, 0; + st.v4.u16 [%rd281], {%rs167, %rs167, %rs167, %rs168}; + +BB0_124: + ld.global.u32 %r214, [additive]; + setp.eq.s32 %p135, %r214, 0; + @%p135 bra BB0_126; + + mov.u64 %rd300, image_RNM0; + cvta.global.u64 %rd289, %rd300; + mov.u32 %r218, 8; + // inline asm + call (%rd288), _rt_buffer_get_64, (%rd289, %r26, %r218, %rd8, %rd9, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs175, %rs176, %rs177, %rs178}, [%rd288]; + // inline asm + { cvt.f32.f16 %f857, %rs175;} + + // inline asm + // inline asm + { cvt.f32.f16 %f858, %rs176;} + + // inline asm + // inline asm + { cvt.f32.f16 %f859, %rs177;} + + // inline asm + // inline asm + call (%rd294), _rt_buffer_get_64, (%rd289, %r26, %r218, %rd8, %rd9, %rd15, %rd15); + // inline asm + add.f32 %f860, %f857, 0f00000000; + add.f32 %f861, %f858, 0f00000000; + add.f32 %f862, %f859, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs174, %f862;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs173, %f861;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs172, %f860;} + + // inline asm + mov.u16 %rs179, 0; + st.v4.u16 [%rd294], {%rs172, %rs173, %rs174, %rs179}; + bra.uni BB0_127; + +BB0_126: + mov.u64 %rd307, image_RNM0; + cvta.global.u64 %rd302, %rd307; + mov.u32 %r220, 8; + // inline asm + call (%rd301), _rt_buffer_get_64, (%rd302, %r26, %r220, %rd8, %rd9, %rd15, %rd15); + // inline asm + mov.f32 %f863, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs180, %f863;} + + // inline asm + mov.u16 %rs181, 0; + st.v4.u16 [%rd301], {%rs180, %rs180, %rs180, %rs181}; + +BB0_127: + ld.global.u32 %r221, [additive]; + setp.eq.s32 %p136, %r221, 0; + @%p136 bra BB0_129; + + mov.u64 %rd320, image_RNM1; + cvta.global.u64 %rd309, %rd320; + mov.u32 %r225, 8; + // inline asm + call (%rd308), _rt_buffer_get_64, (%rd309, %r26, %r225, %rd8, %rd9, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs188, %rs189, %rs190, %rs191}, [%rd308]; + // inline asm + { cvt.f32.f16 %f864, %rs188;} + + // inline asm + // inline asm + { cvt.f32.f16 %f865, %rs189;} + + // inline asm + // inline asm + { cvt.f32.f16 %f866, %rs190;} + + // inline asm + // inline asm + call (%rd314), _rt_buffer_get_64, (%rd309, %r26, %r225, %rd8, %rd9, %rd15, %rd15); + // inline asm + add.f32 %f867, %f864, 0f00000000; + add.f32 %f868, %f865, 0f00000000; + add.f32 %f869, %f866, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs187, %f869;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs186, %f868;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs185, %f867;} + + // inline asm + mov.u16 %rs192, 0; + st.v4.u16 [%rd314], {%rs185, %rs186, %rs187, %rs192}; + bra.uni BB0_130; + +BB0_129: + mov.u64 %rd327, image_RNM1; + cvta.global.u64 %rd322, %rd327; + mov.u32 %r227, 8; + // inline asm + call (%rd321), _rt_buffer_get_64, (%rd322, %r26, %r227, %rd8, %rd9, %rd15, %rd15); + // inline asm + mov.f32 %f870, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs193, %f870;} + + // inline asm + mov.u16 %rs194, 0; + st.v4.u16 [%rd321], {%rs193, %rs193, %rs193, %rs194}; + +BB0_130: + ld.global.u32 %r228, [additive]; + setp.eq.s32 %p137, %r228, 0; + @%p137 bra BB0_132; + + mov.u64 %rd340, image_RNM2; + cvta.global.u64 %rd329, %rd340; + mov.u32 %r232, 8; + // inline asm + call (%rd328), _rt_buffer_get_64, (%rd329, %r26, %r232, %rd8, %rd9, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs201, %rs202, %rs203, %rs204}, [%rd328]; + // inline asm + { cvt.f32.f16 %f871, %rs201;} + + // inline asm + // inline asm + { cvt.f32.f16 %f872, %rs202;} + + // inline asm + // inline asm + { cvt.f32.f16 %f873, %rs203;} + + // inline asm + // inline asm + call (%rd334), _rt_buffer_get_64, (%rd329, %r26, %r232, %rd8, %rd9, %rd15, %rd15); + // inline asm + add.f32 %f874, %f871, 0f00000000; + add.f32 %f875, %f872, 0f00000000; + add.f32 %f876, %f873, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs200, %f876;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs199, %f875;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs198, %f874;} + + // inline asm + mov.u16 %rs205, 0; + st.v4.u16 [%rd334], {%rs198, %rs199, %rs200, %rs205}; + bra.uni BB0_133; + +BB0_132: + mov.u64 %rd347, image_RNM2; + cvta.global.u64 %rd342, %rd347; + mov.u32 %r234, 8; + // inline asm + call (%rd341), _rt_buffer_get_64, (%rd342, %r26, %r234, %rd8, %rd9, %rd15, %rd15); + // inline asm + mov.f32 %f877, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs206, %f877;} + + // inline asm + mov.u16 %rs207, 0; + st.v4.u16 [%rd341], {%rs206, %rs206, %rs206, %rs207}; + +BB0_133: + ld.global.u32 %r235, [additive]; + setp.eq.s32 %p138, %r235, 0; + @%p138 bra BB0_135; + + mov.u64 %rd360, image_RNM3; + cvta.global.u64 %rd349, %rd360; + mov.u32 %r239, 8; + // inline asm + call (%rd348), _rt_buffer_get_64, (%rd349, %r26, %r239, %rd8, %rd9, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs214, %rs215, %rs216, %rs217}, [%rd348]; + // inline asm + { cvt.f32.f16 %f878, %rs214;} + + // inline asm + // inline asm + { cvt.f32.f16 %f879, %rs215;} + + // inline asm + // inline asm + { cvt.f32.f16 %f880, %rs216;} + + // inline asm + // inline asm + call (%rd354), _rt_buffer_get_64, (%rd349, %r26, %r239, %rd8, %rd9, %rd15, %rd15); + // inline asm + add.f32 %f881, %f878, 0f00000000; + add.f32 %f882, %f879, 0f00000000; + add.f32 %f883, %f880, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs213, %f883;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs212, %f882;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs211, %f881;} + + // inline asm + mov.u16 %rs218, 0; + st.v4.u16 [%rd354], {%rs211, %rs212, %rs213, %rs218}; + bra.uni BB0_136; + +BB0_135: + mov.u64 %rd367, image_RNM3; + cvta.global.u64 %rd362, %rd367; + mov.u32 %r241, 8; + // inline asm + call (%rd361), _rt_buffer_get_64, (%rd362, %r26, %r241, %rd8, %rd9, %rd15, %rd15); + // inline asm + mov.f32 %f884, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs219, %f884;} + + // inline asm + mov.u16 %rs220, 0; + st.v4.u16 [%rd361], {%rs219, %rs219, %rs219, %rs220}; + bra.uni BB0_136; + +BB0_103: + mov.u64 %rd173, image_HDR; + cvta.global.u64 %rd168, %rd173; + mov.u32 %r170, 8; + // inline asm + call (%rd167), _rt_buffer_get_64, (%rd168, %r26, %r170, %rd6, %rd7, %rd15, %rd15); + // inline asm + mov.f32 %f814, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs104, %f814;} + + // inline asm + st.v4.u16 [%rd167], {%rs104, %rs104, %rs104, %rs93}; + +BB0_104: + ld.global.u32 %r171, [additive]; + setp.eq.s32 %p127, %r171, 0; + mov.f32 %f815, 0f3F800000; + // inline asm + { cvt.rn.f16.f32 %rs105, %f815;} + + // inline asm + @%p127 bra BB0_106; + + mov.u64 %rd186, image_RNM0; + cvta.global.u64 %rd175, %rd186; + mov.u32 %r175, 8; + // inline asm + call (%rd174), _rt_buffer_get_64, (%rd175, %r26, %r175, %rd6, %rd7, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs112, %rs113, %rs114, %rs115}, [%rd174]; + // inline asm + { cvt.f32.f16 %f816, %rs112;} + + // inline asm + // inline asm + { cvt.f32.f16 %f817, %rs113;} + + // inline asm + // inline asm + { cvt.f32.f16 %f818, %rs114;} + + // inline asm + // inline asm + call (%rd180), _rt_buffer_get_64, (%rd175, %r26, %r175, %rd6, %rd7, %rd15, %rd15); + // inline asm + add.f32 %f819, %f816, 0f00000000; + add.f32 %f820, %f817, 0f00000000; + add.f32 %f821, %f818, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs111, %f821;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs110, %f820;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs109, %f819;} + + // inline asm + st.v4.u16 [%rd180], {%rs109, %rs110, %rs111, %rs105}; + bra.uni BB0_107; + +BB0_106: + mov.u64 %rd193, image_RNM0; + cvta.global.u64 %rd188, %rd193; + mov.u32 %r177, 8; + // inline asm + call (%rd187), _rt_buffer_get_64, (%rd188, %r26, %r177, %rd6, %rd7, %rd15, %rd15); + // inline asm + mov.f32 %f822, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs116, %f822;} + + // inline asm + st.v4.u16 [%rd187], {%rs116, %rs116, %rs116, %rs105}; + +BB0_107: + ld.global.u32 %r178, [additive]; + setp.eq.s32 %p128, %r178, 0; + // inline asm + { cvt.rn.f16.f32 %rs117, %f815;} + + // inline asm + @%p128 bra BB0_109; + + mov.u64 %rd206, image_RNM1; + cvta.global.u64 %rd195, %rd206; + mov.u32 %r182, 8; + // inline asm + call (%rd194), _rt_buffer_get_64, (%rd195, %r26, %r182, %rd6, %rd7, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd194]; + // inline asm + { cvt.f32.f16 %f824, %rs124;} + + // inline asm + // inline asm + { cvt.f32.f16 %f825, %rs125;} + + // inline asm + // inline asm + { cvt.f32.f16 %f826, %rs126;} + + // inline asm + // inline asm + call (%rd200), _rt_buffer_get_64, (%rd195, %r26, %r182, %rd6, %rd7, %rd15, %rd15); + // inline asm + add.f32 %f827, %f824, 0f00000000; + add.f32 %f828, %f825, 0f00000000; + add.f32 %f829, %f826, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs123, %f829;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs122, %f828;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs121, %f827;} + + // inline asm + st.v4.u16 [%rd200], {%rs121, %rs122, %rs123, %rs117}; + bra.uni BB0_110; + +BB0_109: + mov.u64 %rd213, image_RNM1; + cvta.global.u64 %rd208, %rd213; + mov.u32 %r184, 8; + // inline asm + call (%rd207), _rt_buffer_get_64, (%rd208, %r26, %r184, %rd6, %rd7, %rd15, %rd15); + // inline asm + mov.f32 %f830, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs128, %f830;} + + // inline asm + st.v4.u16 [%rd207], {%rs128, %rs128, %rs128, %rs117}; + +BB0_110: + ld.global.u32 %r185, [additive]; + setp.eq.s32 %p129, %r185, 0; + // inline asm + { cvt.rn.f16.f32 %rs129, %f815;} + + // inline asm + @%p129 bra BB0_112; + + mov.u64 %rd226, image_RNM2; + cvta.global.u64 %rd215, %rd226; + mov.u32 %r189, 8; + // inline asm + call (%rd214), _rt_buffer_get_64, (%rd215, %r26, %r189, %rd6, %rd7, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs136, %rs137, %rs138, %rs139}, [%rd214]; + // inline asm + { cvt.f32.f16 %f832, %rs136;} + + // inline asm + // inline asm + { cvt.f32.f16 %f833, %rs137;} + + // inline asm + // inline asm + { cvt.f32.f16 %f834, %rs138;} + + // inline asm + // inline asm + call (%rd220), _rt_buffer_get_64, (%rd215, %r26, %r189, %rd6, %rd7, %rd15, %rd15); + // inline asm + add.f32 %f835, %f832, 0f00000000; + add.f32 %f836, %f833, 0f00000000; + add.f32 %f837, %f834, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs135, %f837;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs134, %f836;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs133, %f835;} + + // inline asm + st.v4.u16 [%rd220], {%rs133, %rs134, %rs135, %rs129}; + bra.uni BB0_113; + +BB0_112: + mov.u64 %rd233, image_RNM2; + cvta.global.u64 %rd228, %rd233; + mov.u32 %r191, 8; + // inline asm + call (%rd227), _rt_buffer_get_64, (%rd228, %r26, %r191, %rd6, %rd7, %rd15, %rd15); + // inline asm + mov.f32 %f838, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs140, %f838;} + + // inline asm + st.v4.u16 [%rd227], {%rs140, %rs140, %rs140, %rs129}; + +BB0_113: + ld.global.u32 %r192, [additive]; + setp.eq.s32 %p130, %r192, 0; + // inline asm + { cvt.rn.f16.f32 %rs141, %f815;} + + // inline asm + @%p130 bra BB0_115; + + mov.u64 %rd246, image_RNM3; + cvta.global.u64 %rd235, %rd246; + mov.u32 %r196, 8; + // inline asm + call (%rd234), _rt_buffer_get_64, (%rd235, %r26, %r196, %rd6, %rd7, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs148, %rs149, %rs150, %rs151}, [%rd234]; + // inline asm + { cvt.f32.f16 %f840, %rs148;} + + // inline asm + // inline asm + { cvt.f32.f16 %f841, %rs149;} + + // inline asm + // inline asm + { cvt.f32.f16 %f842, %rs150;} + + // inline asm + // inline asm + call (%rd240), _rt_buffer_get_64, (%rd235, %r26, %r196, %rd6, %rd7, %rd15, %rd15); + // inline asm + add.f32 %f843, %f840, 0f00000000; + add.f32 %f844, %f841, 0f00000000; + add.f32 %f845, %f842, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs147, %f845;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs146, %f844;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs145, %f843;} + + // inline asm + st.v4.u16 [%rd240], {%rs145, %rs146, %rs147, %rs141}; + bra.uni BB0_136; + +BB0_115: + mov.u64 %rd253, image_RNM3; + cvta.global.u64 %rd248, %rd253; + mov.u32 %r198, 8; + // inline asm + call (%rd247), _rt_buffer_get_64, (%rd248, %r26, %r198, %rd6, %rd7, %rd15, %rd15); + // inline asm + mov.f32 %f846, 0f00000000; + // inline asm + { cvt.rn.f16.f32 %rs152, %f846;} + + // inline asm + st.v4.u16 [%rd247], {%rs152, %rs152, %rs152, %rs141}; + bra.uni BB0_136; + +BB0_35: + setp.geu.f32 %p61, %f966, 0f00000000; + @%p61 bra BB0_38; + + cvt.rzi.f32.f32 %f505, %f477; + setp.neu.f32 %p62, %f505, 0f3EE8BA2E; + selp.f32 %f969, 0f7FFFFFFF, %f969, %p62; + +BB0_38: + add.f32 %f507, %f65, 0f3EE8BA2E; + mov.b32 %r85, %f507; + setp.lt.s32 %p64, %r85, 2139095040; + @%p64 bra BB0_43; + + setp.gtu.f32 %p65, %f65, 0f7F800000; + @%p65 bra BB0_42; + bra.uni BB0_40; + +BB0_42: + add.f32 %f969, %f966, 0f3EE8BA2E; + bra.uni BB0_43; + +BB0_40: + setp.neu.f32 %p66, %f65, 0f7F800000; + @%p66 bra BB0_43; + + selp.f32 %f969, 0fFF800000, 0f7F800000, %p3; + +BB0_43: + mul.f32 %f508, %f969, 0f437F0000; + setp.eq.f32 %p67, %f966, 0f3F800000; + selp.f32 %f509, 0f437F0000, %f508, %p67; + cvt.rzi.u32.f32 %r86, %f509; + cvt.u16.u32 %rs19, %r86; + mov.u16 %rs20, 255; + st.v2.u8 [%rd26], {%rs19, %rs20}; + ld.global.u32 %r246, [imageEnabled]; + +BB0_44: + and.b32 %r87, %r246, 1; + setp.eq.b32 %p68, %r87, 1; + @!%p68 bra BB0_79; + bra.uni BB0_45; + +BB0_45: + mov.f32 %f920, 0fB5BFBE8E; + mov.f32 %f919, 0fBF317200; + mov.f32 %f918, 0f35BFBE8E; + mov.f32 %f917, 0f3F317200; + mov.f32 %f916, 0f3DAAAABD; + mov.f32 %f915, 0f3C4CAF63; + mov.f32 %f914, 0f3B18F0FE; + mov.f32 %f512, 0f3E666666; + cvt.rzi.f32.f32 %f513, %f512; + fma.rn.f32 %f514, %f513, 0fC0000000, 0f3EE66666; + abs.f32 %f77, %f514; + abs.f32 %f78, %f61; + setp.lt.f32 %p69, %f78, 0f00800000; + mul.f32 %f515, %f78, 0f4B800000; + selp.f32 %f516, 0fC3170000, 0fC2FE0000, %p69; + selp.f32 %f517, %f515, %f78, %p69; + mov.b32 %r88, %f517; + and.b32 %r89, %r88, 8388607; + or.b32 %r90, %r89, 1065353216; + mov.b32 %f518, %r90; + shr.u32 %r91, %r88, 23; + cvt.rn.f32.u32 %f519, %r91; + add.f32 %f520, %f516, %f519; + setp.gt.f32 %p70, %f518, 0f3FB504F3; + mul.f32 %f521, %f518, 0f3F000000; + add.f32 %f522, %f520, 0f3F800000; + selp.f32 %f523, %f521, %f518, %p70; + selp.f32 %f524, %f522, %f520, %p70; + add.f32 %f525, %f523, 0fBF800000; + add.f32 %f511, %f523, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f510,%f511; + // inline asm + add.f32 %f526, %f525, %f525; + mul.f32 %f527, %f510, %f526; + mul.f32 %f528, %f527, %f527; + fma.rn.f32 %f531, %f914, %f528, %f915; + fma.rn.f32 %f533, %f531, %f528, %f916; + mul.rn.f32 %f534, %f533, %f528; + mul.rn.f32 %f535, %f534, %f527; + sub.f32 %f536, %f525, %f527; + neg.f32 %f537, %f527; + add.f32 %f538, %f536, %f536; + fma.rn.f32 %f539, %f537, %f525, %f538; + mul.rn.f32 %f540, %f510, %f539; + add.f32 %f541, %f535, %f527; + sub.f32 %f542, %f527, %f541; + add.f32 %f543, %f535, %f542; + add.f32 %f544, %f540, %f543; + add.f32 %f545, %f541, %f544; + sub.f32 %f546, %f541, %f545; + add.f32 %f547, %f544, %f546; + mul.rn.f32 %f549, %f524, %f917; + mul.rn.f32 %f551, %f524, %f918; + add.f32 %f552, %f549, %f545; + sub.f32 %f553, %f549, %f552; + add.f32 %f554, %f545, %f553; + add.f32 %f555, %f547, %f554; + add.f32 %f556, %f551, %f555; + add.f32 %f557, %f552, %f556; + sub.f32 %f558, %f552, %f557; + add.f32 %f559, %f556, %f558; + mov.f32 %f560, 0f3EE66666; + mul.rn.f32 %f561, %f560, %f557; + neg.f32 %f562, %f561; + fma.rn.f32 %f563, %f560, %f557, %f562; + fma.rn.f32 %f564, %f560, %f559, %f563; + mov.f32 %f565, 0f00000000; + fma.rn.f32 %f566, %f565, %f557, %f564; + add.rn.f32 %f567, %f561, %f566; + neg.f32 %f568, %f567; + add.rn.f32 %f569, %f561, %f568; + add.rn.f32 %f570, %f569, %f566; + mov.b32 %r92, %f567; + setp.eq.s32 %p71, %r92, 1118925336; + add.s32 %r93, %r92, -1; + mov.b32 %f571, %r93; + add.f32 %f572, %f570, 0f37000000; + selp.f32 %f573, %f571, %f567, %p71; + selp.f32 %f79, %f572, %f570, %p71; + mul.f32 %f574, %f573, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f575, %f574; + fma.rn.f32 %f577, %f575, %f919, %f573; + fma.rn.f32 %f579, %f575, %f920, %f577; + mul.f32 %f580, %f579, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f581, %f580; + add.f32 %f582, %f575, 0f00000000; + ex2.approx.f32 %f583, %f582; + mul.f32 %f584, %f581, %f583; + setp.lt.f32 %p72, %f573, 0fC2D20000; + selp.f32 %f585, 0f00000000, %f584, %p72; + setp.gt.f32 %p73, %f573, 0f42D20000; + selp.f32 %f970, 0f7F800000, %f585, %p73; + setp.eq.f32 %p74, %f970, 0f7F800000; + @%p74 bra BB0_47; + + fma.rn.f32 %f970, %f970, %f79, %f970; + +BB0_47: + setp.lt.f32 %p75, %f61, 0f00000000; + setp.eq.f32 %p76, %f77, 0f3F800000; + and.pred %p4, %p75, %p76; + mov.b32 %r94, %f970; + xor.b32 %r95, %r94, -2147483648; + mov.b32 %f586, %r95; + selp.f32 %f972, %f586, %f970, %p4; + setp.eq.f32 %p77, %f61, 0f00000000; + @%p77 bra BB0_50; + bra.uni BB0_48; + +BB0_50: + add.f32 %f589, %f61, %f61; + selp.f32 %f972, %f589, 0f00000000, %p76; + bra.uni BB0_51; + +BB0_48: + setp.geu.f32 %p78, %f61, 0f00000000; + @%p78 bra BB0_51; + + cvt.rzi.f32.f32 %f588, %f560; + setp.neu.f32 %p79, %f588, 0f3EE66666; + selp.f32 %f972, 0f7FFFFFFF, %f972, %p79; + +BB0_51: + add.f32 %f590, %f78, 0f3EE66666; + mov.b32 %r96, %f590; + setp.lt.s32 %p81, %r96, 2139095040; + @%p81 bra BB0_56; + + setp.gtu.f32 %p82, %f78, 0f7F800000; + @%p82 bra BB0_55; + bra.uni BB0_53; + +BB0_55: + add.f32 %f972, %f61, 0f3EE66666; + bra.uni BB0_56; + +BB0_53: + setp.neu.f32 %p83, %f78, 0f7F800000; + @%p83 bra BB0_56; + + selp.f32 %f972, 0fFF800000, 0f7F800000, %p4; + +BB0_56: + mov.f32 %f927, 0fB5BFBE8E; + mov.f32 %f926, 0fBF317200; + mov.f32 %f925, 0f35BFBE8E; + mov.f32 %f924, 0f3F317200; + mov.f32 %f923, 0f3DAAAABD; + mov.f32 %f922, 0f3C4CAF63; + mov.f32 %f921, 0f3B18F0FE; + setp.eq.f32 %p84, %f61, 0f3F800000; + selp.f32 %f90, 0f3F800000, %f972, %p84; + abs.f32 %f91, %f62; + setp.lt.f32 %p85, %f91, 0f00800000; + mul.f32 %f593, %f91, 0f4B800000; + selp.f32 %f594, 0fC3170000, 0fC2FE0000, %p85; + selp.f32 %f595, %f593, %f91, %p85; + mov.b32 %r97, %f595; + and.b32 %r98, %r97, 8388607; + or.b32 %r99, %r98, 1065353216; + mov.b32 %f596, %r99; + shr.u32 %r100, %r97, 23; + cvt.rn.f32.u32 %f597, %r100; + add.f32 %f598, %f594, %f597; + setp.gt.f32 %p86, %f596, 0f3FB504F3; + mul.f32 %f599, %f596, 0f3F000000; + add.f32 %f600, %f598, 0f3F800000; + selp.f32 %f601, %f599, %f596, %p86; + selp.f32 %f602, %f600, %f598, %p86; + add.f32 %f603, %f601, 0fBF800000; + add.f32 %f592, %f601, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f591,%f592; + // inline asm + add.f32 %f604, %f603, %f603; + mul.f32 %f605, %f591, %f604; + mul.f32 %f606, %f605, %f605; + fma.rn.f32 %f609, %f921, %f606, %f922; + fma.rn.f32 %f611, %f609, %f606, %f923; + mul.rn.f32 %f612, %f611, %f606; + mul.rn.f32 %f613, %f612, %f605; + sub.f32 %f614, %f603, %f605; + neg.f32 %f615, %f605; + add.f32 %f616, %f614, %f614; + fma.rn.f32 %f617, %f615, %f603, %f616; + mul.rn.f32 %f618, %f591, %f617; + add.f32 %f619, %f613, %f605; + sub.f32 %f620, %f605, %f619; + add.f32 %f621, %f613, %f620; + add.f32 %f622, %f618, %f621; + add.f32 %f623, %f619, %f622; + sub.f32 %f624, %f619, %f623; + add.f32 %f625, %f622, %f624; + mul.rn.f32 %f627, %f602, %f924; + mul.rn.f32 %f629, %f602, %f925; + add.f32 %f630, %f627, %f623; + sub.f32 %f631, %f627, %f630; + add.f32 %f632, %f623, %f631; + add.f32 %f633, %f625, %f632; + add.f32 %f634, %f629, %f633; + add.f32 %f635, %f630, %f634; + sub.f32 %f636, %f630, %f635; + add.f32 %f637, %f634, %f636; + mul.rn.f32 %f639, %f560, %f635; + neg.f32 %f640, %f639; + fma.rn.f32 %f641, %f560, %f635, %f640; + fma.rn.f32 %f642, %f560, %f637, %f641; + fma.rn.f32 %f644, %f565, %f635, %f642; + add.rn.f32 %f645, %f639, %f644; + neg.f32 %f646, %f645; + add.rn.f32 %f647, %f639, %f646; + add.rn.f32 %f648, %f647, %f644; + mov.b32 %r101, %f645; + setp.eq.s32 %p87, %r101, 1118925336; + add.s32 %r102, %r101, -1; + mov.b32 %f649, %r102; + add.f32 %f650, %f648, 0f37000000; + selp.f32 %f651, %f649, %f645, %p87; + selp.f32 %f92, %f650, %f648, %p87; + mul.f32 %f652, %f651, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f653, %f652; + fma.rn.f32 %f655, %f653, %f926, %f651; + fma.rn.f32 %f657, %f653, %f927, %f655; + mul.f32 %f658, %f657, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f659, %f658; + add.f32 %f660, %f653, 0f00000000; + ex2.approx.f32 %f661, %f660; + mul.f32 %f662, %f659, %f661; + setp.lt.f32 %p88, %f651, 0fC2D20000; + selp.f32 %f663, 0f00000000, %f662, %p88; + setp.gt.f32 %p89, %f651, 0f42D20000; + selp.f32 %f973, 0f7F800000, %f663, %p89; + setp.eq.f32 %p90, %f973, 0f7F800000; + @%p90 bra BB0_58; + + fma.rn.f32 %f973, %f973, %f92, %f973; + +BB0_58: + setp.lt.f32 %p91, %f62, 0f00000000; + and.pred %p5, %p91, %p76; + mov.b32 %r103, %f973; + xor.b32 %r104, %r103, -2147483648; + mov.b32 %f664, %r104; + selp.f32 %f975, %f664, %f973, %p5; + setp.eq.f32 %p93, %f62, 0f00000000; + @%p93 bra BB0_61; + bra.uni BB0_59; + +BB0_61: + add.f32 %f667, %f62, %f62; + selp.f32 %f975, %f667, 0f00000000, %p76; + bra.uni BB0_62; + +BB0_59: + setp.geu.f32 %p94, %f62, 0f00000000; + @%p94 bra BB0_62; + + cvt.rzi.f32.f32 %f666, %f560; + setp.neu.f32 %p95, %f666, 0f3EE66666; + selp.f32 %f975, 0f7FFFFFFF, %f975, %p95; + +BB0_62: + add.f32 %f668, %f91, 0f3EE66666; + mov.b32 %r105, %f668; + setp.lt.s32 %p97, %r105, 2139095040; + @%p97 bra BB0_67; + + setp.gtu.f32 %p98, %f91, 0f7F800000; + @%p98 bra BB0_66; + bra.uni BB0_64; + +BB0_66: + add.f32 %f975, %f62, 0f3EE66666; + bra.uni BB0_67; + +BB0_64: + setp.neu.f32 %p99, %f91, 0f7F800000; + @%p99 bra BB0_67; + + selp.f32 %f975, 0fFF800000, 0f7F800000, %p5; + +BB0_67: + mov.f32 %f934, 0fB5BFBE8E; + mov.f32 %f933, 0fBF317200; + mov.f32 %f932, 0f35BFBE8E; + mov.f32 %f931, 0f3F317200; + mov.f32 %f930, 0f3DAAAABD; + mov.f32 %f929, 0f3C4CAF63; + mov.f32 %f928, 0f3B18F0FE; + setp.eq.f32 %p100, %f62, 0f3F800000; + selp.f32 %f103, 0f3F800000, %f975, %p100; + abs.f32 %f104, %f63; + setp.lt.f32 %p101, %f104, 0f00800000; + mul.f32 %f671, %f104, 0f4B800000; + selp.f32 %f672, 0fC3170000, 0fC2FE0000, %p101; + selp.f32 %f673, %f671, %f104, %p101; + mov.b32 %r106, %f673; + and.b32 %r107, %r106, 8388607; + or.b32 %r108, %r107, 1065353216; + mov.b32 %f674, %r108; + shr.u32 %r109, %r106, 23; + cvt.rn.f32.u32 %f675, %r109; + add.f32 %f676, %f672, %f675; + setp.gt.f32 %p102, %f674, 0f3FB504F3; + mul.f32 %f677, %f674, 0f3F000000; + add.f32 %f678, %f676, 0f3F800000; + selp.f32 %f679, %f677, %f674, %p102; + selp.f32 %f680, %f678, %f676, %p102; + add.f32 %f681, %f679, 0fBF800000; + add.f32 %f670, %f679, 0f3F800000; + // inline asm + rcp.approx.ftz.f32 %f669,%f670; + // inline asm + add.f32 %f682, %f681, %f681; + mul.f32 %f683, %f669, %f682; + mul.f32 %f684, %f683, %f683; + fma.rn.f32 %f687, %f928, %f684, %f929; + fma.rn.f32 %f689, %f687, %f684, %f930; + mul.rn.f32 %f690, %f689, %f684; + mul.rn.f32 %f691, %f690, %f683; + sub.f32 %f692, %f681, %f683; + neg.f32 %f693, %f683; + add.f32 %f694, %f692, %f692; + fma.rn.f32 %f695, %f693, %f681, %f694; + mul.rn.f32 %f696, %f669, %f695; + add.f32 %f697, %f691, %f683; + sub.f32 %f698, %f683, %f697; + add.f32 %f699, %f691, %f698; + add.f32 %f700, %f696, %f699; + add.f32 %f701, %f697, %f700; + sub.f32 %f702, %f697, %f701; + add.f32 %f703, %f700, %f702; + mul.rn.f32 %f705, %f680, %f931; + mul.rn.f32 %f707, %f680, %f932; + add.f32 %f708, %f705, %f701; + sub.f32 %f709, %f705, %f708; + add.f32 %f710, %f701, %f709; + add.f32 %f711, %f703, %f710; + add.f32 %f712, %f707, %f711; + add.f32 %f713, %f708, %f712; + sub.f32 %f714, %f708, %f713; + add.f32 %f715, %f712, %f714; + mul.rn.f32 %f717, %f560, %f713; + neg.f32 %f718, %f717; + fma.rn.f32 %f719, %f560, %f713, %f718; + fma.rn.f32 %f720, %f560, %f715, %f719; + fma.rn.f32 %f722, %f565, %f713, %f720; + add.rn.f32 %f723, %f717, %f722; + neg.f32 %f724, %f723; + add.rn.f32 %f725, %f717, %f724; + add.rn.f32 %f726, %f725, %f722; + mov.b32 %r110, %f723; + setp.eq.s32 %p103, %r110, 1118925336; + add.s32 %r111, %r110, -1; + mov.b32 %f727, %r111; + add.f32 %f728, %f726, 0f37000000; + selp.f32 %f729, %f727, %f723, %p103; + selp.f32 %f105, %f728, %f726, %p103; + mul.f32 %f730, %f729, 0f3FB8AA3B; + cvt.rzi.f32.f32 %f731, %f730; + fma.rn.f32 %f733, %f731, %f933, %f729; + fma.rn.f32 %f735, %f731, %f934, %f733; + mul.f32 %f736, %f735, 0f3FB8AA3B; + ex2.approx.ftz.f32 %f737, %f736; + add.f32 %f738, %f731, 0f00000000; + ex2.approx.f32 %f739, %f738; + mul.f32 %f740, %f737, %f739; + setp.lt.f32 %p104, %f729, 0fC2D20000; + selp.f32 %f741, 0f00000000, %f740, %p104; + setp.gt.f32 %p105, %f729, 0f42D20000; + selp.f32 %f976, 0f7F800000, %f741, %p105; + setp.eq.f32 %p106, %f976, 0f7F800000; + @%p106 bra BB0_69; + + fma.rn.f32 %f976, %f976, %f105, %f976; + +BB0_69: + setp.lt.f32 %p107, %f63, 0f00000000; + and.pred %p6, %p107, %p76; + mov.b32 %r112, %f976; + xor.b32 %r113, %r112, -2147483648; + mov.b32 %f742, %r113; + selp.f32 %f978, %f742, %f976, %p6; + setp.eq.f32 %p109, %f63, 0f00000000; + @%p109 bra BB0_72; + bra.uni BB0_70; + +BB0_72: + add.f32 %f745, %f63, %f63; + selp.f32 %f978, %f745, 0f00000000, %p76; + bra.uni BB0_73; + +BB0_70: + setp.geu.f32 %p110, %f63, 0f00000000; + @%p110 bra BB0_73; + + cvt.rzi.f32.f32 %f744, %f560; + setp.neu.f32 %p111, %f744, 0f3EE66666; + selp.f32 %f978, 0f7FFFFFFF, %f978, %p111; + +BB0_73: + add.f32 %f746, %f104, 0f3EE66666; + mov.b32 %r114, %f746; + setp.lt.s32 %p113, %r114, 2139095040; + @%p113 bra BB0_78; + + setp.gtu.f32 %p114, %f104, 0f7F800000; + @%p114 bra BB0_77; + bra.uni BB0_75; + +BB0_77: + add.f32 %f978, %f63, 0f3EE66666; + bra.uni BB0_78; + +BB0_75: + setp.neu.f32 %p115, %f104, 0f7F800000; + @%p115 bra BB0_78; + + selp.f32 %f978, 0fFF800000, 0f7F800000, %p6; + +BB0_78: + setp.eq.f32 %p116, %f63, 0f3F800000; + selp.f32 %f747, 0f3F800000, %f978, %p116; + cvt.u64.u32 %rd36, %r3; + cvt.u64.u32 %rd35, %r2; + mov.u64 %rd39, image; + cvta.global.u64 %rd34, %rd39; + // inline asm + call (%rd33), _rt_buffer_get_64, (%rd34, %r26, %r27, %rd35, %rd36, %rd15, %rd15); + // inline asm + cvt.sat.f32.f32 %f748, %f747; + mul.f32 %f749, %f748, 0f437FFD71; + cvt.rzi.u32.f32 %r117, %f749; + cvt.sat.f32.f32 %f750, %f103; + mul.f32 %f751, %f750, 0f437FFD71; + cvt.rzi.u32.f32 %r118, %f751; + cvt.sat.f32.f32 %f752, %f90; + mul.f32 %f753, %f752, 0f437FFD71; + cvt.rzi.u32.f32 %r119, %f753; + cvt.u16.u32 %rs21, %r117; + cvt.u16.u32 %rs22, %r119; + cvt.u16.u32 %rs23, %r118; + mov.u16 %rs24, 255; + st.v4.u8 [%rd33], {%rs21, %rs23, %rs22, %rs24}; + ld.global.u32 %r246, [imageEnabled]; + +BB0_79: + cvt.u64.u32 %rd4, %r2; + cvt.u64.u32 %rd5, %r3; + and.b32 %r120, %r246, 4; + setp.eq.s32 %p117, %r120, 0; + @%p117 bra BB0_83; + + ld.global.u32 %r121, [additive]; + setp.eq.s32 %p118, %r121, 0; + mov.f32 %f754, 0f3F800000; + // inline asm + { cvt.rn.f16.f32 %rs25, %f754;} + + // inline asm + @%p118 bra BB0_82; + + mov.u64 %rd52, image_HDR; + cvta.global.u64 %rd41, %rd52; + mov.u32 %r125, 8; + // inline asm + call (%rd40), _rt_buffer_get_64, (%rd41, %r26, %r125, %rd4, %rd5, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs32, %rs33, %rs34, %rs35}, [%rd40]; + // inline asm + { cvt.f32.f16 %f755, %rs32;} + + // inline asm + // inline asm + { cvt.f32.f16 %f756, %rs33;} + + // inline asm + // inline asm + { cvt.f32.f16 %f757, %rs34;} + + // inline asm + // inline asm + call (%rd46), _rt_buffer_get_64, (%rd41, %r26, %r125, %rd4, %rd5, %rd15, %rd15); + // inline asm + add.f32 %f758, %f61, %f755; + add.f32 %f759, %f62, %f756; + add.f32 %f760, %f63, %f757; + // inline asm + { cvt.rn.f16.f32 %rs31, %f760;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs30, %f759;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs29, %f758;} + + // inline asm + st.v4.u16 [%rd46], {%rs29, %rs30, %rs31, %rs25}; + bra.uni BB0_83; + +BB0_82: + mov.u64 %rd59, image_HDR; + cvta.global.u64 %rd54, %rd59; + mov.u32 %r127, 8; + // inline asm + call (%rd53), _rt_buffer_get_64, (%rd54, %r26, %r127, %rd4, %rd5, %rd15, %rd15); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs38, %f63;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs37, %f62;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs36, %f61;} + + // inline asm + st.v4.u16 [%rd53], {%rs36, %rs37, %rs38, %rs25}; + +BB0_83: + mul.f32 %f765, %f47, 0f3E800000; + mul.f32 %f766, %f765, %f966; + mul.f32 %f767, %f48, %f766; + ld.global.f32 %f768, [lightColor]; + mul.f32 %f116, %f767, %f768; + ld.global.f32 %f769, [lightColor+4]; + mul.f32 %f117, %f767, %f769; + ld.global.f32 %f770, [lightColor+8]; + mul.f32 %f118, %f767, %f770; + ld.global.u32 %r128, [additive]; + setp.eq.s32 %p119, %r128, 0; + mov.f32 %f764, 0f3F800000; + // inline asm + { cvt.rn.f16.f32 %rs39, %f764;} + + // inline asm + @%p119 bra BB0_85; + + mov.u64 %rd72, image_RNM0; + cvta.global.u64 %rd61, %rd72; + mov.u32 %r132, 8; + // inline asm + call (%rd60), _rt_buffer_get_64, (%rd61, %r26, %r132, %rd4, %rd5, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd60]; + // inline asm + { cvt.f32.f16 %f771, %rs46;} + + // inline asm + // inline asm + { cvt.f32.f16 %f772, %rs47;} + + // inline asm + // inline asm + { cvt.f32.f16 %f773, %rs48;} + + // inline asm + // inline asm + call (%rd66), _rt_buffer_get_64, (%rd61, %r26, %r132, %rd4, %rd5, %rd15, %rd15); + // inline asm + add.f32 %f774, %f116, %f771; + add.f32 %f775, %f117, %f772; + add.f32 %f776, %f118, %f773; + // inline asm + { cvt.rn.f16.f32 %rs45, %f776;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs44, %f775;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs43, %f774;} + + // inline asm + st.v4.u16 [%rd66], {%rs43, %rs44, %rs45, %rs39}; + bra.uni BB0_86; + +BB0_85: + mov.u64 %rd79, image_RNM0; + cvta.global.u64 %rd74, %rd79; + mov.u32 %r134, 8; + // inline asm + call (%rd73), _rt_buffer_get_64, (%rd74, %r26, %r134, %rd4, %rd5, %rd15, %rd15); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs52, %f118;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs51, %f117;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs50, %f116;} + + // inline asm + st.v4.u16 [%rd73], {%rs50, %rs51, %rs52, %rs39}; + +BB0_86: + sub.f32 %f940, %f11, %f12; + mul.f32 %f939, %f940, %f151; + sub.f32 %f938, %f7, %f8; + mul.f32 %f937, %f938, %f151; + sub.f32 %f936, %f9, %f10; + mul.f32 %f935, %f936, %f151; + fma.rn.f32 %f119, %f937, 0f3F000000, 0f3F000000; + fma.rn.f32 %f120, %f935, 0f3F000000, 0f3F000000; + fma.rn.f32 %f121, %f939, 0f3F000000, 0f3F000000; + ld.global.u32 %r135, [additive]; + setp.eq.s32 %p120, %r135, 0; + // inline asm + { cvt.rn.f16.f32 %rs53, %f764;} + + // inline asm + @%p120 bra BB0_88; + + mov.u64 %rd92, image_RNM1; + cvta.global.u64 %rd81, %rd92; + mov.u32 %r139, 8; + // inline asm + call (%rd80), _rt_buffer_get_64, (%rd81, %r26, %r139, %rd4, %rd5, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs60, %rs61, %rs62, %rs63}, [%rd80]; + // inline asm + { cvt.f32.f16 %f781, %rs60;} + + // inline asm + // inline asm + { cvt.f32.f16 %f782, %rs61;} + + // inline asm + // inline asm + { cvt.f32.f16 %f783, %rs62;} + + // inline asm + // inline asm + call (%rd86), _rt_buffer_get_64, (%rd81, %r26, %r139, %rd4, %rd5, %rd15, %rd15); + // inline asm + add.f32 %f784, %f119, %f781; + add.f32 %f785, %f119, %f782; + add.f32 %f786, %f119, %f783; + // inline asm + { cvt.rn.f16.f32 %rs59, %f786;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs58, %f785;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs57, %f784;} + + // inline asm + st.v4.u16 [%rd86], {%rs57, %rs58, %rs59, %rs53}; + bra.uni BB0_89; + +BB0_88: + mov.u64 %rd99, image_RNM1; + cvta.global.u64 %rd94, %rd99; + mov.u32 %r141, 8; + // inline asm + call (%rd93), _rt_buffer_get_64, (%rd94, %r26, %r141, %rd4, %rd5, %rd15, %rd15); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs64, %f119;} + + // inline asm + st.v4.u16 [%rd93], {%rs64, %rs64, %rs64, %rs53}; + +BB0_89: + ld.global.u32 %r142, [additive]; + setp.eq.s32 %p121, %r142, 0; + // inline asm + { cvt.rn.f16.f32 %rs65, %f764;} + + // inline asm + @%p121 bra BB0_91; + + mov.u64 %rd112, image_RNM2; + cvta.global.u64 %rd101, %rd112; + mov.u32 %r146, 8; + // inline asm + call (%rd100), _rt_buffer_get_64, (%rd101, %r26, %r146, %rd4, %rd5, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd100]; + // inline asm + { cvt.f32.f16 %f789, %rs72;} + + // inline asm + // inline asm + { cvt.f32.f16 %f790, %rs73;} + + // inline asm + // inline asm + { cvt.f32.f16 %f791, %rs74;} + + // inline asm + // inline asm + call (%rd106), _rt_buffer_get_64, (%rd101, %r26, %r146, %rd4, %rd5, %rd15, %rd15); + // inline asm + add.f32 %f792, %f120, %f789; + add.f32 %f793, %f120, %f790; + add.f32 %f794, %f120, %f791; + // inline asm + { cvt.rn.f16.f32 %rs71, %f794;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs70, %f793;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs69, %f792;} + + // inline asm + st.v4.u16 [%rd106], {%rs69, %rs70, %rs71, %rs65}; + bra.uni BB0_92; + +BB0_91: + mov.u64 %rd119, image_RNM2; + cvta.global.u64 %rd114, %rd119; + mov.u32 %r148, 8; + // inline asm + call (%rd113), _rt_buffer_get_64, (%rd114, %r26, %r148, %rd4, %rd5, %rd15, %rd15); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs76, %f120;} + + // inline asm + st.v4.u16 [%rd113], {%rs76, %rs76, %rs76, %rs65}; + +BB0_92: + ld.global.u32 %r149, [additive]; + setp.eq.s32 %p122, %r149, 0; + // inline asm + { cvt.rn.f16.f32 %rs77, %f764;} + + // inline asm + @%p122 bra BB0_94; + + mov.u64 %rd132, image_RNM3; + cvta.global.u64 %rd121, %rd132; + mov.u32 %r153, 8; + // inline asm + call (%rd120), _rt_buffer_get_64, (%rd121, %r26, %r153, %rd4, %rd5, %rd15, %rd15); + // inline asm + ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd120]; + // inline asm + { cvt.f32.f16 %f797, %rs84;} + + // inline asm + // inline asm + { cvt.f32.f16 %f798, %rs85;} + + // inline asm + // inline asm + { cvt.f32.f16 %f799, %rs86;} + + // inline asm + // inline asm + call (%rd126), _rt_buffer_get_64, (%rd121, %r26, %r153, %rd4, %rd5, %rd15, %rd15); + // inline asm + add.f32 %f800, %f121, %f797; + add.f32 %f801, %f121, %f798; + add.f32 %f802, %f121, %f799; + // inline asm + { cvt.rn.f16.f32 %rs83, %f802;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs82, %f801;} + + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs81, %f800;} + + // inline asm + st.v4.u16 [%rd126], {%rs81, %rs82, %rs83, %rs77}; + bra.uni BB0_136; + +BB0_94: + mov.u64 %rd139, image_RNM3; + cvta.global.u64 %rd134, %rd139; + mov.u32 %r155, 8; + // inline asm + call (%rd133), _rt_buffer_get_64, (%rd134, %r26, %r155, %rd4, %rd5, %rd15, %rd15); + // inline asm + // inline asm + { cvt.rn.f16.f32 %rs88, %f121;} + + // inline asm + st.v4.u16 [%rd133], {%rs88, %rs88, %rs88, %rs77}; + +BB0_136: + ret; +} + + -- cgit v1.2.3-freya