refactor masm to add codegen step

1 files changed, 158 insertions, 0 deletions

diff --git a/include/mips32r6.h b/include/mips32r6.h
new file mode 100644
index 0000000..c2aad2d
--- /dev/null
+++ b/include/mips32r6.h
@@ -0,0 +1,158 @@
+/* Copyright (c) 2024 Freya Murphy */
+
+#ifndef __MIPS32R6_H__
+#define __MIPS32R6_H__
+
+#include <mlimits.h>
+#include <stdint.h>
+#include <mips32.h>
+
+/* mips instructions */
+enum mips32r6_instruction_type {
+	MIPS32R6_INS_ADD,
+	MIPS32R6_INS_ADDI,
+	MIPS32R6_INS_ADDIU,
+	MIPS32R6_INS_ADDU,
+	MIPS32R6_INS_AND,
+	MIPS32R6_INS_ANDI,
+	MIPS32R6_INS_BAL,
+	MIPS32R6_INS_BALC,
+	MIPS32R6_INS_BC,
+	MIPS32R6_INS_BEQ,
+	MIPS32R6_INS_BGEZ,
+	MIPS32R6_INS_BGEZAL,
+	MIPS32R6_INS_BGTZ,
+	MIPS32R6_INS_BLEZ,
+	MIPS32R6_INS_BLTZ,
+	MIPS32R6_INS_BLTZAL,
+	MIPS32R6_INS_BNE,
+	MIPS32R6_INS_DIV,
+	MIPS32R6_INS_MOD,
+	MIPS32R6_INS_DIVU,
+	MIPS32R6_INS_MODU,
+	MIPS32R6_INS_J,
+	MIPS32R6_INS_JAL,
+	MIPS32R6_INS_JALR,
+	MIPS32R6_INS_JALX,
+	MIPS32R6_INS_JR,
+	MIPS32R6_INS_LB,
+	MIPS32R6_INS_LBU,
+	MIPS32R6_INS_LH,
+	MIPS32R6_INS_LHU,
+	MIPS32R6_INS_LUI,
+	MIPS32R6_INS_LW,
+	MIPS32R6_INS_MUL,
+	MIPS32R6_INS_MUH,
+	MIPS32R6_INS_MULU,
+	MIPS32R6_INS_MUHU,
+	MIPS32R6_INS_SB,
+	MIPS32R6_INS_SH,
+	MIPS32R6_INS_SW,
+	MIPS32R6_INS_SLL,
+	MIPS32R6_INS_SLLV,
+	MIPS32R6_INS_SLT,
+	MIPS32R6_INS_SLTI,
+	MIPS32R6_INS_SLTIU,
+	MIPS32R6_INS_SLTU,
+	MIPS32R6_INS_SRA,
+	MIPS32R6_INS_SRAV,
+	MIPS32R6_INS_SRL,
+	MIPS32R6_INS_SRLV,
+	MIPS32R6_INS_SUB,
+	MIPS32R6_INS_SUBU,
+	MIPS32R6_INS_SYSCALL,
+	MIPS32R6_INS_OR,
+	MIPS32R6_INS_ORI,
+	MIPS32R6_INS_NOR,
+	MIPS32R6_INS_XOR,
+	MIPS32R6_INS_XORI,
+	__MIPS32R6_INS_NULL,
+};
+
+#define MIPS32R6_OP_SPECIAL    0b000000
+#define MIPS32R6_OP_ADDI       0b001000
+#define MIPS32R6_OP_ADDIU      0b001001
+#define MIPS32R6_OP_ANDI       0b001100
+#define MIPS32R6_OP_REGIMM     0b000001
+#define MIPS32R6_OP_BALC       0b111010
+#define MIPS32R6_OP_BC         0b110010
+#define MIPS32R6_OP_BEQ        0b000100
+#define MIPS32R6_OP_BEQL       0b010100
+#define MIPS32R6_OP_BGTZ       0b000111
+#define MIPS32R6_OP_BGTZL      0b010111
+#define MIPS32R6_OP_BLEZ       0b000110
+#define MIPS32R6_OP_BLEZL      0b010110
+#define MIPS32R6_OP_BNE        0b000101
+#define MIPS32R6_OP_BNEL       0b010101
+#define MIPS32R6_OP_J          0b000010
+#define MIPS32R6_OP_JAL        0b000011
+#define MIPS32R6_OP_JALX       0b011101
+#define MIPS32R6_OP_LB         0b100000
+#define MIPS32R6_OP_LBU        0b100100
+#define MIPS32R6_OP_LH         0b100001
+#define MIPS32R6_OP_LHU        0b100101
+#define MIPS32R6_OP_LUI        0b001111
+#define MIPS32R6_OP_LW         0b100011
+#define MIPS32R6_OP_SB         0b101000
+#define MIPS32R6_OP_SH         0b101001
+#define MIPS32R6_OP_SW         0b101011
+#define MIPS32R6_OP_SLTI       0b001010
+#define MIPS32R6_OP_SLTIU      0b001011
+#define MIPS32R6_OP_ORI        0b001101
+#define MIPS32R6_OP_XORI       0b001110
+
+#define MIPS32R6_FUNCT_ADD     0b100000
+#define MIPS32R6_FUNCT_ADDU    0b100001
+#define MIPS32R6_FUNCT_AND     0b100100
+#define MIPS32R6_FUNCT_SOP32   0b011010
+#define MIPS32R6_FUNCT_SOP33   0b011011
+#define MIPS32R6_FUNCT_JALR    0b001001
+#define MIPS32R6_FUNCT_JR      0b001000
+#define MIPS32R6_FUNCT_MFHI    0b010000
+#define MIPS32R6_FUNCT_MFLO    0b010010
+#define MIPS32R6_FUNCT_MTHI    0b010001
+#define MIPS32R6_FUNCT_MTLO    0b010011
+#define MIPS32R6_FUNCT_SOP30   0b011000
+#define MIPS32R6_FUNCT_SOP31   0b011001
+#define MIPS32R6_FUNCT_SLL     0b000000
+#define MIPS32R6_FUNCT_SLLV    0b000100
+#define MIPS32R6_FUNCT_SLT     0b101010
+#define MIPS32R6_FUNCT_SLTU    0b101011
+#define MIPS32R6_FUNCT_SRA     0b000011
+#define MIPS32R6_FUNCT_SRAV    0b000111
+#define MIPS32R6_FUNCT_SRL     0b000010
+#define MIPS32R6_FUNCT_SRLV    0b000110
+#define MIPS32R6_FUNCT_SUB     0b100010
+#define MIPS32R6_FUNCT_SUBU    0b100011
+#define MIPS32R6_FUNCT_SYSCALL 0b001100
+#define MIPS32R6_FUNCT_OR      0b100101
+#define MIPS32R6_FUNCT_NOR     0b100111
+#define MIPS32R6_FUNCT_XOR     0b100110
+
+#define MIPS32R6_FUNCT_BAL     0b10001
+#define MIPS32R6_FUNCT_BGEZ    0b00001
+#define MIPS32R6_FUNCT_BGEZAL  0b10001
+#define MIPS32R6_FUNCT_BGEZALL 0b10011
+#define MIPS32R6_FUNCT_BGEZL   0b00011
+#define MIPS32R6_FUNCT_BLTZ    0b00000
+#define MIPS32R6_FUNCT_BLTZAL  0b10000
+#define MIPS32R6_FUNCT_BLTZALL 0b10010
+#define MIPS32R6_FUNCT_BLTZL   0b00010
+
+#define MIPS32R6_SOP30_MUL     0b00010
+#define MIPS32R6_SOP30_MUH     0b00011
+#define MIPS32R6_SOP31_MULU    0b00010
+#define MIPS32R6_SOP31_MUHU    0b00011
+#define MIPS32R6_SOP32_DIV     0b00010
+#define MIPS32R6_SOP32_MOD     0b00011
+#define MIPS32R6_SOP33_DIVU    0b00010
+#define MIPS32R6_SOP33_MODU    0b00011
+
+#define __MIPS32R6_INS_LEN	(__MIPS32R6_INS_NULL)
+#define __MIPS32R6_PSEUDO_LEN	(4)
+#define __MIPS32R6_GRAMMER_LEN	(__MIPS32R6_INS_LEN + __MIPS32R6_PSEUDO_LEN)
+
+extern struct mips32_grammer mips32r6_grammers[__MIPS32R6_GRAMMER_LEN];
+extern union mips32_instruction mips32r6_instructions[__MIPS32R6_INS_LEN];
+
+#endif /* __MIPS32R6_H__ */