142 lines
3.4 KiB
C
142 lines
3.4 KiB
C
/* Copyright (c) 2024 Freya Murphy */
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#ifndef __MIPS32_H__
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#define __MIPS32_H__
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#include <stddef.h>
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#include <stdint.h>
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#include <mlimits.h>
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/* all mips registers $0-$31 */
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enum mips32_register {
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MIPS32_REG_ZERO = 0,
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MIPS32_REG_AT = 1,
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MIPS32_REG_V0 = 2,
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MIPS32_REG_V1 = 3,
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MIPS32_REG_A0 = 4,
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MIPS32_REG_A1 = 5,
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MIPS32_REG_A2 = 6,
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MIPS32_REG_A3 = 7,
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MIPS32_REG_T0 = 8,
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MIPS32_REG_T1 = 9,
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MIPS32_REG_T2 = 10,
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MIPS32_REG_T3 = 11,
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MIPS32_REG_T4 = 12,
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MIPS32_REG_T5 = 13,
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MIPS32_REG_T6 = 14,
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MIPS32_REG_T7 = 15,
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MIPS32_REG_S0 = 16,
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MIPS32_REG_S1 = 17,
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MIPS32_REG_S2 = 18,
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MIPS32_REG_S3 = 19,
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MIPS32_REG_S4 = 20,
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MIPS32_REG_S5 = 21,
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MIPS32_REG_S6 = 22,
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MIPS32_REG_S7 = 23,
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MIPS32_REG_T8 = 24,
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MIPS32_REG_T9 = 25,
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MIPS32_REG_K0 = 26,
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MIPS32_REG_K1 = 27,
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MIPS32_REG_GP = 28,
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MIPS32_REG_SP = 29,
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MIPS32_REG_FP = 30,
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MIPS32_REG_RA = 31,
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};
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/* mips instruction */
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union mips32_instruction {
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/* raw ins */
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uint32_t raw : 32;
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/* register type */
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struct {
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uint32_t funct : 6;
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uint32_t shamt : 5;
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uint32_t rd : 5;
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uint32_t rt : 5;
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uint32_t rs : 5;
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uint32_t op : 6;
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};
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/* immediate type */
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struct {
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uint32_t immd : 16;
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uint32_t : 16;
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};
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/* jump type */
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struct {
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uint32_t target : 26;
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uint32_t : 6;
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};
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/* branch compact */
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struct {
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int32_t offs26 : 26;
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uint32_t : 6;
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};
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/* branch */
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struct {
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int32_t offset : 16;
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uint32_t bfunct : 5;
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uint32_t : 11;
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};
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} __attribute__((packed));
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/// grammer syntax:
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///
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/// ... the grammer takes entries parsed from the instruction,
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/// and updates the instructions with values based on the type
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/// of entry. i.e. immd would require a immd in the next argument,
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/// and update the low 16bits of the instruction.
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///
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/// GRAMMER -> ENTRIES
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/// GRAMMER -> ε
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/// ENTRIES -> ENTRIES, ENTRY
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/// ENTRY -> rd // i.e. $at
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/// ENTRY -> rs
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/// ENTRY -> rt
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/// ENTRY -> immd // i.e. 0x80
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/// ENTRY -> offset // i.e. main (16bits)
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/// ENTRY -> offest(base) // i.e. 4($sp)
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/// ENTRY -> target // i.e. main (28bits shifted)
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///
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/// // grammer entries are always defined onto themselves... meaning the
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/// // name of their type directly corresponds to the mips field in the
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/// // instruction
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///
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/// pseudo grammer syntax:
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///
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/// ... psuedo entries represents what values should be placed where
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/// in each of the pseudo instructions. psuedo grammer is extended such
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/// that hardcoded values can be returned. i.e. setting rt=$at
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///
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/// GRAMMER -> ENTRIES
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/// GRAMMER -> ε
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/// ENTREIS -> ENTRIES, ENTRYSET
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/// ENTRYSET -> ENTRY | SET
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/// SET -> ENTRY = <REGISTER>
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/// ENTRY -> <GRAMMER: ENTRY> // i.e. any valid entry from grammer synax
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/// ENTRY -> hi // high 16bits of <target> into <immd>
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/// ENTRY -> lo // low 16bits of <target> into <immd>
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/* mips grammer */
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struct mips32_grammer {
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// the name of the ins
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char *name;
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// the grammer of the ins
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char *grammer;
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// the index of the ins (if real)
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int enum_index;
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// for pseudo instructions only
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int pseudo_len;
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struct mips32__pseudo_grammer {
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// what instruction is this
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// part in the pseudo instruction
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int enum_index;
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// what parts of the instruction
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// to update with values from
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// grammer
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char *update;
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} pseudo_grammer[MAX_ARG_LENGTH];
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};
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#endif /* __MIPS32_H__ */
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