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091c684bf1
Author | SHA1 | Date | |
---|---|---|---|
091c684bf1 | |||
16ebc059d9 | |||
4c6668f2b6 | |||
12e098b682 | |||
fb07130990 | |||
853a1ba612 |
24 changed files with 352 additions and 136 deletions
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@ -304,7 +304,8 @@ MIPS_INS(JAL, .op = MIPS_OP_JAL)
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/* JALR - jump and link register */
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#define MIPS_FUNCT_JALR 0b001001
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MIPS_INS(JALR, .op = MIPS_OP_SPECIAL, .funct = MIPS_FUNCT_JALR)
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MIPS_INS(JALR, .rd = MIPS_REG_RA, .op = MIPS_OP_SPECIAL,
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.funct = MIPS_FUNCT_JALR)
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/* JALX - jump and link exchange */
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#define MIPS_OP_JALX 0b011101
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@ -23,6 +23,7 @@ _start:
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# call main
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jal main
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nop
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# exit
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move $a0, $v0
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15
masm/parse.c
15
masm/parse.c
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@ -889,6 +889,17 @@ static int parse_pseudo_move(struct parser *parser, struct ins_expr *expr)
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return M_SUCCESS;
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}
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static int parse_pseudo_nop(struct parser *parser, struct ins_expr *expr)
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{
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(void) parser;
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expr->ins_len = 1;
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expr->ins[0] = mips_instructions[MIPS_INS_SLL];
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expr->ref[0].type = R_MIPS_NONE;
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return M_SUCCESS;
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}
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static int parse_pseudo_instruction(struct parser *parser,
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struct ins_expr *expr,
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struct token ident)
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@ -911,6 +922,10 @@ static int parse_pseudo_instruction(struct parser *parser,
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res = parse_pseudo_la(parser, expr);
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else CHK(move)
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res = parse_pseudo_move(parser, expr);
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else CHK(nop)
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res = parse_pseudo_nop(parser, expr);
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#undef CHK
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if (res) {
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// reset on fail
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46
mld/link.c
46
mld/link.c
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@ -12,8 +12,6 @@
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#include "link.h"
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#include "mips.h"
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#define SEC_ALIGN 0x1000
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static int load_objects(struct linker *linker)
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{
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int max_entries = linker->args->in_count + 1;
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@ -168,7 +166,7 @@ static int relocate_symbol(struct linker *linker, struct object *obj,
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struct symbol_table *symtab, const Elf32_Sym *sym)
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{
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size_t shndx = B16(sym->st_shndx);
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if (shndx == 0)
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if (shndx == 0 || shndx == SHN_ABS)
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return M_SUCCESS; // ignore this symbol
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// find the given section
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@ -184,11 +182,9 @@ static int relocate_symbol(struct linker *linker, struct object *obj,
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return M_ERROR;
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}
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Elf32_Shdr const *shdr = &obj->shdr[shndx];
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struct segment *sec = NULL;
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for (size_t i = 0; i < obj->phdr_len; i++) {
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Elf32_Phdr *temp = &obj->phdr[i];
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if (PHDR_SHDR_MATCH(temp, shdr)) {
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if (obj->phdr_to_shdr_mapping[i] == shndx) {
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sec = &obj->segments[i];
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break;
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}
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@ -219,6 +215,20 @@ static int relocate_symbol(struct linker *linker, struct object *obj,
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new.st_shndx = B16(new_shndx);
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new.st_size = 0;
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// rename symbol if its name is empty to perm placeholder
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//if (B32(sym->st_name) == 0) {
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// #define __MAX 512
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// char name[__MAX];
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// memset(name, 0, __MAX);
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// strcat(name, "__sym");
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// snprintf(name + strlen(name), __MAX - strlen(name), "%d",
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// B32(sym->st_value));
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// if (strtab_push(linker->symtab.strtab, name, &str_off))
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// return M_ERROR;
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// new.st_name = B32(str_off);
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// #undef __MAX
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//}
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if (symtab_get(&linker->symtab, NULL, name, obj->index) == M_SUCCESS) {
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ERROR("cannot link doubly defiend symbol '%s'", name);
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return M_ERROR;
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@ -447,33 +457,38 @@ static int relocate_instruction_rela(struct linker *linker,
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// 16bit absolute
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if (vaddr_abs > UINT16_MAX)
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warn = true;
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ins.immd = (uint16_t)vaddr_abs;
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ins.immd += (uint16_t)vaddr_abs;
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break;
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case R_MIPS_PC16:
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// 16bit relative shifted
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if (vaddr_rel > INT16_MAX || vaddr_rel < INT16_MIN)
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warn = true;
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ins.offset = vaddr_rel;
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ins.offset += vaddr_rel;
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break;
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case R_MIPS_26:
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case R_MIPS_JALR:
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// 26bit absolute shifted
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if (vaddr_abs >= (1 << 25))
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warn = true;
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ins.target = (vaddr_abs & 0x0FFFFFFF) >> 2;
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ins.target += (vaddr_abs & 0x0FFFFFFF) >> 2;
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break;
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case R_MIPS_PC26_S2:
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// 26bit relative shifted
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if (vaddr_rel >= (1 << 24) || -vaddr_rel > (1 << 24))
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warn = true;
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ins.offs26 = vaddr_rel;
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ins.offs26 += vaddr_rel;
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break;
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case R_MIPS_LO16:
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// lo 16bit absolute
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ins.immd = (uint16_t)(vaddr_abs & 0xFFFF);
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ins.immd += (uint16_t)(vaddr_abs & 0xFFFF);
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break;
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case R_MIPS_HI16:
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// hi 16bit absolute
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ins.immd = (uint16_t)(vaddr_abs >> 16);
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ins.immd += (uint16_t)(vaddr_abs >> 16);
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break;
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case R_MIPS_32:
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// 32bit absolute
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ins.raw = vaddr_abs;
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break;
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default:
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ERROR("do not know how do handle relocation type [%d]", typ);
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@ -596,9 +611,6 @@ static void update_offsets(struct linker *linker)
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static int write_file(struct linker *linker)
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{
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extern char *current_file;
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current_file = linker->args->out_file;
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int fd = open(linker->args->out_file, O_RDWR | O_CREAT, 0711);
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if (fd < 0) {
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PERROR("cannot write");
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@ -739,12 +751,16 @@ static void linker_free(struct linker *linker)
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int link_files(struct linker_arguments args) {
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struct linker linker;
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extern char *current_file;
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int res = M_SUCCESS;
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if (res == M_SUCCESS)
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res = linker_init(&linker, &args);
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if (res == M_SUCCESS)
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res = load_objects(&linker);
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current_file = args.out_file;
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if (res == M_SUCCESS)
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res = relocate_segments(&linker);
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if (res == M_SUCCESS)
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@ -35,6 +35,9 @@
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#define TEXT_VADDR_MIN 0x00400000
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#define DATA_VADDR_MIN 0x10000000
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// alignment of a section
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#define SEC_ALIGN 0x1000
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// pre define
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struct linker;
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struct object;
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@ -42,6 +45,7 @@ struct segment;
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struct string_table;
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struct symbol_table;
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struct symbol_table_mapping;
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struct glboff_table;
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///
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/// relocation table
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@ -220,6 +224,10 @@ struct object {
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// program table
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Elf32_Phdr *phdr;
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size_t phdr_len;
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bool phdr_local; // if phdr was created though malloc
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// phdr <=> shdr mappings
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uint32_t *phdr_to_shdr_mapping;
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// object meta
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const char *name;
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105
mld/obj.c
105
mld/obj.c
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@ -49,10 +49,10 @@ static int load_ehdr(struct object *object)
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EHDR_ASSERT(type, sizeof(Elf32_Half));
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EHDR_ASSERT(machine, sizeof(Elf32_Half));
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EHDR_ASSERT(version, sizeof(Elf32_Word));
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EHDR_ASSERT(flags, sizeof(Elf32_Word));
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// EHDR_ASSERT(flags, sizeof(Elf32_Word));
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EHDR_ASSERT(ehsize, sizeof(Elf32_Half));
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EHDR_ASSERT(phentsize, sizeof(Elf32_Half));
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EHDR_ASSERT(shentsize, sizeof(Elf32_Half));
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// EHDR_ASSERT(phentsize, sizeof(Elf32_Half));
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// EHDR_ASSERT(shentsize, sizeof(Elf32_Half));
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#undef EHDR_ASSERT
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@ -81,23 +81,94 @@ static int load_shdr(struct object *object)
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return M_SUCCESS;
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}
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/**
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* Create the phdr
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*/
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static int create_phdr(struct object *object)
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{
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uint32_t entries = 0;
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for (uint32_t i = 0; i < object->shdr_len; i++) {
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Elf32_Shdr *hdr = &object->shdr[i];
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uint32_t type = B32(hdr->sh_type);
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if (type != SHT_PROGBITS && type != SHT_NOBITS)
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continue;
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entries += 1;
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}
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Elf32_Phdr *phdr = malloc(entries * sizeof(Elf32_Phdr));
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if (phdr == NULL) {
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PERROR("cannot alloc");
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return M_ERROR;
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}
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object->phdr = phdr;
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object->phdr_len = entries;
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object->phdr_local = true;
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uint32_t *mapping = malloc(entries * sizeof(uint32_t));
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if (mapping == NULL) {
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PERROR("cannot alloc");
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return M_ERROR;
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}
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object->phdr_to_shdr_mapping = mapping;
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uint32_t index = 0;
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for (uint32_t i = 0; i < object->shdr_len; i++) {
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Elf32_Shdr *hdr = &object->shdr[i];
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uint32_t type = B32(hdr->sh_type);
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if (type != SHT_PROGBITS && type != SHT_NOBITS)
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continue;
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mapping[index] = i;
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phdr[index++] = (Elf32_Phdr) {
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.p_type = B32(PT_LOAD),
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.p_flags = B32(
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// execute
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((B32(hdr->sh_flags) & SHF_EXECINSTR)
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? PF_X : 0) |
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// write
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((B32(hdr->sh_flags) & SHF_WRITE)
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? PF_W : 0) |
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// read
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((B32(hdr->sh_flags) & SHF_ALLOC)
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? PF_R : 0)
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),
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.p_offset = hdr->sh_offset,
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.p_vaddr = hdr->sh_addr,
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.p_paddr = hdr->sh_addr,
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.p_filesz = hdr->sh_size,
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.p_memsz = hdr->sh_size,
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.p_align = B32(SEC_ALIGN),
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};
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}
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return M_SUCCESS;
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}
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/**
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* Map the phdr
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*/
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static int load_phdr(struct object *object)
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{
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size_t phdr_len = B16(object->ehdr->e_phentsize) *
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B16(object->ehdr->e_phnum);
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size_t phdr_off = B32(object->ehdr->e_phoff);
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object->phdr = (Elf32_Phdr *) (object->mapped + phdr_off);
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object->phdr_len = B16(object->ehdr->e_phnum);
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//size_t phdr_len = B16(object->ehdr->e_phentsize) *
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// B16(object->ehdr->e_phnum);
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if (BOUND_CHK(object, phdr_len, phdr_off)) {
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ERROR("cannot read phdr");
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return M_ERROR;
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}
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//if (phdr_len < 1)
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return create_phdr(object);
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return M_SUCCESS;
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//size_t phdr_off = B32(object->ehdr->e_phoff);
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//object->phdr = (Elf32_Phdr *) (object->mapped + phdr_off);
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//object->phdr_len = B16(object->ehdr->e_phnum);
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//if (BOUND_CHK(object, phdr_len, phdr_off)) {
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// ERROR("cannot read phdr");
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// return M_ERROR;
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//}
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//return M_SUCCESS;
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}
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/**
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@ -231,7 +302,7 @@ static int load_shstrtab(struct object *object)
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*/
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static int load_segments(struct object *object)
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{
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object->segment_len = B16(object->ehdr->e_phnum);
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object->segment_len = object->phdr_len;
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object->segments = malloc(sizeof(struct segment) *
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object->segment_len);
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@ -287,6 +358,8 @@ int object_load(struct object *object, char *path, uint32_t index)
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object->mapped = NULL;
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object->name = path;
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object->index = index;
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object->phdr_local = false;
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object->phdr_to_shdr_mapping = NULL;
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/** load the file */
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if (map_file(object, path))
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@ -331,6 +404,10 @@ void object_free(struct object *obj)
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free(obj->strtabs);
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if (obj->segments != NULL)
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free(obj->segments);
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if (obj->phdr_local)
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free(obj->phdr);
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if (obj->phdr_to_shdr_mapping)
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free(obj->phdr_to_shdr_mapping);
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if (obj->fd > 0)
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close(obj->fd);
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if (obj->mapped != NULL && obj->mapped != MAP_FAILED)
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20
mld/seg.c
20
mld/seg.c
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@ -25,14 +25,8 @@ static int load_phdr(struct object *obj, struct segment *seg, size_t index)
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*/
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static int load_shdr(struct object *obj, struct segment *seg, size_t index)
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{
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bool found = false;
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for (size_t i = 0; i < obj->shdr_len; i++) {
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Elf32_Shdr *hdr = &obj->shdr[i];
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// find shdr that matches the offset in phdr
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if (!PHDR_SHDR_MATCH(seg->phdr, hdr))
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continue;
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uint32_t shndx = obj->phdr_to_shdr_mapping[index];
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Elf32_Shdr *hdr = &obj->shdr[shndx];
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// get name
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uint32_t name = B32(hdr->sh_name);
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@ -52,16 +46,8 @@ static int load_shdr(struct object *obj, struct segment *seg, size_t index)
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return M_ERROR;
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}
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found = true;
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seg->shdr = hdr;
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seg->shdr_idx = i;
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break;
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}
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if (!found) {
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ERROR("cannot find shdr for segment [%d]", index);
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return M_ERROR;
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}
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seg->shdr_idx = shndx;
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|
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return M_SUCCESS;
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}
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|
|
|
@ -56,6 +56,10 @@ int symtab_get(struct symbol_table *symtab, Elf32_Sym **res, const char *name,
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if (strcmp(name, symname) != 0)
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continue;
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// ignore absolute symbols
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if (B16(sym->st_shndx) == SHN_ABS)
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continue;
|
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// only allow retrevial of local variables from the
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// same object
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if (sym->st_info >> 4 != STB_GLOBAL && symtab->map != NULL &&
|
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|
|
177
msim/ins.c
177
msim/ins.c
|
@ -1,25 +1,74 @@
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#include <mips.h>
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#include <melf.h>
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#include <stdint.h>
|
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#include <stdio.h>
|
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#include <unistd.h>
|
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|
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#include <merror.h>
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#include "sim.h"
|
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|
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#define I16(n) ((int32_t)(uint16_t)(n))
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/* sign extension */
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#define SE(n) ((uint32_t)(int16_t)(n))
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/* sign extension 64bit */
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#define SE64(n) ((uint64_t)(int32_t)(n))
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/* signed sign extension 64bit */
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#define SSE64(n) ((int64_t)(int32_t)(n))
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/* shifted sign extention */
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#define SSE(n, s) (SE(n) << (s))
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/* zero extension */
|
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#define ZE(n) ((uint32_t)(uint16_t)(n))
|
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/* get vaddr from offset and base */
|
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#define VADDR(sim, ins) \
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((sim->reg[ins.rs] /* base */) + \
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(SE(ins.offset) /* offset */))
|
||||
/* gets the low 32 bits of a 64 bit value */
|
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#define LO(n) (((1ULL << 32) - 1) & (n))
|
||||
/* gets the hi 32 bits of a 64 bit value */
|
||||
#define HI(n) ((n) >> 32)
|
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|
||||
/* convert to a pointer */
|
||||
#define PTR(ptr, type) ((type *)(uintptr_t)(ptr))
|
||||
|
||||
static void sim_delay_slot(struct simulator *sim)
|
||||
{
|
||||
if (sim->args->jdelay == false)
|
||||
return;
|
||||
|
||||
uint32_t ins = * (uint32_t *) (uintptr_t) sim->pc;
|
||||
union mips_instruction_data data = { .raw = B32(ins) };
|
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sim->pc += 4;
|
||||
|
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switch (data.op) {
|
||||
case MIPS_OP_REGIMM:
|
||||
case MIPS_OP_J:
|
||||
case MIPS_OP_JAL:
|
||||
case MIPS_OP_JALX:
|
||||
case MIPS_OP_BEQ:
|
||||
case MIPS_OP_BEQL:
|
||||
case MIPS_OP_BNE:
|
||||
case MIPS_OP_BNEL:
|
||||
case MIPS_OP_BGTZ:
|
||||
case MIPS_OP_BGTZL:
|
||||
case MIPS_OP_BLEZ:
|
||||
case MIPS_OP_BLEZL:
|
||||
sim_dump(sim, "attempted to execute jump instruction in delay"
|
||||
"slot (0b%05b)", data.op);
|
||||
default:
|
||||
}
|
||||
|
||||
sim_ins(sim, ins);
|
||||
}
|
||||
|
||||
static void sim_ins_special_sop30(struct simulator *sim,
|
||||
union mips_instruction_data ins)
|
||||
{
|
||||
switch (ins.shamt) {
|
||||
case MIPS_SOP30_MUL:
|
||||
sim->reg[ins.rd] = ((int64_t)sim->reg[ins.rs] /
|
||||
(int64_t)sim->reg[ins.rt]) >> 0;
|
||||
sim->reg[ins.rd] = (SSE64(sim->reg[ins.rs]) *
|
||||
SSE64(sim->reg[ins.rt])) >> 0;
|
||||
break;
|
||||
|
||||
case MIPS_SOP30_MUH:
|
||||
sim->reg[ins.rd] = ((int64_t)sim->reg[ins.rs] /
|
||||
(int64_t)sim->reg[ins.rt]) >> 32;
|
||||
sim->reg[ins.rd] = (SSE64(sim->reg[ins.rs]) *
|
||||
SSE64(sim->reg[ins.rt])) >> 32;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -32,13 +81,13 @@ static void sim_ins_special_sop31(struct simulator *sim,
|
|||
{
|
||||
switch (ins.shamt) {
|
||||
case MIPS_SOP31_MULU:
|
||||
sim->reg[ins.rd] = ((uint64_t)sim->reg[ins.rs] /
|
||||
(uint64_t)sim->reg[ins.rt]) >> 0;
|
||||
sim->reg[ins.rd] = (SE64(sim->reg[ins.rs]) *
|
||||
SE64(sim->reg[ins.rt])) >> 0;
|
||||
break;
|
||||
|
||||
case MIPS_SOP31_MUHU:
|
||||
sim->reg[ins.rd] = ((uint64_t)sim->reg[ins.rs] /
|
||||
(uint64_t)sim->reg[ins.rt]) >> 32;
|
||||
sim->reg[ins.rd] = (SE64(sim->reg[ins.rs]) *
|
||||
SE64(sim->reg[ins.rt])) >> 32;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -51,13 +100,13 @@ static void sim_ins_special_sop32(struct simulator *sim,
|
|||
{
|
||||
switch (ins.shamt) {
|
||||
case MIPS_SOP32_DIV:
|
||||
sim->reg[ins.rd] = (int32_t)sim->reg[ins.rs] /
|
||||
(int32_t)sim->reg[ins.rt];
|
||||
sim->reg[ins.rd] = (signed) sim->reg[ins.rs] /
|
||||
(signed) sim->reg[ins.rt];
|
||||
break;
|
||||
|
||||
case MIPS_SOP32_MOD:
|
||||
sim->reg[ins.rd] = (int32_t)sim->reg[ins.rs] %
|
||||
(int32_t)sim->reg[ins.rt];
|
||||
sim->reg[ins.rd] = (signed) sim->reg[ins.rs] %
|
||||
(signed) sim->reg[ins.rt];
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -87,8 +136,8 @@ static void sim_ins_special(struct simulator *sim,
|
|||
{
|
||||
switch (ins.funct) {
|
||||
case MIPS_FUNCT_ADD:
|
||||
sim->reg[ins.rd] = (int32_t)sim->reg[ins.rs] +
|
||||
(int32_t)sim->reg[ins.rt];
|
||||
// TODO: trap on overflow
|
||||
sim->reg[ins.rd] = sim->reg[ins.rs] + sim->reg[ins.rt];
|
||||
break;
|
||||
|
||||
case MIPS_FUNCT_ADDU:
|
||||
|
@ -116,9 +165,10 @@ static void sim_ins_special(struct simulator *sim,
|
|||
break;
|
||||
|
||||
case MIPS_FUNCT_JALR:
|
||||
sim->reg[MIPS_REG_RA] = sim->pc;
|
||||
sim->reg[ins.rd] = sim->pc + 4;
|
||||
/* fall through */
|
||||
case MIPS_FUNCT_JR:
|
||||
sim_delay_slot(sim);
|
||||
sim->pc = sim->reg[ins.rs];
|
||||
break;
|
||||
|
||||
|
@ -147,7 +197,8 @@ static void sim_ins_special(struct simulator *sim,
|
|||
break;
|
||||
|
||||
case MIPS_FUNCT_SLT:
|
||||
sim->reg[ins.rd] = (int32_t)sim->reg[ins.rs] < (int32_t)sim->reg[ins.rt] ? 1 : 0;
|
||||
sim->reg[ins.rd] = (signed) sim->reg[ins.rs] <
|
||||
(signed) sim->reg[ins.rt] ? 1 : 0;
|
||||
break;
|
||||
|
||||
case MIPS_FUNCT_SLTU:
|
||||
|
@ -155,11 +206,12 @@ static void sim_ins_special(struct simulator *sim,
|
|||
break;
|
||||
|
||||
case MIPS_FUNCT_SRA:
|
||||
sim->reg[ins.rd] = (int32_t)sim->reg[ins.rt] >> ins.shamt;
|
||||
sim->reg[ins.rd] = (signed) sim->reg[ins.rt] >> ins.shamt;
|
||||
break;
|
||||
|
||||
case MIPS_FUNCT_SRAV:
|
||||
sim->reg[ins.rd] = (int32_t)sim->reg[ins.rt] >> sim->reg[ins.rs];
|
||||
sim->reg[ins.rd] = (signed) sim->reg[ins.rt] >>
|
||||
sim->reg[ins.rs];
|
||||
break;
|
||||
|
||||
case MIPS_FUNCT_SRL:
|
||||
|
@ -171,8 +223,8 @@ static void sim_ins_special(struct simulator *sim,
|
|||
break;
|
||||
|
||||
case MIPS_FUNCT_SUB:
|
||||
sim->reg[ins.rd] = (int32_t)sim->reg[ins.rs] -
|
||||
(int32_t)sim->reg[ins.rt];
|
||||
// TODO: trap on overflow
|
||||
sim->reg[ins.rd] = sim->reg[ins.rs] - sim->reg[ins.rt];
|
||||
break;
|
||||
|
||||
case MIPS_FUNCT_SUBU:
|
||||
|
@ -209,29 +261,33 @@ static void sim_ins_special(struct simulator *sim,
|
|||
static void sim_ins_regimm(struct simulator *sim,
|
||||
union mips_instruction_data ins)
|
||||
{
|
||||
uint32_t pc = sim->pc;
|
||||
|
||||
switch (ins.bfunct) {
|
||||
case MIPS_FUNCT_BGEZAL:
|
||||
case MIPS_FUNCT_BGEZALL:
|
||||
sim->reg[MIPS_REG_RA] = sim->pc;
|
||||
sim->reg[MIPS_REG_RA] = sim->pc + 4;
|
||||
/* fall through */
|
||||
case MIPS_FUNCT_BGEZ:
|
||||
case MIPS_FUNCT_BGEZL:
|
||||
if ((int32_t)sim->reg[ins.rs] >= 0)
|
||||
sim->pc += ins.offset << 2;
|
||||
sim_delay_slot(sim);
|
||||
if ((signed) sim->reg[ins.rs] >= 0)
|
||||
sim->pc = pc + SSE(ins.offset, 2);
|
||||
break;
|
||||
|
||||
case MIPS_FUNCT_BLTZAL:
|
||||
case MIPS_FUNCT_BLTZALL:
|
||||
sim->reg[MIPS_REG_RA] = sim->pc;
|
||||
sim->reg[MIPS_REG_RA] = sim->pc + 4;
|
||||
/* fall through */
|
||||
case MIPS_FUNCT_BLTZ:
|
||||
case MIPS_FUNCT_BLTZL:
|
||||
if ((int32_t)sim->reg[ins.rs] < 0)
|
||||
sim->pc += ins.offset << 2;
|
||||
sim_delay_slot(sim);
|
||||
if ((signed) sim->reg[ins.rs] < 0)
|
||||
sim->pc = pc + SSE(ins.offset, 2);
|
||||
break;
|
||||
|
||||
default:
|
||||
sim_dump(sim, "unknown bfunct (0b%06b)", ins.bfunct);
|
||||
sim_dump(sim, "unknown branch funct (0b%06b)", ins.bfunct);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -241,6 +297,7 @@ void sim_ins(struct simulator *sim, uint32_t raw)
|
|||
union mips_instruction_data ins = {
|
||||
.raw = B32(raw)
|
||||
};
|
||||
uint32_t pc = sim->pc;
|
||||
|
||||
// reset zero reg
|
||||
sim->reg[MIPS_REG_ZERO] = 0;
|
||||
|
@ -256,73 +313,75 @@ void sim_ins(struct simulator *sim, uint32_t raw)
|
|||
|
||||
case MIPS_OP_ADDI:
|
||||
sim->reg[ins.rt] = (int32_t)sim->reg[ins.rs] +
|
||||
(int16_t) ins.immd;
|
||||
SE(ins.immd);
|
||||
break;
|
||||
|
||||
case MIPS_OP_ADDIU:
|
||||
sim->reg[ins.rt] = sim->reg[ins.rs] + ins.immd;
|
||||
sim->reg[ins.rt] = sim->reg[ins.rs] + SE(ins.immd);
|
||||
break;
|
||||
|
||||
case MIPS_OP_ANDI:
|
||||
sim->reg[ins.rt] = sim->reg[ins.rs] & ins.immd;
|
||||
sim->reg[ins.rt] = sim->reg[ins.rs] & ZE(ins.immd);
|
||||
break;
|
||||
|
||||
case MIPS_OP_BALC:
|
||||
sim->reg[MIPS_REG_RA] = sim->pc;
|
||||
/* fall through */
|
||||
case MIPS_OP_BC:
|
||||
sim->pc += ins.offs26 << 2;
|
||||
sim->pc += SSE(ins.offs26, 2);
|
||||
break;
|
||||
|
||||
case MIPS_OP_BEQ:
|
||||
case MIPS_OP_BEQL:
|
||||
sim_delay_slot(sim);
|
||||
if (sim->reg[ins.rs] == sim->reg[ins.rt])
|
||||
sim->pc += ins.offset << 2;
|
||||
sim->pc = pc + SSE(ins.offset, 2);
|
||||
break;
|
||||
|
||||
case MIPS_OP_BGTZ:
|
||||
case MIPS_OP_BGTZL:
|
||||
if ((int32_t)sim->reg[ins.rs] <= 0)
|
||||
sim->pc += ins.offset << 2;
|
||||
sim_delay_slot(sim);
|
||||
if ((signed) sim->reg[ins.rs] <= 0)
|
||||
sim->pc = pc + SSE(ins.offset, 2);
|
||||
break;
|
||||
|
||||
case MIPS_OP_BLEZ:
|
||||
case MIPS_OP_BLEZL:
|
||||
if ((int32_t)sim->reg[ins.rs] <= 0)
|
||||
sim->pc += ins.offset << 2;
|
||||
sim_delay_slot(sim);
|
||||
if ((signed) sim->reg[ins.rs] <= 0)
|
||||
sim->pc = pc + SSE(ins.offset, 2);
|
||||
break;
|
||||
|
||||
case MIPS_OP_BNE:
|
||||
case MIPS_OP_BNEL:
|
||||
sim_delay_slot(sim);
|
||||
if (sim->reg[ins.rs] != sim->reg[ins.rt])
|
||||
sim->pc += ins.offset << 2;
|
||||
sim->pc = pc + SSE(ins.offset, 2);
|
||||
break;
|
||||
|
||||
case MIPS_OP_JAL:
|
||||
sim->reg[MIPS_REG_RA] = sim->pc;
|
||||
sim->reg[MIPS_REG_RA] = sim->pc + 4;
|
||||
/* fall through */
|
||||
case MIPS_OP_J:
|
||||
sim->pc = ins.target << 2;
|
||||
sim_delay_slot(sim);
|
||||
sim->pc &= 0xF0000000;
|
||||
sim->pc |= ins.target << 2;
|
||||
break;
|
||||
|
||||
case MIPS_OP_LB:
|
||||
sim->reg[ins.rt] = * (int8_t *) (uintptr_t) (sim->reg[ins.rs]
|
||||
+ ins.offset);
|
||||
sim->reg[ins.rt] = *PTR(VADDR(sim, ins), int8_t);
|
||||
break;
|
||||
|
||||
case MIPS_OP_LBU:
|
||||
sim->reg[ins.rt] = * (uint8_t *) (uintptr_t) (sim->reg[ins.rs]
|
||||
+ ins.offset);
|
||||
sim->reg[ins.rt] = *PTR(VADDR(sim, ins), uint8_t);
|
||||
break;
|
||||
|
||||
case MIPS_OP_LH:
|
||||
sim->reg[ins.rt] = * (int16_t *) (uintptr_t) (sim->reg[ins.rs]
|
||||
+ ins.offset);
|
||||
sim->reg[ins.rt] = *PTR(VADDR(sim, ins), int16_t);
|
||||
break;
|
||||
|
||||
case MIPS_OP_LHU:
|
||||
sim->reg[ins.rt] = * (uint16_t *) (uintptr_t) (sim->reg[ins.rs]
|
||||
+ ins.offset);
|
||||
sim->reg[ins.rt] = *PTR(VADDR(sim, ins), uint16_t);
|
||||
break;
|
||||
|
||||
case MIPS_OP_LUI:
|
||||
|
@ -330,32 +389,28 @@ void sim_ins(struct simulator *sim, uint32_t raw)
|
|||
break;
|
||||
|
||||
case MIPS_OP_LW:
|
||||
sim->reg[ins.rt] = * (uint32_t *) (uintptr_t) (sim->reg[ins.rs]
|
||||
+ ins.offset);
|
||||
sim->reg[ins.rt] = *PTR(VADDR(sim, ins), uint32_t);
|
||||
break;
|
||||
|
||||
case MIPS_OP_SB:
|
||||
* (uint8_t *) (uintptr_t) (sim->reg[ins.rs] +
|
||||
+ ins.offset) = sim->reg[ins.rt];
|
||||
*PTR(VADDR(sim, ins), uint8_t) = sim->reg[ins.rt];
|
||||
break;
|
||||
|
||||
case MIPS_OP_SH:
|
||||
* (uint16_t *) (uintptr_t) (sim->reg[ins.rs] +
|
||||
ins.offset) = sim->reg[ins.rt];
|
||||
*PTR(VADDR(sim, ins), uint16_t) = sim->reg[ins.rt];
|
||||
break;
|
||||
|
||||
case MIPS_OP_SW:
|
||||
* (uint32_t *) (uintptr_t) (sim->reg[ins.rs] +
|
||||
ins.offset) = sim->reg[ins.rt];
|
||||
*PTR(VADDR(sim, ins), uint32_t) = sim->reg[ins.rt];
|
||||
break;
|
||||
|
||||
case MIPS_OP_SLTI:
|
||||
sim->reg[ins.rt] = (int32_t)sim->reg[ins.rs] <
|
||||
(int16_t)ins.immd ? 1 : 0;
|
||||
sim->reg[ins.rt] = (signed) sim->reg[ins.rs] <
|
||||
(signed) SE(ins.immd) ? 1 : 0;
|
||||
break;
|
||||
|
||||
case MIPS_OP_SLTIU:
|
||||
sim->reg[ins.rt] = sim->reg[ins.rs] < ins.immd ? 1 : 0;
|
||||
sim->reg[ins.rt] = sim->reg[ins.rs] < SE(ins.immd) ? 1 : 0;
|
||||
break;
|
||||
|
||||
case MIPS_OP_ORI:
|
||||
|
|
|
@ -52,12 +52,15 @@ static int load_ehdr(struct simulator *sim, struct load_state *state)
|
|||
res |= assert_ehdr(&baseline.e_##name, \
|
||||
&ehdr.e_##name, size) \
|
||||
|
||||
// ignore abi ver
|
||||
ehdr.e_ident[EI_ABIVERSION] = 0x00;
|
||||
|
||||
int res = 0;
|
||||
EHDR_ASSERT(ident, EI_NIDENT);
|
||||
EHDR_ASSERT(type, sizeof(Elf32_Half));
|
||||
EHDR_ASSERT(machine, sizeof(Elf32_Half));
|
||||
EHDR_ASSERT(version, sizeof(Elf32_Word));
|
||||
EHDR_ASSERT(flags, sizeof(Elf32_Word));
|
||||
// EHDR_ASSERT(flags, sizeof(Elf32_Word));
|
||||
EHDR_ASSERT(ehsize, sizeof(Elf32_Half));
|
||||
EHDR_ASSERT(phentsize, sizeof(Elf32_Half));
|
||||
EHDR_ASSERT(shentsize, sizeof(Elf32_Half));
|
||||
|
|
11
msim/main.c
11
msim/main.c
|
@ -2,7 +2,6 @@
|
|||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
#include <merror.h>
|
||||
#include <signal.h>
|
||||
|
||||
#include "fault.h"
|
||||
#include "sim.h"
|
||||
|
@ -11,7 +10,7 @@ static void help(void) {
|
|||
printf("usage: msim [options] executable\n\n");
|
||||
printf("options:\n");
|
||||
printf("\t-h\t\tprints this help messaage\n");
|
||||
printf("\t-c\t\tdisable runtime memory checks (allows segfault)\n");
|
||||
printf("\t-j\t\tdisable jump delay slot\n");
|
||||
printf("\t-d\t\truns the debugger\n");
|
||||
}
|
||||
|
||||
|
@ -21,18 +20,18 @@ int main(int argc, char **argv) {
|
|||
struct simulator_args args = {
|
||||
.executable = NULL,
|
||||
.debug = false,
|
||||
.memchk = true,
|
||||
.jdelay = true,
|
||||
};
|
||||
|
||||
int c;
|
||||
|
||||
while ((c = getopt(argc, argv, "hcd")) != 1) {
|
||||
while ((c = getopt(argc, argv, "hjd")) != 1) {
|
||||
switch (c) {
|
||||
case 'h':
|
||||
help();
|
||||
return M_SUCCESS;
|
||||
case 'c':
|
||||
args.memchk = false;
|
||||
case 'j':
|
||||
args.jdelay = false;
|
||||
break;
|
||||
case 'd':
|
||||
args.debug = true;
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
/// arguments
|
||||
struct simulator_args {
|
||||
char *executable;
|
||||
bool memchk;
|
||||
bool jdelay;
|
||||
bool debug;
|
||||
};
|
||||
|
||||
|
|
|
@ -11,6 +11,7 @@ result:
|
|||
move $t0, $a0
|
||||
move $v0, $t0
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
main:
|
||||
# save ra on stack
|
||||
|
@ -20,6 +21,7 @@ main:
|
|||
# set return to 17
|
||||
li $a0, 17
|
||||
jal result
|
||||
nop
|
||||
|
||||
# pop ra from stack
|
||||
lw $ra, 0($sp)
|
||||
|
@ -27,3 +29,4 @@ main:
|
|||
|
||||
# return result
|
||||
jr $ra
|
||||
nop
|
||||
|
|
|
@ -15,3 +15,4 @@ main:
|
|||
# return
|
||||
li $v0, 0
|
||||
jr $ra
|
||||
nop
|
|
@ -24,3 +24,4 @@ main:
|
|||
# return 1
|
||||
li $v0, 0
|
||||
jr $ra
|
||||
nop
|
||||
|
|
41
test/masm/recursion.asm
Normal file
41
test/masm/recursion.asm
Normal file
|
@ -0,0 +1,41 @@
|
|||
# Copyright (c) 2024 Freya Murphy
|
||||
|
||||
# file: recursion.asm
|
||||
# test: should recurse sum n..0 numbers
|
||||
|
||||
.text
|
||||
.align 2
|
||||
.globl main
|
||||
|
||||
main:
|
||||
# init $a0
|
||||
li $a0, 5
|
||||
|
||||
sum:
|
||||
# save stack
|
||||
addiu $sp, $sp, -8
|
||||
sw $ra, 0($sp)
|
||||
sw $s0, 4($sp)
|
||||
|
||||
# load n from a0
|
||||
move $s0, $a0
|
||||
|
||||
# skip if n is zero
|
||||
li $v0, 0
|
||||
beq $s0, $zero, add
|
||||
nop
|
||||
jal sum
|
||||
addi $a0, $s0, -1
|
||||
|
||||
add:
|
||||
# n = n + returned
|
||||
add $v0, $s0, $v0
|
||||
|
||||
# restore stack
|
||||
lw $ra, 0($sp)
|
||||
lw $s0, 4($sp)
|
||||
addiu $sp, $sp, 8
|
||||
|
||||
# return
|
||||
jr $ra
|
||||
nop
|
|
@ -13,3 +13,4 @@ main:
|
|||
# return
|
||||
li $v0, 0
|
||||
jr $ra
|
||||
nop
|
|
@ -12,4 +12,4 @@ $v1: 0x00000000 $t3: 0x00000000 $s3: 0x00000000 $k1: 0x00000000
|
|||
$a0: 0x00000000 $t4: 0x00000000 $s4: 0x00000000 $gp: 0x00000000
|
||||
$a1: 0x00000000 $t5: 0x00000000 $s5: 0x00000000 $sp: 0x10001000
|
||||
$a2: 0x00000000 $t6: 0x00000000 $s6: 0x00000000 $fp: 0x00000000
|
||||
$a3: 0x00000000 $t7: 0x00000000 $s7: 0x00000000 $ra: 0x0040001c
|
||||
$a3: 0x00000000 $t7: 0x00000000 $s7: 0x00000000 $ra: 0x00400024
|
0
test/out/recursion
Normal file
0
test/out/recursion
Normal file
1
test/out/recursion.status
Normal file
1
test/out/recursion.status
Normal file
|
@ -0,0 +1 @@
|
|||
15
|
|
@ -12,4 +12,4 @@ $v1: 0x00000000 $t3: 0x00000000 $s3: 0x00000000 $k1: 0x00000000
|
|||
$a0: 0x00000000 $t4: 0x00000000 $s4: 0x00000000 $gp: 0x00000000
|
||||
$a1: 0x00000000 $t5: 0x00000000 $s5: 0x00000000 $sp: 0x10001000
|
||||
$a2: 0x00000000 $t6: 0x00000000 $s6: 0x00000000 $fp: 0x00000000
|
||||
$a3: 0x00000000 $t7: 0x00000000 $s7: 0x00000000 $ra: 0x00400018
|
||||
$a3: 0x00000000 $t7: 0x00000000 $s7: 0x00000000 $ra: 0x00400020
|
|
@ -35,7 +35,10 @@ if [ $res = 0 ]; then
|
|||
printf "\033[32mPASSED\033[0m\n"
|
||||
else
|
||||
printf "\033[31mFAILED\033[0m\n"
|
||||
diff <(echo $out) <(echo $rout)
|
||||
if [ "$status" != "$rstatus" ]; then
|
||||
printf "exit: $rstatus (should be $status)\n"
|
||||
fi
|
||||
diff -Nau <(printf "%s\n" "$out") <(printf "%s\n" "$rout")
|
||||
fi
|
||||
|
||||
exit $res
|
||||
|
|
Loading…
Reference in a new issue