497 lines
13 KiB
C
497 lines
13 KiB
C
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/* Copyright (c) 2024 Freya Murphy */
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#ifndef __MIPS32_H__
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#define __MIPS32_H__
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#include <mlimits.h>
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#include <stdint.h>
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/* all mips registers $0-$31 */
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enum mips32_register {
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MIPS32_REG_ZERO = 0,
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MIPS32_REG_AT = 1,
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MIPS32_REG_V0 = 2,
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MIPS32_REG_V1 = 3,
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MIPS32_REG_A0 = 4,
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MIPS32_REG_A1 = 5,
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MIPS32_REG_A2 = 6,
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MIPS32_REG_A3 = 7,
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MIPS32_REG_T0 = 8,
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MIPS32_REG_T1 = 9,
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MIPS32_REG_T2 = 10,
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MIPS32_REG_T3 = 11,
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MIPS32_REG_T4 = 12,
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MIPS32_REG_T5 = 13,
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MIPS32_REG_T6 = 14,
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MIPS32_REG_T7 = 15,
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MIPS32_REG_S0 = 16,
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MIPS32_REG_S1 = 17,
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MIPS32_REG_S2 = 18,
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MIPS32_REG_S3 = 19,
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MIPS32_REG_S4 = 20,
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MIPS32_REG_S5 = 21,
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MIPS32_REG_S6 = 22,
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MIPS32_REG_S7 = 23,
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MIPS32_REG_T8 = 24,
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MIPS32_REG_T9 = 25,
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MIPS32_REG_K0 = 26,
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MIPS32_REG_K1 = 27,
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MIPS32_REG_GP = 28,
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MIPS32_REG_SP = 29,
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MIPS32_REG_FP = 30,
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MIPS32_REG_RA = 31,
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};
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/* mips instruction format */
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enum mips32_instruction_format {
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MIPS32_FORMAT_R,
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MIPS32_FORMAT_I,
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MIPS32_FORMAT_J,
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MIPS32_FORMAT_B,
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};
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/* mips instructions */
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enum mips32_instruction_type {
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MIPS32_INS_ADD,
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MIPS32_INS_ADDI,
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MIPS32_INS_ADDIU,
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MIPS32_INS_ADDU,
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MIPS32_INS_AND,
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MIPS32_INS_ANDI,
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MIPS32_INS_BAL,
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MIPS32_INS_BALC,
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MIPS32_INS_BC,
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MIPS32_INS_BEQ,
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MIPS32_INS_BEQL,
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MIPS32_INS_BGEZ,
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MIPS32_INS_BGEZAL,
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MIPS32_INS_BGEZALL,
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MIPS32_INS_BGEZL,
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MIPS32_INS_BGTZ,
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MIPS32_INS_BGTZL,
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MIPS32_INS_BLEZ,
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MIPS32_INS_BLEZL,
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MIPS32_INS_BLTZ,
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MIPS32_INS_BLTZAL,
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MIPS32_INS_BLTZALL,
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MIPS32_INS_BLTZL,
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MIPS32_INS_BNE,
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MIPS32_INS_BNEL,
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MIPS32_INS_DDIV,
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MIPS32_INS_DDIVU,
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MIPS32_INS_DIV,
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MIPS32_INS_DIVU,
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MIPS32_INS_J,
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MIPS32_INS_JAL,
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MIPS32_INS_JALR,
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MIPS32_INS_JALX,
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MIPS32_INS_JR,
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MIPS32_INS_LB,
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MIPS32_INS_LBU,
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MIPS32_INS_LH,
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MIPS32_INS_LHU,
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MIPS32_INS_LUI,
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MIPS32_INS_LW,
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MIPS32_INS_LWL,
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MIPS32_INS_LWR,
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MIPS32_INS_MFHI,
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MIPS32_INS_MFLO,
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MIPS32_INS_MTHI,
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MIPS32_INS_MTLO,
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MIPS32_INS_MULT,
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MIPS32_INS_MULTU,
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MIPS32_INS_SB,
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MIPS32_INS_SH,
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MIPS32_INS_SW,
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MIPS32_INS_SWL,
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MIPS32_INS_SWR,
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MIPS32_INS_SLL,
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MIPS32_INS_SLLV,
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MIPS32_INS_SLT,
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MIPS32_INS_SLTI,
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MIPS32_INS_SLTIU,
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MIPS32_INS_SLTU,
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MIPS32_INS_SRA,
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MIPS32_INS_SRAV,
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MIPS32_INS_SRL,
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MIPS32_INS_SRLV,
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MIPS32_INS_SUB,
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MIPS32_INS_SUBU,
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MIPS32_INS_OR,
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MIPS32_INS_ORI,
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MIPS32_INS_NOR,
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MIPS32_INS_XOR,
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MIPS32_INS_XORI,
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// gets the size of the enum
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__MIPS32_INS_LEN,
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};
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/* mips instruction R TYPE */
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struct mips32_instruction_r_data {
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uint32_t funct : 6;
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uint32_t shamt : 5;
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uint32_t rd : 5;
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uint32_t rt : 5;
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uint32_t rs : 5;
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uint32_t op : 6;
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} __attribute__((packed));
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/* mips instruction I TYPE */
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struct mips32_instruction_i_data {
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uint32_t immd : 16;
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uint32_t rt : 5;
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uint32_t rs : 5;
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uint32_t op : 6;
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} __attribute__((packed));
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/* mips instruction J TYPE */
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struct mips32_instruction_j_data {
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uint32_t target : 26;
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uint32_t op : 6;
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} __attribute__((packed));
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/* mips instruction BRANCH TYPE */
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struct mips32_instruction_branch_data {
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int32_t offset : 16;
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uint32_t funct : 5;
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uint32_t rs : 5;
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uint32_t op : 6;
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} __attribute__((packed));
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/* mips instruction information */
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struct mips32_instruction {
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// metadata
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enum mips32_instruction_type type;
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enum mips32_instruction_format format;
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const char *name;
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// data
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union {
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uint32_t data;
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struct mips32_instruction_r_data R_data;
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struct mips32_instruction_i_data I_data;
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struct mips32_instruction_j_data J_data;
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struct mips32_instruction_branch_data B_data;
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} __attribute__((packed));
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};
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#define MIPS32_INS(ins, format, ...) \
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[MIPS32_INS_ ##ins] = { \
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MIPS32_INS_ ##ins, \
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MIPS32_FORMAT_ ##format, \
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#ins, \
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.format##_data = { __VA_ARGS__ } \
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}, \
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static const struct mips32_instruction mips32_instructions[] = {
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/* ADD - add */
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#define MIPS32_OP_SPECIAL 0b000000
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#define MIPS32_FUNCT_ADD 0b100000
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MIPS32_INS(ADD, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_ADD)
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/* ADDI - add immediate */
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#define MIPS32_OP_ADDI 0b001000
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MIPS32_INS(ADDI, I, .op = MIPS32_OP_ADDI)
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/* ADDIU - add immediate unsigned */
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#define MIPS32_OP_ADDIU 0b001001
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MIPS32_INS(ADDIU, I, .op = MIPS32_OP_ADDIU)
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/* ADDU - add unsigned */
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#define MIPS32_FUNCT_ADDU 0b100001
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MIPS32_INS(ADDU, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_ADDU)
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/* AND - and */
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#define MIPS32_FUNCT_AND 0b100100
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MIPS32_INS(AND, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_AND)
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/* ANDI - and immediate */
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#define MIPS32_OP_ANDI 0b001100
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MIPS32_INS(ANDI, I, .op = MIPS32_OP_ANDI)
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/* BAL - branch and link */
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#define MIPS32_OP_REGIMM 0b000001
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#define MIPS32_FUNCT_BAL 0b10001
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MIPS32_INS(BAL, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BAL)
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/* BALC - branch and link, compact */
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#define MIPS32_OP_BALC 0b111010
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MIPS32_INS(BALC, J, .op = MIPS32_OP_BALC)
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/* BC - branch, compact */
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#define MIPS32_OP_BC 0b110010
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MIPS32_INS(BC, J, .op = MIPS32_OP_BC)
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/* BEQ - branch on equal */
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#define MIPS32_OP_BEQ 0b000100
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MIPS32_INS(BEQ, I, .op = MIPS32_OP_BEQ)
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/* BEQL - branch on equal likely */
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#define MIPS32_OP_BEQL 0b010100
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MIPS32_INS(BEQL, I, .op = MIPS32_OP_BEQL)
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/* BGEZ - branch on greater than or equal to zero */
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#define MIPS32_FUNCT_BGEZ 0b00001
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MIPS32_INS(BGEZ, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BGEZ)
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/* BGEZAL - branch on greater than or equal to zero and link */
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#define MIPS32_FUNCT_BGEZAL 0b10001
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MIPS32_INS(BGEZAL, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BGEZAL)
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/* BGEZAL - branch on greater than or equal to zero and link likely */
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#define MIPS32_FUNCT_BGEZALL 0b10011
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MIPS32_INS(BGEZALL, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BGEZALL)
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/* BGEZL - branch on greater than or equal to zero likely */
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#define MIPS32_FUNCT_BGEZL 0b00011
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MIPS32_INS(BGEZL, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BGEZL)
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/* BGTZ - branch on greater than zero */
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#define MIPS32_OP_BGTZ 0b000111
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MIPS32_INS(BGTZ, I, .op = MIPS32_OP_BGTZ)
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/* BGTZL - branch on greater than zero likely */
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#define MIPS32_OP_BGTZL 0b010111
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MIPS32_INS(BGTZL, I, .op = MIPS32_OP_BGTZL)
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/* BLEZ - branch on less than or equal to zero */
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#define MIPS32_OP_BLEZ 0b000110
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MIPS32_INS(BLEZ, I, .op = MIPS32_OP_BLEZ)
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/* BLEZL - branch on less than or equal to zero likely */
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#define MIPS32_OP_BLEZL 0b010110
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MIPS32_INS(BLEZL, I, .op = MIPS32_OP_BLEZL)
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/* BLTZ - branch on less than zero */
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#define MIPS32_FUNCT_BLTZ 0b00000
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MIPS32_INS(BLTZ, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BLTZ)
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/* BLTZAL - branch on less than zero and link */
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#define MIPS32_FUNCT_BLTZAL 0b10000
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MIPS32_INS(BLTZAL, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BLTZAL)
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/* BLTZALL - branch on less than zero and link likely */
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#define MIPS32_FUNCT_BLTZALL 0b10010
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MIPS32_INS(BLTZALL, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BLTZALL)
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/* BLTZL - branch on less than zero likely */
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#define MIPS32_FUNCT_BLTZL 0b00010
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MIPS32_INS(BLTZL, B, .op = MIPS32_OP_REGIMM, .funct = MIPS32_FUNCT_BLTZL)
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/* BNE - branch on not equal */
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#define MIPS32_OP_BNE 0b000101
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MIPS32_INS(BNE, I, .op = MIPS32_OP_BNE)
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/* BNEL - branch on not equal likely */
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#define MIPS32_OP_BNEL 0b010101
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MIPS32_INS(BNEL, I, .op = MIPS32_OP_BNEL)
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/* DDIV - doubleword divide */
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#define MIPS32_FUNCT_DDIV 0b011110
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MIPS32_INS(DDIV, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_DDIV)
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/* DDIVU - doubleword divide unsigned */
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#define MIPS32_FUNCT_DDIVU 0b011111
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MIPS32_INS(DDIVU, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_DDIVU)
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/* DIV - divide */
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#define MIPS32_FUNCT_DIV 0b011010
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MIPS32_INS(DIV, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_DIV)
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/* DIVU - divide unsigned */
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#define MIPS32_FUNCT_DIVU 0b011011
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MIPS32_INS(DIVU, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_DIVU)
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/* J - jump */
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#define MIPS32_OP_J 0b000010
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MIPS32_INS(J, J, .op = MIPS32_OP_J)
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/* JAL - jump and link */
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#define MIPS32_OP_JAL 0b000011
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MIPS32_INS(JAL, J, .op = MIPS32_OP_JAL)
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/* JALR - jump and link register */
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#define MIPS32_FUNCT_JALR 0b001001
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MIPS32_INS(JALR, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_JALR)
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/* JALX - jump and link exchange */
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#define MIPS32_OP_JALX 0b011101
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MIPS32_INS(JALX, J, .op = MIPS32_OP_JALX)
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/* JR - jump register */
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#define MIPS32_FUNCT_JR 0b001000
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MIPS32_INS(JR, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_JR)
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/* LB - load byte */
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#define MIPS32_OP_LB 0b100000
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MIPS32_INS(LB, I, .op = MIPS32_OP_LB)
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/* LBU - load byte unsigned */
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#define MIPS32_OP_LBU 0b100100
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MIPS32_INS(LBU, I, .op = MIPS32_OP_LBU)
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/* LH - load half */
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#define MIPS32_OP_LH 0b100001
|
||
|
|
MIPS32_INS(LH, I, .op = MIPS32_OP_LH)
|
||
|
|
|
||
|
|
/* LHU - load half unsigned */
|
||
|
|
#define MIPS32_OP_LHU 0b100101
|
||
|
|
MIPS32_INS(LHU, I, .op = MIPS32_OP_LHU)
|
||
|
|
|
||
|
|
/* LUI - load upper immediate */
|
||
|
|
#define MIPS32_OP_LUI 0b001111
|
||
|
|
MIPS32_INS(LUI, I, .op = MIPS32_OP_LUI)
|
||
|
|
|
||
|
|
/* LW - load word */
|
||
|
|
#define MIPS32_OP_LW 0b100011
|
||
|
|
MIPS32_INS(LW, I, .op = MIPS32_OP_LW)
|
||
|
|
|
||
|
|
/* LWL - load word left */
|
||
|
|
#define MIPS32_OP_LWL 0b100010
|
||
|
|
MIPS32_INS(LWL, I, .op = MIPS32_OP_LWL)
|
||
|
|
|
||
|
|
/* LWR - load word right */
|
||
|
|
#define MIPS32_OP_LWR 0b100110
|
||
|
|
MIPS32_INS(LWR, I, .op = MIPS32_OP_LWR)
|
||
|
|
|
||
|
|
/* MFHI - move from hi */
|
||
|
|
#define MIPS32_FUNCT_MFHI 0b010000
|
||
|
|
MIPS32_INS(MFHI, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_MFHI)
|
||
|
|
|
||
|
|
/* MFLO - move from hi */
|
||
|
|
#define MIPS32_FUNCT_MFLO 0b010010
|
||
|
|
MIPS32_INS(MFLO, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_MFLO)
|
||
|
|
|
||
|
|
/* MTHI - move from hi */
|
||
|
|
#define MIPS32_FUNCT_MTHI 0b010001
|
||
|
|
MIPS32_INS(MTHI, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_MTHI)
|
||
|
|
|
||
|
|
/* MTLO - move from hi */
|
||
|
|
#define MIPS32_FUNCT_MTLO 0b010011
|
||
|
|
MIPS32_INS(MTLO, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_MTLO)
|
||
|
|
|
||
|
|
/* MULT - multiply */
|
||
|
|
#define MIPS32_FUNCT_MULT 0b011000
|
||
|
|
MIPS32_INS(MULT, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_MULT)
|
||
|
|
|
||
|
|
/* MULTU - multiply unsigned */
|
||
|
|
#define MIPS32_FUNCT_MULTU 0b011001
|
||
|
|
MIPS32_INS(MULTU, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_MULTU)
|
||
|
|
|
||
|
|
/* SB - store byte */
|
||
|
|
#define MIPS32_OP_SB 0b101000
|
||
|
|
MIPS32_INS(SB, I, .op = MIPS32_OP_SB)
|
||
|
|
|
||
|
|
/* SH - store half */
|
||
|
|
#define MIPS32_OP_SH 0b101001
|
||
|
|
MIPS32_INS(SH, I, .op = MIPS32_OP_SH)
|
||
|
|
|
||
|
|
/* SW - store word */
|
||
|
|
#define MIPS32_OP_SW 0b101011
|
||
|
|
MIPS32_INS(SW, I, .op = MIPS32_OP_SW)
|
||
|
|
|
||
|
|
/* SWL - store word left */
|
||
|
|
#define MIPS32_OP_SWL 0b101010
|
||
|
|
MIPS32_INS(SWL, I, .op = MIPS32_OP_SWL)
|
||
|
|
|
||
|
|
/* SWR - store word right */
|
||
|
|
#define MIPS32_OP_SWR 0b101110
|
||
|
|
MIPS32_INS(SWR, I, .op = MIPS32_OP_SWR)
|
||
|
|
|
||
|
|
/* SLL - shift left logical */
|
||
|
|
#define MIPS32_FUNCT_SLL 0b000000
|
||
|
|
MIPS32_INS(SLL, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SLL)
|
||
|
|
|
||
|
|
/* SLLV - shift left logical variable */
|
||
|
|
#define MIPS32_FUNCT_SLLV 0b000100
|
||
|
|
MIPS32_INS(SLLV, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SLLV)
|
||
|
|
|
||
|
|
/* SLT - set less then */
|
||
|
|
#define MIPS32_FUNCT_SLT 0b101010
|
||
|
|
MIPS32_INS(SLT, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SLT)
|
||
|
|
|
||
|
|
/* SLTI - set less then immediate */
|
||
|
|
#define MIPS32_OP_SLTI 0b001010
|
||
|
|
MIPS32_INS(SLTI, I, .op = MIPS32_OP_SLTI)
|
||
|
|
|
||
|
|
/* SLTIU - set less then imemdiate unsigned */
|
||
|
|
#define MIPS32_OP_SLTIU 0b001011
|
||
|
|
MIPS32_INS(SLTIU, I, .op = MIPS32_OP_SLTIU)
|
||
|
|
|
||
|
|
/* SLTU - set less than unsigned */
|
||
|
|
#define MIPS32_FUNCT_SLTU 0b101011
|
||
|
|
MIPS32_INS(SLTU, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SLTU)
|
||
|
|
|
||
|
|
/* SRA - shift right arithmetic */
|
||
|
|
#define MIPS32_FUNCT_SRA 0b000011
|
||
|
|
MIPS32_INS(SRA, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SRA)
|
||
|
|
|
||
|
|
/* SRAV - shift right arithmetic variable */
|
||
|
|
#define MIPS32_FUNCT_SRAV 0b000111
|
||
|
|
MIPS32_INS(SRAV, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SRAV)
|
||
|
|
|
||
|
|
/* SRL - shift right logical */
|
||
|
|
#define MIPS32_FUNCT_SRL 0b000010
|
||
|
|
MIPS32_INS(SRL, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SRL)
|
||
|
|
|
||
|
|
/* SRLV - shift right logical variable */
|
||
|
|
#define MIPS32_FUNCT_SRLV 0b000110
|
||
|
|
MIPS32_INS(SRLV, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SRLV)
|
||
|
|
|
||
|
|
/* SUB - subtract */
|
||
|
|
#define MIPS32_FUNCT_SUB 0b100010
|
||
|
|
MIPS32_INS(SUB, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SUB)
|
||
|
|
|
||
|
|
/* SUBU - subtract unsigned */
|
||
|
|
#define MIPS32_FUNCT_SUBU 0b100011
|
||
|
|
MIPS32_INS(SUBU, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_SUBU)
|
||
|
|
|
||
|
|
/* OR - or */
|
||
|
|
#define MIPS32_FUNCT_OR 0b100101
|
||
|
|
MIPS32_INS(OR, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_OR)
|
||
|
|
|
||
|
|
/* ORI - or imemdiate */
|
||
|
|
#define MIPS32_OP_ORI 0b001101
|
||
|
|
MIPS32_INS(ORI, I, .op = MIPS32_OP_ORI)
|
||
|
|
|
||
|
|
/* NOR - not or */
|
||
|
|
#define MIPS32_FUNCT_NOR 0b100111
|
||
|
|
MIPS32_INS(NOR, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_NOR)
|
||
|
|
|
||
|
|
/* XOR - exclusive or */
|
||
|
|
#define MIPS32_FUNCT_XOR 0b100110
|
||
|
|
MIPS32_INS(XOR, R, .op = MIPS32_OP_SPECIAL, .funct = MIPS32_FUNCT_XOR)
|
||
|
|
|
||
|
|
/* XORI - exclusive or immediate */
|
||
|
|
#define MIPS32_OP_XORI 0b001110
|
||
|
|
MIPS32_INS(XORI, I, .op = MIPS32_OP_XORI)
|
||
|
|
};
|
||
|
|
|
||
|
|
#undef MIPS32_INS
|
||
|
|
|
||
|
|
/* mips32 directive types */
|
||
|
|
enum mips32_directive_type {
|
||
|
|
MIPS32_DIRECTIVE_ALIGN,
|
||
|
|
MIPS32_DIRECTIVE_SPACE,
|
||
|
|
MIPS32_DIRECTIVE_WORD,
|
||
|
|
MIPS32_DIRECTIVE_HALF,
|
||
|
|
MIPS32_DIRECTIVE_BYTE,
|
||
|
|
MIPS32_DIRECTIVE_SECTION,
|
||
|
|
};
|
||
|
|
|
||
|
|
/* mip32 directive */
|
||
|
|
struct mips32_directive {
|
||
|
|
enum mips32_directive_type type;
|
||
|
|
union {
|
||
|
|
uint16_t align;
|
||
|
|
uint16_t space;
|
||
|
|
uint32_t words[MAX_ARG_LENGTH];
|
||
|
|
uint16_t halfs[MAX_ARG_LENGTH];
|
||
|
|
uint8_t bytes[MAX_ARG_LENGTH];
|
||
|
|
char name[MAX_ARG_LENGTH];
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
#endif /* __MIPS32_H__ */
|