mirror of
https://github.com/kenshineto/kern.git
synced 2025-04-21 12:47:25 +00:00
fmt
This commit is contained in:
parent
876970bcfd
commit
d0854aa095
13 changed files with 161 additions and 148 deletions
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@ -60,7 +60,7 @@ extern void *memset(void *restrict dest, int c, size_t n);
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* @returns a pointer to dest
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*/
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extern volatile void *memcpyv(volatile void *restrict dest,
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const volatile void *restrict src, size_t n);
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const volatile void *restrict src, size_t n);
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/**
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* Copy the first n bytes from memory area src to memory area dest. The memory
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@ -72,7 +72,7 @@ extern volatile void *memcpyv(volatile void *restrict dest,
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* @returns a pointer to dest
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*/
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extern volatile void *memmovev(volatile void *restrict dest,
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const volatile void *restrict src, size_t n);
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const volatile void *restrict src, size_t n);
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/**
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* Fill the first n bytes of the memory region dest with the constant byte c.
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@ -3,7 +3,8 @@
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#include "pic.h"
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#include "idt.h"
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void cpu_init(void) {
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void cpu_init(void)
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{
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pic_remap();
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idt_init();
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fpu_init();
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@ -2,11 +2,12 @@
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#include "fpu.h"
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void fpu_init(void) {
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void fpu_init(void)
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{
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size_t cr4;
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uint16_t cw = 0x37F;
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__asm__ volatile ("mov %%cr4, %0" : "=r"(cr4));
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__asm__ volatile("mov %%cr4, %0" : "=r"(cr4));
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cr4 |= 0x200;
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__asm__ volatile ("mov %0, %%cr4" :: "r"(cr4));
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__asm__ volatile("fldcw %0" :: "m"(cw));
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__asm__ volatile("mov %0, %%cr4" ::"r"(cr4));
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__asm__ volatile("fldcw %0" ::"m"(cw));
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}
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109
kernel/cpu/idt.c
109
kernel/cpu/idt.c
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@ -9,12 +9,12 @@
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#define IDT_SIZE 256
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struct idt_entry {
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uint16_t isr_low; // low 16 bits of isr
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uint16_t kernel_cs; // kernel segment selector
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uint8_t ist; // interrupt stack table
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uint8_t flags; // gate type, privilege level, present bit
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uint16_t isr_mid; // middle 16 bits of isr
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uint32_t isr_high; // high 32 bits of isr
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uint16_t isr_low; // low 16 bits of isr
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uint16_t kernel_cs; // kernel segment selector
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uint8_t ist; // interrupt stack table
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uint8_t flags; // gate type, privilege level, present bit
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uint16_t isr_mid; // middle 16 bits of isr
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uint32_t isr_high; // high 32 bits of isr
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uint32_t reserved;
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} __attribute__((packed));
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@ -24,7 +24,7 @@ struct idtr {
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} __attribute__((packed));
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// interrupt gate
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#define GATE_64BIT_INT 0x0E
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#define GATE_64BIT_INT 0x0E
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// trap gate
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#define GATE_64BIT_TRAP 0x0F
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@ -37,15 +37,15 @@ struct idtr {
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// interrupt is present in IDT
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#define PRESENT 0x80
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__attribute__((aligned(0x10)))
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static struct idt_entry idt[256];
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__attribute__((aligned(0x10))) static struct idt_entry idt[256];
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static struct idtr idtr;
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// from idt.S
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extern void *isr_stub_table[];
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// initialize and load the IDT
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void idt_init(void) {
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void idt_init(void)
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{
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// initialize idtr
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idtr.address = (uint64_t)&idt;
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idtr.size = (uint16_t)sizeof(struct idt_entry) * IDT_SIZE - 1;
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@ -67,10 +67,11 @@ void idt_init(void) {
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entry->reserved = 0;
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}
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__asm__ volatile ("lidt %0" : : "m"(idtr));
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__asm__ volatile("lidt %0" : : "m"(idtr));
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}
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static void isr_print_regs(struct isr_regs *regs) {
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static void isr_print_regs(struct isr_regs *regs)
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{
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printf("rax: %#016lx (%lu)\n", regs->rax, regs->rax);
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printf("rbx: %#016lx (%lu)\n", regs->rbx, regs->rbx);
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printf("rcx: %#016lx (%lu)\n", regs->rcx, regs->rcx);
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@ -79,8 +80,8 @@ static void isr_print_regs(struct isr_regs *regs) {
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printf("rdi: %#016lx (%lu)\n", regs->rdi, regs->rdi);
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printf("rsp: %#016lx (%lu)\n", regs->rsp, regs->rsp);
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printf("rbp: %#016lx (%lu)\n", regs->rbp, regs->rbp);
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printf("r8 : %#016lx (%lu)\n", regs->r8 , regs->r8 );
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printf("r9 : %#016lx (%lu)\n", regs->r9 , regs->r9 );
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printf("r8 : %#016lx (%lu)\n", regs->r8, regs->r8);
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printf("r9 : %#016lx (%lu)\n", regs->r9, regs->r9);
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printf("r10: %#016lx (%lu)\n", regs->r10, regs->r10);
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printf("r11: %#016lx (%lu)\n", regs->r11, regs->r11);
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printf("r12: %#016lx (%lu)\n", regs->r12, regs->r12);
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@ -91,30 +92,48 @@ static void isr_print_regs(struct isr_regs *regs) {
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printf("rflags: %#016lx (%lu)\n", regs->rflags, regs->rflags);
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struct rflags *rflags = (struct rflags *)regs->rflags;
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puts("rflags: ");
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if (rflags->cf) puts("CF ");
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if (rflags->pf) puts("PF ");
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if (rflags->af) puts("AF ");
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if (rflags->zf) puts("ZF ");
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if (rflags->sf) puts("SF ");
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if (rflags->tf) puts("TF ");
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if (rflags->if_) puts("IF ");
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if (rflags->df) puts("DF ");
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if (rflags->of) puts("OF ");
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if (rflags->iopl) puts("IOPL ");
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if (rflags->nt) puts("NT ");
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if (rflags->md) puts("MD ");
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if (rflags->rf) puts("RF ");
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if (rflags->vm) puts("VM ");
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if (rflags->ac) puts("AC ");
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if (rflags->vif) puts("VIF ");
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if (rflags->vip) puts("VIP ");
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if (rflags->id) puts("ID ");
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if (rflags->cf)
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puts("CF ");
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if (rflags->pf)
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puts("PF ");
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if (rflags->af)
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puts("AF ");
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if (rflags->zf)
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puts("ZF ");
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if (rflags->sf)
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puts("SF ");
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if (rflags->tf)
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puts("TF ");
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if (rflags->if_)
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puts("IF ");
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if (rflags->df)
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puts("DF ");
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if (rflags->of)
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puts("OF ");
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if (rflags->iopl)
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puts("IOPL ");
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if (rflags->nt)
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puts("NT ");
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if (rflags->md)
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puts("MD ");
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if (rflags->rf)
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puts("RF ");
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if (rflags->vm)
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puts("VM ");
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if (rflags->ac)
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puts("AC ");
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if (rflags->vif)
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puts("VIF ");
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if (rflags->vip)
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puts("VIP ");
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if (rflags->id)
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puts("ID ");
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puts("\n");
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}
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#define EX_DEBUG 0x01
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#define EX_BREAKPOINT 0x03
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#define EX_PAGE_FAULT 0x0e
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#define EX_DEBUG 0x01
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#define EX_BREAKPOINT 0x03
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#define EX_PAGE_FAULT 0x0e
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// Intel manual vol 3 ch 6.3.1
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char *EXCEPTIONS[] = {
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"Reserved",
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};
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void idt_exception_handler(uint64_t exception, uint64_t code, struct isr_regs *state) {
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void idt_exception_handler(uint64_t exception, uint64_t code,
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struct isr_regs *state)
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{
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uint64_t cr2;
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switch (exception) {
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case EX_PAGE_FAULT:
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// page faults store the offending address in cr2
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__asm__ volatile ("mov %%cr2, %0" : "=r"(cr2));
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__asm__ volatile("mov %%cr2, %0" : "=r"(cr2));
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if (!load_page((void *)cr2))
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return;
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}
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@ -182,13 +203,15 @@ void idt_exception_handler(uint64_t exception, uint64_t code, struct isr_regs *s
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}
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}
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void idt_pic_eoi(uint8_t exception) {
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void idt_pic_eoi(uint8_t exception)
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{
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pic_eoi(exception - PIC_REMAP_OFFSET);
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}
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int counter = 0;
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void idt_pic_timer(void) {
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void idt_pic_timer(void)
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{
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// print a message once we know the timer works
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// but avoid spamming the logs
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if (counter == 3) {
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@ -199,6 +222,10 @@ void idt_pic_timer(void) {
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}
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}
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void idt_pic_keyboard(void) {}
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void idt_pic_keyboard(void)
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{
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}
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void idt_pic_mouse(void) {}
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void idt_pic_mouse(void)
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{
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}
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@ -36,33 +36,13 @@ struct isr_regs {
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};
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struct rflags {
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uint64_t cf : 1,
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: 1,
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pf : 1,
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: 1,
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af : 1,
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: 1,
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zf : 1,
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sf : 1,
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uint64_t cf : 1, : 1, pf : 1, : 1, af : 1, : 1, zf : 1, sf : 1,
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tf : 1,
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if_ : 1,
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df : 1,
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of : 1,
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iopl : 2,
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nt : 1,
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md : 1,
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tf : 1, if_ : 1, df : 1, of : 1, iopl : 2, nt : 1, md : 1,
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rf : 1,
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vm : 1,
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ac : 1,
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vif : 1,
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vip : 1,
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id : 1,
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: 42;
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rf : 1, vm : 1, ac : 1, vif : 1, vip : 1, id : 1, : 42;
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};
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void idt_init(void);
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#endif /* idt.h */
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@ -2,56 +2,63 @@
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#include "pic.h"
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#define PIC1 0x20 /* IO base address for master PIC */
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#define PIC2 0xA0 /* IO base address for slave PIC */
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#define PIC1_COMMAND PIC1
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#define PIC1_DATA (PIC1+1)
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#define PIC2_COMMAND PIC2
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#define PIC2_DATA (PIC2+1)
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#define PIC1 0x20 /* IO base address for master PIC */
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#define PIC2 0xA0 /* IO base address for slave PIC */
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#define PIC1_COMMAND PIC1
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#define PIC1_DATA (PIC1 + 1)
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#define PIC2_COMMAND PIC2
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#define PIC2_DATA (PIC2 + 1)
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#define PIC_EOI 0x20 /* End-of-interrupt command code */
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#define PIC_EOI 0x20 /* End-of-interrupt command code */
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#define ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */
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#define ICW1_SINGLE 0x02 /* Single (cascade) mode */
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#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
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#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
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#define ICW1_INIT 0x10 /* Initialization - required! */
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#define ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */
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#define ICW1_SINGLE 0x02 /* Single (cascade) mode */
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#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
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#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
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#define ICW1_INIT 0x10 /* Initialization - required! */
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#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
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#define ICW4_AUTO 0x02 /* Auto (normal) EOI */
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#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
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#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
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#define ICW4_SFNM 0x10 /* Special fully nested (not) */
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#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
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#define ICW4_AUTO 0x02 /* Auto (normal) EOI */
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#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
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#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
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#define ICW4_SFNM 0x10 /* Special fully nested (not) */
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void pic_remap(void) {
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void pic_remap(void)
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{
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uint8_t a1, a2;
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a1 = inb(PIC1_DATA); // save masks
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a1 = inb(PIC1_DATA); // save masks
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a2 = inb(PIC2_DATA);
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outb(PIC1_COMMAND, ICW1_INIT | ICW1_ICW4); // starts the initialization sequence (in cascade mode)
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outb(PIC1_COMMAND,
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ICW1_INIT |
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ICW1_ICW4); // starts the initialization sequence (in cascade mode)
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io_wait();
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outb(PIC2_COMMAND, ICW1_INIT | ICW1_ICW4);
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io_wait();
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outb(PIC1_DATA, PIC_REMAP_OFFSET); // ICW2: Master PIC vector offset
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outb(PIC1_DATA, PIC_REMAP_OFFSET); // ICW2: Master PIC vector offset
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io_wait();
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outb(PIC2_DATA, PIC_REMAP_OFFSET + 8); // ICW2: Slave PIC vector offset
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outb(PIC2_DATA, PIC_REMAP_OFFSET + 8); // ICW2: Slave PIC vector offset
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io_wait();
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outb(PIC1_DATA, 4); // ICW3: tell Master PIC that there is a slave PIC at IRQ2 (0000 0100)
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outb(
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PIC1_DATA,
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4); // ICW3: tell Master PIC that there is a slave PIC at IRQ2 (0000 0100)
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io_wait();
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outb(PIC2_DATA, 2); // ICW3: tell Slave PIC its cascade identity (0000 0010)
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outb(PIC2_DATA, 2); // ICW3: tell Slave PIC its cascade identity (0000 0010)
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io_wait();
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outb(PIC1_DATA, ICW4_8086); // ICW4: have the PICs use 8086 mode (and not 8080 mode)
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outb(PIC1_DATA,
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ICW4_8086); // ICW4: have the PICs use 8086 mode (and not 8080 mode)
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io_wait();
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outb(PIC2_DATA, ICW4_8086);
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io_wait();
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outb(PIC1_DATA, a1); // restore saved masks.
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outb(PIC1_DATA, a1); // restore saved masks.
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outb(PIC2_DATA, a2);
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}
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void pic_mask(int irq) {
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void pic_mask(int irq)
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{
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uint16_t port;
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uint8_t mask;
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if (irq < 8) {
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@ -64,7 +71,8 @@ void pic_mask(int irq) {
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outb(port, mask);
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}
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void pic_unmask(int irq) {
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void pic_unmask(int irq)
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{
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uint16_t port;
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uint8_t mask;
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if (irq < 8) {
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@ -77,12 +85,14 @@ void pic_unmask(int irq) {
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outb(port, mask);
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}
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void pic_disable(void) {
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void pic_disable(void)
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{
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outb(PIC1_DATA, 0xff);
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outb(PIC2_DATA, 0xff);
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}
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void pic_eoi(int irq) {
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void pic_eoi(int irq)
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{
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if (irq >= 8) {
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outb(PIC2_COMMAND, PIC_EOI);
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}
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@ -3,14 +3,17 @@
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#include <comus/asm.h>
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#define PORT 0x3F8
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static void serial_out(uint8_t ch) {
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static void serial_out(uint8_t ch)
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{
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// wait for output to be free
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while ((inb(PORT + 5) & 0x20) == 0);
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while ((inb(PORT + 5) & 0x20) == 0)
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;
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outb(PORT, ch);
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}
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void fputc(FILE *stream, char c) {
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(void) stream;
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void fputc(FILE *stream, char c)
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{
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(void)stream;
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serial_out(c);
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}
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@ -2,8 +2,8 @@
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#include <stdarg.h>
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#include <comus/asm.h>
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__attribute__((noreturn))
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void panic(const char *format, ...) {
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__attribute__((noreturn)) void panic(const char *format, ...)
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{
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cli();
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va_list list;
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va_start(list, format);
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@ -3,13 +3,13 @@
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void *locate_mboot_table(volatile void *mboot, uint32_t type)
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{
|
||||
struct mboot_info *info = (struct mboot_info *) mboot;
|
||||
const char *mboot_end = ((char *) info) + info->total_size;
|
||||
struct mboot_info *info = (struct mboot_info *)mboot;
|
||||
const char *mboot_end = ((char *)info) + info->total_size;
|
||||
|
||||
char *tag_ptr = info->tags;
|
||||
|
||||
while (tag_ptr < mboot_end) {
|
||||
struct mboot_tag *tag = (struct mboot_tag *) tag_ptr;
|
||||
struct mboot_tag *tag = (struct mboot_tag *)tag_ptr;
|
||||
|
||||
if (tag->type == type)
|
||||
return tag;
|
||||
|
|
|
@ -11,14 +11,14 @@
|
|||
|
||||
#include <lib.h>
|
||||
|
||||
#define MBOOT_HEADER_MAGIC 0x36D76289
|
||||
#define MBOOT_HEADER_MAGIC 0x36D76289
|
||||
|
||||
#define MBOOT_CMDLINE 1
|
||||
#define MBOOT_MEMORY_MAP 6
|
||||
#define MBOOT_FRAMEBUFFER 8
|
||||
#define MBOOT_ELF_SYMBOLS 9
|
||||
#define MBOOT_OLD_RSDP 14
|
||||
#define MBOOT_NEW_RSDP 15
|
||||
#define MBOOT_CMDLINE 1
|
||||
#define MBOOT_MEMORY_MAP 6
|
||||
#define MBOOT_FRAMEBUFFER 8
|
||||
#define MBOOT_ELF_SYMBOLS 9
|
||||
#define MBOOT_OLD_RSDP 14
|
||||
#define MBOOT_NEW_RSDP 15
|
||||
|
||||
struct mboot_info {
|
||||
uint32_t total_size;
|
||||
|
@ -70,7 +70,6 @@ struct mboot_tag_mmap {
|
|||
struct mboot_mmap_entry entries[];
|
||||
};
|
||||
|
||||
|
||||
struct mboot_tag_old_rsdp {
|
||||
uint32_t type;
|
||||
uint32_t size;
|
||||
|
|
|
@ -5,41 +5,30 @@
|
|||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
static const char *segment_type[] = {
|
||||
"Reserved",
|
||||
"Free",
|
||||
"Reserved",
|
||||
"ACPI Reserved",
|
||||
"Hibernation",
|
||||
"Defective",
|
||||
"Unknown"
|
||||
};
|
||||
static const char *segment_type[] = { "Reserved", "Free",
|
||||
"Reserved", "ACPI Reserved",
|
||||
"Hibernation", "Defective",
|
||||
"Unknown" };
|
||||
|
||||
void mboot_load_mmap(volatile void *mboot, struct memory_map *res)
|
||||
{
|
||||
void *tag = locate_mboot_table(mboot, MBOOT_MEMORY_MAP);
|
||||
struct mboot_tag_mmap *mmap = (struct mboot_tag_mmap *) tag;
|
||||
struct mboot_tag_mmap *mmap = (struct mboot_tag_mmap *)tag;
|
||||
|
||||
int idx = 0;
|
||||
uintptr_t i = (uintptr_t)mmap->entries;
|
||||
printf("MEMORY MAP\n");
|
||||
char buf[20];
|
||||
for (;
|
||||
i < (uintptr_t)mmap->entries + mmap->size;
|
||||
i += mmap->entry_size, idx++
|
||||
) {
|
||||
struct mboot_mmap_entry *seg = (struct mboot_mmap_entry *) i;
|
||||
for (; i < (uintptr_t)mmap->entries + mmap->size;
|
||||
i += mmap->entry_size, idx++) {
|
||||
struct mboot_mmap_entry *seg = (struct mboot_mmap_entry *)i;
|
||||
const char *type = NULL;
|
||||
if (seg->type > 6)
|
||||
type = segment_type[6];
|
||||
else
|
||||
type = segment_type[seg->type];
|
||||
printf("ADDR: %16p LEN: %4s TYPE: %s (%d)\n",
|
||||
(void *)seg->addr,
|
||||
btoa(seg->len, buf),
|
||||
type,
|
||||
seg->type
|
||||
);
|
||||
printf("ADDR: %16p LEN: %4s TYPE: %s (%d)\n", (void *)seg->addr,
|
||||
btoa(seg->len, buf), type, seg->type);
|
||||
if (seg->type != 1 || seg->len < 1)
|
||||
continue;
|
||||
res->entries[idx].addr = seg->addr;
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#include <string.h>
|
||||
|
||||
volatile void *memcpyv(volatile void *restrict dest, const volatile void *restrict src,
|
||||
size_t n)
|
||||
volatile void *memcpyv(volatile void *restrict dest,
|
||||
const volatile void *restrict src, size_t n)
|
||||
{
|
||||
volatile char *d = dest;
|
||||
volatile const char *s = src;
|
||||
|
|
17
lib/printf.c
17
lib/printf.c
|
@ -286,10 +286,9 @@ static int printf_lltoa(char *buf, options_t *opts, bool is_neg,
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
// print zeros if needed
|
||||
if (opts->width_set && len < opts->width && opts->zero) {
|
||||
while(len++ < opts->width)
|
||||
while (len++ < opts->width)
|
||||
*(buf++) = '0';
|
||||
}
|
||||
|
||||
|
@ -351,7 +350,8 @@ static void handle_char_specifier(context_t *ctx, data_t c)
|
|||
printf_putc(ctx, c.c);
|
||||
}
|
||||
|
||||
static void handle_string_specifier(context_t *ctx, options_t *opts, data_t data)
|
||||
static void handle_string_specifier(context_t *ctx, options_t *opts,
|
||||
data_t data)
|
||||
{
|
||||
char *str = data.str;
|
||||
int str_len = 0;
|
||||
|
@ -460,7 +460,7 @@ static void do_printf(context_t *ctx, va_list args)
|
|||
// end int
|
||||
case 's':
|
||||
// read string
|
||||
data.str = va_arg(args, void*);
|
||||
data.str = va_arg(args, void *);
|
||||
break;
|
||||
// end string
|
||||
case 'c':
|
||||
|
@ -585,15 +585,18 @@ void vfprintf(FILE *stream, const char *format, va_list args)
|
|||
do_printf(&ctx, args);
|
||||
}
|
||||
|
||||
void putc(char c) {
|
||||
void putc(char c)
|
||||
{
|
||||
fputc(stdout, c);
|
||||
}
|
||||
|
||||
void puts(const char *str) {
|
||||
void puts(const char *str)
|
||||
{
|
||||
fputs(stdout, str);
|
||||
}
|
||||
|
||||
void fputs(FILE *stream, const char *s) {
|
||||
void fputs(FILE *stream, const char *s)
|
||||
{
|
||||
while (*s)
|
||||
fputc(stream, *s++);
|
||||
}
|
||||
|
|
Loading…
Add table
Reference in a new issue