2025-03-25 17:36:52 -04:00
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/*
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** @file isrs.S
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**
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** @author K. Reek
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** @authors Jon Coles, Warren R. Carithers, Margaret Reek
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** @author numerous Systems Programming classes
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**
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** Stubs for ISRs.
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**
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** This module provides the stubs needed for interrupts to save
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** the machine state before calling the ISR. All interrupts have
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** their own stub which pushes the interrupt number on the stack.
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** This makes it possible for a common ISR to determine which
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** interrupted occurred.
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*/
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#define ASM_SRC
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2025-03-27 11:39:12 -04:00
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# .arch i386
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2025-03-25 17:36:52 -04:00
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#include <bootstrap.h>
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/*
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** Configuration options - define in Makefile
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**
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** TRACE_CX include context restore debugging code
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*/
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.text
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/*
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** Macros for the isr stubs. Some interrupts push an error code on
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** the stack and others don't; for those that don't we simply push
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** a zero so that cleaning up from either type is identical.
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**
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** Note: these are not marked as global symbols, as they are never
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** accessed directly outside of this file. This could be changed
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** if need be by adding this line to each macro definition right
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** after the #define line:
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**
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** .global isr_##vector
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*/
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#define ISR(vector) \
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isr_##vector: ; \
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pushl $0 ; \
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pushl $vector ; \
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jmp isr_save
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#define ERR_ISR(vector) \
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isr_##vector: ; \
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pushl $vector ; \
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jmp isr_save
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.globl isr_table
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.globl isr_restore
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/*
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** This routine saves the machine state, calls the ISR, and then
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** restores the machine state and returns from the interrupt.
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**
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********************************************************************
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********************************************************************
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** NOTE: this code is highly application-specific, and will most **
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** probably require modification to tailor it. **
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** **
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** Examples of mods: switch to/from user stack, context switch **
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** changes, etc. **
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********************************************************************
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********************************************************************
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*/
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isr_save:
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/*
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** Begin by saving the CPU state (except for the FP context information).
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**
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** At this point, the stack looks like this:
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**
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** esp -> vector # saved by the entry macro
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** error code, or 0 saved by the hardware, or the entry macro
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** saved EIP saved by the hardware
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** saved CS saved by the hardware
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** saved EFLAGS saved by the hardware
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*/
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pusha // save E*X, ESP, EBP, ESI, EDI
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pushl %ds // save segment registers
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pushl %es
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pushl %fs
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pushl %gs
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pushl %ss
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/*
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** Stack contents (all 32-bit longwords) and offsets from ESP:
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**
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** SS GS FS ES DS EDI ESI EBP ESP EBX EDX ECX EAX vec cod EIP CS EFL
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** 0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 68
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**
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** Note that the saved ESP is the contents before the PUSHA.
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**
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** Set up parameters for the ISR call.
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*/
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movl 52(%esp),%eax // get vector number and error code
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movl 56(%esp),%ebx
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/*
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***********************
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** MOD FOR 20245 **
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***********************
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*/
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/*
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** We need to switch to the system stack. This requires that we save
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** the user context pointer into the current PCB, then load ESP with
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** the initial system stack pointer.
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*/
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.globl current
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.globl kernel_esp
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// save the context pointer
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movl current, %edx
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movl %esp, (%edx)
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// also save the page directory pointer
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movl %cr3, %ecx
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movl %ecx, 4(%edx)
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// switch to the system stack
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//
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// NOTE: this is inherently non-reentrant! If/when the OS
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// is converted from monolithic to something that supports
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// reentrant or interruptable ISRs, this code will need to
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// be changed to support that!
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movl kernel_esp, %esp
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// we don't change CR3 because all the user PDIRs are
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// set up with mappings for the OS in the upper half
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/*
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***********************
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** END MOD FOR 20245 **
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***********************
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*/
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pushl %ebx // put them on the top of the stack ...
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pushl %eax // ... as parameters for the ISR
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/*
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** Call the ISR
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*/
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movl isr_table(,%eax,4),%ebx
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call *%ebx
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addl $8,%esp // pop the two parameters
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/*
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** Context restore begins here
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*/
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isr_restore:
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/*
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***********************
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** MOD FOR 20245 **
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***********************
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*/
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movl current, %ebx // return to the user stack
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movl (%ebx), %esp // ESP --> context save area
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movl 4(%ebx), %ecx // page directory pointer
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movl %ecx, %cr3
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// now we're operating with the user process'
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// page directory and stack
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/*
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***********************
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** END MOD FOR 20245 **
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***********************
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*/
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#ifdef TRACE_CX
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/*
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** DEBUGGING CODE PART 1
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**
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2025-03-27 14:35:29 -04:00
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** This code will execute during each context restore, and
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2025-03-25 17:36:52 -04:00
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** should be modified to print out whatever debugging information
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** is desired.
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**
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** By default, it prints out the CPU context being restored; it
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** relies on the standard save sequence (see above).
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*/
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.globl cio_printf_at
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pushl $fmt
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pushl $1
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pushl $0
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call cio_printf_at
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addl $12,%esp
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/*
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** END OF DEBUGGING CODE PART 1
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*/
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#endif
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/*
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** Restore the context.
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*/
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popl %ss // restore the segment registers
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popl %gs
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popl %fs
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popl %es
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popl %ds
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popa // restore others
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addl $8, %esp // discard the error code and vector
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iret // and return
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#ifdef TRACE_CX
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/*
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** DEBUGGING CODE PART 2
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**
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** This format string is arranged according to the ordering of values
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** in the context save area on the stack.
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*/
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fmt: .ascii " ss=%08x gs=%08x fs=%08x es=%08x ds=%08x\n"
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.ascii "edi=%08x esi=%08x ebp=%08x esp=%08x ebx=%08x\n"
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.ascii "edx=%08x ecx=%08x eax=%08x vec=%08x cod=%08x\n"
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.string "eip=%08x cs=%08x efl=%08x\n"
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/*
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** END OF DEBUGGING CODE PART 2
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*/
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#endif
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/*
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** Here we generate the individual stubs for each interrupt.
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*/
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ISR(0x00); ISR(0x01); ISR(0x02); ISR(0x03);
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ISR(0x04); ISR(0x05); ISR(0x06); ISR(0x07);
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ERR_ISR(0x08); ISR(0x09); ERR_ISR(0x0a); ERR_ISR(0x0b);
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ERR_ISR(0x0c); ERR_ISR(0x0d); ERR_ISR(0x0e); ISR(0x0f);
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ISR(0x10); ERR_ISR(0x11); ISR(0x12); ISR(0x13);
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ISR(0x14); ERR_ISR(0x15); ISR(0x16); ISR(0x17);
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ISR(0x18); ISR(0x19); ISR(0x1a); ISR(0x1b);
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ISR(0x1c); ISR(0x1d); ISR(0x1e); ISR(0x1f);
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ISR(0x20); ISR(0x21); ISR(0x22); ISR(0x23);
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ISR(0x24); ISR(0x25); ISR(0x26); ISR(0x27);
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ISR(0x28); ISR(0x29); ISR(0x2a); ISR(0x2b);
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ISR(0x2c); ISR(0x2d); ISR(0x2e); ISR(0x2f);
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ISR(0x30); ISR(0x31); ISR(0x32); ISR(0x33);
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ISR(0x34); ISR(0x35); ISR(0x36); ISR(0x37);
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ISR(0x38); ISR(0x39); ISR(0x3a); ISR(0x3b);
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ISR(0x3c); ISR(0x3d); ISR(0x3e); ISR(0x3f);
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ISR(0x40); ISR(0x41); ISR(0x42); ISR(0x43);
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ISR(0x44); ISR(0x45); ISR(0x46); ISR(0x47);
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ISR(0x48); ISR(0x49); ISR(0x4a); ISR(0x4b);
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ISR(0x4c); ISR(0x4d); ISR(0x4e); ISR(0x4f);
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ISR(0x50); ISR(0x51); ISR(0x52); ISR(0x53);
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ISR(0x54); ISR(0x55); ISR(0x56); ISR(0x57);
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ISR(0x58); ISR(0x59); ISR(0x5a); ISR(0x5b);
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ISR(0x5c); ISR(0x5d); ISR(0x5e); ISR(0x5f);
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ISR(0x60); ISR(0x61); ISR(0x62); ISR(0x63);
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ISR(0x64); ISR(0x65); ISR(0x66); ISR(0x67);
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ISR(0x68); ISR(0x69); ISR(0x6a); ISR(0x6b);
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ISR(0x6c); ISR(0x6d); ISR(0x6e); ISR(0x6f);
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ISR(0x70); ISR(0x71); ISR(0x72); ISR(0x73);
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ISR(0x74); ISR(0x75); ISR(0x76); ISR(0x77);
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ISR(0x78); ISR(0x79); ISR(0x7a); ISR(0x7b);
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ISR(0x7c); ISR(0x7d); ISR(0x7e); ISR(0x7f);
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ISR(0x80); ISR(0x81); ISR(0x82); ISR(0x83);
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ISR(0x84); ISR(0x85); ISR(0x86); ISR(0x87);
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ISR(0x88); ISR(0x89); ISR(0x8a); ISR(0x8b);
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ISR(0x8c); ISR(0x8d); ISR(0x8e); ISR(0x8f);
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ISR(0x90); ISR(0x91); ISR(0x92); ISR(0x93);
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ISR(0x94); ISR(0x95); ISR(0x96); ISR(0x97);
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ISR(0x98); ISR(0x99); ISR(0x9a); ISR(0x9b);
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ISR(0x9c); ISR(0x9d); ISR(0x9e); ISR(0x9f);
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ISR(0xa0); ISR(0xa1); ISR(0xa2); ISR(0xa3);
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ISR(0xa4); ISR(0xa5); ISR(0xa6); ISR(0xa7);
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ISR(0xa8); ISR(0xa9); ISR(0xaa); ISR(0xab);
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ISR(0xac); ISR(0xad); ISR(0xae); ISR(0xaf);
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ISR(0xb0); ISR(0xb1); ISR(0xb2); ISR(0xb3);
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ISR(0xb4); ISR(0xb5); ISR(0xb6); ISR(0xb7);
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ISR(0xb8); ISR(0xb9); ISR(0xba); ISR(0xbb);
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ISR(0xbc); ISR(0xbd); ISR(0xbe); ISR(0xbf);
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ISR(0xc0); ISR(0xc1); ISR(0xc2); ISR(0xc3);
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ISR(0xc4); ISR(0xc5); ISR(0xc6); ISR(0xc7);
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ISR(0xc8); ISR(0xc9); ISR(0xca); ISR(0xcb);
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ISR(0xcc); ISR(0xcd); ISR(0xce); ISR(0xcf);
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ISR(0xd0); ISR(0xd1); ISR(0xd2); ISR(0xd3);
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ISR(0xd4); ISR(0xd5); ISR(0xd6); ISR(0xd7);
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ISR(0xd8); ISR(0xd9); ISR(0xda); ISR(0xdb);
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ISR(0xdc); ISR(0xdd); ISR(0xde); ISR(0xdf);
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ISR(0xe0); ISR(0xe1); ISR(0xe2); ISR(0xe3);
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ISR(0xe4); ISR(0xe5); ISR(0xe6); ISR(0xe7);
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ISR(0xe8); ISR(0xe9); ISR(0xea); ISR(0xeb);
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ISR(0xec); ISR(0xed); ISR(0xee); ISR(0xef);
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ISR(0xf0); ISR(0xf1); ISR(0xf2); ISR(0xf3);
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ISR(0xf4); ISR(0xf5); ISR(0xf6); ISR(0xf7);
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ISR(0xf8); ISR(0xf9); ISR(0xfa); ISR(0xfb);
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ISR(0xfc); ISR(0xfd); ISR(0xfe); ISR(0xff);
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.data
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/*
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** This table contains the addresses where each of the preceding
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** stubs begins. This information is needed to initialize the
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** Interrupt Descriptor Table in support.c
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*/
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.globl isr_stub_table
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isr_stub_table:
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.long isr_0x00, isr_0x01, isr_0x02, isr_0x03
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.long isr_0x04, isr_0x05, isr_0x06, isr_0x07
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.long isr_0x08, isr_0x09, isr_0x0a, isr_0x0b
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.long isr_0x0c, isr_0x0d, isr_0x0e, isr_0x0f
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.long isr_0x10, isr_0x11, isr_0x12, isr_0x13
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.long isr_0x14, isr_0x15, isr_0x16, isr_0x17
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.long isr_0x18, isr_0x19, isr_0x1a, isr_0x1b
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.long isr_0x1c, isr_0x1d, isr_0x1e, isr_0x1f
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.long isr_0x20, isr_0x21, isr_0x22, isr_0x23
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.long isr_0x24, isr_0x25, isr_0x26, isr_0x27
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.long isr_0x28, isr_0x29, isr_0x2a, isr_0x2b
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.long isr_0x2c, isr_0x2d, isr_0x2e, isr_0x2f
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.long isr_0x30, isr_0x31, isr_0x32, isr_0x33
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.long isr_0x34, isr_0x35, isr_0x36, isr_0x37
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.long isr_0x38, isr_0x39, isr_0x3a, isr_0x3b
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.long isr_0x3c, isr_0x3d, isr_0x3e, isr_0x3f
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.long isr_0x40, isr_0x41, isr_0x42, isr_0x43
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.long isr_0x44, isr_0x45, isr_0x46, isr_0x47
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.long isr_0x48, isr_0x49, isr_0x4a, isr_0x4b
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.long isr_0x4c, isr_0x4d, isr_0x4e, isr_0x4f
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.long isr_0x50, isr_0x51, isr_0x52, isr_0x53
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.long isr_0x54, isr_0x55, isr_0x56, isr_0x57
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.long isr_0x58, isr_0x59, isr_0x5a, isr_0x5b
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.long isr_0x5c, isr_0x5d, isr_0x5e, isr_0x5f
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.long isr_0x60, isr_0x61, isr_0x62, isr_0x63
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.long isr_0x64, isr_0x65, isr_0x66, isr_0x67
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.long isr_0x68, isr_0x69, isr_0x6a, isr_0x6b
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.long isr_0x6c, isr_0x6d, isr_0x6e, isr_0x6f
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.long isr_0x70, isr_0x71, isr_0x72, isr_0x73
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.long isr_0x74, isr_0x75, isr_0x76, isr_0x77
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.long isr_0x78, isr_0x79, isr_0x7a, isr_0x7b
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.long isr_0x7c, isr_0x7d, isr_0x7e, isr_0x7f
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.long isr_0x80, isr_0x81, isr_0x82, isr_0x83
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.long isr_0x84, isr_0x85, isr_0x86, isr_0x87
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.long isr_0x88, isr_0x89, isr_0x8a, isr_0x8b
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.long isr_0x8c, isr_0x8d, isr_0x8e, isr_0x8f
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.long isr_0x90, isr_0x91, isr_0x92, isr_0x93
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.long isr_0x94, isr_0x95, isr_0x96, isr_0x97
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.long isr_0x98, isr_0x99, isr_0x9a, isr_0x9b
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.long isr_0x9c, isr_0x9d, isr_0x9e, isr_0x9f
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.long isr_0xa0, isr_0xa1, isr_0xa2, isr_0xa3
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.long isr_0xa4, isr_0xa5, isr_0xa6, isr_0xa7
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.long isr_0xa8, isr_0xa9, isr_0xaa, isr_0xab
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.long isr_0xac, isr_0xad, isr_0xae, isr_0xaf
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.long isr_0xb0, isr_0xb1, isr_0xb2, isr_0xb3
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.long isr_0xb4, isr_0xb5, isr_0xb6, isr_0xb7
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.long isr_0xb8, isr_0xb9, isr_0xba, isr_0xbb
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.long isr_0xbc, isr_0xbd, isr_0xbe, isr_0xbf
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.long isr_0xc0, isr_0xc1, isr_0xc2, isr_0xc3
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.long isr_0xc4, isr_0xc5, isr_0xc6, isr_0xc7
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.long isr_0xc8, isr_0xc9, isr_0xca, isr_0xcb
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.long isr_0xcc, isr_0xcd, isr_0xce, isr_0xcf
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.long isr_0xd0, isr_0xd1, isr_0xd2, isr_0xd3
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.long isr_0xd4, isr_0xd5, isr_0xd6, isr_0xd7
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.long isr_0xd8, isr_0xd9, isr_0xda, isr_0xdb
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.long isr_0xdc, isr_0xdd, isr_0xde, isr_0xdf
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.long isr_0xe0, isr_0xe1, isr_0xe2, isr_0xe3
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.long isr_0xe4, isr_0xe5, isr_0xe6, isr_0xe7
|
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|
.long isr_0xe8, isr_0xe9, isr_0xea, isr_0xeb
|
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|
.long isr_0xec, isr_0xed, isr_0xee, isr_0xef
|
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|
.long isr_0xf0, isr_0xf1, isr_0xf2, isr_0xf3
|
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|
.long isr_0xf4, isr_0xf5, isr_0xf6, isr_0xf7
|
|
|
|
|
.long isr_0xf8, isr_0xf9, isr_0xfa, isr_0xfb
|
|
|
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|
.long isr_0xfc, isr_0xfd, isr_0xfe, isr_0xff
|
