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Implemented and fixed paging
This commit is contained in:
parent
1a3c3cacc3
commit
79bd0a643e
2 changed files with 18 additions and 34 deletions
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@ -22,49 +22,44 @@
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// PAGE MAP LEVEL 4 ENTRY
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// PAGE MAP LEVEL 4 ENTRY
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struct pml4e {
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struct pml4e {
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uint64_t flags : 6;
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uint64_t flags : 6;
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uint64_t _reserved : 6;
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uint64_t : 6;
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uint64_t address : 40;
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uint64_t address : 40;
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uint64_t _reserved_2 : 11;
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uint64_t : 11;
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uint64_t execute_disable : 1;
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uint64_t execute_disable : 1;
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};
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};
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// PAGE DIRECTORY POINTER TABLE ENTRY
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// PAGE DIRECTORY POINTER TABLE ENTRY
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struct pdpte {
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struct pdpte {
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uint64_t flags : 6;
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uint64_t flags : 6;
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uint64_t _reserved : 1;
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uint64_t : 1;
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uint64_t page_size : 1;
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uint64_t page_size : 1;
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uint64_t _reserved_2 : 2;
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uint64_t : 4;
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uint64_t address : 40;
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uint64_t address : 40;
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uint64_t _reserved_3 : 11;
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uint64_t : 11;
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uint64_t execute_disable : 1;
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uint64_t execute_disable : 1;
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};
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};
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// PAGE DIRECTORY ENTRY
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// PAGE DIRECTORY ENTRY
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struct pde {
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struct pde {
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uint64_t flags : 6;
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uint64_t flags : 6;
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uint64_t _reserved : 1;
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uint64_t : 1;
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uint64_t page_size : 1;
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uint64_t page_size : 1;
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uint64_t _reserved_2 : 2;
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uint64_t : 4;
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uint64_t address : 40;
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uint64_t address : 40;
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uint64_t _reserved_3 : 11;
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uint64_t : 11;
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uint64_t execute_disable : 1;
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uint64_t execute_disable : 1;
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};
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};
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// PAGE TABLE ENTRY
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// PAGE TABLE ENTRY
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struct pte {
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struct pte {
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uint64_t flags : 9;
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uint64_t flags : 9;
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uint64_t _reserved : 3;
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uint64_t : 3;
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uint64_t address : 40;
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uint64_t address : 40;
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uint64_t _reserved_2 : 7;
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uint64_t : 7;
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uint64_t protection_key : 4;
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uint64_t protection_key : 4;
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uint64_t execute_disable : 1;
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uint64_t execute_disable : 1;
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};
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};
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struct pml4e pml4[512];
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struct pdpte pdpt[512];
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struct pde pd[512];
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struct pte pt[512];
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static int get_maxphysaddr() {
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static int get_maxphysaddr() {
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uint32_t eax, ebx, ecx, edx;
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uint32_t eax, ebx, ecx, edx;
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__cpuid(0x80000008, eax, ebx, ecx, edx);
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__cpuid(0x80000008, eax, ebx, ecx, edx);
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@ -73,23 +68,11 @@ static int get_maxphysaddr() {
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// entry point for amd64
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// entry point for amd64
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void* amd64_shim(void *boot_info) {
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void* amd64_shim(void *boot_info) {
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for (int i = 0; i < 512; i++) {
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struct pml4e *pml4 = (struct pml4e *)0x1000;
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pml4[i].flags = 0;
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struct pdpte *pdpt = (struct pdpte *)0x2000;
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}
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struct pde *pd = (struct pd *)0x3000;
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for (int i = 0; i < 512; i++) {
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struct pte *pt = (struct pt *)0x4000;
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pdpt[i].flags = 0;
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pd[1].flags = F_PRESENT | F_WRITEABLE;
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}
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pd[1].address = ((uint64_t)pt) >> 12;
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for (int i = 0; i < 512; i++) {
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__asm("invlpg 0x200000");
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pd[i].flags = 0;
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}
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pml4[0].flags = F_PRESENT | F_WRITEABLE;
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pml4[0].address = (uint64_t)&pdpt;
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pdpt[0].flags = F_PRESENT | F_WRITEABLE;
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pdpt[0].address = (uint64_t)&pd;
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pd[0].flags = F_PRESENT | F_WRITEABLE;
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pd[0].address = (uint64_t)&pt;
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for (int i = 0; i < 512; i++) {
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pt[i].flags = F_PRESENT | F_WRITEABLE;
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pt[i].address = i * 4096;
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}
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}
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}
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@ -1,5 +1,6 @@
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void kmain() {
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void kmain() {
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*(char*)0xB8000 = 'c';
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*(char*)0xB8000 = 'c';
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*(char*)(0xB8002 + 0x20'0000) = 'd';
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while(1) {
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while(1) {
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__asm("cli; hlt");
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__asm("cli; hlt");
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}
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}
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