things

src/arch/amd64/boot.S

@@ -135,6 +135,11 @@ start:
 
 	bits 64
 code64:
+
+	mov dx, 16
+	mov ds, dx
+	mov ss, dx
+
 	pop rdi
 	call amd64_shim
 	mov rdi, rax

src/arch/amd64/idt.S

@@ -1,15 +1,49 @@
 extern idt_exception_handler
 global isr_stub_table
 
+%macro PUSHALL 0
+    push rbx
+    push rcx
+    push rdx
+    push rsi
+    push rdi
+    push r8
+    push r9
+    push r10
+    push r11
+    push r12
+    push r13
+    push r14
+    push r15
+%endmacro
+
+%macro POPALL 0
+    pop r15
+    pop r14
+    pop r13
+    pop r12
+    pop r11
+    pop r10
+    pop r9
+    pop r8
+    pop rdi
+    pop rsi
+    pop rdx
+    pop rcx
+    pop rbx
+%endmacro
+
 ; call the exception handler with the interrupt number
 ; args: interrupt number
 %macro ISRException 1
 align 8
 isr_stub_%+%1:
+    PUSHALL
     cld
     mov rdi, %1
     mov rsi, 0
     call idt_exception_handler
+    POPALL
     iretq
 %endmacro
 
@@ -19,10 +53,12 @@ isr_stub_%+%1:
 %macro ISRExceptionCode 1
 align 8
 isr_stub_%+%1:
+    PUSHALL
     cld
     mov rdi, %1
     pop rsi
     call idt_exception_handler
+    POPALL
     iretq
 %endmacro
 

src/arch/amd64/idt.c

@@ -9,18 +9,18 @@
 #define IDT_SIZE 256
 
 struct idt_entry {
-	uint16_t isr_low; // low 16 bits of isr
-	uint16_t kernel_cs; // kernel segment selector
-	uint8_t ist; // interrupt stack table
-	uint8_t flags; // gate type, privilege level, present bit
-	uint16_t isr_mid; // middle 16 bits of isr
-	uint32_t isr_high; // high 32 bits of isr
+	uint16_t isr_low;    // low 16 bits of isr
+	uint16_t kernel_cs;  // kernel segment selector
+	uint8_t ist;         // interrupt stack table
+	uint8_t flags;       // gate type, privilege level, present bit
+	uint16_t isr_mid;    // middle 16 bits of isr
+	uint32_t isr_high;   // high 32 bits of isr
 	uint32_t reserved;
 } __attribute__((packed));
 
 struct idtr {
 	uint16_t size;
-	void *address;
+	uint64_t address;
 } __attribute__((packed));
 
 // interrupt gate
@@ -47,7 +47,7 @@ extern void *isr_stub_table[];
 // initialize and load the IDT
 void idt_init(void) {
 	// initialize idtr
-	idtr.address = &idt;
+	idtr.address = (uint64_t)&idt;
 	idtr.size = (uint16_t)sizeof(struct idt_entry) * IDT_SIZE - 1;
 
 	// initialize idt
@@ -63,14 +63,13 @@ void idt_init(void) {
 		entry->flags = PRESENT | RING0 | gate_type;
 		entry->isr_low = isr & 0xffff;
 		entry->isr_mid = (isr >> 16) & 0xffff;
-		entry->isr_high = isr >> 32;
+		entry->isr_high = (isr >> 32) & 0xffffffff;
 		entry->reserved = 0;
 	}
 
 	__asm__ volatile ("lidt %0" : : "m"(idtr));
 }
 
-
 // Intel manual vol 3 ch 6.3.1
 char *EXCEPTIONS[] = {
 	"Exception 0x00 Divide Error",

src/memory/physalloc.c

@@ -182,7 +182,6 @@ void memory_init(struct memory_map *map) {
 	//HACK: terrible hack bad bad bad bad
 	long bitmap_size = bitmap_pages * PAGE_SIZE;
 	bitmap = (uint64_t *) page_align(kaddr(kernel_end));
-	char buf[20];
 
 	long page_area_size = segment_count * sizeof(struct memory_area);
 	char *page_area_addr = (char *)bitmap + bitmap_size;