summaryrefslogtreecommitdiff
path: root/src/arch/amd64/cpu/idt.S
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/amd64/cpu/idt.S')
-rw-r--r--src/arch/amd64/cpu/idt.S207
1 files changed, 207 insertions, 0 deletions
diff --git a/src/arch/amd64/cpu/idt.S b/src/arch/amd64/cpu/idt.S
new file mode 100644
index 0000000..cd8783e
--- /dev/null
+++ b/src/arch/amd64/cpu/idt.S
@@ -0,0 +1,207 @@
+extern idt_exception_handler
+global isr_stub_table
+
+extern idt_pic_timer
+extern idt_pic_keyboard
+extern idt_pic_mouse
+extern idt_pic_eoi
+
+%macro PUSHALL 0
+ push rax
+ push rbx
+ push rcx
+ push rdx
+ push rsi
+ push rdi
+ push rbp
+ push r8
+ push r9
+ push r10
+ push r11
+ push r12
+ push r13
+ push r14
+ push r15
+%endmacro
+
+%macro POPALL 0
+ pop r15
+ pop r14
+ pop r13
+ pop r12
+ pop r11
+ pop r10
+ pop r9
+ pop r8
+ pop rbp
+ pop rdi
+ pop rsi
+ pop rdx
+ pop rcx
+ pop rbx
+ pop rax
+%endmacro
+
+; call the exception handler with the interrupt number
+; args: interrupt number
+%macro ISRException 1
+align 8
+isr_stub_%+%1:
+ PUSHALL
+ cld
+ mov rdi, %1 ; exception number
+ mov rsi, 0 ; placeholder error code
+ mov rdx, rsp ; top of stack
+ call idt_exception_handler
+ POPALL
+ iretq
+%endmacro
+
+; call the exception handler with the interrupt number
+; these exceptions also put an error code on the stack
+; args: interrupt number
+%macro ISRExceptionCode 1
+align 8
+isr_stub_%+%1:
+ ; retrieve the error code without corrupting registers
+ mov [isr_tmp], rax
+ pop rax
+ mov [isr_err_code], rax
+ mov rax, [isr_tmp]
+ PUSHALL
+ cld
+ mov rdi, %1 ; exception number
+ mov rsi, [isr_err_code] ; error code
+ mov rdx, rsp ; top of stack
+ call idt_exception_handler
+ POPALL
+ iretq
+%endmacro
+
+%macro PICGeneric 1
+isr_stub_%+%1:
+ PUSHALL
+ cld
+ mov rdi, %1
+ call idt_pic_eoi
+ POPALL
+ iretq
+%endmacro
+
+%macro PICTimer 1
+isr_stub_%+%1:
+ PUSHALL
+ cld
+ call idt_pic_timer
+ mov rdi, %1
+ call idt_pic_eoi
+ POPALL
+ iretq
+%endmacro
+
+%macro PICKeyboard 1
+isr_stub_%+%1:
+ PUSHALL
+ cld
+ call idt_pic_keyboard
+ mov rdi, %1
+ call idt_pic_eoi
+ POPALL
+ iretq
+%endmacro
+
+%macro PICMouse 1
+isr_stub_%+%1:
+ PUSHALL
+ cld
+ call idt_pic_mouse
+ mov rdi, %1
+ call idt_pic_eoi
+ POPALL
+ iretq
+%endmacro
+
+; do nothing
+; args: interrupt number
+%macro ISRIgnore 1
+align 8
+isr_stub_%+%1:
+ iretq
+%endmacro
+
+; isr stubs
+section .text
+bits 64
+
+ISRException 0
+ISRException 1
+ISRException 2
+ISRException 3
+ISRException 4
+ISRException 5
+ISRException 6
+ISRException 7
+ISRExceptionCode 8
+ISRException 9
+ISRExceptionCode 10
+ISRExceptionCode 11
+ISRExceptionCode 12
+ISRExceptionCode 13
+ISRExceptionCode 14
+ISRException 15
+ISRException 16
+ISRExceptionCode 17
+ISRException 18
+ISRException 19
+ISRException 20
+ISRExceptionCode 21
+ISRException 22
+ISRException 23
+ISRException 24
+ISRException 25
+ISRException 26
+ISRException 27
+ISRException 28
+ISRExceptionCode 29
+ISRExceptionCode 30
+ISRException 31
+
+PICTimer 32 ; 0
+PICKeyboard 33 ; 1
+PICGeneric 34 ; 2
+PICGeneric 35 ; 3
+PICGeneric 36 ; 4
+PICGeneric 37 ; 5
+PICGeneric 38 ; 6
+PICGeneric 39 ; 7
+PICGeneric 40 ; 8
+PICGeneric 41 ; 9
+PICGeneric 42 ; 10
+PICGeneric 43 ; 11
+PICMouse 44 ; 12
+PICGeneric 45 ; 13
+PICGeneric 46 ; 14
+PICGeneric 47 ; 15
+
+; ignore other interrupts
+%assign i 48
+%rep 256 - i
+ ISRIgnore i
+ %assign i i+1
+%endrep
+
+section .data
+isr_tmp: dq 0
+isr_err_code: dq 0
+
+; isr stub table
+section .rodata
+bits 64
+align 16
+
+isr_stub_table:
+%assign i 0
+%rep 256
+ dq isr_stub_%+i
+%assign i i+1
+%endrep