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authortrimill <trimill@trimillxyz.org>2024-01-27 01:40:39 -0500
committertrimill <trimill@trimillxyz.org>2024-01-27 01:40:39 -0500
commit89ecedfceb9c30ed5f75027d67014f6a66469f69 (patch)
tree38b478cfd5760d50edc5b29f27e275a2b247d287 /src
parentadd system includes from include (diff)
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create bindings.h
Diffstat (limited to '')
-rw-r--r--src/arch/amd64/bindings.h53
1 files changed, 53 insertions, 0 deletions
diff --git a/src/arch/amd64/bindings.h b/src/arch/amd64/bindings.h
new file mode 100644
index 0000000..9406774
--- /dev/null
+++ b/src/arch/amd64/bindings.h
@@ -0,0 +1,53 @@
+#pragma once
+
+#include <stdint.h>
+
+static inline uint8_t inb(uint16_t port) {
+ uint8_t ret;
+ __asm__ volatile ("inb %1, %0" : "=a"(ret) : "Nd"(port));
+ return ret;
+}
+
+static inline void outb(uint16_t port, uint8_t val) {
+ __asm__ volatile ("outb %0, %1" : : "a"(val), "Nd"(port));
+}
+
+static inline uint16_t inw(uint16_t port) {
+ uint16_t ret;
+ __asm__ volatile ("inw %1, %0" : "=a"(ret) : "Nd"(port));
+ return ret;
+}
+
+static inline void outw(uint16_t port, uint16_t val) {
+ __asm__ volatile ("outw %0, %1" : : "a"(val), "Nd"(port));
+}
+
+static inline uint32_t inl(uint16_t port) {
+ uint32_t ret;
+ __asm__ volatile ("inl %1, %0" : "=a"(ret) : "Nd"(port));
+ return ret;
+}
+
+static inline void outl(uint16_t port, uint32_t val) {
+ __asm__ volatile ("outl %0, %1" : : "a"(val), "Nd"(port));
+}
+
+static inline void io_wait(void) {
+ outb(0x80, 0);
+}
+
+static inline void sti(void) {
+ __asm__ volatile ("sti");
+}
+
+static inline void cli(void) {
+ __asm__ volatile ("cli");
+}
+
+static inline void int_wait(void) {
+ __asm__ volatile ("sti; hlt");
+}
+
+static inline void halt(void) {
+ __asm__ volatile ("cli; hlt");
+}