From c8a1e0531d7ccdce5f76aec8a5b6147c686d3403 Mon Sep 17 00:00:00 2001 From: Freya Murphy Date: Tue, 8 Apr 2025 10:49:18 -0400 Subject: fix old checkout --- kernel/old/include/support.h | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) (limited to 'kernel/old/include/support.h') diff --git a/kernel/old/include/support.h b/kernel/old/include/support.h index ac75a64..bdc5dc6 100644 --- a/kernel/old/include/support.h +++ b/kernel/old/include/support.h @@ -30,14 +30,14 @@ ** ** Ultimately, just remember that THESE VALUES ARE APPROXIMATE AT BEST. */ -#define DELAY_1_SEC 40 -#define DELAY_1_25_SEC 50 -#define DELAY_2_SEC 80 -#define DELAY_2_5_SEC 100 -#define DELAY_3_SEC 120 -#define DELAY_5_SEC 200 -#define DELAY_7_SEC 280 -#define DELAY_10_SEC 400 +#define DELAY_1_SEC 40 +#define DELAY_1_25_SEC 50 +#define DELAY_2_SEC 80 +#define DELAY_2_5_SEC 100 +#define DELAY_3_SEC 120 +#define DELAY_5_SEC 200 +#define DELAY_7_SEC 280 +#define DELAY_10_SEC 400 #ifndef ASM_SRC /** @@ -49,7 +49,7 @@ ** ** @param reason NUL-terminated message to be printed. */ -void panic(char *reason); +void panic( char *reason ); /** ** init_interrupts @@ -58,7 +58,7 @@ void panic(char *reason); ** IDT and the PIC. It is up to the user to enable processor interrupts ** when they're ready. */ -void init_interrupts(void); +void init_interrupts( void ); /* ** install_isr @@ -71,7 +71,8 @@ void init_interrupts(void); ** ** @return a pointer to the previously-registered ISR */ -void (*install_isr(int vector, void (*handler)(int, int)))(int, int); +void (*install_isr( int vector, + void ( *handler )(int,int) ) )( int, int ); /* ** Name: delay @@ -79,8 +80,8 @@ void (*install_isr(int vector, void (*handler)(int, int)))(int, int); ** See the comment above about the relative accuracy of the 'length' ** parameter. */ -void delay(int length); +void delay( int length ); -#endif /* !ASM_SRC */ +#endif /* !ASM_SRC */ #endif -- cgit v1.2.3-freya